TECHNICAL DATA SHEETFlexor 5973
3U VPX Virtex-7 Processorand FMC Carrier

FMC carrier offers
optical interface▪ Incorporates the VITA 66.4 standard forhalf-size MT optical interconnect▪ Robust solution for high data ratedemands▪ Provides 12 optical duplex lanes to thebackplane▪ VITA-57.1 FMC site offers access to awide range of possible I/O

The Flexor™ 5973 is a high-performance 3U OpenVPX board basedon the Xilinx Virtex-7 FPGA. As a stand-alone processor board, it
provides an ideal development and deployment platform for demanding
signal-processing applications.
The 5973 includes a VITA-57.1 FMC site providing access to a wide range of I/O options.
When combined with any of Mercury’s analog interface FMCs, it becomes a complete
multichannel data conversion and processing subsystem suitable for connection to IF, HF
or RF ports of a communications or radar system.
When used with Mercury’s gigabit serial copper or optical interface FMCs, the 5973
becomes a high speed data streaming and processing interface. Its built-in data capture
and playback features and Gen. 3 x8 PCIe interface make it a turnkey solution.

FEATURES▪ VITA-57.1 FMC site offers access to a wide range of possible I/O▪ Supports Xilinx® Virtex®-7 VXT FPGA
▪ GateXpress® supports dynamic FPGA reconfiguration across PCIe
▪ 4 GB of DDR3 SDRAM▪ PCI Express (Gen. 1, 2 and 3) interface up to x8▪ Optional optical Interface for backplane gigabit serial interboard communication▪ Optional user-configurable gigabit serial interface▪ Optional LVDS connections to the Virtex-7 FPGA for custom I/O▪ 3U VPX form factor provides a compact, rugged platform▪ Compatible with several VITA standards including: VITA-46, VITA-48, VITA-66.4 andVITA-65 (OpenVPX™ System Specification)

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TECHNICAL DATA SHEETFlexor 5973

5973 BLOCK DIAGRAM

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TECHNICAL DATA SHEETFlexor 5973

BOARD ARCHITECTUREGATEXPRESS FOR FPGA CONFIGURATION

Based on the proven design of the Mercury Onyx family ofVirtex-7 products, the 5973 retains all the key features of thatfamily. As a central foundation of the board architecture, theFPGA has access to all data and control paths of both the mainboard and the FMC, enabling factory-installed functions That
Include data multiplexing, channel selection, data packing,gating, triggering and memory control.

The Onyx architecture includes GateXpress®, a sophisticated
FPGA-PCIe configuration manager for loading and reloading theFPGA. At power up, GateXpress immediately presents a PCIetarget for the host computer to discover, effectively giving theFPGA time to load from FLASH. This is especially important forlarger FPGAs where the loading times can exceed the PCIe
discovery window, typically 100 msec on most PCs.

The architecture organizes the FPGA as a container for dataprocessing applications where each function exists as anintellectual property (IP) module.

The board’s configuration FLASH can hold four FPGA images.
Images can be factory-installed IP or custom IP created by the user,
and programmed into the FLASH via JTAG using Xilinx iMPACT orthrough the board’s PCIe interface. At power up the user canchoose which image will load based on a hardware switch setting.
Once booted, GateXpress allows the user three options for
dynamically reconfiguring the FPGA with a new IP image:

When integrated with a Mercury FMC, the 5973 is delivered withfactory-installed applications ideally matched to the board’s
analog or digital interfaces. These can include A/D acquisition
and D/A waveform playback engines for simplifying data
capture and playback.
Data tagging and metadata packet generation, in conjunction
with powerful linked list DMA engines, provide a streamlined
interface for moving data on and off the board and identifying
data packets with channel, timing and sample countinformation.
IP modules for DDR3 SDRAM memories, controllers for all data
clocking and synchronization functions, a test signal generator,
and a PCIe interface complete the factory-installed functions
and enable the 5973 and its installed FMC to operate as acomplete turnkey solution without the need to develop any
FPGA IP.

EXTENDABLE IP DESIGNFor applications that require specialized functions, users can install
their own custom IP for data processing. The GateFlow FPGA
Design Kits include all of the factory-installed modules as document
source code. Developers can integrate their own IP with thefactory-installed functions or use the GateFlow kit to completelyreplace the IP with their own.

▪ The first is the option to load an alternate image from
FLASH through software control. The user selects thedesired image and issues a reload command.
▪ The second option is for applications where the FPGA
image must be loaded directly through the PCIe interface.
This is important in security situations where there can beno latent user image left in nonvolatile memory whenpower is removed. In applications where the FPGA IP may
need to change many times during the course of amission, images can be stored on the host computer andloaded through PCIe as needed.
▪ The third option, typically used during development,
allows the user to directly load the FPGA through JTAG
using Xilinx iMPACT.
In all three FPGA loading scenarios, GateXpress handles thehardware negotiation simplifying and streamlining the loadingtask. In addition, GateXpress preserves the PCIe configuration
space allowing dynamic FPGA reconfiguration without a hostcomputer reset to rediscover the board. After the reload, thehost simply continues to see the board with the expected
device ID.

XILINX VIRTEX-7 FPGAThe Xilinx Virtex-7 FPGA site can be populated with one of two FPGAs
to match the specific requirements of the processing task. Supported
FPGAs are VX330T or VX690T. The VX690T features 3600 DSP48E1
slices and is ideal for modulation/demodulation, encoding/decoding,encryption/decryption, and channelization of the signals between
transmission and reception. For applications not requiring large DSP
resources or logic, the lower-cost VX330T can be installed.

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TECHNICAL DATA SHEET
Flexor 5973

FRONT PANEL CONNECTIONSSPECIFICATIONS

The 5973 3U VPX carrier front panel houses the front panel ofthe FMC module installed on the carrier. The VPX carrier front
panel includes three LED indicators below the FMC panel.

I/O Module Interface▪ JTAG Connector: The VPX carrier front panel provides a12-pin JTAG connector to download programs and toperform boundary-scan tests on 5973 devices.

VITA-57.1 FMC site

Field Programmable Gate Array▪ Standard: Xilinx Virtex-7 XC7VX330T-2▪ Optional: Xilinx Virtex-7 XC7VX690T-2

Custom FPGA I/O▪ Link LED: The green LNK LED illuminates when a valid
PCIe link has been established over the VPX P1 interface.

Parallel: 13 pairs of LVDS connections between the FPGA andthe VPX P2 connector for custom I/O▪ Over Temperature LED: The red TEMP LED illuminates
when an over-temperature or over-voltage condition isindicated by the temperature/voltage sensors on theModel 5973.

Serial: 4X gigabit links between the FPGA and the VPX P1
connector to support serial protocols.

▪ User LED: The yellow USR LED is available for user
applications.
Note: If your 5973 is ordered with Option 763 for mounting in a
conduction-cooled VPX chassis, it would have a conductioncooled VPX Carrier Front Panel.

Optical: VITA-66.4, 12X duplex lanes

MemoryType: DDR3 SDRAM
Size: Four banks, 1 GB each
Speed: 800 MHz (1600 MHz DDR)

PCI-Express Interface
PCI Express Bus: Gen. 1, 2 or 3: x4 or x8

Environmental
Standard: L0 (air-cooled)▪ Operating Temp: 0° to 50° C▪ Storage Temp: –20° to 90° C▪ Relative Humidity: 0 to 95%, non-condensing
Option -702: L2 (air-cooled)▪ Operating Temp: –20° to 65° C▪ Storage Temp: –40° to 100° C▪ Relative Humidity: 0 to 95%, non-condensing
Option -763: L3 (conduction-cooled)▪ Operating Temp: –40° to 70° C▪ Storage Temp: –50° to 100° C▪ Relative Humidity: 0 to 95%, noncondensing

PhysicalDimensions: 3U VPX▪ Depth: 100 mm (3.937 in)▪ Height: 170.6 mm (6.717 in)mrcy.com

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TECHNICAL DATA SHEET
Flexor 5973

FLEXORSET MODELSThis chart shows all available FlexorSets. Click on model numbers for more information.
Form
FactorSoftware/FPGA
Tools

Carrier
Model

FMC
Model

FlexorSet
Model

Description

3U VPX

Virtex-7597333125973-312

4-Channel 250 MHz A/D & 2-Channel 800 MHz D/A

5973-313

4-Channel 250 MHz A/D & 2-Channel 800 MHz D/Awith 4 multiband DDCs & interpolation filters

5973-316

8-Channel 250 MHz 16-bit A/D

5973-317

8-Channel 250 MHz 16-bit A/Dwith 8 multiband DDCs

3320

5973-320

2-Channel 3 GHz A/D & 2-Channel 2.8 GHz D/A

3324

5973-324

4-Channel 500 MHz A/D & 4-Channel 2 GHz D/A

3312

5983-313*

4-Channel 250 MHz A/D & 2-Channel 800 MHz D/Awith 4 multiband DDCs & interpolation filters

3316

5983-317*8-Channel 250 MHz 16-bit A/Dwith 8 multiband DDCs

3320

5983-320*

2-Channel 3 GHz A/D & 2-Channel 2.8 GHz D/A

3324

5983-324*

4-Channel 500 MHz A/D & 4-Channel 2 GHz D/A

3312

7070-312

4-Channel 250 MHz A/D & 2-Channel 800 MHz D/A

7070-313

4-Channel 250 MHz A/D & 2-Channel 800 MHz D/Awith 4 multiband DDCs & interpolation filters

7070-316

8-Channel 250 MHz 16-bit A/D

7070-317

8-Channel 250 MHz 16-bit A/Dwith 8 multiband DDCs

3320

7070-320

2-Channel 3 GHz A/D & 2-Channel 2.8 GHz D/A

33247070-324

4-Channel 500 MHz A/D & 4-Channel 2 GHz D/A

ReadyFlow BSP
GateFlow FDK

3316

VivadoKintexUltraScale

5983*

Navigator BSP
Navigator FDK
VivadoPCIeVirtex-7

7070

ReadyFlow BSP
GateFlow FDK
Vivado3316*Consult with Mercury about the availability of a 5983A version of this product. For differences, see below.

Model 5983
Flash Memory - 1 Gbit of FLASH Memory
Optical I/O (Option 110) - VITA 66.4 - Up to 12 duplex optical lanes
are available on a VITA 66.4 connector.
With the installation of a serial protocol, the VITA 66.4 interface enables
a high-bandwidth connection between 5983s mounted in the samechassis or over extended distances.

Model 5983A
Flash Memory -2 Gbit of BPI FLASH Memory
Optical I/O (Option 110) - VITA 67.3D - Provides 12 duplex lanes@ 10 Gb/sec through the lower half of VPX P2 (VPX P2B).
With the installation of a serial protocol, the VITA 67.3D interface
enables gigabit communications between boards and chassis,
independent of the PCIe interface.
Consult with Mercury before ordering Option 110 (optical).
Custom Analog I/O (Option 113) - VITA 67.3 - VITA 67.3 provides
10 coax connections through the lower half of VPX P2.

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Flexor 5973

ORDERING INFORMATION

LIFETIME SUPPORT FOR FLEXOR PRODUCTS

Model

Description

5973

3U OpenVPX Virtex-7 Processor and FMC Carrier

Options:-073

XC7VX330T-2 FPGA

-076

XC7VX690T-2 FPGA

-702

Air-cooled, Level 2-763

Conduction-cooled, Level 3

Mercury offers worldwide customers shorter development time,
reliable, rugged solutions for a variety of environments, reducedcosts, and mature software development tools. We offer freelifetime support from our engineering staff, which customers
can depend on through phone and email, as well as software
updates. Take advantage of our 40 years of experience indelivering high-performance radar, communications, SIGINT,
EW, and data acquisition MIL-Aero solutions worldwide.

Contact Mercury for compatible option combinations and complete
specifications of rugged and conduction-cooled versions. Options maychange, so be sure to contact Mercury for the latest information.

DEVELOPMENT SYSTEMS
Mercury offers development systems for Flexor products. They
come with all pre-tested software and hardware ready for
immediate operation. These systems are intended to saveengineers and system integrators the time and expense
associated with building and testing a development system that
ensures optimum performance of Flexor boards. Please contact
Mercury to configure a system that matches your requirements.

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International Headquarters
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Learn more

Avenue Eugène-Lance, 38
PO Box 584
CH-1212 Grand-Lancy 1Geneva, Switzerland

For technical details, contact:mrcy.com/CF5973

Visit: mrcy.com/go/MP5973+41 22 884 5100 tel

The Mercury Systems logo and the following are trademarks or registered trademarks of Mercury Systems, Inc.: Mercury Systems, Innovation That
Matters, Flexor, and Onyx. Other marks used herein may be trademarks or registered trademarks of their respective holders. Mercury believes thisinformation is accurate as of its publication date and is not responsible for any inadvertent errors. The information contained herein is subject tochange without notice.
© 2023 Mercury Systems, Inc. 1-1-022123-DS-F5973

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