M4i.44xx-x8 - 14/16 bit Digitizer up to 500 MS/s
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Up to 500 MS/s on four channels
Speed
SNR
ENOB
Ultra Fast PCI Express x8 Gen 2 interface
130 MS/s up to 72.0 dB up to 11.6 LSB
Simultaneously sampling on all channels
250 MS/s up to 71.6 dB up to 11.6 LSB
500 MS/s up to 68.0 dB up to 11.0 LSB
Separate dedicated ADC and amplifier per channel
6 input ranges: ±200 mV up to ±10 V
FPGA Options:
2 GSample (4 GByte) on-board memory
Window, re-arm, OR/AND trigger• Block Average up to 128k
Synchronization of up to 8 cards per system• Block Statistics/Peak Detect
Features: Single-Shot, Streaming, Multiple Recording, Gated Sampling, ABA, Timestamps• Boxcar Average (high-resolution) mode to increase resolution• Direct data transfer to CUDA GPU using SCAPP option• PCIe x8 Gen 2 Interface• Works with x8/x16* PCIe slots• Sustained streaming mode more than 3.4 GB/s**

Operating Systems

Recommended Software

Drivers• Windows 7 (SP1), 8, 10,Server 2008 R2 and newer• Linux Kernel 2.6, 3.x, 4.x, 5.x• Windows/Linux 32 and 64 bit• Visual C++, C++ Builder, Delphi
GNU C++, VB.NET, C#, J#, Java,
Python• SBench 6• MATLAB• LabVIEW• LabWindows/CVI
• IVI

Model

Resolution

1 channel

2 channels

4 channels

General Information

M4i.4451-x8
M4i.4450-x8
M4i.4421-x8
M4i.4420-x8
M4i.4411-x8
M4i.4410-x8

14 Bit14 Bit16 Bit16 Bit16 Bit16 Bit

500 MS/s
500 MS/s
250 MS/s
250 MS/s
130 MS/s
130 MS/s

500 MS/s
500 MS/s
250 MS/s
250 MS/s
130 MS/s
130 MS/s

500 MS/s

The M4i.44xx-x8 series digitizers deliver the highest performance in bothspeed and resolution. The series includes PCIe cards with either two or foursynchronous channels where each channel has its own dedicated ADC. The
ADC’s can sample at rates from 130 MS/s up to 500 MS/s and are available with either 14 bit or 16 bit resolution. The combination of high sampling rate and resolution makes these digitizers the top-of-the-range forapplications that require high quality signal acquisition.
The digitizers feature a PCI Express x8 Gen 2 interface that offers outstanding data streaming performance. The interface and Spectrum’s optimized
drivers enable data transfer rates in excess of 3.4 GB/s** so that signals
can be acquired, stored and analyzed at the fastest speeds.
While the cards have been designed using the latest technology they arestill software compatible with the drivers from earlier Spectrum digitizers.
So, existing customers can use the same software they developed for a 10
year old 200 kS/s multi-channel card and for an M4i series 500 MS/s highresolution digitizer!

250 MS/s
130 MS/s

Export-Versions
Sampling rate limited versions that do not fall under export restrictions.
Model
1 channel
2 channels 4 channels
M4i.4481-x8 14 Bit
400 MS/s
400 MS/s
400 MS/s
M4i.4480-x8 14 Bit
400 MS/s
400 MS/s
M4i.4471-x8 16 Bit
180 MS/s
180 MS/s
180 MS/s
M4i.4470-x8 16 Bit
180 MS/s
180 MS/s*Some x16 PCIe slots are for the use of graphic cards only and can’t be used for other cards.**Throughput measured with a motherboard chipset supporting a TLP size of 256 bytes.

SPECTRUM INSTRUMENTATION GMBH · AHRENSFELDER WEG 13-17 · 22927 GROSSHANSDORF · GERMANY
PHONE: +49 (0)4102-6956-0 · FAX: +49 (0)4102-6956-66 · E-MAIL: info@spec.de · INTERNET: www.spectrum-instrumentation.com

7.5.2019

Software Support
Windows drivers
The cards are delivered with drivers for Windows 7, Windows 8
and Windows 10 (32 bit and 64 bit). Programming examples for
Visual C++, C++ Builder, LabWindows/CVI, Delphi, Visual Basic,
VB.NET, C#, J#, Python, Java and IVI are included.

teraction between the Spectrum card and the GPU card and another set of CUDA parallel processing examples with easy building
blocks for basic functions like filtering, averaging, data de-multiplexing, data conversion or FFT. All the software is based on
C/C++ and can easily be implemented, expanded and modified
with normal programming skills.
Hardware features and options
PCI Express x8

Linux Drivers
All cards are delivered with full Linux support. Pre compiled kernel modules are included for the most common
distributions like Fedora, Suse, Ubuntu LTS or Debian. The
Linux support includes SMP systems, 32 bit and 64 bit
systems, versatile programming examples for GNU C++,
Python as well as the possibility to get the driver sources for yourown compilation.
SBench 6
A base license of SBench 6, theeasy-to-use graphical operating
software for Spectrum cards, is included in the delivery. The base license makes it is possible to test
the card, display acquired data
and make some basic measurements. It's a valuable tool forchecking the card’s performanceand assisting with the unit’s initial
setup. The cards also come with a demo license for the SBench 6
professional version. This license gives the user the opportunity totest the additional features of the professional version with theirhardware. The professional version contains several advanced
measurement functions, such as FFTs and X/Y display, import andexport utilities as well as support for all acquisition modes including
data streaming. Data streaming allows the cards to continuously acquire data and transfer it directly to the PC RAM or hard disk.
SBench 6 has been optimized to handle data files of several
GBytes. SBench 6 runs under Windows as well as Linux (KDE,
GNOME and Unity) operating systems. A test version of SBench 6
can be downloaded directly over the internet and can run the professional version in a simulation mode without any hardware installed. Existing customers can also request a demo license for the
professional version from Spectrum. More details on SBench 6 canbe found in the SBench 6 data sheet.

The M4i series cards use a PCI Express x8
Gen 2 connection. They can be used in
PCI Express x8 and x16 slots with Gen 1,
Gen 2 or Gen 3. The maximum sustained
data transfer rate is more than 3.3
GByte/s (read direction) or 2.8 GByte/s (write direction) per slot.
Server motherboards often recognize PCI Express x4 connectionsin x8 slots. These slots can also be used with the M4i series cards
but with reduced data transfer rates.
Connections• The cards are equipped with SMA connectors for the
analog signals as well as for the external trigger andclock input. In addition, there are five MMCX connectors that are used for an additional trigger input, aclock output and three multi-function I/O connectors.
These multi-function connectors can be individuallyprogrammed to perform different functions:• Trigger output• Status output (armed, triggered, ready, ...)• Synchronous digital inputs, being stored inside the analog data
samples• Asynchronous I/O lines
Input Amplifier
The analog inputs can be adapted to real world signals using awide variety of settings that are
individual for each channel. By
using software commands the input termination can be changed
between 50 Ohm and 1 MOhm, one can select a matching input
range and the signal offset can be compensated by programmable
AC coupling. The latest hardware revisions additionally allow for
offset compensation for DC-coupled inputs as well.
Software selectable input path

Third-party products
Spectrum supports the most popular third-party software products
such as LabVIEW, MATLAB or LabWindows/CVI. All drivers comewith detailed documentation and working examples are included in
the delivery. Support for other software packages, like VEE or DasyLab, can also be provided on request.
SCAPP – CUDA GPU based data processing
For applications requiringhigh powered signal anddata processing Spectrum
offers SCAPP (Spectrum’s
CUDA Access for Parallel
Processing). The SCAPPSDK allows a direct link
between Spectrum digitizers, AWGs or Digital
Data Acquisition Cards
and CUDA based GPU cards. Once in the GPU users can harness
the processing power of the GPU’s multiple (up to 5000) processing
cores and large (up to 24 GB) memories. SCAPP uses an RDMA
(Linux only) process to send data at the full PCIe transfer speed toand from the GPU card. The SDK includes a set of examples for in-

For each of the analog channels the user has the choice between
two analog input paths. The „Buffered“ path offers the highest flexibility when it comes to input ranges and termination. A software
programmable 50 Ohm and 1 MOhm termination also allows toconnect standard oscilloscope probes to the card. The „50 Ohm“path on the other hand provides the highest bandwidth and the best
signal integrity with a fewer number of input ranges and a fixed 50
Ohm termination.
Software selectable lowpass filter
Each analog channel contains a software selectable low-pass filter
to limit the input bandwidth. Reducing the analog input bandwidth
results in a lower total noise and can be useful especially with low
voltage input signals.
Automatic on-board calibration
Every channel of each card is calibrated in the factory before theboard is shipped. However, to compensate for environmental variations like PC power supply, temperature and aging the software
driver includes routines for automatic offset and gain calibration.
This calibration is performed on all input ranges of the "Buffered"path and uses a high precision onboard calibration reference.

Digital inputs
This option acquires additional synchronous digital channels phasestable with the analog data. As default a maximum of 3 additional
digital inputs are available on the front plate of the card using themulti-purpose I/O lines.
Ring buffer mode
The ring buffer mode is thestandard mode of all oscilloscope instruments. Digitizeddata is continuously written
into a ring memory until atrigger event is detected. After the trigger, post-trigger samples arerecorded and pre-trigger samples can also be stored. The numberof pre-trigger samples available simply equals the total ring memory size minus the number of post trigger samples.
FIFO mode
The FIFO or streaming mode is designed for continuous data transfer between the digitizer card and the PC memory. When mounted
in a PCI Express x8 Gen 2 interface read streaming speeds of up
to 3.4 GByte/s are possible. The control of the data stream is done
automatically by the driver on interrupt request basis. The complete
installed onboard memory is used to buffer the data, making thecontinuous streaming process extremely reliable.
Channel trigger
The digitizers offer a wide variety of trigger modes. These include
a standard triggering mode based on a signals level and slope, likethat found in most oscilloscopes. It is also possible to define a window mode, with two trigger levels, that enables triggering when
signals enter or exit the window. Each input has its own trigger circuit which can be used to setup conditional triggers based on logical AND/OR patterns. All trigger modes can be combined with are-arming mode for accurate trigger recognition even on noisy signals.
External trigger input
All boards can be triggered using up to two external analog or digital signals. One external trigger input has two analog comparatorsthat can define an edge or window trigger, a hysteresis trigger ora rearm trigger. The other input has one comparator that can beused for standard edge and level triggers.
Multiple Recording
The Multiple Recording
mode allows the recording ofseveral trigger events with anextremely short re-arming
time. The hardware doesn’t
need to be restarted in between. The on-board memory is divided in several segments of thesame size. Each of them is filled with data if a trigger event occurs.
Pre- and posttrigger of the segments can be programmed. The number of acquired segments is only limited by the used memory andis unlimited when using FIFO mode.
Gated Sampling
The Gated Sampling mode
allows data recording controlled by an external gate
signal. Data is only recorded if the gate signal has a
programmed level. In addition a pre-area before startof the gate signal as well as a post area after end of the gate signal

can be acquired. The number of gate segments is only limited by
the used memory and is unlimited when using FIFO mode.
ABA mode
The ABA mode combines slow continuous
data recording with fastacquisition on trigger
events. The ABA mode
works like a slow datalogger combined with afast digitizer. The exact
position of the trigger events is stored as timestamps in an extra
memory.
Boxcar Average (high-resolution) mode
The Boxcar average or highresolution mode is a form of
averaging. The ADC oversamples the signal and averages neighboring points
together. This mode uses areal-time boxcar averaging
algorthm that helps reducing
random noise. It also canyield a higher number of bits of resolution depening on the signal
acquired. The averaging factor can be set in the region of 2 to 256.
Averaged samples are stored as 32 bit values and can be processed by any software. The trigger detection is still running withfull sampling speed allowing a very precise relation between acquired signal and the trigger.
8bit Sample reduction (low-resolution) mode
The cards and digitizerNETBOXes of the 44xx series allow to optionally reduce the resolution of the A/D samples from their native
14 bit or 16 bit down to 8bit resolution, such that each sample will
only occupy one byte in memory instead of the standard two bytes
required. This does not only enhance the size of the on-board memory from 2 GSamples to effectively 4 Gsamples, but also reduces
the required bandwidth over the PCIe bus and also to the storage
devices, such as SSD or HDD.
Timestamp
The timestamp function
writes the time positions of
the trigger events in an extra
memory. The timestamps are
relative to the start of recording, a defined zero time, externally synchronized to a radio clock, an IRIG-B a GPS receiver.
Using the external synchronization gives a precise time relation for
acquisitions of systems on different locations.
Firmware Option Block Average
The Block Average Module improves the fidelity of noisy repetitive signals. Multiple
repetitive acquisitions withvery small dead-time are accumulated and averaged. Random noise is reduced by theaveraging process improving
the visibility of the repetitive signal. The complete averaging process is done inside the FPGA of the digitizer generating no CPU
load at all. The amount of data is greatly decreased as well as theneeded transfer bandwidth is heavily reduced.
Please see separate data sheet for details on the firmware option.

Firmware Option Block Statistics (Peak Detect)
The Block Statistics and Peak
Detect Module implements a
widely used data analysis andreduction technology in hardware. Each block is scanned
for minimum and maximum
peak and a summary including minimum, maximum, average, timestamps and position information is stored in memory. The
complete averaging process is done inside the FPGA of the digitizer generating no CPU load at all. The amount of data is greatly decreased as well as the needed transfer bandwidth is heavily
reduced.
Please see separate data sheet for details on the firmware option.
External clock input and output
Using a dedicated connector a sampling clock can be fed in froman external system. Additionally it’s also possible to output the internally used sampling clock on a separate connector to synchronize external equipment to this clock.
Reference clock
The option to use a precise
external reference clock(normally 10 MHz) is necessary to synchronize theinstrument for high-quality
measurements with external equipment (like a signal source). It’s
also possible to enhance the quality of the sampling clock in thisway. The driver automatically generates the requested samplingclock from the fed in reference clock.
Star-Hub
The Star-Hub is an additional module
allowing the phase stable synchronization of up to 8 boards of a kind in one
system. Independent of the number ofboards there is no phase delay between all channels. The Star-Hub distributes trigger and clock information
between all boards to ensure all connected boards are running with thesame clock and trigger. All trigger
sources can be combined with a logical OR allowing all channelsof all cards to be the trigger source at the same time.
External Amplifiers
For the acquisition of extremely small voltage levels with ahigh bandwidth a series of external amplifiers is available.
Each of the one channel amplifiers is working with a fixed
input impedance and allows depending on the bandwidth- to select different amplification levels between x10 (20dB) up to x1000 (60 dB). Using the external amplifiers of the SPA series voltage levels in the uV
and mV area can be acquired.

Export Versions
Special export versions of the products are available that do not fallunder export control. Products fall under export control if their specification exceeds certain sampling rates at a given A/D resolution
and if the product is shipped into a country where no general export authorization is in place.

The export versions of the products have a sampling rate limitation
matching the export control list. An upgrade to the faster version is
not possible. The sampling rate limitation is in place for both internal and external clock.

Technical Data
Analog Inputs
Resolution

130 MS/s up to 250 MS/s
400 MS/s and 500 MS/s

Input TypeADC Differential non linearity (DNL)
ADC Integral non linearity (INL)
ADC Word Error Rate (WER)

ADC only
ADC onlymax. sampling rate

Channel selection
Bandwidth filter

software programmableactivate by software

16 bit (441, 442, 447)
14 bit (445, 448)
Single-ended±0.5 LSB (14 Bit ADC), ±0.4 LSB (16 Bit ADC)
±2.5 LSB (14 Bit ADC), ±10.0 LSB (16 Bit ADC)
10-12
1, 2, or 4 (maximum is model dependent)
20 MHz bandwidth with 3rd order Butterworth filtering

Input Path Types

software programmable50 Ω (HF) Path

Buffered (high impedance) Path

Analog Input impedance

software programmable50 Ω

1 MΩ || 25 pF or 50 Ω

Input Ranges
Programmable Input Offset
Programmable Input Offset

software programmable
Frontend HW-Version < V9
Frontend HW-Version >= V9±500 mV, ±1 V, ±2.5 V, ±5 V
not available–100%..0% on all ranges±200 mV, ±500 mV, ±1 V, ±2 V, ±5 V, ±10 V
not available–100%..0% on all ranges except ±1 V and ±10 V

Input Coupling
Offset error (full speed)Gain error (full speed)
Over voltage protection

software programmable
after warm-up and calibration
after warm-up and calibration
range ≤ ±1V

AC/DC< 0.1% of range< 1.0% of reading
2 Vrms

AC/DC< 0.1% of range< 1.0% of reading

Over voltage protection

range ≥ ±2V

6 Vrms±30 V (1 MΩ), 5 Vrms (50 Ω)range ±1V
range ±1V
range ±5V
range ±5V

±30 V
Bandwidth filter disabled: 0 ns
Bandwidth filter enabled: 14.7 ns≤96 dB≤82 dB≤97 dB≤82 dB±30 V
Bandwidth filter disabled: 3.8 ns
Bandwidth filter enabled: 18.5 ns≤93 dB≤82 dB≤85 dB≤82 dBMax DC voltage if AC coupling active
Relative input stage delay
Crosstalk 1 MHz sine signal
Crosstalk 20 MHz sine signal
Crosstalk 1 MHz sine signal
Crosstalk 20 MHz sine signal

M4i.441xM4x.441x
DN2.441-xx
DN6.441-xx

M4i.442xM4x.442x
DN2.442-xx
DN6.442-xx±5 V (1 MΩ), 5 Vrms (50 Ω)

0 Hz

0 Hz

0 Hz

M4i.447xM4x.447xDN2.447-xx
DN6.447-xx
0 Hz

lower bandwidth limit (AC coupled, 50 Ω)< 30 kHz< 30 kHz< 30 kHz< 30 kHz

lower bandwidth limit (AC coupled, 1 MΩ)< 2 Hz< 2 Hz< 2 Hz< 2 Hz< 2 Hz-3 dB bandwidth (HF path, AC coupled, 50 Ω)

65 MHz

125 MHz250 MHz

125 MHz250 MHzlower bandwidth limit (DC coupling)

M4i.445xM4x.445x
DN2.445-xx
DN6.445-xx

M4i.448xM4x.448xDN2.448-xx
DN6.448-xx
0 Hz< 30 kHz

Flatness within ±0.5 dB (HF path, AC coupled, 50 Ω)

40 MHz80 MHz160 MHz80 MHz160 MHz-3 dB bandwidth (Buffered path, DC coupled, 1 MΩ)

50 MHz85 MHz85 MHz

125 MHz (V1.2)-3 dB bandwidth (bandwidth filter enabled)

20 MHz20 MHz85 MHz (V1.1)
125 MHz (V1.2)
20 MHz20 MHz20 MHzTrigger
Available trigger modes
Channel trigger level resolution
Trigger engines

software programmablesoftware programmable

Channel Trigger, External, Software, Window, Re-Arm, Or/And, Delay, PXI (M4x only)
14 bit1 engine per channel with two individual levels, 2 external triggers

Trigger edge
Trigger delay
Multi, Gate, ABA: re-arming time
Pretrigger at Multi, ABA, Gate, FIFO, Boxcar
Posttrigger
Memory depth
Multiple Recording/ABA segment size, Boxcar
Trigger accuracy (all sources)
Boxcar (high-resolution) average factor

software programmablesoftware programmable

Rising edge, falling edge or both edges
0 to (8GSamples - 16) = 8589934576 Samples in steps of 16 samples
40 samples (+ programmed pretrigger)
16 up to [8192 Samples in steps of 16)
16 up to 8G samples in steps of 16 (defining pretrigger in standard scope mode)
32 up to [installed memory / number of active channels] samples in steps of 16
32 up to [installed memory / 2 / active channels] samples in steps of 16
1 sample2, 4, 8, 16, 32, 64, 128 or 256

Timestamp modes
Data format

software programmable

Extra data
Size per stamp

software programmable

External trigger
External trigger impedanceExternal trigger couplingExternal trigger type
External input level
External trigger sensitivity(minimum required signal swing)
External trigger level
External trigger maximum voltage
External trigger bandwidth DC
External trigger bandwidth AC

software programmablesoftware programmablesoftware programmablesoftware programmablesoftware programmableStandard, Startreset, external reference clock on X0 (e.g. PPS from GPS, IRIG-B)
Std., Startreset:
64 bit counter, increments with sample clock (reset manually or on start)
RefClock:24 bit upper counter (increment with RefClock)40 bit lower counter (increments with sample clock, reset with RefClock)none, acquisition of X0/X1/X2 inputs at trigger time, trigger source (for OR trigger)
128 bit = 16 bytes
Ext0

Ext1

software programmable50 Ω /1 kΩ

1 kΩ

software programmable

AC or DC
Window comparator±10 V (1 kΩ), ±2.5 V (50 Ω),

fixed DC
Single level comparator±10 V

2.5% of full scale range

2.5% of full scale range = 0.5 V

software programmable±10 V in steps of 1 mV
±30V

±10 V in steps of 1 mV
±30 V

50 Ω
1 kΩ

DC to 200 MHz
DC to 150 MHz

n.a.
DC to 200 MHz

50 Ω

20 kHz to 200 MHz

n.a.

≥ 2 samples≥ 2 samples

Minimum external trigger pulse width

Clock
Clock Modes
Internal clock accuracy
Internal clock setup granularity

software programmablestandard clock mode

Internal clock setup granularity

special clock mode only

Clock setup range gaps

special clock mode only

External reference clock range
External reference clock input impedance

software programmable50 Ω fixed

External reference clock input couplingExternal reference clock input edge
External reference clock input type
External reference clock input swing
External reference clock input max DC voltage
External reference clock input duty cycle requirement
Internal ADC clock output typeInternal ADC clock output frequency
Internal ADC clock output frequency

standard clock mode
special clock mode

Star-Hub synchronization clock modes

software selectable

ABA mode clock divider for slow clock
Channel to channel skew on one card
Skew between star-hub synchronized cards

software programmable

ADC Resolution
max sampling clock
min sampling clock (standard clock mode)
min sampling clock (special clock mode)internal PLL, external reference clock, Star-Hub sync (M4i only), PXI Reference Clock (M4x only)≤ ±20 ppm
divider: maximum sampling rate divided by:
1, 2, 4, 8, 16, ... up to 131072 (full gain accuracy)
1 Hz (reduced gain accuracy when using special clock mode), not available when synchronizing multiple cards
unsetable clock speeds: 17.5 MHz to 17.9 MHz, 35.1 MHz to 35.8 MHz, 70 MHz to 72 MHz,
140 MHz to 144 MHz, 281 MHz to 287 MHz≥ 10 MHz and ≤ 1 GHz

M4i.441xM4x.441x
DN2.441-xx
DN6.441-xx
16 bit
130 MS/s
3.814 kS/s
0.610 kS/s

AC coupling
Rising edge
Single-ended, sine wave or square wave
0.3 V peak-peak up to 3.0 V peak-peak±30 V (with max 3.0 V difference between low and high level)
45% to 55%
Single-ended, 3.3V LVPECLFixed to maximum sampling rate (500 MS/s, 250 MS/s or 130 MS/s depending on type)445x models (500 MS/s): ADC clock in the range between 80 MS/s and 500 MS/s
448x models (400 MS/s): ADC clock in the range between 80 MS/s and 400 MS/s
442x models (250 MS/s): ADC clock in the range between 40 MS/s and 250 MS/s
447x models (180 MS/s): ADC clock in the range between 40 MS/s and 180 MS/s
441x models (130 MS/s): ADC clock in the range between 40 MS/s and 130 MS/s
Internal clock (standard clock mode only, special clock mode not allowed), External referenceclock
16 up to (128k - 16) in steps of 16< 60 ps (typical)< 130 ps (typical, preliminary)M4i.442xM4x.442x
DN2.442-xx
DN6.442-xx
16 bit
250 MS/s
3.814 kS/s
0.610 kS/s

M4i.445xM4x.445x
DN2.445-xx
DN6.445-xx
14 bit
500 MS/s
3.814 kS/s
0.610 kS/s

M4i.447xM4x.447xDN2.447-xx
DN6.447-xx
16 bit180 MS/s
3.814 kS/s
0.610 kS/s

M4i.448xM4x.448xDN2.448-xx
DN6.448-xx
14 bit
400 MS/s
3.814 kS/s
0.610 kS/s

Block Average Signal Processing Option M4i.44xx/M4x.44xx/DN2.44x/DN6.44x Series
Minimum Waveform Length
Minimum Waveform Stepsize
Maximum Waveform Length
Maximum Waveform Length
Maximum Waveform Length
Minimum Number of Averages
Maximum Number of Averages
Data Output Format
Re-Arming Time between waveforms
Re-Arming Time between end of average to start ofnext average

1 channel active
2 channels active
4 or more channels active

fixedFirmware ≥ V1.14 (since August 2015)
32 samples
16 samples
128 kSamples
64 kSamples
32 kSamples
265536 (64k)

Firmware < V1.14
32 samples
16 samples
32 kSamples
16 kSamples
8 kSamples
265536 (64k)

32 bit signed integer
40 samples (+ programmed pretrigger)
Depending on programmed segment length,
max 100 µs

32 bit signed integer
40 samples (+ programmed pretrigger)
40 samples (+ programmed pretrigger)

Block Statistics Signal Processing Option M4i.44xx/M4x.44xx/DN2.44x/DN6.44x Series
Minimum Waveform Length
Minimum Waveform Stepsize
Maximum Waveform Length
Maximum Waveform Length
Data Output Format
Statistics Information Set per Waveform
Re-Arming Time between Segments

Standard Acquisition
FIFO Acquisition
fixed

32 samples
16 samples
2 GSamples / channels
2 GSamples
32 bytes statistics summary
Average, Minimum, Maximum, Position Minimum, Position Maximum, Trigger Timestamp
40 samples (+ programmed pretrigger)

Multi Purpose I/O lines (front-plate)
Number of multi purpose lines
Input: available signal types
Input: impedance
Input: maximum voltage level
Input: signal levels
Input: bandwith
Output: available signal types
Output: impedance

software programmable

10 kΩ to 3.3 V

software programmable-0.5 V to +4.0 V
3.3 V LVTTL
125 MHz
Asynchronous Digital-Out, Trigger Output, Run, Arm, PLL Refclock, System Clock50 Ω

Output: signal levels
Output: typeOutput: drive strength
Output: update rate
Output: update rate

three, named X0, X1, X2
Asynchronous Digital-In, Synchronous Digital-In, Timestamp Reference Clock

3.3 V LVTTL
3.3V LVTTL, TTL compatible for high impedance loads
Capable of driving 50 Ω loads, maximum drive strength ±48 mA
14bit, 16 bit ADC resolution
8 bit ADC resolution

sampling clock
Current sampling clock < 1.25 GS/s : sampling clock
Current sampling clock > 1.25 GS/s and < 2.50 GS/s : ½ sampling clock
Current sampling clock > 2.50 GS/s and < 5.00 GS/s : ¼ sampling clock

Frequency Response Plots
Frequency Response M4i.445x, M4x.445x, DN2.445-xx and DN6.445-xx
Sampling Rate 500 MS/s
HF Path 50 Ω, AC coupling, no filter
Buffered Path 1 MΩ, AC Coupling, no filter

Frequency Response M4i.442x, M4x.442x, DN2.442-xx and DN6.442-xx
Sampling Rate 250 MS/s
HF Path 50 Ω, AC coupling, no filter
Buffered Path 1 MΩ, AC Coupling, no filter

Frequency Response M4i.441x, M4x.441x, DN2.441-xx and DN6.441-xx
Sampling Rate 130 MS/s
HF Path 50 Ω, AC coupling, no filter
Buffered Path 1 MΩ, AC Coupling, no filter

RMS Noise Level (Zero Noise), typical figures

Input Range
Voltage resolution±200 mV

M4i.445x, M4x.445x, DN2.445-xx and DN6.445-xx, 14 Bit 500 MS/s
M4i.448x, M4x.448x, DN2.448-xxx and DN6.448-xx, 14 Bit 400 MS/s
±500 mV±1±2 V±2.5 V±5 V±10 V

24.4 µV

61.0 µV

1.22 mVHF path, DC, fixed 50 Ω
Buffered path, full bandwidth
Buffered path, BW limit active

Input Range
Voltage resolution

Input Range
Voltage resolution (1)305.2 µV

<1.9 LSB<116 µV<1.9 LSB<232 µV<1.9 LSB<1.16 mV

<2.7 LSB<165 µV<2.1 LSB<256 µV<3.8 LSB<928 µV<2.7 LSB<1.65 mV

<2.0 LSB<2.44 mV

<2.2 LSB<54 µV<2.0 LSB<122 µV<2.0 LSB<244 µV<3.2 LSB<781 µV<2.3 LSB<1.40 mV

<2.0 LSB<2.44 mV

±200 mV
6.1 µV<1.9 LSB<580 µV

610.4 µV

<93 µV

M4i.442x, M4x.442x, DN2.442-xx and DN6.442-xx, 16 Bit 250 MS/s
M4i.447x, M4x.447x, DN2.447-xx and DN6.447-xx, 16 Bit 180 MS/s
±500 mV±1±2 V±2.5 V±5 V±10 V

15.3 µV

305.2 µV

30.5 µV

61.0 µV

76.3 µV<6.9 LSB<53 µV<6.9 LSB<211 µV<6.9 LSB<1.05 mV

<67 µV<7.8 LSB<119 µV<7.1 LSB<217 µV<12 LSB<732 µV<8.1 LSB<1.24 mV

<7.1 LSB<2.17 mV

<7.9 LSB<48 µV<7.0 LSB<107 µV<6.9 LSB<211 µV<9.8 LSB<598 µV<7.2 LSB<1.10 mV

<7.1 LSB<2.17 mV

±200 mV
6.1 µV<6.9 LSB<526 µV

152.6 µV

<11 LSB

HF path, DC, fixed 50 Ω
Buffered path, full bandwidth
Buffered path, BW limit active

244.1 µV

<3.8 LSB

HF path, DC, fixed 50 Ω
Buffered path, full bandwidth
Buffered path, BW limit active

122.1 µV

M4i.441x, M4x.441x, DN2.441-xx and DN6.441-xx, 16 Bit 130 MS/s
±500 mV±1±2 V±2.5 V±5 V±10 V

15.3 µV

305.2 µV

30.5 µV

61.0 µV

76.3 µV<5.9 LSB<90 µV<5.9 LSB<180 µV<5.9 LSB<900 µV<8.5 LSB<52 µV<6.5 LSB<99 µV<5.9 LSB<180 µV<11 LSB<671 µV<7.0 LSB<1.07 mV

<6.1 LSB<1.86 mV

<7.0 LSB<43 µV<6.1 LSB<93 µV<5.9 LSB<180 µV<9.6 LSB<586 µV<6.7 LSB<1.02 mV

<6.1 LSB<1.86 mV

<5.9 LSB<450 µV

152.6 µV

Dynamic Parameters

Input Path
Test signal frequency
Input Range
THD (typ) (dB
SNR (typ) (dB)
SFDR (typ), excl. harm. (dB)
SFDR (typ), incl. harm. (dB)
SINAD/THD+N (typ) (dB)
ENOB based on SINAD (bit)ENOB based on SNR (bit)Input Path
Test signal frequency
Input Range
THD (typ) (dB
SNR (typ) (dB)
SFDR (typ), excl. harm. (dB)
SFDR (typ), incl. harm. (dB)
SINAD/THD+N (typ) (dB)
ENOB based on SINAD (bit)ENOB based on SNR (bit)Input Path
Test signal frequency
Input Range
THD (typ) (dB
SNR (typ) (dB)
SFDR (typ), excl. harm. (dB)
SFDR (typ), incl. harm. (dB)
SINAD/THD+N (typ) (dB)
ENOB based on SINAD (bit)ENOB based on SNR (bit)±500mV

M4i.445x, M4x.445x, DN2.445-xx and DN6.445-xx, 14 Bit 500 MS/s
M4i.448x, M4x.448x, DN2.448-xxx and DN6.448-xx, 14 Bit 400 MS/s
HF path, AC coupled, fixed 50 Ohm
Buffered path, BW limit
Buffered path, full BW
10 MHz40 MHz70 MHz10 MHz10 MHz40 MHz70 MHz
±1V
±2.5V
±5V
±1V
±1V
±200mV ±500mV±1V±500mV ±500mV ±500mV<-75.9 dB<-75.8 dB<-75.2 dB<-74.8 dB<-72.5 dB<-67.4 dB<-71.4 dB<-72.1 dB<-68.6 dB<-65.0 dB<-58.6 dB<-54.4 dB>67.8 dB

>67.9 dB

>68.0 dB

>68.0 dB

>69.5 dB

>67.5 dB

>67.5 dB

>68.0 dB

>68.1 dB

>67.3 dB

>65.8 dB

>65.6 dB

>88.1 dB

>88.6 dB

>85.2 dB

>85.3 dB

>88.0 dB

>87.8 dB

>87.3 dB

>88.4 dB

>87.5 dB

>89.0 dB

>88.9 dB

>88.8 dB

>80.1 dB

>80.0 dB

>77.4 dB

>77.3 dB

>74.0 dB

>69.9 dB

>78.1 dB

>73.5 dB

>69.8 dB

>67.5 dB

>60.8 dB

>56.0 dB

>67.2 dB

>67.2 dB

>67.2 dB

>67.2 dB

>67.7 dB

>64.4 dB

>66.5 dB

>66.6 dB

>65.3 dB

>63.9 dB

>57.9 dB

>54.0 dB

>10.9 bit

>10.9 bit

>10.9 bit

>10.9 bit

>10.9 bit

>10.4 bit

>10.7 bit

>10.8 bit

>10.6 bit

>10.3 bit

>9.3 bit>8.7 bit>11.0 bit

>11.0 bit

>11.0 bit

>11.0 bit

>11.0 bit

>10.9 bit

>10.9 bit

>11.0 bit

>11.0 bit

>10.9 bit

>10.6 bit

>10.6 bit

1 MHz
±1V

M4i.442x, M4x.442x, DN2.442-xx and DN6.442-xx, 16 Bit 250 MS/s
M4i.447x, M4x.447x, DN2.447-xx and DN6.447-xx, 16 Bit 180 MS/s
HF path, AC coupled, fixed 50 Ohm
Buffered path, BW limit
Buffered path, full BW
10 MHz40 MHz10 MHz
1 MHz
10 MHz40 MHz±500mV
±1V
±2.5V
±5V
±1V
±200mV ±500mV±1V±500mV ±500mV ±500mV<-73.1 dB<-74.0 dB<-74.1 dB<-74.1 dB<-74.1 dB<-62.9 dB<-73.2 dB<-71.5 dB<-69.0 dB<-72.2 dB<-67.5 dB<49.8 dB

>71.9 dB

>71.5 dB

>71.5 dB

>71.6 dB

>71.6 dB

>71.8 dB

>69.8 dB

>71.0 dB

>71.2 dB

>71.7 dB

>71.0 dB

>69.0 dB

>92.1 dB

>90.4 dB

>90.8 dB

>90.1 dB

>89.7 dB

>90.2 dB

>92.1 dB

>92.0 dB

>92.1 dB

>90.0 dB

>91.4 dB

>92.5 dB

>74.4 dB

>75.4 dB

>75.5 dB

>75.5 dB

>75.5 dB

>64.5 dB

>75.0 dB

>73.1 dB

>69.8 dB

>74.7 dB

>67.8 dB

>50.0 dB

>69.8 dB

>69.6 dB

>69.6 dB

>69.6 dB

>69.6 dB

>62.2 dB

>68.5 dB

>68.2 dB

>67.0 dB

>68.8 dB

>66.4 dB

>48.9 dB

>11.3 bit

>11.2 bit

>11.2 bit

>11.3 bit

>11.3 bit

>10.0 bit

>11.1 bit

>11.0 bit

>10.8 bit

>11.1 dB

>10.7 bit

>7.8 bit>11.7 bit

>11.6 bit

>11.6 bit

>11.6 bit

>11.6 bit

>11.6 dB

>11.3 bit>11.5 bit>11.5 bit

>11.6 dB

>11.5 bit

>11.2 bit

1 MHz
±1V

M4i.441x, M4x.441x, DN2.441-xx and DN6.441-xx, 16 Bit 130 MS/s
HF path, AC coupled, fixed 50 Ohm
Buffered path, BW limit
Buffered path, full BW
10 MHz10 MHz
1 MHz
10 MHz±500mV
±1V
±2.5V
±5V
±200mV ±500mV±1V±500mV ±500mV<-72.6 dB<-77.8 dB<-77.5 dB<-77.3 dB<-77.1 dB<-74.5 dB<-73.9 dB<-70.1 dB<-73.5 dB<73.4 dB

>72.2 dB

>71.8 dB

>71.9 dB

>72.0 dB

>72.0 dB

>69.8 dB

>71.2 dB

>71.3 dB

>71.1 dB

>71.0 dB

>92.4 dB

>97.0 dB

>96.0 dB

>95.2 dB

>94.8 dB

>89.0 dB

>94.0 dB

>94.5 dB

>88.8 dB

>93.5 dB

>73.7 dB

>78.6 dB

>78.2 dB

>75.2 dB

>75.1 dB

>77.6 dB

>77.8 dB

>71.5 dB

>74.7 dB

>73.1 dB

>69.4 dB

>70.8 dB

>70.8 dB

>70.9 dB

>70.8 dB

>69.0 dB

>69.7 dB

>68.2 dB

>69.2 dB

>69.2 dB

>11.2 bit>11.5 bit>11.5 bit>11.5 bit>11.5 bit

>11.2 bit

>11.3 bit

>11.0 bit

>11.2 bit

>11.2 bit

>11.7 bit

>11.6 bit

>11.6 bit

>11.6 bit

>11.6 bit

>11.3 bit>11.5 bit>11.5 bit

>11.6 bit

>11.6 bitDynamic parameters are measured at ±1 V input range (if no other range is stated) and 50Ω termination with the samplerate specified in the table. Measured parameters are averaged
20 times to get typical values. Test signal is a pure sine wave generated by a signal generator and a matching bandpass filter. Amplitude is >99% of FSR. SNR and RMS noise parameters
may differ depending on the quality of the used PC. SNR = Signal to Noise Ratio, THD = Total Harmonic Distortion, SFDR = Spurious Free Dynamic Range, SINAD = Signal Noise and Distortion, ENOB = Effective Number of Bits.

Noise Floor Plots (open inputs)
M4i.445x, M4x.445x,
DN2.445-xx, DN6.445-xx
Sampling Rate 500 MS/s

M4i.442x, M4x.442x,
DN2.442-xx and DN6.442-xx
Sampling Rate 250 MS/s

M4i.441x, M4x.441x,
DN2.441-xx and DN6.441-xx
Sampling Rate 130 MS/s

Buffered Path
1 MΩ, AC
±1 V range

HF Path50 Ω, AC
±500 mV

Connectors
Analog Inputs/Analog Outputs
Trigger 0 Input
Clock Input
Trigger 1 Input
Clock Output
Multi Purpose I/O

SMA female (one for each single-ended input)
SMA female
SMA female
MMCX female
MMCX female
MMCX female (3 lines)

Cable-Type: Cab-3mA-xx-xx
Cable-Type: Cab-3mA-xx-xx
Cable-Type: Cab-3mA-xx-xx
Cable-Type: Cab-1m-xx-xx
Cable-Type: Cab-1m-xx-xx
Cable-Type: Cab-1m-xx-xx

Environmental and Physical Details
Dimension (Single Card)
Dimension (Card with option SH8tm installed)
Dimension (Card with option SH8ex installed)
Weight (M4i.44xx series)
Weight (M4i.22xx, M4i.66xx, M4i.77xx series)
Weight (Option star-hub -sh8ex, -sh8tm)
Warm up time
Operating temperature
Storage temperature
Humidity

maximum
maximum
including 8 sync cables

241 mm (¾ PCIe length) x 107 mm x 20 mm (single slot width)
241 mm (¾ PCIe length) x 107 mm x 40 mm (double slot width)
312 mm (full PCIe length) x 107 mm x 20 mm (single slot width)
290 g
420 g
130 g
10 minutes
0°C to 50°C
-10°C to 70°C
10% to 90%

PCI Express specific details
PCIe slot type
PCIe slot compatibility (physical)
PCIe slot compatibility (electrical)
Sustained streaming mode
(Card-to-System: M4i.22xx, M4i.44xx, M4i.77xx)
Sustained streaming mode
(System-to-Card: M4i.66xx)

x8 Generation 2x8/x16x1, x4, x8, x16, Generation 1, Generation 2, Generation 3> 3.4 GB/s (measured with a chipset supporting a TLP size of 256 bytes, using PCIe x8 Gen2)> 2.8 GB/s (measured with a chipset supporting a TLP size of 256 bytes, using PCIe x8 Gen2)

Certification, Compliance, Warranty
EMC Immunity
EMC Emission
Product warranty
Software and firmware updates

Compliant with CE Mark
Compliant with CE Mark
5 years starting with the day of delivery
Life-time, free of chargePower Consumption

M4i.4410-x8, M4i.4420-x8, M4i.4470-x8
M4i.4411-x8, M4i.4421-x8, M4i.4471-x8
M4i.4450-x8, M4i.4480-x8
M4i.4451-x8, M4i.4481-x8

PCI EXPRESS
3.3V
12 V
0.2 A
2.2 A
0.2 A
2.7 A
0.2 A
2.2 A
0.2 A
2.9 A

MTBF
MTBF

Hardware block diagram

200000 hours

Total
27 W
33 W
27 W
35 W

M4i.44xx-x8 - 14/16 bit Digitizer up to 500 MS/s

Order Information
The card is delivered with 2 GSample on-board memory and supports standard acquisition (Scope), FIFO acquisition (streaming), Multiple
Recording, Gated Sampling, Boxcar Average (High-Resolution), ABA mode and Timestamps. Operating system drivers for Windows/Linux
32 bit and 64 bit, examples for C/C++, LabVIEW (Windows), MATLAB (Windows and Linux), LabWindows/CVI, IVI, .NET, Delphi, Java,
Python and a Base license of the oscilloscope software SBench 6 are included.
Adapter cables are not included. Please order separately!
PCI Express x8

Export Versions

Options

Order no.

A/D Resolution

Standard mem

1 channel

2 channels

M4i.4410-x8
M4i.4411-x8
M4i.4420-x8
M4i.4421-x8
M4i.4450-x8
M4i.4451-x8
M4i.4470-x8
M4i.4471-x8
M4i.4480-x8
M4i.4481-x8

16 Bit16 Bit16 Bit16 Bit14 Bit14 Bit16 Bit16 Bit14 Bit14 Bit2 GSample
2 GSample
2 GSample
2 GSample
2 GSample
2 GSample
2 GSample
2 GSample
2 GSample
2 GSample

130 MS/s
130 MS/s
250 MS/s
250 MS/s
500 MS/s
500 MS/s
180 MS/s
180 MS/s
400 MS/s
400 MS/s

130 MS/s
130 MS/s
250 MS/s
250 MS/s
500 MS/s
500 MS/s
180 MS/s
180 MS/s
400 MS/s
400 MS/s

Order no.

OptionM4i.xxxx-SH8ex (1)Synchronization Star-Hub for up to 8 cards (extension), only one slot width, extension of the card to
full PCI Express length (312 mm). 8 synchronization cables included.
Synchronization Star-Hub for up to 8 cards (top mount), two slots width, top mounted on card. 8 synchronization cables included.

M4i.xxxx-SH8tm (1)Firmware Options

Services

4 channels
130 MS/s
250 MS/s
500 MS/s
180 MS/s
400 MS/s

M4i-upgradeUpgrade for M4i.xxxx: Later installation of option Star-Hub

Order no.

OptionM4i.xxxx--spavg
M4i.xxxx-spstat

Signal Processing Firmware Option: Block Average (later firmware - upgrade available)
Signal Processing Firmware Option: Block Statistics/Peak Detect (later firmware - upgrade available)

Order no.
Recal

Recalibration at Spectrum incl. calibration protocol

for Connections
Analog/Clock-In/Trig-In
Analog/Clock-In/Trig-In
Probes (short)
Clk-Out/Trig-Out/Extra
Clk-Out/Trig-Out/Extra
Information

Lengthto BNC maleto BNC female
to SMA maleto SMA female
to SMB female
80 cm
Cab-3mA-9m-80
Cab-3mA-9f-80
Cab-3mA-3mA-80
Cab-3f-3mA-80
200 cm Cab-3mA-9m-200 Cab-3mA-9f-200
Cab-3mA-3mA-200
Cab-3f-3mA-200
5 cm
Cab-3mA-9f-5
80 cm
Cab-1m-9m-80
Cab-1m-9f-80
Cab-1m-3mA-80
Cab-1m-3fA-80
Cab-1m-3f-80
200 cm Cab-1m-9m-200
Cab-1m-9f200
Cab-1m-3mA-200
Cab-1m-3fA-200 Cab-1m-3f-200
The standard adapter cables are based on RG174 cables and have a nominal attenuation of 0.3 dB/m at 100 MHz and
0.5 dB/m at 250 MHz. For high speed signals we recommend the low loss cables series CHF

Low Loss Cables

Order No.
CHF-3mA-3mA-200
CHF-3mA-9m-200
Information

OptionLow loss cables SMA male to SMA male 200 cm
Low loss cables SMA male to BNC male 200 cm
The low loss adapter cables are based on MF141 cables and have an attenuation of 0.3 dB/m at 500 MHz and
0.5 dB/m at 1.5 GHz. They are recommended for signal frequencies of 200 MHz and above.

Amplifiers

Order no.

Bandwidth

Connection

Input Impedance

Coupling

Amplification

SPA.1412 (2)200 MHzBNC

1 MOhmAC/DCx10/x100 (20/40 dB)

SPA.1411 (2)200 MHzBNC

50 OhmAC/DCx10/x100 (20/40 dB)

SPA.1232 (2)10 MHzBNC

1 MOhmAC/DCx100/x1000 (40/60 dB)

SPA.1231 (2)Information

10 MHz

BNC

50 OhmAC/DCx100/x1000 (40/60 dB)

Standard Cables

Software SBench6

Order no.

Order no.
SBench6
SBench6-Pro
SBench6-Multi
Volume Licenses

Software Options

External Amplifiers with one channel, BNC/SMA female connections on input and output, manually adjustable offset, manually switchable settings. An external power supply for 100 to 240 VAC is included. Please be sure to order an adapter
cable matching the amplifier connector type and matching the connector type for your A/D card input.

Base version included in delivery. Supports standard mode for one card.
Professional version for one card: FIFO mode, export/import, calculation functions
Option multiple cards: Needs SBench6-Pro. Handles multiple synchronized cards in one system.
Please ask Spectrum for details.

Order no.
SPc-RServer
SPc-SCAPP

Remote Server Software Package - LAN remote access for M2i/M3i/M4i/M4x/M2p cards
Spectrum’s CUDA Access for Parallel Processing - SDK for direct data transfer between Spectrum card
and CUDA GPU. Includes RDMA activation and examples. Signed NDA needed for access.

(1) : Just one of the options can be installed on a card at a time.
(2) : Third party product with warranty differing from our export conditions. No volume rebate possible.

Technical changes and printing errors possible
SBench, digitizerNETBOX and generatorNETBOX are registered trademarks of Spectrum Instrumentation GmbH. Microsoft, Visual C++, Windows, Windows 98, Windows NT, Window 2000, Windows XP, Windows Vista,
Windows 7, Windows 8 and Windows 10 are trademarks/registered trademarks of Microsoft Corporation. LabVIEW, DASYLab, Diadem and LabWindows/CVI are trademarks/registered trademarks of National Instruments
Corporation. MATLAB is a trademark/registered trademark of The Mathworks, Inc. Delphi and C++Builder are trademarks/registered trademarks of Embarcadero Technologies, Inc. Keysight VEE, VEE Pro and VEE OneLab
are trademarks/registered trademarks of Keysight Technologies, Inc. FlexPro is a registered trademark of Weisang GmbH & Co. KG. PCIe, PCI Express and PCI-X and PCI-SIG are trademarks of PCI-SIG. LXI is a registeredtrademark of the LXI Consortium. PICMG and CompactPCI are trademarks of the PCI Industrial Computation Manufacturers Group. Oracle and Java are registered trademarks of Oracle and/or its affiliates. Intel and Intel Core
i3, Core i5, Core i7, Core i9 and Xeon are trademarks and/or registered trademarks of Intel Corporation. AMD, Opteron, Sempron, Phenom, FX, Ryzen and EPYC are trademarks and/or registered trademarks of Advanced
Micro Devices. NVIDIA, CUDA, GeForce, Quadro and Tesla are trademarks/registered trademarks of NVIDIA Corporation.

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