LF155/LF156/LF256/LF257/LF355/LF356/LF357
JFET Input Operational Amplifiers
General Description
These are the first monolithic JFET input operational amplifiers to incorporate well matched, high voltage JFETs on thesame chip with standard bipolar transistors (BI-FET™ Technology). These amplifiers feature low input bias and offset
currents/low offset voltage and offset voltage drift, coupledwith offset adjust which does not degrade drift orcommon-mode rejection. The devices are also designed forhigh slew rate, wide bandwidth, extremely fast settling time,
low voltage and current noise and a low 1/f noise corner.

Features
Advantages
n Replace expensive hybrid and module FET op amps
n Rugged JFETs allow blow-out free handling comparedwith MOSFET input devices
n Excellent for low noise applications using either high or
low source impedance — very low 1/f cornern Offset adjust does not degrade drift or common-mode
rejection as in most monolithic amplifiersn New output stage allows use of large capacitive loads(5,000 pF) without stability problems
n Internal compensation and large differential input voltage
capabilityn Logarithmic amplifiersn Photocell amplifiersn Sample and Hold circuits
Common Featuresn Low input bias current: 30pA
n Low Input Offset Current: 3pA
n High input impedance: 1012Ω
n Low input noise current:n High common-mode rejection ratio:n Large dc voltage gain: 106 dB

100 dB

Uncommon Features

j Extremely

LF155/
LF355

LF156/
LF256/
LF356

LF257/
LF357(AV =5)

Units

4

1.5

1.5

µs

5

12

50

V/µs

2.5

5

20

MHz

20

12

12

fast settling
time to0.01%
j Fast slew

rate
j Wide gain

bandwidth

Applicationsn Precision high speed integrators
n Fast D/A and A/D converters
n High impedance buffers
n Wideband, low noise, low drift amplifiers

j Low input

noise
voltage

Simplified Schematic

00564601*3pF in LF357 series.

BI-FET™, BI-FET II™ are trademarks of National Semiconductor Corporation.

© 2001 National Semiconductor Corporation

DS005646

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LF155/LF156/LF256/LF257/LF355/LF356/LF357 JFET Input Operational Amplifiers

December 2001

LF155/LF156/LF256/LF257/LF355/LF356/LF357

Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, contact the National Semiconductor Sales Office/Distributors foravailability and specifications.
LF155/6

LF256/7/LF356B

LF355/6/7

Input Voltage Range (Note 2)

± 22V
± 40V
± 20V

± 22V
± 40V
± 20V

± 18V
± 30V
± 16V

Output Short Circuit Duration

Continuous

Continuous

Continuous

Supply Voltage
Differential Input Voltage

TJMAX
H-Package

115˚C

115˚C

N-Package

150˚C

100˚C

100˚C

M-Package

100˚C

100˚C

Power Dissipation at TA = 25˚C (Notes
1, 8)
H-Package (Still Air)

560 mW

400 mW

400 mW

H-Package (400 LF/Min Air Flow)

1200 mW

1000 mW

1000 mW

N-Package

670 mW

670 mW

M-Package

380 mW

380 mW
160˚C/W

Thermal Resistance (Typical) θJA
H-Package (Still Air)160˚C/W

160˚C/W

H-Package (400 LF/Min Air Flow)

65˚C/W

65˚C/W

65˚C/W

N-Package

130˚C/W

130˚C/W

M-Package

195˚C/W

195˚C/W(Typical) θJC
H-Package
Storage Temperature Range

23˚C/W

23˚C/W

23˚C/W−65˚C to +150˚C−65˚C to +150˚C−65˚C to +150˚C

300˚C

300˚C

300˚C

260˚C

260˚C

260˚C

Soldering Information (Lead Temp.)
Metal Can Package
Soldering (10 sec.)
Dual-In-Line Package
Soldering (10 sec.)
Small Outline Package
Vapor Phase (60 sec.)

215˚C

215˚C

Infrared (15 sec.)

220˚C

220˚C

See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” for other methods ofsoldering surface mount devices.
ESD tolerance(100 pF discharged through 1.5kΩ)

1000V

1000V

1000V

DC Electrical Characteristics(Note 3)
SymbolParameterMin
VOS

Input Offset Voltage

RS =50Ω, TA =25˚C

TypMax Min

Typ

3

5

3

Over Temperature∆VOS/∆T

Average TC of Input
Offset Voltage

RS =50Ω∆TC/∆VOS

Change in Average TC
with VOS Adjust

RS =50Ω, (Note 4)

IOS

Input Offset Current

7

TJ =25˚C, (Notes 3, 5)

Units

Max Min

Typ

Max

5

3

10

mV

13

mV

6.5
5

5

µV/˚C

0.5

0.5

0.5

µV/˚C
per mV

20
20

2

LF355/6/7

5

3

TJ≤THIGH

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LF256/7
LF356B

LF155/6

Conditions

3

20
1

3

50

pA

2

nA

(Note 3)
SymbolParameter

Min
IB

Input Bias Current

LF256/7
LF356B

LF155/6

Conditions
TJ =25˚C, (Notes 3, 5)

Max MinTyp

Max Min

Typ

Max

30

100

30

100

30

200

pA

8

nA

50

RIN

Input Resistance

TJ =25˚C

AVOL

Large Signal Voltage
Gain

VS = ± 15V, TA =25˚C

Output Voltage Swing

1050

Input Common-Mode
Voltage Range

CMRR

Common-Mode
Rejection Ratio

PSRR

Supply Voltage
Rejection Ratio

5

12

12

10

200

50

± 13
± 12

± 12
± 10

10

Ω

200

V/mV

12

200

25

± 13
± 12
± 15.1± 12± 10

VO = ± 10V, RL =2k
Over Temperature25

VS = ± 15V, RL =10k

± 12
± 10

VS = ± 15V, RL =2k
VCM

Units

Typ

TJ≤THIGHVO

LF355/6/7

VS = ± 15V± 11(Note 6)

25

+15.1

± 11

−12

15

+10

−12

V/mV

± 13
± 12

V

+15.1

V

−12

V

V

85

100

85

100

80

100

dB

85

100

85

100

80

100

dB

DC Electrical Characteristics
TA = TJ = 25˚C, VS = ± 15V
Parameter
SupplyCurrent

LF155

LF355

LF156/256/257/356B

LF356

LF357

Typ

Max

Typ

Max

Typ

Max

Typ

Max

Typ

Max

2

4

2

4

5

7

5

10

5

10

Units
mA

AC Electrical Characteristics
TA = TJ = 25˚C, VS = ± 15V
SymbolParameter

LF155/355

LF156/256/
356B

LF156/256/356/
LF356B

LF257/357

Typ

Min

Typ

Typ

5

7.5

12

Conditions

SR

Slew Rate

LF155/6:
AV =1,

GBW

Gain Bandwidth Productts

Settling Time to 0.01%(Note 7)enEquivalent Input Noise
Voltage

RS =100Ω

LF357: AV =5

in

CIN

Equivalent Input Current
Noise

Units
V/µs
50

V/µs

2.5

5

20

MHz

4

1.5

1.5

µs

f=100 Hz

25

15

15

f=1000 Hz

20

12

12

f=100 Hz

0.01

0.01

0.01

f=1000 Hz

0.01

0.01

0.01

3

3

3

Input CapacitancepF

Notes for Electrical Characteristics
Note 1: The maximum power dissipation for these devices must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,
TA. The maximum available power dissipation at any temperature is PD =(TJMAX−TA)/θJA or the 25˚C PdMAX, whichever is less.
Note 2: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Note 3: Unless otherwise stated, these test conditions apply:

3

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LF155/LF156/LF256/LF257/LF355/LF356/LF357

DC Electrical Characteristics (Continued)

LF155/LF156/LF256/LF257/LF355/LF356/LF357

Notes for Electrical Characteristics (Continued)
LF155/156

LF256/257

LF356B

Supply Voltage, VS± 15V ≤ VS ≤ ± 20V± 15V ≤ VS ≤ ± 20V± 15V ≤ VS ± 20V

LF355/6/7

TA−55˚C ≤ TA ≤ +125˚C−25˚C ≤ TA ≤ +85˚C

0˚C ≤ TA ≤ +70˚C

0˚C ≤ TA ≤ +70˚C

THIGH+125˚C

+85˚C

+70˚C

+70˚C

VS = ± 15V

and VOS, IB and IOS are measured at VCM = 0.
Note 4: The Temperature Coefficient of the adjusted input offset voltage changes only a small amount (0.5µV/˚C typically) for each mV of adjustment from its original
unadjusted value. Common-mode rejection and open loop voltage gain are also unaffected by offset adjustment.
Note 5: The input bias currents are junction leakage currents which approximately double for every 10˚C increase in the junction temperature, TJ. Due to limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, Pd. TJ = TA + θJA Pd where θJA is the thermal resistance from junction to ambient. Use of a heat sink is
recommended if input bias current is to be kept to a minimum.
Note 6: Supply Voltage Rejection is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practice.
Note 7: Settling time is defined here, for a unity gain inverter connection using 2 kΩ resistors for the LF155/6. It is the time required for the error voltage (the voltage
at the inverting input pin on the amplifier) to settle to within 0.01% of its final value from the time a 10V step input is applied to the inverter. For the LF357, AV = −5,
the feedback resistor from output to input is 2kΩ and the output step is 10V (See Settling Time Test Circuit).
Note 8: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside
guaranteed limits.

Typical DC Performance Characteristics Curves are for LF155 and LF156 unless otherwise
specified.
Input Bias Current

Input Bias Current

00564638

00564637

Input Bias Current

Voltage Swing00564640

00564639

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4specified. (Continued)
Supply Current

Supply Current

00564642

00564641

Negative Current Limit

Positive Current Limit

00564643

00564644

Positive Common-Mode
Input Voltage Limit

Negative Common-Mode
Input Voltage Limit

00564645
00564646

5

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LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical DC Performance Characteristics Curves are for LF155 and LF156 unless otherwise

LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical DC Performance Characteristics Curves are for LF155 and LF156 unless otherwise
specified. (Continued)
Open Loop Voltage Gain

Output Voltage Swing00564648

00564647

Typical AC Performance Characteristics
Gain Bandwidth

Gain Bandwidth00564650

00564649

Normalized Slew Rate

Output Impedance

00564651

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00564652

6

Output Impedance

LF155 Small Signal Pulse Response, AV = +100564605

00564653

LF156 Small Signal Pulse Response, AV = +1

LF155 Large Signal Pulse Response, AV = +100564608

00564606

LF156 Large Signal Puls
Response, AV = +1

Inverter Settling Time00564609

00564655

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LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical AC Performance Characteristics (Continued)

LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical AC Performance Characteristics (Continued)
Inverter Settling Time

Open Loop Frequency Response00564656

00564657

Bode Plot

Bode Plot

00564658

00564659

Bode Plot

Common-Mode Rejection Ratio

00564660

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00564661

8

Power Supply Rejection Ratio

Power Supply Rejection Ratio

00564662

00564663

Undistorted Output Voltage Swing

Equivalent Input Noise Voltage

00564664
00564665

Equivalent Input Noise
Voltage (Expanded Scale)00564666

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LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical AC Performance Characteristics (Continued)

LF155/LF156/LF256/LF257/LF355/LF356/LF357

Detailed Schematic

00564613*C = 3pF in LF357 series.

Connection Diagrams (Top Views)
Dual-In-Line Package (M and N)

Metal Can Package (H)00564614

Order Number LF155H, LF156H, LF256H, LF257H,
LF356BH, LF356H, or LF357H
See NS Package Number H08C

00564629

Order Number LF356M, LF356MX, LF355N, or LF356N
See NS Package Number M08A or N08E

*Available per JM38510/11401 or JM38510/11402

Application Hints
These are op amps with JFET input devices. These JFETs
have large reverse breakdown voltages from gate to sourceand drain eliminating the need for clamps across the inputs.
Therefore large differential input voltages can easily be accommodated without a large increase in input current. The
maximum differential input voltage is independent of the
supply voltages. However, neither of the input voltages
should be allowed to exceed the negative supply as this willcause large currents to flow which can result in a destroyed
unit.
Exceeding the negative common-mode limit on either input
will force the output to a high state, potentially causing a
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10

Typical Circuit Connections

reversal of phase to the output. Exceeding the negative
common-mode limit on both inputs will force the amplifier
output to a high state. In neither case does a latch occur
since raising the input back within the common-mode range
again puts the input stage and thus the amplifier in a normal
operating mode.
Exceeding the positive common-mode limit on a single input
will not change the phase of the output however, if both
inputs exceed the limit, the output of the amplifier will beforced to a high state.
These amplifiers will operate with the common-mode input
voltage equal to the positive supply. In fact, thecommon-mode voltage can exceed the positive supply byapproximately 100 mV independent of supply voltage andover the full operating temperature range. The positive supply can therefore be used as a reference on an input as, forexample, in a supply current monitor and/or limiter.
Precautions should be taken to ensure that the power supply
for the integrated circuit never becomes reversed in polarityor that the unit is not inadvertently installed backwards in asocket as an unlimited current surge through the resulting
forward diode within the IC could cause fusing of the internal
conductors and result in a destroyed unit.
All of the bias currents in these amplifiers are set by FET
current sources. The drain currents for the amplifiers are
therefore essentially independent of supply voltage.
As with most amplifiers, care should be taken with lead
dress, component placement and supply decoupling in orderto ensure stability. For example, resistors from the output toan input should be placed with the body close to the input tominimize “pickup” and maximize the frequency of the feedback pole by minimizing the capacitance from the input toground.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitancefrom the input of the device (usually the inverting input) to AC
ground set the frequency of the pole. In many instances thefrequency of this pole is much greater than the expected 3dB
frequency of the closed loop gain and consequently there is
negligible effect on stability margin. However, if the feedback
pole is less than approximately six times the expected 3 dB
frequency a lead capacitor should be placed from the output
to the input of the op amp. The value of the added capacitor
should be such that the RC time constant of this capacitor
and the resistance it parallels is greater than or equal to theoriginal feedback pole time constant.

VOS Adjustment

00564667•••

VOS is adjusted with a 25k potentiometer•

Typical overall drift: 5µV/˚C ± (0.5µV/˚C/mV of adj.)

The potentiometer wiper is connected to V+
For potentiometers with temperature coefficient of 100
ppm/˚C or less the additional drift with adjust is ≈ 0.5µV/
˚C/mV of adjustment
Driving Capacitive Loads

00564668* LF155/6 R = 5k

LF357 R = 1.25k
Due to a unique output stage design, these amplifiers
have the ability to drive large capacitive loads and still
maintain stability. CL(MAX) . 0.01µF.
Overshoot ≤ 20%
Settling time (ts) . 5µs
LF357. A Large Power BW Amplifier00564615

For distortion ≤ 1% and a 20 Vp-p VOUT swing, power bandwidth is:
500kHz.

11

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LF155/LF156/LF256/LF257/LF355/LF356/LF357

Application Hints (Continued)

LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical Applications
Settling Time Test Circuit

00564616••••

Settling time is tested with the LF155/6 connected as unity gain inverter and LF357 connected for AV = −5
FET used to isolate the probe capacitance
Output = 10V step
AV = −5 for LF357

Large Signal Inverter Output, VOUT (from Settling Time Circuit)
LF355

LF357

00564619

00564617

LF356

00564618

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12

LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical Applications (Continued)
Low Drift Adjustable Voltage Reference

00564620

•
•
•
•
•

∆ VOUT/∆T = ± 0.002%/˚CAll resistors and potentiometers should be wire-wound
P1: drift adjust
P2: VOUT adjust
Use LF155 forj Low IBj Low drift
j Low supply current

Fast Logarithmic Converter

00564621

•
•
•
•
•

Dynamic range: 100µA ≤ Ii ≤ 1mA (5 decades), |VO| = 1V/decadeTransient response: 3µs for ∆Ii = 1 decade
C1, C2, R2, R3: added dynamic compensation
VOS adjust the LF156 to minimize quiescent error
RT: Tel Labs type Q81 + 0.3%/˚C

13

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LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical Applications (Continued)
Precision Current Monitor

00564631•••

VO = 5 R1/R2 (V/mA of IS)
R1, R2, R3: 0.1% resistors
Use LF155 for
j Common-mode range to supply range
j Low IBj Low VOS
j Low Supply Current

8-Bit D/A Converter with Symmetrical Offset Binary Operation

00564632••

R1, R2 should be matched within ± 0.05%
Full-scale response time: 3µs
EO+9.920www.national.com

B1 B2 B3 B4 B5 B6 B7 B8
1

1

1

1

1

1

1

1

Comments
Positive Full-Scale+0.040

1

0

0

0

0

0

0

0

(+) Zero-Scale−0.040

0

1

1

1

1

1

1

1

(−) Zero-Scale−9.920

0

0

0

0

0

0

0

0

Negative Full-Scale14

LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical Applications (Continued)
Wide BW Low Noise, Low Drift Amplifier00564670•

Parasitic input capacitance C1 . (3pF for LF155, LF156 and LF357 plus any additional layout capacitance) interacts withfeedback elements and creates undesirable high frequency pole. To compensate add C2 such that: R2 C2 . R1 C1.
Boosting the LF156 with a Current Amplifier00564673•

IOUT(MAX).150mA (will drive RL≥ 100Ω)•

No additional phase shift added by the current amplifier

15

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LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical Applications (Continued)
3 Decades VCO

00564624

R1, R4 matched. Linearity 0.1% over 2 decades.

Isolating Large Capacitive Loads

00564622•••

Overshoot 6%
ts 10µs
When driving large CL, the VOUT slew rate determined by CL and IOUT(MAX):

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LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical Applications (Continued)
Low Drift Peak Detector

00564623••••

By adding D1 and Rf, VD1 =0 during hold mode. Leakage of D2 provided by feedback path through Rf.
Leakage of circuit is essentially Ib (LF155, LF156) plus capacitor leakage of Cp.
Diode D3 clamps VOUT (A1) to VIN−VD3 to improve speed and to limit reverse bias of D2.
Maximum input frequency should be << 1⁄2πRfCD2 where CD2 is the shunt capacitance of D2.
Non-Inverting Unity Gain Operation for LF157

00564675

Inverting Unity Gain for LF157

00564625

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LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical Applications (Continued)
High Impedance, Low Drift Instrumentation Amplifier00564626••

System VOS adjusted via A2 VOS adjust
Trim R3 to boost up CMRR to 120 dB. Instrumentation amplifier resistor array recommended for best accuracy and lowest drift

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LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical Applications (Continued)
Fast Sample and Hold00564633••

Both amplifiers (A1, A2) have feedback loops individually closed with stable responses (overshoot negligible)•••

LF156 develops full Sr output capability for VIN ≥ 1V

Acquisition time TA, estimated by:

Addition of SW2 improves accuracy by putting the voltage drop across SW1 inside the feedback loop
Overall accuracy of system determined by the accuracy of both amplifiers, A1 and A2

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LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical Applications (Continued)
High Accuracy Sample and Hold00564627•

By closing the loop through A2, the VOUT accuracy will be determined uniquely by A1.
No VOS adjust required for A2.

•

TA can be estimated by same considerations as previously but, because of the added
propagation delay in the feedback loop (A2) the overshoot is not negligible.

•••

Overall system slower than fast sample and hold
R1, CC: additional compensation
Use LF156 forj Fast settling time
j Low VOSHigh Q Band Pass Filter

00564628•••

By adding positive feedback (R2)••

Clean layout recommended

Q increases to 40
fBP = 100 kHz

Response to a 1Vp-p tone burst: 300µs

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LF155/LF156/LF256/LF257/LF355/LF356/LF357

Typical Applications (Continued)
High Q Notch Filter

00564634•

2R1 = R = 10MΩ
2C = C1 = 300pF•••

Capacitors should be matched to obtain high Q
fNOTCH = 120 Hz, notch = −55 dB, Q > 100
Use LF155 forj Low IBj Low supply current

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LF155/LF156/LF256/LF257/LF355/LF356/LF357

Physical Dimensions inches (millimeters) unless otherwise noted

Metal Can Package (H)Order Number LF155H, LF156H, LF256H, LF257H, LF356BH, LF356H or LF357H
NS Package Number H08C

Small Outline Package (M)Order Number LF356M or LF356MX
NS Package Number M08A

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22

Molded Dual-In-Line Package (N)Order Number LF356N
NS Package Number N08E

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LF155/LF156/LF256/LF257/LF355/LF356/LF357 JFET Input Operational Amplifiers

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

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Datasheets for electronics components.