Curriculum Vitae

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology
Klaus Advanced Computing Building, Room 2323
266 Ferst Drive
Atlanta, GA 30332-0765

Summary
Dr. Hayashi is a senior research scientist at Georgia Institute of Technology. He has over ten
years of experience in conducting and leading research in the programming languages
and parallel computing areas. His research interests include automatic parallelization andprogramming languages and compiler optimizations for parallel computer systems.

Education
PH.D., COMPUTER SCIENCE, WASEDA UNIVERSITY, TOKYO, JAPAN — 2012

Thesis : “Studies on Automatic Parallelization for Heterogeneous and HomogeneousMulticore Processors”
Advisor : Professor Hironori Kasahara
M.E., COMPUTER SCIENCE, WASEDA UNIVERSITY, TOKYO, JAPAN — 2008

Thesis : “Study on Compiler Cooperative Heterogeneous Multicore Architecture”
Advisor : Professor Hironori Kasahara
B.E., COMPUTER SCIENCE, WASEDA UNIVERSITY, TOKYO, JAPAN — 2007

Thesis : “Parallel Code Generation Scheme for Hierarchical Multigrain Parallel Processing
on Heterogeneous Multicore Processor”
Advisor : Professor Hironori Kasahara

Professional Experience
SR. RESEARCH SCIENTIST, GEORGIA INSTITUTE OF TECHNOLOGY, ATLANTA, GA, USA — 2019-PRESENT

Responsible for conducting and leading research on 1) enabling resiliency inasynchronous many-task (AMT) programming models, 2) an actor-based programming
model for large-scale systems, 3) multi-level programming models for Graphics Processing
Units (GPUs) and SIMD (Single-Instruction Multiple Data) units, 4) code generation andoptimizations for Graphics Processing Units (GPUs), and 5) automatic construction ofcompiler/runtime heuristics using machine-learning techniques, and 6) programming
models for quantum-classical computing.
RESEARCH SCIENTIST, RICE UNIVERSITY, HOUSTON, TX, USA — 2015-2019

Responsible for conducting and leading research on 1) LLVM-based optimizations forlarge-scale systems, 2) code generation and optimizations for GPUs, 3) automaticconstruction of compiler/runtime heuristics using machine-learning techniques, and 4)
enabling resiliency in asynchronous many-task (AMT) programming models.

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology

POSTDOCTORAL RESEARCHER, RICE UNIVERSITY, HOUSTON, TX USA — 2013-2015

Conducted research in the area of compiler and runtime support for parallel languages
such as Habanero-Java. In particular, I worked on high-level language constructs andparallel code generation for GPUs while maintaining precise exception semantics on
GPUs.
ASSISTANT PROFESSOR, WASEDA UNIVERSITY, TOKYO, JAPAN — 2012-2013

Conducted research on automatic parallelizing compiler and compiler-directed power
reduction techniques in collaboration with many companies in Japan. More speci cally , I
worked on parallelizing and optimizing 1) automotive engine control software withTOYOTA and Denso, 2) dose calculation software for heavy-ion therapy with Mitsubishi
Electric, 3) smartphone applications on Android platforms with Fujitsu Ltd., and 4)
multimedia applications with Olympus Corporation.
Instructor for freshman-level 1) computer literacy class and 2) programming class with C
language in Spring/Fall 2012.
RESEARCH ASSOCIATE, WASEDA UNIVERSITY, TOKYO, JAPAN — 2010-2012

Conducted research on automatic parallelization and power reduction techniques forembedded heterogeneous multi-core processors. In addition, I worked on the automaticparallelization and optimization of a clinically-used dose calculation program for heavy-ion
therapy in collaboration with Mitsubishi Electric. Based on experimental results on an IBM
POWER7 platform, our optimized version was over 50x faster than the conventionalversion.
RESEARCH ASSOCIATE, GLOBAL COE PROGRAM, WASEDA UNIVERSITY, TOKYO, JAPAN — 2007-2010

Conducted research on automatic parallelization and power reduction techniques forembedded heterogeneous multi-core processors in collaboration with Hitachi Ltd. andRenesas Electronics Corporation (formerly known as Renesas Technology). This work waspartially supported by one of the global centers of excellence (GCOE) program named“International research and education center for Ambient SoC” established by Japan's
Ministry of Education, Culture, Sports, Science, and Technology (MEXT).

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology

Awards‣ Best SCALE Challenge Award, IEEE TCSC International Scalable Computing Challenge
at the 24th IEEE/ACM International Symposium on Cluster, Cloud and Internet
Computing (CCGRID2024), May, 2024. (Youssef Elmougy, Akihiro Hayashi, Vivek Sarkar)‣ Outstanding Research Scientist Award, College of Computing, Georgia Institute ofTechnology, 2024
‣ Best SCALE Challenge Award, IEEE TCSC International Scalable Computing Challenge
at the 23rd IEEE/ACM International Symposium on Cluster, Cloud and Internet
Computing (CCGRID2023), May, 2023. (Youssef Elmougy, Akihiro Hayashi, Vivek Sarkar)‣ IEEE Senior Member, 2021
‣ Outstanding Paper Award,The 2020 International Conference on High Performance
Computing & Simulation (HPCS2020), Mar 2021.
(Tiago Carneiro, Nouredine Melab, Akihiro Hayashi, Vivek Sarkar)‣ Best Expo Exhibit, 28th Annual International Conference on Computer Science andSoftware Engineering (CASCON2018), November 2018 (1 best exhibit out of 72
exhibits).
(Akihiro Hayashi, Gita Koblents, Max Grossman, Kazuaki Ishizaki, Alon Shalev Housfater,
Jimmy Kwa, Vivek Sarkar)‣ Best Expo Exhibit, 27th Annual International Conference on Computer Science andSoftware Engineering (CASCON2017), November 2017 (2 best exhibit out of 68
exhibits).
(Akihiro Hayashi, Gita Koblents, Max Grossman, Kazuaki Ishizaki, Alon Shalev Housfater,
Jimmy Kwa, Vivek Sarkar)‣ Encouragement award, IPSJ Symposium on Embedded Systems, October 2013.
(Dan Umeda, Yohei Kanehagi, Hiroki Mikami, Akihiro Hayashi, Mitsuhiro Tani, Hiroshi
Mori,Keiji Kimura, Hironori Kasahara)‣ Best feature award, COOL Chips XVI, IEEE Symposium on Low Power and High-Speed
Chips, April 2013.
(Yohei Kishimoto, Hiroki Mikami, Keiichi Nakano, Akihiro Hayashi, Keiji Kimura, Hironori
Kasahara,)

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology‣ Encouragement award, IPSJ Symposium on Embedded Systems, October 2012.
(Yohei Kishimoto, Hiroki Mikami, Keiichi Nakano, Akihiro Hayashi, Keiji Kimura, Hironori
Kasahara)‣ IPSJ SIG recommended Ph.D thesis, September 2012.
‣ Best presentation award, 5th GCOE Symposium, September 2009.

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology

Selected Sponsored Project‣ IARPA AGILE: Flow-Optimized Recon gurable Zones of Acceleration (FORZA)”. PI: Vivek
Sarkar, co-PIs: Tom Conte, Alex Daglis, Akihiro Hayashi, Hyesoon Kim, Rich Vuduc(Georgia Tech), Scott Beamer (UC Santa Cruz), Peter Kogge (U. Notre Dame), Dean
Chester, Gunnar Gunnarsson, Todd Inglett, Brian Smith (Cornelis Networks), Marty
Deneroff, Tim Dysart (Lucata), Dave Donofrio, John Leidel (Tactical Computing Labs).
Total Award Amount: $15,847,862 (shared among six institutions).
‣ ORNL STAQC: “Software Stack and Algorithm for Automating Quantum-ClassicalComputing”. PI: Jeffrey Young, co-PIs: Akihiro Hayashi, Tom Conte, Vivek Sarkar
Total Award Amount: $358,000

Industry Gifts‣ IBM CAS Fellowship for research on “Extending OMR with Explicit and Automatic
Runtime SIMD/GPU Parallelization” by PhD student Tong Zhou and senior researchscientist, Akihiro Hayashi, 2020, (PI: Vivek Sarkar, Co-PI, Akihiro Hayashi)‣ IBM CAS Fellowship for research on “Extending OMR with Automatic CPU/GPU
Parallelization (continuation)” by PhD student Ankush Mandal and research scientist,
Akihiro Hayashi, 2018, $22,000 (PI: Vivek Sarkar, Co-PI, Akihiro Hayashi)‣ Research on “Designing Waseda D-DATa Education Infrastructure“ by Akihiro Hayashi,
2018, $30,000‣ IBM CAS Fellowship for research on “Extending OMR with Automatic CPU/GPU
Parallelization” by PhD student Max Grossman and research scientist, Akihiro Hayashi,(PI: Vivek Sarkar, Co-PI: Akihiro Hayashi), 2017, $28,000, (PI: Vivek Sarkar, Co-PI, Akihiro
Hayashi)‣ IBM CAS Fellowship for research on “Automatic Runtime Parallelization of JVM
Applications” by PhD Student Max Grossman and research scientist, Akihiro Hayashi, (PI:Vivek Sarkar, Co-PI: Akihiro Hayashi), 2016, $20,000.
‣ IBM CAS Fellowship for research on “GPU Enablement of Java Applications” by Akihiro
Hayashi, 2015, $28,000.

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology‣ IBM CAS Fellowship for research on “GPU Enablement of Java Applications” by Akihiro
Hayashi, 2014, $28,000.

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology

Program Committees‣ Social Media Chair, 52nd International Symposium on Computer Architecture(ISCA2025)‣ Program Committee Member, 34th Annual International Conference on Computer
Science and Software Engineering (CASCON), November 2024
‣ Program Committee Member, 33rd Annual International Conference on Computer
Science and Software Engineering (CASCON), September 2023.
‣ Program Committee Member, 29th International European Conference on Parallel andDistributed Computing (Euro-Par), August 2023.
‣ Program Committee Member, 32nd Annual International Conference on Computer
Science and Software Engineering (CASCON), November 2022
‣ Program Committee Member, 9th Annual Chapel Implementers and Users Workshop(CHIUW), June 2022.
‣ External Review Committee Member, 27th ACM SIGPLAN Symposium on Principles andPractice of Parallel Programming (PPoPP), February 2022.
‣ Program Committee Member, 31st Annual International Conference on Computer
Science and Software Engineering (CASCON), November 2021
‣ Program Committee Member, Workshop on Programming Environments for
Heterogeneous Computing (PEHC), November 2021 (co-located with SC2021)‣ Program Committee Member, 2nd International Workshop on Parallel Optimization
using/for Multi- and Many-core High Performance Computing (POMCO), December
2020 (co-located with HPCS2020)‣ Program Committee Member, 29th Annual International Conference on Computer
Science and Software Engineering (CASCON), November 2019
‣ Program Committee Member, 7th International Workshop on Computer Systems andArchitectures (CSA), November 2019

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology‣ Program Committee Member, 6th ACM SIGPLAN International Workshop on Arti cialIntelligence and Empirical Methods for Software Engineering and Parallel Computing
Systems (AI-SEPS), November 2019 (co-located with SPLASH2019)‣ Program Committee Member, 32nd International Workshop on Languages andCompilers for Parallel Computing (LCPC), October 2019
‣ Program Committee Member, 33th IEEE International Parallel & DistributedProcessing
Symposium (IPDPS), May 2019
‣ Program Committee Member, 28th Annual International Conference on Computer
Science and Software Engineering (CASCON), November 2018
‣ Program Committee Member, 5th ACM SIGPLAN International Workshop on Arti cialIntelligence and Empirical Methods for Software Engineering and Parallel Computing
Systems (AI-SEPS), November 2018 (co-located with SPLASH2018)‣ Program Committee Member, 6th International Workshop on Large-scale HPC
Application Modernization (LHAM), November 2018
‣ External Review Committee Member, 23rd ACM International Conference on
Architectural Support for Programming Languages and Operating Systems (ASPLOS),
March 2018.
‣ Program Committee Member, 5th International Workshop on Legacy HPC Application
Migration (LHAM), November 2017.
‣ Program Committee Member, 4th ACM SIGPLAN International Workshop on Software
Engineering for Parallel Systems (SEPS), October 2017 (co-located with SPLASH2017).
‣ Program Committee Member, 22nd ACM SIGPLAN Symposium on Principles andPractice of Parallel Programming (PPoPP), March 2017.
‣ Program Committee Member, 22nd IEEE International Conference on Parallel andDistributed Systems (ICPADS), December 2016.
‣ Program Committee Member, 3rd International Workshop on Software Engineering for
Parallel Systems (SEPS), November 2016 (co-located with SPLASH2016).

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology‣ Technical Program Committee Member, 29th IEEE International Parallel &DistributedProcessing Symposium (IPDPS), May 2015.
‣ Program Committee Member, IPSJ Symposium on Advanced Computing Systems andInfrastructures (SACSIS), May 2013.
‣ Local arrangement Co-chair, 25th International Workshop on Languages and Compilers
for Parallel Computing (LCPC), September 2012.

Journal Reviewers‣ Journal of Cybersecurity and Privacy (JCP)(2023)‣ PLOS ONE (2023)‣ IEEE Micro (2022)‣ ACM Transactions on Architecture and Code Optimization (TACO) (2021, 2022)‣ ACM Transactions on Programming Languages and Systems (TOPLAS) (2018)‣ Arabian Journal for Science and Engineering (2017)‣ Journal of Parallel and Distributed Computing (JDPC) (2017)‣ ACM Transactions on Embedded Computing Systems (TECS) (2015)‣ IEEE Transactions on Parallel and Distributed Systems (TPDS) (2015)‣ IPSJ (Information Processing Society of Japan) Journals (2015, 2014)‣ IEICE (The Institute of Electronics, Information and Communication Engineers)
Transactions on Information and Systems (2020, 2013, 2012)

Journal Editors‣ Associate Editor, IEICE Transactions on Information and Systems (2023-)‣ Guest Associate Editor, IEICE (The Institute of Electronics, Information andCommunication Engineers) Special Section on Low-Power and High-Speed Chips (2022)

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology

External Reviewers‣ The IEEE Cluster Conference (IEEE Cluster 2017)‣ International Conference on Network and Parallel Computing (NPC2016, NPC2017)‣ International Conference on Parallel Processing (ICPP2016)‣ International Conference on Parallel Architectures and Compilation Techniques(PACT2015)‣ International Conference for High Performance Computing, Networking, Storage andAnalysis (SC13)‣ International Conference on Supercomputing (ICS2013, ICS2018)‣ International Conference on Parallel and Distributed Systems (ICPADS2013)‣ International Conference on Computer Design (ICCD2014, ICCD2013, ICCD2012)‣ International Workshop on Languages and Compilers for Parallel Computing(LCPC2015, LCPC2014, LCPC2013)

Speci cation Committees‣ OpenSHMEM Application Programming Interface (2022-present)

Courses‣ Computer Literacy, Waseda University, Spring 2012. (English Course)‣ C Programming, Waseda Univerisity, Fall 2012. (English Course)‣ Science and Engineering Lab., Waseda Univerisity, Spring/Fall 2012. (Japanese Course)

Tutorials‣ Fundamentals of CUDA Programming, Waseda University, Spring/Fall 2018
‣ Fundamentals of FPGA Programming, Waseda University, Spring 2018fi

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology

Other Remarkable Experience‣ Co-founder of an interdisciplinary research group named WIZDOM, inspired by the
FabLab at MIT, of cially supported by department of computer science, Waseda
Univerisity.

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology

Refereed Conference and Journal Publications
1. Asynchronous Distributed-Memory Parallel Algorithms for In uence
Maximization. Shubhendra Pal Singhal, Souvadra Hati, Akihiro Hayashi, Jeffrey Young,
Richard Vuduc, Vivek Sarkar. International Conference for High Performance
Computing, Networking, Storage, and Analysis (SC24). Nov 2024.
2. Asynchronous Distributed Actor-based Approach to Jaccard Similarity for
Genome Comparisons. Youssef Elmougy, Akihiro Hayashi, Vivek Sarkar. International
Conference on High Performance Computing (ISC High Performance). May 2024.
3. Towards Safe HPC: Productivity and Performance via Rust interfaces for aDistributed C++ Actors library. John T. Parrish, Nicole Wren, Tsz Hang Kiang, Akihiro
Hayashi, Jeffrey Young, Vivek Sarkar. 20th International Conference on Managed
Programming Languages & Runtimes (MPLR, co-located with SPLASH). October 2023.
4. A Fine-grained Asynchronous Bulk Synchronous parallelism model for PGAS
applications. Sri Raj Paul, Akihiro Hayashi, Kun Chen, Youssef Elmougy, Vivek Sarkar.
Journal of Computational Science, April 2023.
5. Automatic Parallelization of Python programs for Distributed Heterogeneous
Computing. Jun Shirako, Akihiro Hayashi, Sri Raj Paul, Alexey Tumanov and Vivek
Sarkar. 28th International European Conference on Parallel and Distributed Computing(Euro-Par2022), August 2022.
6. A Productive and Scalable Actor-based Programming System for PGASApplications. Sri Raj Paul, Akihiro Hayashi, Kun Chen, and Vivek Sarkar. 22th
International Conference on Computational Science (ICCS2022), June 2022.
7. Qulacs: a fast and versatile quantum circuit simulator for research purpose.
Yasunari Suzuki, Yoshiaki Kawase, Yuya Masumura, Yuria Hiraga, Masahiro
Nakadai, Jiabao Chen, Ken M. Nakanishi, Kosuke Mitarai, Ryosuke Imai, Shiro
Tamiya, Takahiro Yamamoto, Tennin Yan, Toru Kawakubo, Yuya O. Nakagawa, Yohei
Ibe, Youyuan Zhang, Hirotsugu Yamashita, Hikaru Yoshimura, Akihiro Hayashi, Keisuke
Fujii. Quantum Journal (Quantum 5, 559)
8. Towards Chapel-based Exascale Tree Search Algorithms: dealing with multiple
GPU accelerators. Tiago Carneiro, Nouredine Melab, Akihiro Hayashi, Vivek Sarkar.

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology

18th International Conference on High Performance Computing & Simulation(HPCS2020)
9. Compiler-Support for Critical Data Persistence in NVM. Reem Elkhouly, Mohammad
Alshboul, Akihiro Hayashi, Yan Solihin, Keiji Kimura. ACM Transactions on Architecture
and Code Optimization (TACO)
10. Enabling Resilience in Asynchronous Many-Task Programming Models. Sri Raj Paul,
Akihiro Hayashi, Nicole Slattengren, Hemanth Kolla, Matthew Whitlock, Seonmyeong
Bak, Keita Teranishi, Jackson Mayo, Vivek Sarkar. 25th International European
Conference on Parallel and Distributed Computing (Euro-Par2019)11. Performance Evaluation of OpenMP’s Target Construct on GPUs. Akihiro Hayashi,
Jun Shirako, Ettore Tiotto, Robert Ho, Vivek Sarkar. International Journal of High
Performance Computing and Networking (IJHPCN)
12. Optimized Two-level Parallelization for GPU Accelerators using the Polyhedral
Model. Jun Shirako, Akihiro Hayashi, Vivek Sarkar. 26th International Conference on
Compiler Construction (CC2017), February 2017.
13. Compiling and Optimizing Java 8 Programs for GPU execution. Kazuaki Ishizaki,
Akihiro Hayashi, Gita Koblents, Vivek Sarkar. 24th International Conference on Parallel
Architectures and Compilation Techniques (PACT2015), October 2015.
14. Machine-Learning-based Performance Heuristics for Runtime CPU/GPU Selection.
Akihiro Hayashi, Kazuaki Ishizaki, Gita Koblents, Vivek Sarkar. 12th International
Conference on the Principles and Practice of Programming in Java (PPPJ2015),
September 2015.
15. Automatic Parallelization of Designed Engine Control C Codes by MATLAB/
Simulink. Dan Umeda, Yohei Kanehagi, Hiroki Mikami, Akihiro Hayashi, Mitsuhiro Tani,
Hiroshi Mori, Keiji Kimura, Kasahara Hironori, IPSJ Journal, August, 2014. (in Japanese)
16. Accelerating Habanero-Java Program with OpenCL Generation. Akihiro Hayashi,
Max Grossman, Jisheng Zhao, Jun Shirako, Vivek Sarkar. 10th International Conference
on the Principles and Practice of Programming in Java (PPPJ2013), September 2013.
17. Automatic Parallelization, Performance Predictability and Power Control for
Mobile-Applications. Dominic Hillenbrand, Akihiro Hayashi, Hideo Yamamoto, Keiji
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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology

Kimura, Hironori Kasahara. 16th IEEE Symposium on Low-Power and High-Speed Chips(CoolChips XVI), April 2013.
18. Parallelization of Automotive Engine Control Software On Embedded Multi-core
Processor Using OSCAR Compiler. Yohei Kanehagi, Dan Umeda, Akihiro Hayashi,
Keiji Kimura and Hironori Kasahara, 16th IEEE Symposium on Low-Power and HighSpeed Chips (CoolChips XVI), April 2013.
19. Parallel processing of multimedia applications on TILEPro64 using OSCAR API for
embedded multicore. Yohei Kishimoto, Hiroki Mikami, Keiichi Nakano, Akihiro
Hayashi, Keiji Kimura and Hironori Kasahara, IPSJ Symposium on Embedded System(ESS2012), October 2012. (in Japanese)
20. Automatic Parallelization of Dose Calculation Engine for A Particle Therapy.
Akihiro Hayashi, Takuji Matsumoto, Hiroki Mikami, Keiji Kimura, Keiji Yamamoto,
Hironori Saki, Yasuyuki Takatani, Hironori Kasahara, IPSJ Symposium on High
Performance Computing and Computer Science (HPCS2012), January 2012. (inJapanese)
21. Parallelizing Compiler Framework and API for Heterogeneous Multicores. Akihiro
Hayashi, Yasutaka Wada, Takeshi Watanabe, Takeshi Sekiguchi, Masayoshi Mase, Jun
Shirako, Keiji Kimura and Hironori Kasahara, IPSJ Transactions on Advanced Computing
Systems (ACS), Vol.5, No.1, pp.68-79, November 2011. (in Japanese)
22. A Parallelizing Compiler Cooperative Heterogeneous Multicore Processor
Architecture. Yasutaka Wada, Akihiro Hayashi, Takeshi Masuura, Jun Shirako, Hirofumi
Nakano, Hiroaki Shikano, Keiji Kimura, and Hironori Kasahara, Transactions on HighPerformance Embedded Architectures and Compilers IV (HiPEAC IV), Lecture Note in
Computer Science, Springer, Vol. 6760, pp. 215-233, November 2011.
23. A 45nm Heterogeneous Multi-core SoC Supporting an over 32-bits Physical
Address Space for Digital Appliance. Takumi Nito, Yoichi Yuyama, Masayuki Ito,
Yoshikazu Kiyoshige, Yusuke Nitta, Osamu Nishii, Atsushi Hasegawa, Makoto Ishikawa,
Tetsuya Yamada, Junichi Miyakoshi, Koichi Terada, Tohru Nojiri, Masashi Takada,
Makoto Satoh, Hiroyuki Mizuno, Kunio Uchiyama, Yasutaka Wada, Akihiro Hayashi, Keiji
Kimura, Hironori Kasahara, Hideo Maejima,13th IEEE Symposium on Low-power andHigh-Speed Chips (COOL Chips XIII), April 2010.

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology

24. Parallelization of MP3 Encoder using Static Scheduling on a HeterogeneousMulticore. Yasutaka Wada, Akihiro Hayashi, Takeshi Masuura, Jun Shirako, Hirofumi
Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara, Transactions of IPSJ on
Computing Systems, Vol. 49 (ACS), 2008 (in Japanese)
25. Software-Cooperative Power-Ef cient Heterogeneous Multi-Core for Media
Processing. Hiroaki Shikano, Masaki Ito, Kunio Uchiyama, Toshihiko Odaka,Akihiro
Hayashi, Takeshi Masuura, Masayoshi Mase, Jun Shirako, Yasutaka Wada, Keiji Kimura,
Hironori Kasahara, 13th Asia and South Paci c Design Automation Conference (ASPDAC2008), January 2008

Refereed Workshop Proceedings
1. A Distributed, Asynchronous Algorithm for Large-Scale Internet Network
Topology Analysis. Youssef Elmougy, Akihiro Hayashi, Vivek Sarkar. IEEE TCSC
International Scalable Computing Challenge (SCALE 2024, co-located withCCGRID24), May 2024. Recipient of Best SCALE Challenge Award.
2. Enabling Multi-threading in Heterogeneous Quantum-Classical Programming
Models. Akihiro Hayashi, Austin Adams, Jeffrey Young, Alexander McCaskey, Eugene
Dumitrescu, Vivek Sarkar, Thomas M. Conte, IPDPS Workshop on Quantum Computing
Algorithms, Systems, and Applications (Q-CASA, co-located with IPDPS'23). May 2023.
3. Highly Scalable Large-Scale Asynchronous Graph Processing using Actors. Youssef
Elmougy, Akihiro Hayashi, Vivek Sarkar. IEEE TCSC International Scalable Computing
Challenge (SCALE 2023, co-located with CCGRID23), May 2023. Recipient of BestSCALE Challenge Award.
4. A Multi-Level Platform-Independent GPU API for High-Level Programming
Models. Akihiro Hayashi, Sri Raj Paul and Vivek Sarkar, HPC on Heterogeneous
Hardware Workshop (H3), June 2022. (co-located with ISC22)
5. Integrating Inter-Node Communication with a Resilient Asynchronous Many-Task
Runtime System. Sri Raj Paul, Akihiro Hayashi, Matthew Whitlock, Seonmyeong Back,fifi

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Akihiro Hayashi, Ph.D.
Senior Research Scientist, Georgia Institute of Technology

Keita Teranishi, Jackson Mayo, Max Grossman, Vivek Sarkar, International IEEE
workshop on Exascale MPI (ExaMPI), November 2020. (co-located with SC20)
6. Exploring a multi-resolution GPU programming model for Chapel. Akihiro Hayashi,
Sri Raj Paul, Vivek Sarkar, 7th Annual Chapel Implementers and Users Workshop(CHIUW), May 2020. (co-located with IPDPS2020)
7. GPUIterator: bridging the gap between Chapel and native languages. Akihiro
Hayashi, Sri Raj Paul, Vivek Sarkar, The ACM SIGPLAN 6th Annual Chapel Implementers
and Users Workshop (CHIUW), June 2019. (co-located with PLDI2019/ACM
FCRC2019)
8. A Uni ed Runtime for PGAS and Event-Driven Programming. Sri Raj Paul, Kun
Chen, Akihiro Hayashi, Max Grossman, Vivek Sarkar, International IEEE Workshop on
Extreme Scale Programming Models and Middleware (ESPM2), November 2018. (colocated with SC18)
9. Exploration of Supervised Machine Learning Techniques for Runtime Selection of
CPU vs. GPU Execution in Java Programs. Gloria Kim, Akihiro Hayashi, Vivek Sarkar.
Fourth Workshop on Accelerator Programming Using Directives (WACCPD), November
2017. (co-located with SC17)
10. Chapel-on-X: Exploring Tasking Runtimes for PGAS Languages. Akihiro Hayashi,
Sri Raj Paul, Max Grossman, Jun Shirako, Vivek Sarkar. Third IEEE Workshop on
Extreme Scale Programming Models and Middleware (ESPM2), November 2017. (colocated with SC17)
11. Exploring Compiler Optimization Opportunities for the OpenMP 4.x Accelerator
Model on a POWER8+GPU Platform. Akihiro Hayashi, Jun Shirako, Ettore Tiotto,
Robert Ho, Vivek Sarkar. 3rd Workshop on Accelerator Programming Using Directives(WACCPD), November 2016. (co-located with SC16)
12. LLVM-based Communication Optimizations for PGAS Programs. Akihiro Hayashi,
Jisheng Zhao, Michael Ferguson, Vivek Sarkar. 2nd Workshop on the LLVM Compiler
Infrastructure in HPC (LLVM), November, 2015. (co-located with SC15)
13. LLVM Optimizations for PGAS Programs -Case Study: LLVM Wide Optimization in
Chapel-. Akihiro Hayashi, Rishi Surendran, Jisheng Zhao, Michael Ferguson, Vivekfi

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Sarkar. 1st Chapel Implementers and Users Workshop (CHIUW2014), May 2014. (colocated with IPDPS)
14. Speculative Execution of Parallel Programs with Precise Exception Semantics on
GPUs. Akihiro Hayashi, Max Grossman, Jisheng Zhao, Jun Shirako, Vivek Sarkar. 26th
International Workshop on Languages and Compilers for Parallel Computing(LCPC2013), September 2013. (co-located with CnC).
15. Reconciling Application Power Control and Operating Systems for Optimal Powerand Performance. Dominic Hillenbrand, Yuuki Furuyama, Akihiro Hayashi, Mikami
Hiroki, Keiji Kimura, Hironori Kasahara. 8th International Workshop on Recon gurable
Communication-centric Systemson-Chip (ReCoSoC2013), Germany, 2013.
16. Automatic Parallelization of Hand Written Automotive Engine Control Codes
Using OSCAR Compiler. Dan Umeda, Yohei Kanehagi, Hiroki Mikami, Akihiro Hayashi,
Keiji Kimura and Hironori Kasahara. 17th Workshop on Compilers for Parallel
Computing (CPC2013), July 2013.
17. OSCAR API v2.1: Extensions for an Advanced Accelerator Control Scheme to a
Low-Power Multicore API. Keiji Kimura, Cecilia Gonzales-Alvarez, Akihiro Hayashi,
Hiroki Mikami, Mamoru Shimaoka, Jun Shirako, Hironori Kasahara, 17th Workshop on
Compilers for Parallel Computing (CPC2013), July 2013.
18. Automatic Design Exploration Framework for Multicores with Recon gurable
Accelerators. Cecilia Gonzalez-Alvarez, Haruku Ishikawa, Akihiro Hayashi, Daniel
Jimenez-Gonzalez, Carlos Alvarez, Keiji Kimura and Hironori Kasahara. 7th HiPEAC
Workshop on Recon gurable Computing (WRC2013), January, 2013.
19. OSCAR Parallelizing Compiler and API for Real-time Low Power HeterogeneousMulticores. Akihiro Hayashi, Mamoru Shimaoka, Hiroki Mikmi, Masayoshi Mase,
Yasutaka Wada, Jun Shirako, Keiji Kimura, and Hironori Kasahara, 16th Workshop on
Compilers for Parallel Computing (CPC2012), January 2012.
20. Evaluation of Power Consumption at Execution of Multiple Automatically
Parallelized and Power Controlled Media Applications on the RP2 Low-power
Multicore. Hiroki Mikami, Shumpei Kitaki, Masayoshi Mase, Akihiro Hayashi, Mamoru
Shimaoka, Keiji Kimura, Masato Edahiro, and Hironori Kasahara, 24th International

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Workshop on Languages and Compilers for Parallel Computing (LCPC2011),
September 2011.
21. Parallelizing Compiler Framework and API for Power Reduction and Software
Productivity of Real-time Heterogeneous Multicores. Akihiro Hayashi, Yasutaka
Wada, Takeshi Watanabe, Takeshi Sekiguchi, Masayoshi Mase, Jun Shirako, Keiji Kimuraand Hironori Kasahara, 23rd International Workshop on Languages and Compilers for
Parallel Computing (LCPC2010), October 2010.
22. Performance of OSCAR Multigrain Parallelizing Compiler on Multicore Processors.
Hiroki Mikami, Jun Shirako, Masayoshi Mase, Takamichi Miyamoto, Hirofumi Nakano,
Fumiyo Takano, Akihiro Hayashi, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, 14th
Workshop on Compilers for Parallel Computing(CPC2009), January 2009.
23. Parallelizing Compiler Cooperative Heterogeneous Multicore. Yasutaka Wada,
Akihiro Hayashi, Takeshi Masuura, Jun Shirako, Hirofumi Nakano, Hiroaki Shikano, Keiji
Kimura, Hironori Kasahara, Workshop on Software and Hardware Challenges ofManycore Platforms (SHCMP2008), June 2008. (co-located ISCA2008)

Refereed Posters
1. Bottleneck Scenarios in use of the Conveyors Message Aggregation Library.
Shubhendra Pal Singhal, Akihiro Hayashi, Vivek Sarkar. IEEE International Symposium
on Performance Analysis of Systems and Software (ISPASS24). May 2024.
2. Accelerating Actor-Based Distributed Triangle Counting. Aniruddha Mysore,
Kaushik Ravichandran, Youssef Elmougy, Akihiro Hayashi, Vivek Sarkar**. International
Conference for High Performance Computing, Networking, Storage, and Analysis(SC23). November 2023.
3. Extending OMR with Explicit and Automatic Runtime SIMD/GPU Parallelization.
Akihiro Hayashi, Tong Zhou, Gita Koblents, Jimmy Kwa, Kazuaki Ishizaki, Vivek Sarkar.
30th Annual International Conference on Computer Science and Software Engineering(CASCON), November 2020
4. Kokkos-HClib: enabling high-performance and resiliency for HPC systems. Akihiro
Hayashi, Sri Raj Paul, Matthew Whitlock, Nicolas Morales, Jeff Miles, Keita Teranishi,

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Vivek Sarkar. 2020 DOE Performance, Portability, and Productivity in HPC Forum(P3HPC 2020), September 2020
5. Runtime Automatic Parallelization of JVM and OMR Applications. Akihiro Hayashi,
Gita Koblents, Kazuaki Ishizaki, Jimmy Kwa, Vivek Sarkar. 29th Annual International
Conference on Computer Science and Software Engineering (CASCON), November
2019
6. Runtime Automatic Parallelization of JVM Applications. Akihiro Hayashi, Gita
Koblents, Max Grossman, Kazuaki Ishizaki, Alon Housfater, Jimmy Kwa, Vivek Sarkar.
28th Annual International Conference on Computer Science and Software Engineering(CASCON), November 2018 (Won the best exhibit out of 72 exhibits)
7. Runtime Automatic Parallelization of JVM Applications. Akihiro Hayashi, Gita
Koblents, Max Grossman, Kazuaki Ishizaki, Alon Housfater, Jimmy Kwa, Vivek Sarkar.
27th Annual International Conference on Computer Science and Software Engineering(CASCON), November 2017 (Won the best exhibit out of 68 exhibits)
8. Tackling GPU Programmability and Pro tability Using IBM JIT Code Generation
and Performance Prediction. Akihiro Hayashi, Gita Koblents, Max Grossman, Kazuaki
Ishizaki, Alon Housfater, Jimmy Kwa, Vivek Sarkar. 26th Annual International
Conference on Computer Science and Software Engineering (CASCON), November
2016
9. How Java runtime can execute practical Java programs on GPU. Kazuaki
Ishizaki,Gita Koblents,Akihiro Hayashi,Vivek Sarkar,Hiroshi Inoue. Poster Session, IPSJ
Symposium on High Performance Computing and Computer Science (HPCS2015), May
2015. (in Japanese)
10. Parallel Processing of Multimedia Applications on TILEPro64. Yohei Kishimoto,
Hiroki Mikami, Keiichi Nakano, Akihiro Hayashi, Keiji Kimura, Hironori Kasahara. 16th
IEEE Symposium on Low Power and High-Speed Chips (COOL Chips XVI), April 2013.
11. Opportunities and Challenges of Application-Power Control in the Age of Dark
Silicon. Dominic Hillenbrand, Yuuki Furuyama, Akihiro Hayashi, Keiji Kimura, Hironori
Kasahara. 8th international conference on High-Performance and Embedded
Architectures and Compilers (HiPEAC2013), January 2013.

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12. OSCAR Parallelizing Compiler Cooperative Heterogeneous Multi-core
Architecture. Akihiro Hayashi, Yasutaka Wada, Hiroaki Shikano, Teruo Kamiayama,
Takeshi Watanabe, Takeshi Sekiguchi, Masayoshi Mase, 18th International Conference
on Parallel Architectures and Compilation Techniques (PACT2009), September 2009.

Patents (include applications)
1. Parallelism extraction method and method for making program. Hironori Kasahara,
Keiji Kimura, Akihiro Hayashi, Hiroki Mikami, Yohei Kanehagi, Dan Umeda, Mitsuo
Sawada (US Patent Application , US20150363230A1)
2. Parallelizing compile method, parallelizing compiler, parallelizing compile
apparatus, and onboard apparatus. Hiroshi Mori, Mitsuhiro Tani, Hironori Kasahara,
Keiji Kimura, Dan Umeda, Akihiro Hayashi, Hiroki Mikami, Yohei Kanehagi(US9760355B2, JP6018022B2)
3. Runtime gpu/cpu selection. Gita Koblents, Alon Shalev Housfater, Kazuaki Ishizaki,
Akihiro Hayashi (US10540194B2)

Invited Talks
1. How to design human actions by digital technology? The National Convention of
IPSJ, March 2013. (in Japanese)

Presentations
1. Fine-grained-Asynchronous Bulk-Synchronous Processing for Graph Analytics.
Vivek Sarkar and Akihiro Hayashi. 2024 SIAM Conference on Parallel Processing for
Scienti c Computing (SIAM-PP24), March 2024.
2. Enabling CHIP-SPV in Chapel GPUAPI module. Jisheng Zhao, Akihiro Hayashi, Brice
Videau, Vivek Sarkar. The 10th Annual Chapel Implementers and Users Workshop(CHIUW 2023), June 2023.
3. Accelerating CHAMPS on GPUs. Akihiro Hayashi, Sri Raj Paul and Vivek Sarkar. The
9th Annual Chapel Implementers and Users Workshop (CHIUW 2022), June 2022.
Akihiro Hayashi, Sri Raj Paul and Vivek Sarkar. The 9th Annual Chapel Implementers
and Users Workshop (CHIUW 2022), June 2022.

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4. A Cooperative Compiler and Runtime Checkpoint/Restart Approach for Kokkos.
Akihiro Hayashi, Matthew Whitlock, Sri Raj Paul, Nicolas Morales, Keita Teranishi, Vivek
Sarkar, 2022 SIAM Conference on Parallel Processing for Scienti c Computing (SIAMPP22), February 2022.
5. GPUAPI: Multi-level Chapel Runtime API for GPUs. Akihiro Hayashi, Sri Raj Paul,
Vivek Sarkar, 8th Annual Chapel Implementers and Users Workshop (CHIUW), June
2021.
6. Composing Asynchrony, Communication and Resilience. Sri Raj Paul, Akihiro
Hayashi, Nicole Slattengren, Hemanth Kolla, Seonmyeong Bak, Matthew Whitlock,Jackson Mayo, Keita Teranishi, Vivek Sarkar and Max Grossman. 2020 SIAM Conference
on Parallel Processing for Scienti c Computing (SIAM-PP20)
7. Scalable Ef cient Fault Tolerance in Asynchronous Many Task (AMT) Programming
Models. Keita Teranishi, Hemanth Kolla, Nicole Slattengren, Mayo Jackson, Sri Raj Paul,
Akihiro Hayashi, Vivek Sarkar, Seonmyeong Bak. 2019 SIAM Conference on Parallel
Processing for Scienti c Computing (SIAM-PP19)
8. Fault Tolerance in AMT Programming Models & Runtimes. Hemanth Kolla, Keita
Teranishi, Nicole Slattengren, Matthew Whitlock, Jackson Mayo, Sri Raj Paul, Akihiro
Hayashi, Vivek Sarkar. 2018 ACM Conference on Platform for Advanced Scienti c
Computing (PASC2018)
9. Resilience With Asynchronous Many Task (AMT) Programming Models. Sanjay
Chatterjee, Keita Teranishi, Vivek Sarkar, Akihiro Hayashi. 2018 SIAM Conference on
Parallel Processing for Scienti c Computing (SIAM-PP18)
10. Machine-learning-based Performance Heuristics for Runtime CPU/GPU Selectionin Java. Akihiro Hayashi, Kazuaki Ishizaki, Gita Koblents, Vivek Sarkar. 10th Workshop
on Challenges for Parallel Computing, November 2015. (co-located with
CASCON2015)
11. LLVM-based Communication Optimizations for Chapel. Akihiro Hayashi, Jisheng
Zhao, Micheal Ferguson, Vivek Sarkar. Chapel Lightning Talks Birds-of-a-Feather at
International Conference for High Performance Computing, Networking, Storage andAnalysis (SC14), November 2014.

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Non Refereed Technical Reports
1. Resilient Asynchronous Many Task Programming Model. Keita Teranishi, Hemanth
Kolla, Nicole Lemaster Slattengren, Matthew Whitlock, Jackson Mayo, Robert L. Clay, Sri
Raj Paul, Akihiro Hayashi, Vivek Sarkar, August, 2018. Sandia National Lab. Technical
Report (SAND2018-9672 667589)
2. Performance Evaluation of Hierarchical Barrier Hardware with OSCAR API
Analyzer. Akihiro Kawashima, Yohei Kanehagi, Akihiro Hayashi, Keiji Kimura, Hironori
Kasahara. Technical Report of IPSJ. V0l.2013-ARC-206-16 (SWoPP2013), July 2013. (inJapanese)
3. An Investigation of Parallelization and Evaluation on Commercial Multi-core
Smart Device. Hideo Yamamoto, Takashi Goto, Tomohiro Hirano, Kouhei Muto, Hiroki
Mikami, Dominic Hillenbrand, Akihiro Hayashi, Keiji Kimura, Hironori Kasahara.
Technical Report of IPSJ, Vol. 2013-OS-124, February 2013. (in Japanese)
4. Parallelization of Automobile Engine Control Software on Multicore Processor.
Yohei Kanehagi, Dan Umeda, Hiroki Mikami, Akihiro Hayashi, Mitsuo Sawada, Keiji
Kimura, Hironori Kasahara. Technical Report of IPSJ, Vol.2013-ARC195-2, January 2013.
(in Japanese)
5. Automatic parallelization of the GMS Earthquake simulator with OSCAR
Compiler. Mamoru Shimaoka, Hiroki Mikami, Akihiro Hayashi, Yasutaka Wada, Keiji
Kimura, Hidekazu Morita, Kunio Uchiyama, Hironori Kasahara. Technical Report of IPSJ,
Vol.2012-ARC194HPC137-26 (HOKKE2012), December 2012.
6. Automatic parallelization with OSCAR API Analyzer: a cross-platform
performance evaluation. Cecilia Gonzalez-Alvarez, Yohei Kanehagi, Kosei Takemoto,
Yohei Kishimoto, Kohei Muto, Hiroki Mikami, Akihiro Hayashi, Keiji Kimura, Hironori
Kasahara. Technical Report of IPSJ, Vol.2012-ARC194HPC137-10 (HOKKE2012),
December 2012.
7. Opportunities and Challenges of Application-Power Control in the Age of Dark
Silicon. Dominic Hillenbrand, Yuuki Furuyama, Akihiro Hayashi, Hiroki Mikami, Keiji
Kimura, Hironori Kasahara, Technical Report of IPSJ, Vol.2012ARC194HPC137-11(HOKKE2012), December 2012.

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8. Realization of 1 Watt Web Service with RP-X Low-power Multicore Processor.
Yuuki Furuyama, Mamoru Shimaoka, Hiroki Mikami, Akihiro Hayashi, Keiji Kimura,
Hironori Kasahara. Technical Report of IPSJ, Vol.2012-ARC-201-24 (SWoPP2012),
August 2012. (in Japanese)
9. Parallelization of Basic Engine Control Software Model on Multicore Processor.
Dan Umeda, Yohei Kanehagi, Hiroki Mikami, Akihiro Hayashi, Mituhiro Tani, Yuji Mori,
Keiji Kimura, Hironori Kasahara. Technical Report of IPSJ, Vol.2012-ARC-201-22(SWoPP2012), August 2012. (in Japanese)
10. Automatic Parallelization of Dose Calculation Engine for A Particle Therapy on
SMP Servers. Akihiro Hayashi, Takuji Matsumoto, Hiroki Mikami, Keiji Kimura, Keiji Yamamoto, Hironori Saki, Yasuyuki Takatani, Hironori Kasahara. Technical Report of IPSJ,
Vol.2011-ARC189HPC132-2 (HOKKE2011), November 2011. (in Japanese)
11. Hiding I/O overheads with Parallelizing Compiler for Media Applications. Akihiro
Hayashi, Takeshi Sekiguchi, Masayoshi Mase, Yasutaka Wada, Keiji Kimura, Hironori
Kasahara. Technical Report of IPSJ, Vol.2011-ARC-195OS117-14, April 2011. (inJapanese)
12. Evaluation of Parallelizable C Programs by the OSCAR API Standard Translator.
Takuya Sato, Hiroki Mikami, Akihiro Hayashi, Masayoshi Mase, Keiji Kimura, Hironori
Kasahara. Technical Report of IPSJ, Vol.2010-ARC-191-2, October 2010. (in Japanese)
13. A Compiler Framework for Heterogeneous Multicores for Consumer Electronics.
Akihiro Hayashi, Yasutaka Wada, Takeshi Watanabe, Takeshi Sekiguchi, Masayoshi
Mase, Keiji Kimura, Masayuki Ito, Jun Hasegawa, Makoto Sato, Toru Nojiri, Ku- nio
Uchiyama, Hironori Kasahara. Technical Report of IPSJ, Vol.2010-ARC- 190-7(SWoPP2010), August 2010. (in Japanese)
14. Performance of Power Reduc- tion Scheme by a Compiler on HeterogeneousMulticore for Consumer Electronics RP-X. Yasutaka Wada, Akihiro Hayashi, Takeshi
Watanabe, Takeshi Sekiguchi, Masayoshi Mase, Jun Shirako, Keiji Kimura, Masayuki Ito,
Jun Hasegawa, Makoto Sato, Toru Nojiri, Kunio Uchiyama, Hironori Kasahara, Technical
Report of IPSJ, Vol.2010-ARC-190-8 (SWoPP2010), August 2010. (in Japanese)
15. Performance Evaluation of Parallelizing Compiler Cooperated HeterogeneousMulticore Architecture Using Media Applications. Teruo Kamiyama, Yasutaka Wada,

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Akihiro Hayashi, Masayoshi Mase, Hirofumi Nakano, Takeshi Watanabe, Keiji Kimura,
Hironori Kasahara. Technical Report of IPSJ, Vol.2009-ARC-173, Jan. 2009. (inJapanese)
16. A Hierarchical Coarse Grain Task Static Scheduling Scheme on a HeterogeneousMulticore. Yasutaka Wada, Akihiro Hayashi, Taketo Iyoku, Jun Shirako, Hirofumi
Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara, Technical Report of IPSJ,
Vol.2007-ARC-174-17 (SWoPP2007), August 2007. (in Japanese)
17. Compiler Control Power Saving for Heterogeneous Multicore Processor. Akihiro
Hayashi, Taketo Iyoku, Ryo Nakagawa, Shigeru Matsumoto, Kaito Ya- mada, Naoto
Oshiyama, Jun Shirako, Yasutaka Wada, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura,
Hironori Kasahara. Technical Report of IPSJ, Vol.2007-ARC- 174-18 (SWoPP2007),
August 2007. (in Japanese)

Skills‣ Programming Languages (C/C++, Java, Scala, Python, Assembler Languages)‣ Hardware Description Languages (Verilog-HDL)‣ Parallel Programming Languages/Directives/Libraries (X10, Chapel, UPC/UPC++,
Habanero-Java/C, CUDA, OpenCL, OpenMP, Apache Spark)‣ Compilers (LLVM, OpenJ9, Soot, The OSCAR compiler)

Software Artifacts‣ Contributed to the IBM Testarossa Java compiler and the J9 VM (IBM).
‣ Contributed to the Cray Chapel compiler and runtime (Cray Inc.).
‣ Contributed to the Habanero-Java compiler and runtime (Rice University).
‣ Contributed to the Habanero-C library (Rice University, Georgia Institute of Technology)‣ Contributed to the OSCAR parallelizing compiler (Waseda University).

As of August 12, 2024