NXP Semiconductors
Application Note

Document Number: AN5350
Rev. 0, 10/2016

i.MX 6ULL Migration Guide
Migrating from i.MX 6UL to i.MX 6ULL
1. Introduction
1.1. Purpose
This application note provides an introduction to thei.MX 6ULL architecture by highlighting the differencesfrom the i.MX 6 series processor upon which it is based(namely the i.MX 6UL). This document is a migration
guide for developers that migrate from the i.MX 6UL tothe i.MX 6ULL.

© 2016 NXP B.V.

Contents
1.

Introduction........................................................................ 1
1.1.
Purpose ................................................................... 1
1.2.
Scope ...................................................................... 2
1.3.
Audience ................................................................. 2
2. Feature Change Summary .................................................. 2
2.1.
BSP support ............................................................ 2
2.2.
Module change list .................................................. 3
2.3.
EPDC and ESAI PINMUX ..................................... 4
3. Revision History ................................................................ 6

Feature Change Summary

1.2. ScopeThe i.MX 6ULL was developed with an extensive reuse of the existing NXP designs, including:• Extensive reuse and alignment of the i.MX 6UL• Modules reused/modified from the i.MX 6UL
Due to a close alignment to the i.MX 6UL design, this document is structured as a summary of changes
to the i.MX 6UL features. It provides references to modules that are reused or modified on thei.MX 6ULL.
The i.MX 6ULL architecture introduces new features which are different from the i.MX 6UL. The key
differences include:• The EPD display support with the EPDC/PXP for the low-end eReader market is added. It is lesspowerful when compared to the i.MX 6SL or i.MX 7D, but it also has a lower cost and a lower
power consumption.
• The advanced security features that are mainly used by the POS applications (includingCAAM/BEE/DryICE) are removed. The basic security (such as the HAB) is still supported.
• The ESAI with a multi-channel audio input/output is added to provide a better support for audio
applications.
• The power consumption is optimized.
• The EMV SIM module is removed.

1.3. Audience
This document is intended for system integrators and software developers migrating from the platforms
based on the i.MX 6ULL.

2. Feature Change Summary
2.1. BSP support
The i.MX 6ULL is supported by the Linux_4.1.15-2.0.0_GA BSP release.

i.MX 6ULL Migration Guide, Application Note, Rev. 0, 10/2016
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Feature Change Summary

2.2. Module change list
This section summarizes the architectural changes of the i.MX 6ULL with respect to the i.MX 6UL.
Table 1. Architectural changes
ChangeCategory

FeaturefromBoard impact

Software impact

i.MX 6UL
ARM® Cortex®A7
core platform

Cortex-A7 core

Updated

Audio

ESAINewGeneralconnectivityinterfaces

EMV

Memory/busses
SNVS MIX
MIX
repartitioning

None

None

None (the SAI interface is still provided on the
6ULL-EVK).

None

RemovedThe EMV driver is removed.

None

NIC301
AIPS-3
SNVS_LPIOMUXC_SNVS
SNVS_GPR
MEGAMIXSNVSMIX

UpdatedNew
Updated
New
New
UpdatedUpdated

None
None
None
None
None
None
None

CAAM

RemovedThe CAAM PINMUX is removed.

EPDC and ESAI

New

None
None
None
None
None
None
None
The CAAM PINMUX
config code isremoved.
The EPDC PINMUX
config code isadded.
The maximum ARM
frequency isadjusted in theDVFS driver basedon the latest
datasheet.

PINMUX

PowerSecurity

Display

The PINMUX option for the EPDC display interface
and the ESAI interface is added.
- The power consumption for the low-power modes
is optimized. Some of the IP modules are moved
from the wakeupmix to the megamix.
- The Vmin = 0.9 V DVFS set point for both the
SOC and the ARM in the run mode is supported toachieve lower power at a low-frequency operation.
The VDD_SOC_CAP and VDD_ARM_CAP can beup to 1.3 V only in the commercial grade and up to
1.26 V in the industrial grade.

Powerconsumption

Optimized

Internal LDO

UpdatedCAAM

RemovedNone

BEERemoved

None

RNGB

New

None

DCP

New

None

OCOTP_CTRL

Updated

None

PXP

UpdatedThe PXP is updated to support EPD displays.

EPDC

New

The EDPC IP is added to support E-Ink displays.

None
The CAAM support
code is removed.
The BEE support
code is removed.
The RNGB support
code is added.
The DCP support
code is added.
The fuse box size isreduced from 4 KB
to 2 KB.
The “repeat” featureis removed and theEPD processing
support is added.
The EPDC driver isadded.

i.MX 6ULL Migration Guide, Application Note, Rev. 0, 10/2016
NXP Semiconductors

3Feature Change Summary

2.3. EPDC and ESAI PINMUXWhen designing hardware boards, consider the EPDC and ESAI changes to the PINMUX for thei.MX 6ULL with respect to the i.MX 6UL. The EPDC multiplexes the LCD/ENET/UART pins and theESAI multiplexes the CSI pins.
The detailed EPDC PINMUX is shown in this table:
Table 2. EPDC PINMUX
Pin name

Alt9

UART4_RXD
UART5_TXD
UART5_RXD
ENET1_RXD0
ENET1_RXD1
ENET1_CDS_DV
ENET1_TXD0
ENET1_TXD1
ENET1_TXEN
ENET1_TXCLKENET1_RXER
ENET2_RXD0
ENET2_RXD1
ENET2_CRS_DV
ENET2_TXD0
ENET2_TXD1
ENET2_TXEN
ENET2_TXCLKENET2_RXER
LCD_CLKLCD_ENABLE
LCD_HSYNC
LCD_VSYNC
LCD_RESETLCD_DATA00
LCD_DATA01
LCD_DATA02
LCD_DATA03
LCD_DATA04
LCD_DATA05
LCD_DATA06
LCD_DATA07
LCD_DATA08
LCD_DATA09
LCD_DATA10LCD_DATA11
LCD_DATA12LCD_DATA13
LCD_DATA14LCD_DATA15LCD_DATA16LCD_DATA17LCD_DATA18
LCD_DATA19
LCD_DATA20

epdc.PWRCTRL[1]epdc.PWRCTRL[2]epdc.PWRCTRL[3]epdc.SDCE[4]epdc.SDCE[5]epdc.SDCE[6]epdc.SDCE[7]epdc.SDCE[8]epdc.SDCE[9]epdc.SDOED
epdc.SDOEZ
epdc.SDDO[8]epdc.SDDO[9]epdc.SDDO[10]epdc.SDDO[11]epdc.SDDO[12]epdc.SDDO[13]epdc.SDDO[14]epdc.SDDO[15]epdc.SDCLK
epdc.SDLE
epdc.SDOE
epdc.SDCE[0]epdc.GDOE
epdc.SDDO[0]epdc.SDDO[1]epdc.SDDO[2]epdc.SDDO[3]epdc.SDDO[4]epdc.SDDO[5]epdc.SDDO[6]epdc.SDDO[7]epdc.PWRIRQ
epdc.PWRWAKE
epdc.PWRCOM
epdc.PWRSTAT
epdc.PWRCTRL[0]epdc.BDR[0]epdc.SDSHR
epdc.GDRL
epdc.GDCLK
epdc.GDSP
epdc.BDR[1]epdc.VCOM[0]epdc.VCOM[1]i.MX 6ULL Migration Guide, Application Note, Rev. 0, 10/2016
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Feature Change Summary

Table 2. EPDC PINMUX
Pin name

Alt9

LCD_DATA21
LCD_DATA22
LCD_DATA23

epdc.SDCE[1]epdc.SDCE[2]epdc.SDCE[3]The detailed ESAI PINMUX is shown in this table:
Table 3. ESAI PINMUX
Pin name

Alt9

CSI_MCLK
CSI_PIXCLKCSI_VSYNC
CSI_HSYNC
CSI_DATA00
CSI_DATA01
CSI_DATA02
CSI_DATA03
CSI_DATA04
CSI_DATA05
CSI_DATA06
CSI_DATA07

esai.TX3_RX2
esai.TX2_RX3
esai.TX4_RX1
esai.TX1
esai.TX_HF_CLK
esai.RX_HF_CLKesai.RX_FS
esai.RX_CLK
esai.TX_FS
esai.TX_CLK
esai.TX5_RX0
esai.TX0

The EPDC connector is only for the NXP DC-4 board, whose part number is X-IMXEBOOKDC4. Ifusing the SD1 to boot up, it is not needed to connect the EPDC_PWRSTAT signal to the EPDC
connector. The detailed connector design is shown in this figure:

Figure 1. Connector design

i.MX 6ULL Migration Guide, Application Note, Rev. 0, 10/2016
NXP Semiconductors

5

Revision History

3. Revision History
This table summarizes the changes done to this document since the initial release:
Revision numberDate

Sunstantive changes

010/2016

Initial releasei.MX 6ULL Migration Guide, Application Note, Rev. 0, 10/2016
6NXP Semiconductors

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Document Number: AN5350
Rev. 010/2016