PEDS2009

New Generalized Multilevel Current-Source PWM
Inverter with No-Isolated Switching Devices
SurosoToshihiko Noguchi

Department of Energy and Environment ScienceNagaoka University of Technology
Nagaoka, Niigata 940-2188, Japansuroso97@gmail.com

Department of Electrical Electronic Engineering
Shizuoka University
Hamamatsu, Shizuoka 432-8561, Japan
ttnogut@ipc.shizuoka.ac.jp

Abstract—The paper proposes a generalized circuit configuration ofa new multilevel current-source inverter (CSI) with no-isolated
switching devices. In this new multilevel inverter topology, all of thepower-switches in the inverter are connected on a common-potentiallevel. Hence, all of the power switches only need a single gate drive
power supply without using isolated power supplies or conventionalbootstrap techniques. This key feature is still valid even if thenumber of the power switches increases due to the higher number ofthe output current waveform levels. As a result, complexity of thegate drive circuit can be remarkably moderated. In addition, themultilevel CSI circuit is capable to operate at high switchingfrequency if required, because all of the power switches areconnected on the common potential level. Five-level PWM inverter
configuration, including its chopper circuit as DC current-powersource circuits using small input inductors, is verified throughcomputer simulations and experimental tests. The results show
feasibility of the proposed topology with reducing the circuit
complexity and physical size of the multilevel CSIs.

The VSI has a DC voltage power source and generates AC
voltage waveforms to the load, while the CSI delivers AC
current waveforms from a DC current power source. The latterfeatures capability of short-circuit protection because of its
high impedance DC power source, but requires protection
against an open-circuit to guarantee continuity of the current.
A large number of the power semiconductor switches in themultilevel inverter circuit increases circuit complexity such as
control and gate drive circuits. In a high speed switching
application, serious EMI and dv/dt problems cannot be ignored,
especially high-frequency conductive noise currents in the gate
driving circuits. Moreover, a bulky inductor used to obtain asmooth DC current and discrete diodes connected in series withthe power switches are some drawbacks associated with theCSI topology, which often degrades its efficiency. Howeverrecently, the series diode might not be necessary because newIGBTs having reverse-blocking capability (reverse-blockingIGBTs) are emerging.

Keywords-current-source inverter; common-emitter; multilevel;
gate drive circuit

I.

In order to address some problems such as dv/dt, inductor
size, complexity of the gate drive-circuits and the control
circuits of the multilevel CSI circuit, a new innovative solution
is mandatory to make the multilevel CSI topology more
attractive and popular. In this paper, a new generalized
structure of the multilevel CSI circuit, where all of the powerswitches are connected on a common-emitter potential level, ispresented. Using this multilevel inverter topology, the numberof the gate drive power supplies for the power switches candramatically be reduced to only a single to drive all the powerswitches without any isolated power supplies nor conventionalbootstrap circuits. This significant feature is also valid eventhe number of the power switches increases to generate thehigher level number of the output current waveform. Inaddition, the circuit can overcome the dv/dt problem in theinverter; because all the switches are connected on the identicalpotential level. In order to reduce the inductor size for thecurrent source generation, a high-frequency chopper circuit
generating a smooth DC input current for the CSI is alsopresented with its simple controller.

INTRODUCTION

The fast continuing development of power devices working
at high switching frequencies for medium and high power
applications such as metal-oxide-semiconductor field-effecttransistors (MOSFETs) and insulated-gate bipolar transistors(IGBTs) has improved the power converter performance. In
some high switching frequency applications, SiC (SiliconCarbide) based power MOSFETs are very promising as nextgeneration power switching devices because their maximum
voltage ratings and switching speeds can be about ten times of
the conventional Si based devices. In addition, the ON-state
resistance of SiC-MOSFETs will be reduced down to 1/500 of
the currently available devices and their operating temperature
can be over 300 °C, which is considerably effective to improveefficiency and power density of the power converters.
Development of high-performance semiconductor switchesalso increases the research interest in high power converters
such as multilevel inverters because they have capability tooutput higher output power with low-voltage rating devices andless distorted output waveforms compared with theconventional two-level inverters. The multilevel inverter
topologies can generally be classified into voltage source
inverters (VSI) and its dual, i.e., current source inverters (CSI).

The operating performance of the proposed multilevel CSI
is examined and validated through some computer simulations.
Furthermore, a laboratory experimental prototype of a fivelevel CSI circuit was set up to verify the proposed newmultilevel CSI topology, using the power MOSFETs withseries blocking diodes.

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PEDS2009
II. CIRCUIT CONFIGURATION AND PRINCIPLEOPERATION

Table I. Switching states of three-level CSI
Q2
Q3
Q4
Output
Q100
11+I
100
10
1
100-I

A. Operation Principle of Inverter Circuit
Figure 1 shows a circuit configuration of a three-level CSI
proposed in the authors’ previous research. All of the powerswitches (Q1, Q2, Q3 and Q4) are connected on a commonemitter line. Table 1 lists its switching states of this three-level
CSI for three-level output current waveform generation (+I, 0and –I current-levels). In addition, Fig. 2 shows another basic
circuit configuration of a two-level CSI-module of whichpower switches (Q5 and Q6) are also connected on a common
potential point. The newly proposed configuration of themultilevel CSI can be obtained by connecting the former threelevel CSI as a main inverter circuit, with a single or some twolevel CSI-modules via connecting diodes as shown in a
generalized circuit of the proposed multilevel CSI in Fig. 3.

Fig. 1. Fundamental three-level CSI

A unique point of the proposed multilevel CSI circuit is that
all of the power switches are connected on a common-emitteror a common-potential point. This condition is still valid eventhe number of the power switches increases to generate thehigher level number of the output current waveform. The
relation between the level number of the CSI output current
waveform and the number of the two-level CSI modules can beobtained from the equation below:
M=3+2n,(1)where M is the level number of the output current and n is thenumber of two-level CSI-modules. Figure 4 and 5 show aconfiguration of the five-level CSI and its principle operation
waveform, respectively. In this example, all of the DC current
sources are assumed to have the identical current amplitude,i.e., I1=I2=I3=I4=I.

Fig. 2. Two-level CSI module

Using this new multilevel CSI topology, several advantages
can be obtained as follows:
1) Using this circuit topology, the number of the gate drive
power supplies can be reduced drastically; hence, it canreduce the circuit component and circuit complexity of
the gate drive circuits, such as isolation transformers; incase of isolated power supplies are used for each powerswitch; or capacitors; in case of bootstrap technique isapplied.
2) All power switches are connected at the identicalreference potential; hence it can eliminate the dv/dt
problem during the switching operation. Therefore, theinverter can be operated at a high switching frequency inorder to obtain better quality of the inverter output
current by pushing harmonic components to a higher
frequency range.

Fig. 3. Generalized configuration of proposed multilevel CSI

3) A simple and modular structure. The inverter circuit iscomposed of multiple units of an identical two-level
CSI, which leads to cost reduction in manufacturing
process.
4)

A single DC power source. The level of the output
current can be increased easily by connecting some twolevel CSI modules with only a single DC power source.

Fig. 4. Five-level CSI circuit (I1=I2=I3=I4=I)

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PEDS2009Table II. Switching states of five-level CSI
Q1Q2

Q3Q4Q5Q6Output001110001111000111001011111
1
10+I+2I0-I-2I(a) Current +2I(b) Current +I(c) Current 0

Fig. 5. Five-level current waveform generation

The switching state combinations required to generate afive-level current waveform are listed in Table II andillustrated in Fig. 6(a) to (e). The required five-level output
current (+2I, +I, 0, -I and -2I current-levels) are generated asfollows:
1) Current level +2I: Q1, Q2 and Q5 are turned off, whileQ3 is turned on, making the currents I1 and I3 flow tothe load. Q4 and Q6 are turned on, making the current
circulation paths for other two DC current sources (I2,I4).
2) Current level +I: Q1 and Q2 are turned off, while Q3 isturned on, making the current I1 flows to the load. Q4,Q5 and Q6 are turned on, making the current circulation
paths for other three DC current sources input inductor
current (I2, I3, I4).
3) Current level 0: Q1, Q4, Q5 and Q6 are turned on, andQ2 and Q3 are turned off making the current loops forevery DC current source. No current flows to the load.
4) Current level -I: Q3 and Q4 are turned off, while Q2 isturned on, making the current I2 flows to the load. Q1,Q5 and Q6 are turned on, making the current path forother three DC current sources (I1, I3, I4).

(d) Current -I(e) Current -2IFig. 6. Switching modes for five-level current generation(I1=I2=I3=I4=I)

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PEDS20095) Current level -2I: Q3, Q4 and Q6 are turned off, while
Q2 is turned on, making the currents I2 and I4 flow tothe load. Q1 and Q5 are turned on, making the current
paths for other two DC current sources (I1, I3).

the identical frequency. The frequency of the modulated signal(a reference sinusoidal waveform) determines the fundamental
frequency of the output current waveform, while the frequencyof triangular carrier waves gives the switching frequency ofthe CSI power switches. An M-level output current waveformusing this modulation requires (M-1) triangular carriers withthe same frequency.

B. DC Current-Source Circuit
In this multilevel CSI circuit, the DC current sources arerequired, which are obtained by employing chopper circuitswith small inductors connected with each CSI module
working as a DC current supply. The chopper circuit consistsof two controlled switches controlling a pair of the DC
currents flowing through two smoothing inductors. Two freewheeling diodes are used to keep continuous currents flowing
through the inductors. Figure 7 shows the two-level CSI
module with chopper circuit as the DC current supplies.
The controller diagram of the chopper circuit for DC current
generation is presented in Fig. 8. Proportional integral (PI)regulators are independently applied to control two of thecurrents flowing through the smoothing inductors (L1 and L2),
which determine the amplitude of the PWM output current
waveform (Ipwm) simultaneously. Making the inductor
currents (I1 and I2) follow their reference current (Iref) is theobjective of this current regulator. The switching gate signalsof the chopper switches are generated by comparing the error
signal of the detected steady state currents flowing through theinput inductors I1 and I2, and a triangular waveform after
passing through the PI regulator. This signal is used to control
the duty cycles of the chopper switches to obtain balanced andstable DC currents I1 and I2. This control circuit is similar for
all of the chopper circuits accompanying the two-level CSI
module functioning as the DC current supplies; thus thisapproach effectively makes the controller much simpler. By
connecting more and more two-level CSI modules, the higher
level number of the output current waveform with smaller
current rating switching devices and smaller distortion of theoutput current waveform can be obtained.
Figure 9 shows a circuit configuration of a five-level CSI
including the chopper circuits as DC current sources. The
power circuit consists of a three-level CSI as a main circuit
connected with a two-level CSI module. Only a single DC
power source is required to obtain the four DC current sources
for the CSI.

Fig. 7. Two-level CSI module with chopper circuit

Fig. 8. Controller diagram of chopper circuit

Fig. 9. Simulation and experimental test circuit of five-level CSI

C. PWM Modulation Strategy
In order to obtain a better output current waveform, a pulse
width modulation (PWM) technique is applied, instead of astaircase waveform operation. Staircase waveform can easily
be obtained at the fundamental switching frequency, soswitching losses can be negligibly low. However more
distortion of the output waveform is generated and a larger
filter is needed.
In this paper, a level-shifted multi-carrier based sinusoidal
PWM technique is employed to generate the gate signals for
the CSI power switches to obtain the PWM current waveforms
as shown in Fig. 10. All carrier waveforms are in phase withFig. 10. Multi-carrier based sinusoidal PWM

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PEDS2009
prototype of the five-level CSI was constructed with 300-V,
30-A power MOSFETs (FK30SM-6) and 1200-V, 16-A fast
recovery diodes (HFA16PB120). The experimental circuitspecifications are identical with the computer simulation
parameters as listed in Table III.
Figures 13(a) and (b) show the resultant experimental
waveforms of the five-level CSI showing the steady state fivelevel output current, the load current and the DC current
source waveforms obtained from the chopper circuits. The
inverter works properly generating a five-level output current
waveform. As can be seen in the figure, a low distorted
sinusoidal load current waveform is also obtained afterfiltering. All of the experimental waveforms agree with theprevious computer simulation results.
V.

In this paper a new generalized configuration of amultilevel CSI has been proposed and its validity has beenverified using computer simulations and an experimental
prototype. The multilevel inverter topology can drasticallyreduce complexity of the gate drive circuits and the control
circuit in the multilevel CSI. This remarkable feature neverfades away even if the number of the power switches isincreased to achieve higher level number of the output current
waveform. Chopper circuits working as DC current sources arealso discussed which are able to reduce the input inductor size
down to micro-H order.

Fig. 11. Controller diagram of five-level CSI
Table III. Test parameters
Smoothing inductors of600 μH
chopper
Power source voltage
DC 160 V
Switching frequency
30 kHzFilter capacitor of load
5 μF
Load
R= 6 Ω , L= 1.2 mH

III.

VI.
[1]

[2]

COMPUTER SIMULATION RESULTS[3]

In order to analyze and to test the proposed topology,
computer simulations are conducted by using a PSIM
software. This section presents an example the computer
simulation results of the proposed five-level CSI. The
simulation parameters are shown in Table III. The five-level
inverter circuit configuration shown in Fig. 9 is tested with asingle DC power source. Figure 11 shows an overall controller
diagram of the five-level CSI including its chopper and inverter
circuit controller.
Figures 12(a) and (b) present the computer simulation
results of five-level current, the load current and the DC
power source currents for the five-level CSI. The amplitude of
the DC current sources are well balanced for all smoothing
inductors (IL1, IL2, IL3 and IL4), which correspond to a half ofthe peak level of the five-level output current waveform. It isconfirmed that the five-level CSI generates the five-level
output current perfectly.
IV.

CONCLUSION

[4]

[5]

[6]

[7]
[8]

EXPERIMENTAL TEST RESULTS

In order to verify and to prove feasibility of the proposed
multilevel CSI configuration experimentally, a laboratory

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151010Five-level current (A)15

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15101055Load current (A)-15
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0-5-10

0.02

0.04

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0.06

-0.02

Time (s)866

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8420808664420866IL3 (A)

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IL4 (A)IL3 (A)

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IL2 (A)IL2 (A)IL1 (A)(a) Five-level and load currents

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Time (s)(b) Waveforms of DC current sources
Fig. 12. Simulation waveforms(b) Waveforms of DC current sources
Fig. 13. Experimental waveforms

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