Applied Micro Circuit Corporation selects Mirabilis Design’s VisualSim for architecture
exploration of their advanced SoCs and Subsystems.

Editorial Contact
Vaishnavi Shankar
Mirabilis Design Inc.
Phone: 408-245-8552

Mirabilis Design Inc.
798 S Bernardo Ave
Sunnyvale, CA 94087
Tel: 408-245-8552
Email: info@mirabilisdesign.com

VisualSim modeling libraries enable AMCC’s System Architects to accelerate early architecture
exploration and modeling
Sunnyvale, CA. — Oct 25th, 2006— Mirabilis Design Inc. of Sunnyvale, CA announced today that Applied
Micro Circuit Corporation (“AMCC”) has adopted VisualSim for early architecture exploration ofProcessor-based SoC’s for networking, storage and security. AMCC selected VisualSim for thecomprehensive modeling libraries which range from base queuing, scheduling and algorithmic building
blocks to high function components such as, DDR2, processor cores and DMA. AMCC has been able touse VisualSim to rapidly capture the system description and conduct performance analysis of the SOC
and subsystems at the queue, scheduler and algorithm level of abstraction.

“Using VisualSim at AMCC, we have been able to accelerate our architectural design and validation
process.” said Chris Bergen, Network Chief Technology Officer at AMCC. “The functionality within theVisualSim library enabled the rapid development of a high-level SOC model allowing architecturalvalidation through a host of dynamic traffic and process work loads. This provided feedback on key
performance metrics including latency and utilization of shared resources, work queue build up
and Quality of Service (QOS) efficiency throughout the SOC. The analysis validated the architecture
choices, profiled the system performance and provided key metrics to the design leads at an early stageof the SOC development process.”

AMCC will use VisualSim standard modeling libraries to create custom and standard SoC components.
Proven VisualSim graphical libraries jumpstart model development and facilitate team communication
and understanding. VisualSim modeling library greatly reduces the model creation time, as all therequired classes and associated statistics are provided and no code development is required of the user.
The built-in statistics generators provide greater visibility of the system operation and can generatestatistics for the lowest level nodes without requiring external data collection, management andprocessing. This allows engineers to focus on the model specific details, i.e. explaining the functionality,performance metrics of the model and analyzing results.

Applied Micro Circuit Corporation selects Mirabilis Design’s VisualSim for architecture
exploration of their advanced SoCs and Subsystems.

About Mirabilis Design
Founded in 2003, and headquartered in Sunnyvale, CA, USA, Mirabilis Design is a leading provider ofSystem-Level Architecture Exploration software for designing electronics and real-time software. Using
VisualSim, designers can architect the “right” product, i.e. one which minimizes product failures and has
not been over- or under- designed. Mirabilis Design accelerates Concept Engineering by drasticallyreducing typical model development from months to days and overall project time by 25-30%. Our
customers are focused in computing, semiconductors, networking and aerospace. The end-users are
Project Managers, System Architects, Systems Engineers, Hardware Engineers and Software Engineers.
Benefits from the solution are a visual executable specification; easier creation of optimized anddifferentiated products and; corporate infrastructure enabling extremely fast design trade-offs for price,performance and power.

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