Real-Time Ray Tracing Software and Processor are successfully simulated using VisualSim
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Vaishnavi Shankar
Mirabilis Design Inc.
Phone: 408-569-1103

Mirabilis Design Inc.
798 S Bernardo Ave
Sunnyvale, CA 94087
Tel: 408-245-8552
Email: info@mirabilisdesign.com

VisualSim enabled engineers to architect the software and processor to achieve 800 Teraflops fora Real-Time Ray Tracing system.
rdSunnyvale, CA and Tokyo, Japan. — Nov 3 , 2009 — Mirabilis Design Inc., today announced that
VisualSim was used by a joint venture project involving TOPS Systems of Japan, to model, simulate andanalyze the performance of a Real-Time Ray Tracing system with distributed software and aheterogeneous Multi-Core processor. The architecture development and software partitioning wereconducted by developing performance and power models using the standard libraries in the VisualSim
graphical environment. This model was used to optimize the processor architecture, application
algorithms and data distribution to achieve 800 Tera floating point operations per second (TeraFLOPS).
“Perfect planning and validation of dynamic performance is absolutely essential to eliminate theconsiderable architectural and algorithmic risks in developing a system running at supercomputer
performance. Performance of very data dependent processing such as Real-Time Ray Tracing can not
be estimated without simulation”, said Dr. Yukoh Matsumoto, Founder and CEO of TOPS Systems. “Wecompleted the entire modeling effort in VisualSim in three months and achieved an 80% cost reduction formodeling compared with SystemC. Without VisualSim, the modeling would have required over 1.5 yearsof development effort.”
Architects at TOPS Systems constructed a model of highly energy-efficient distributed processing systemusing VisualSim. The model of the core was built with the partitioned part of application software code.
Components in the hardware platform had varying levels of details and accuracy, depending on theanalysis to be performed. This modeling was used to analyze processing loads between cores and to
see the bottle necks of the memory hierarchy. The design constraints of the system were the real-timeperformance, power consumption, and hardware resources implemented on 17mm square of silicon.
The hierarchical memories and busses model was constructed at cycle-accuracy using pre-built modelinglibraries available in VisualSim. The computational model of each core was constructed based of eachapplication code partitioned for Kahn Process Network based processing model with assertion for
counting computation cycles and generating accurate bus transactions for memory accesses. The model
combined over four hundred thousand (400,000) lines of algorithmic C-code with a cluster ofheterogeneous Multi-Core processor to create the operating environment for Ray Tracing. The system

Real-Time Ray Tracing Software and Processor are successfully simulated using VisualSimconsists of 9 processor chips and an additional general purpose processor. Each processor chip consistsof 8 clusters of heterogeneous Multi-Core processor, and a general purpose processor. Each cluster
consists of 8 heterogeneous cores plus one memory management processor core. In total, 73
heterogeneous cores with hierarchical on-chip memories and interconnects running at 750 MHz per chip
were included in the VisualSim model. The chip is targeted to be fabricated using 45nm manufacturing
technology, by integrating 130 million gates and 24Mbit of memory into a 17mm square footprint.
VisualSim was able to simulate the Multi-Core processor to achieve performance corresponding to 800
Teraflops which is required for Real-Time Ray Tracing at high-definition (HD) resolution at 1920 x 1080
pixels. The integration of the software onto the model enabled the model to dynamically compute theprocessing for complex software and component structures.
About Mirabilis Design
Mirabilis Design is a leading provider of System-Level Architecture Exploration software for designingelectronics and real-time software. Using VisualSim, designers can architect the “right” product, i.e. one
which minimizes product failures and has not been over- or under- designed. Mirabilis Design accelerates
Concept Engineering by drastically reducing typical model development from months to days and overall
project time by 25-30%. Benefits from the solution are a visual executable specification; easier creation ofoptimized and differentiated products and; corporate infrastructure enabling extremely fast design tradeoffs for price, performance and power.
About TOPS Systems Corp
TOPS Systems provides a wide range of energy-efficient and scalable heterogeneous Multi-Core IP andsolutions with distinct advantages from its proprietary Multi-Core and on-chip bus architecture, andoptimizations through Architecture-Algorithm Co-Design and Hardware-Software Co-Design, to System
Makers and SoC developers. TOPSTREAM™ - based products are used in applications ranging frombattery-driven Information Appliances to High Performance Computers to break through the performanceand power limits on current technologies. TOPS Systems has expert development team in Japan for arange of research and development for initial architecture definition and software development throughdesign verification as their extension to reduce total development costs and speed time to market.

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