電気学会論文誌●（●●●●●●●部門誌）
IEEJ Transactions on ●●●●●●●●●●●●●●●
Vol.●● No.● pp.●-●●
DOI: ●.●●/ieejeiss.●●.●

Paper

Design Guidelines of Circuit Parameters for
Modular Multilevel Converter with H-bridge Cell
Toshiki Nakanishi＊a) Student member,

Jun-ichi Itoh＊ Senior member(Manuscript received Jan. 00, 20XX, revised May 00, 20XX)
This paper presents theoretical formulae for circuit parameter design as design guidelines in a step-down rectifier in a powersystem connected to a 6.6-kV AC power grid, where a modular multilevel converter (MMC) is applied. In particular, this paper
focuses on the design of heat sinks, capacitors, and arm inductors. In addition, the worst case for each component design is shownas the first step of the converter design. First, the formula for the ripple current in the electrolytic capacitor is derived in order toevaluate the capacitor lifetime. Second, the formulae for the semiconductor losses are clarified on the basis of the analysis of thearm current. Third, the formula for the ripple current in the arm inductor is derived on the basis of the ripple current model of achopper circuit. Finally, all formulae are verified by experiments with a miniature model. It is confirmed that theoretical values
from formulae agree with the measured values with the errors lower than 12%.
Keywords : Modular Multilevel Converter, High power density design, H-bridge cell, Step-down rectifier1.

the input power factor and reduces the harmonic distortion without
large capacitors and inductors(14). Besides, it is possible to apply
1.7-kV or 1.2-kV IGBTs with the low loss characteristic with theincrease in the number of cells in the MMC. Therefore, these IGBTs
can operate at the high frequency for the volume reduction.
On the other hand, in the output side of the MMC, an isolated
DC-DC converter is connected to achieve the isolation between the
AC power grid and the DC micro-grid (10). Thus, the high step-downfunction from 6.6 kV to several hundred volts is accomplished byboth the MMC and the isolated DC-DC converter. In the H-bridge
cell type MMC, the degree of freedom in the design of the output
DC voltage is high because the output DC voltage of the MMC iseasily controlled by adjusting the DC bias in each cell output
voltage(14). Moreover, the rating of the circulating current (DCcomponent) changes responding to the output voltage when the
power rating is same. Thus, it should determine the combination of
the output DC voltage and the circulating current for the volume
reduction of the MMC and the isolated DC-DC converter.
In AC-DC converters using the MMC topology for the medium
voltage application, (i) capacitors, (ii) heat sinks and (iii) arm
inductors are the majorities of the overall volume as same as general
power converters(15). The design guideline in order to achieve eachindividual purpose such as the high power density or high efficiency
has been considered so far(16)-(35).
First, a capacitor design based on the ripple voltage have beenreported(18)-(19). In the MMC, the capacitor voltage includes the
ripple component. Consequently, the capacitance is generally
determined dependent on the ripple factor as with general power
converters. Moreover, the formula of the capacitor voltage included
the ripple voltage has been already clarified. In addition,customized film capacitors or ceramic capacitors under a fixed
number of cells have also been investigated as the cell capacitor(20)(21). When the film capacitor or the ceramic capacitor is used in the
MMC, the capacitor volume is evaluated by the capacitance and theelectrostatic energy(21)-(23). On the other hand, the employment of
the electrolytic capacitor to the cell in the prototype or the miniature

Introduction

Recently, DC micro-grids have been actively researched as next
generation power distributions(1)-(3). In the DC micro-grid, atransformer and a rectifier are required in order to convert from 6.6kV AC voltage to several hundred volts DC voltage(2)-(3). However,
the isolated transformer is bulky due to the operation at the utility
frequency. In addition, the conventional power system for 6.6-kV
AC grid also requires bulky static capacitors for power factor
correction and series reactors for the reduction of the harmonic
distortion of the grid current(4)-(8).
For the volume reduction of the above system, neutral-pointclamped (NPC) converters or diode-clamped converters have been
actively researched in order to avoid the utilization of the bulkytransformer(9). In the three-level diode-clamped converter, the highvoltage IGBTs with the voltage rating more than 6.5 kV are required.
However, it is generally difficult to employ the IGBTs with thevoltage rating more than 6.5 kV due to their unique specifications.
Moreover, if the five-level diode-clamped converter is applied tosolve the problem with the switching devices, the voltage balancing
circuit is required as the auxiliary circuit in order to correct theunbalanced voltage among four capacitors in the DC link(9). In
addition, the above converters cannot achieve step-down
rectification. Therefore, the specification of the NPC converter are
different from the requirements of the proposed system.
On the other hand, the employment of a modular multilevel
converter (MMC) with an H-bridge cell can achieve the step-down
operation without the isolated transformer in the DC micro-gird(10).
The MMC has been actively researched as a next generation highvoltage power converter without the bulky transformer(11)-(14). In
addition, the H-bridge cell type MMC also achieves the reductionof static capacitors and series reactors because the MMC controlsa) Correspondence to: Toshiki Nakanishi.
E-mail: nakanishi@stn.nagaokaut.ac.jp＊
Nagaoka University of Technology
1603-1, Kamitomioka-machi, Nagaoka, Niigata, Japan© 200● The Institute of Electrical Engineers of Japan.

1Design Guidelines for Modular Multilevel Converter (Toshiki Nakanishi et al.)model of the MMC has also been reported(24)-(26). In general, it iscommonly known that the capacitance per unit volume of theelectrolytic capacitor is high compared to film capacitors or ceramic
capacitors. Moreover, the required voltage rating is simply achievedby changing the number of the series connected capacitors. Besides,
in terms of the lifetime, it is possible to adjust the ripple current of
one capacitor by changing the number of the parallel connected
capacitors. In the MMC, the capacitor voltage rating changes
depending on the number of cells because the divided voltage ofeach cell is varied. In addition, the ripple current of the capacitor isvaried by the output DC voltage of the MMC because the DC
component of the arm current changes. However, the ripple currentof the cell capacitor has not been thoroughly considered although
the ripple current is the important factor in the design guideline forthe electrolytic capacitor. In addition, the formulae of the ripple
current and the ripple voltage focused on the number of cells andthe output voltage of the MMC have not been also clarified.
Second, in terms of the heat sink design, the loss analysis and thebreakdown of the semiconductor losses have been reported in the
chopper cell type MMC(27)-(28). Besides, the evaluation of the heatsink volume in IGBTs with the voltage rating of which varies from600 V to 6.5 kV has been also discussed(29). However, the formulaeof the semiconductor losses in the H-bridge cell type MMC havenot been thoroughly clarified. In the H-bridge cell type MMC, thearm current is varied by the input active power i.e. the output power
because the circulating current changes. In particular, the arm
current becomes AC including the DC component or DC including
the AC component. Hence, it is necessary to analyze the current
path in the H-bridge cell and the magnitude of each device current
based on the arm current. Thus, the semiconductor loss should beclarified based on the analysis of the arm current. However, thedetail analysis, the process of the formula clarification and theverification of the theoretical formula have not been considered.
Third, as the design of the arm inductor, the design guideline
which the inductance is determined to be several percent of the
impedance rating of the MMC has been explained(30)-(31). In addition,
the design guideline which focuses on the harmonic components ofthe circulating current and the resonance phenomenon between thearm inductor and capacitors in cells has been also considered(32). On
the other hand, as the design guideline for the inductor in general
power converters, the inductance is determined based on the ripple
factor of the inductor current(33)-(34). In the MMC, the ripple current
changes responding to the switching frequency and the number ofcells due to the change of the equivalent switching frequency. In
particular, when the unipolar modulation is used in the H-bridge cell,the equivalent switching frequency is different compared to the
MMC with the chopper cell. Thus, it is greatly important to consider
the relationship between the ripple current of the arm inductor andthe equivalent switching frequency including the number of cells as
the variables. However, when the unipolar modulation is applied,the design formula of the ripple current in the arm inductor basedon the relationship between the ripple current and the equivalentswitching frequency has not been thoroughly reported.
The problem of the conventional design method is that the
number of cells and the output voltage of the MMC are not focusedin the design of the H-bridge cell type MMC. Besides, thefundamental design guideline, i.e. the worst case for the ripple
component or the semiconductor loss, has not also been considered
due to the above reasons. The formulae for the ripple component or
the semiconductor loss have many variables in the MMC. Hence, it

is difficult to find the worst case for each circuit component design.
In addition, it is also difficult to acquire required values such as theminimum ripple current and the minimum semiconductor loss withcircuit simulations, because there are many factors which affect the
ripple component or the semiconductor loss. Therefore, it isnecessary to clarify the theoretical formulae to find the worst casefor each component design in the H-bridge cell type MMC.
This paper presents the theoretical formulae to find the worst casefor the circuit parameter design in the H-bridge cell type MMC. The
main contribution of this paper is to show the factors which decides
the worst case for each component design after the clarification of
the theoretical formulae focused on the number of cells and theoutput voltage of the MMC. It is expected that the discussion of thedesign for the optimum number of cells and the optimum value ofthe output voltage will be promoted to achieve for the minimum
ripple component or the minimum semiconductor loss. This paper
is a first step of the optimum design for the H-bridge cell type MMC.
In this paper, the formulae of (i) the ripple current of the cell
capacitor, (ii) semiconductor loss and (iii) the ripple current of thearm inductor are derived. First, the formula of the ripple current in
the cell capacitor is derived for the lifetime design of the electrolytic
capacitor. It is necessary to clarify the relationship between the
input power factor and the ripple current because the ripple current
changes according to the input active power i.e. the output power.
Second, the conduction loss and the switching loss in switching
devices are derived based on the analysis of the arm current. The
semiconductor losses change depending on the arm current. Thus,
it is required to obtain the relationship between the arm current andeach switching device loss in order to design the heat sink in the
maximum point of the semiconductor loss. Third, the formula of theripple current in the arm inductor is derived in order to determine
the inductance of the arm inductor. From the relationship between
the duty which changes depending to the number of cells and theripple current, the maximum point of the ripple current is clarified.
Finally, the theoretical formulae are verified by using a miniaturemodel in order to obtain the validity of the theoretical formulae.

2. Circuit Configuration
2.1 Conventional power system connected to utility grid of
6.6 kV
Fig. 1 shows a structure of the conventional powersystem of 200 kVA connected to the AC power grid of 6.6 kV. The
model of this system is “cubicle-type high-voltage power receiving
equipment” which is widely applied in Japan(4)-(8). The conventional
power system has several isolated transformers in order to convert
the grid voltage of 6.6 kV into the AC distribution voltage of 200 V
or 100 V. Moreover, the power system also includes the static
capacitors in order to correct the input power factor and the series
reactor in order to reduce the harmonic distortion of the grid current.
Transformers, static capacitors and series reactors are main factors
which increase the system volume. In the conventional system, thecomponent volume which is defined as the total volume oftransformers, static capacitors and series reactors is 1605 dm3 (4)-(8).
2.2 Front-end converter with MMC and isolated DC-DC
converter
Fig. 2 shows the configuration of the front-end
converter using the H-bridge cell type MMC and the isolated DCDC converter. Each arm of the MMC consists of the arm inductor
La and cascaded H-bridge cells in order to operate as the step-down
rectifier. The MMC outputs a multi-level voltage waveform which
reduces the harmonic distortions of the input current. In addition,
the MMC is able to reduce the voltage rating of devices on each cell
2

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Design Guidelines for Modular Multilevel Converter (Toshiki Nakanishi et al.)
6600 V

due to cascade connections of cells. Therefore, lower voltage rating
devices are utilized. On the other hand, the output DC voltage ofthe MMC depends on the sum of the output average voltage of cells.
Thus, the cell output voltage includes both the AC component andthe DC component to control the input current and the output
voltage. Moreover, the MMC converts the high AC voltage to the
DC voltage of several hundred volts. After this step, the DC voltage
of 400 V is supplied to the DC bus of the DC distribution by theisolated DC-DC converter. The isolation capability between the AC
power grid and the DC micro-grid is achieved by the isolated DCDC converter. Hence, the high step-down functions from 6.6 kV toseveral hundred volts is accomplished by both the MMC and theisolated DC-DC converter. As a result, the output voltage rating of
the MMC can be designed with a high freedom degree. In the MMC,
the circulating current (DC component) is changed responding tothe output voltage of the MMC under the conditions of same power
rating. Thus, a variety of the combination between the output
voltage and the circulating current can be determined for thevolume reduction of the MMC and the isolated DC-DC converter.

3.

LBS

Isolatedtransformer

Isolatedtransformer

Series reactor(Suppression ofharmonic distortion)

3f 100 kVA
6600 V/210 V/105 V

3f 100 kVA
6600 V/210 V

210 V

Static capacitor(Power factor
correction)

210 V/105 V

2390 mm(a) Circuit configuration of conventional system

LBS

LBS

LBS

IsolatedTransformer

IsolatedTransformer

3f 100 kVA
6600 V/210 V

3f 100 kVA
6600 V/210 V/105 V

Static capacitor(Power factor
correction)
Series reactor

1900 mm3200 mm
Total volume : 14531 dm3
Component volume : 1605 dm3

3.1
Control concept for MMC
Fig. 3 shows a control
block diagram of the H-bridge cell type MMC(10). The control block
consists of the capacitor voltage control, the arm current control andthe MMC output voltage control. In addition, the capacitor voltage
control is constructed by the capacitor voltage averaging control
and the capacitor voltage balancing control.
3.2
Capacitor voltage averaging control
Thecapacitor voltage averaging control is employed in order tomaintain the average value of all capacitor voltages in the arm(35).
Therefore, the average value of all capacitor voltages has to be
calculated in each arm. The output value of the PI controller is given
as the command of a positive sequence component in the arm
current. Moreover, the voltage command vC*is given by (1).
*

LBS
※LBS:
Load Break Switch

Control Strategy of Step-Down MMC

vC 

LBS

※LBS:
Load Break Switch(b) Volume of conventional system

Fig. 1.
Conventional power system of 200 kVA
connected to utility gird of 6.6 kV.

vAr1
cell

vcAr1
vcAr(n/2)

vAr v

Ar(n/2)cell

iAr
6.6 kV,50 Hz


1  22 E  Vmmc  .............................................. (1)n  3

where E is an root-mean-square (rms) value of the input line-to-line
voltage, Vmmc is the output DC voltage of the MMC, and n is thenumber of cells at each leg.
3.3
Arm current control
The arm current control is
employed to control the AC component of the arm current whichflows from the AC power grid. The AC component is defined as the
positive sequence component. From the previous section, thecommand of the positive sequence component is generated by thecapacitor voltage averaging control. In other words, the positive
sequence component is controlled in order to maintain the averagevalue of all capacitor voltages in each arm constant.
On the other hand, the arm current also includes the DC
component (a zero sequence component). Thus, it is necessary toeliminate only the zero sequence component from the arm current
in order to control the capacitor voltage.
3.4
MMC output voltage control
In the MMC output
voltage control, the command of the output DC voltage Vmmc* is
added into the output value of the controller in the arm current
control. The zero sequence component is applied to supply thepower to the output side of the MMC. Moreover, the output DC
voltage is divided by each cell. Thus, the output DC voltage of one
cell is fundamentally set as Vmmc*/n.
3.5
Capacitor voltage balancing control
The

ir
is
it

La

iBr

La

DC bus ofMicro-gridvArs
Isolated
DC-DC
conv.

Vmmc
(DC)

cell

vcBr1

cell

vBr

vBr1

vcBr(n/2)

S1

S3

S2

S4 C

cell

vBr(n/2)

H-bridge cellFig. 2. Circuit configuration of front-end converter with
H-bridge cell type MMC and isolated DC-DC converter.
Capacitor Voltage
Averaging Control

vc* +

－

PI

vcmk_ave

Arm Current Control-1

imk_ph*2－

vmk_unit

Index

31
2E

m : A, Bk : r, s, t
k' : other than kk'' : other than k and k'
j : cell number
Input phase voltage(Detection value)

－－

vk

+

imk

imk_ph++imk' +
imk'' +

1/3－

Elimination ofzero phase component

Kacr

+
+

* Kacr :Control gain of
Arm Current Control

2/n +

vmkj*

－

A:―
Vmmc_mkj*
B : + (+)
1 vcmkj
2 n/2

v
x1

cmkx

Vmmc*

Variable
Dividing ratio

MMC Output
Voltage Control
andCapacitor Voltage
Balancing Control

Fig. 3. Control block diagram for each arm in H-bridge
cell type MMC. Note that m is the index of the arm group
A or B, k, k´ or k´´ is the index of the phase such as r, s
and t, and j is the index of the cell number.
capacitor voltage balancing control corrects the unbalanced voltage
which occurs among capacitors in same arm. In the conventional
3

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Design Guidelines for Modular Multilevel Converter (Toshiki Nakanishi et al.)an input reactive power, and f is an input phase difference. The
apparent input power S is defined by (4).

balancing control, it is required to design the control parameters.
On the other hand, in the proposed voltage balancing control, it is
not necessary to design control parameters(35). In particular, eachcell has the DC bias of Vmmc*/n in the ideal state. In the proposed
method, the dividing ratio is adjusted automatically depending on
the capacitor voltage. Each cell output power is adjusted by varying
the dividing ratio. Therefore, each capacitor voltage is
automatically balanced by varying the dividing ratio.

4.

S  P 2  Q 2 ................................................................ (4)From (2) and (3), the instantaneous power of the cell is calculated.
The energy which is stored in the capacitor is calculated by the
integration of the instantaneous power and is given by (5).
WC t    v cell i arm dt

Clarification of Ripple Voltage and Ripple
Current Formulae for Capacitor DesignIn this chapter, the formula of the ripple current is clarified forthe design guideline of the electrolytic capacitor. In this paper, it isassumed that the electrolytic capacitor is applied as the cell
capacitor. In fact, the employment of the electrolytic capacitor to
the prototype MMC has been reported(24)-(25). It is well known that
it is possible to easily vary the voltage rating and the rated ripple
current by varying the numbers of series connection and the parallel
connection of electrolytic capacitors. On the other hand, the ripple
current which flows to the electrolytic capacitor affects the lifetimeof the capacitor. Thus, the ripple current is one of the importantfactors for the MMC design.
4.1
Calculation of capacitor’s voltage ratingThe
capacitor voltage in the cell depends on both the input voltage andthe output voltage. The output DC voltage Vmmc is applied to eachleg because each leg is connected to the load in parallel. In addition,
the maximum value of the input phase voltage is applied to eacharm. Therefore, each capacitor voltage depends on both the input
voltage and the output voltage. The capacitor voltage command vc*
is given by (1). Note that the modulation index  is set to 0.95 orless. In the circuit analysis of this paper, the voltage drop on the arm
inductor is ignored in order to consider the fundamental operation.
As an actual fact, the voltage drop on the arm inductor is sufficiently
small compared to the input phase voltage and the output voltage ofthe MMC because the arm inductance in the MMC can be reduced.
4.2
Calculation of ripple voltage
In order to employ
the ripple current as the evaluation index for the selection or thedesign of the electrolytic capacitor, it is important to understand therelationship between the ripple current and the circuit parameters of
the MMC. Thus, it is necessary to clarify the formula of the ripple
current which flows to the electrolytic capacitor. In this section, asa first step of the clarification for the formula of the ripple current,
the formula of the capacitor voltage is clarified.
First, the cell output voltage vcell is given by (2). The formula of(2) means that the input phase voltage is divided by each cell per
arm and the output DC voltage Vmmc is divided by each cell per leg.
On the other hand, the arm current iarm, which includes the ACcomponent and the DC component, is given by (3). The AC current
flows from the AC grid in order to maintain the capacitor voltage.
Whereas, the DC current flows into the load in order to supply thepower. Moreover, the arm current iarm flows into each cell in samearm. Note that the sign of positive or negative is decided based on
the lower arm of Fig. 2.

vcell t  1
2

2 V mmc S
2sin t 
3 n E32 EP
sin t  f 
3 n V mmc

Ssin 2 t  f WC 0
6n ......................................................................................... (5)where WC0 is the constant of integration, which does not changewith time. Thus, the constant of integration WC0 is defined as theaverage value of the energy which is stored in the capacitor. The
relationship between the capacitor voltage vc(t) and the energy
WC(t) is given by (6) in terms of the electrostatic energy.
WC t  

1
2
Cv C t  ........................................................... (6)2

From (5) and (6), the capacitor voltage vc(t) is given by (7). Notethat the theoretical formula is calculated by the linear
approximation of Taylor expansion.
v c t   VC 0 

1
2

2 V mmc S
sin t
3 nCE VC 0

2
EP
sin t  f  ......................... (7)3 nC V mmc VC 0



2
3



S
sin 2 t  f
6n CV C 0

where the constant value VC02 is defined by 2WC0/C, VC0 is definedas the average value of the capacitor voltage because WC0 does notchange with time.
The ripple voltage includes the fundamental frequency
component whose frequency is same as the frequency of the input
voltage source and the second-order frequency component withtwice the frequency of the input frequency. Moreover, the MMC has
to control the power factor and reduce the harmonic distortion inorder to eliminate the static capacitors and the series reactor. Thus,
it is necessary to evaluate the ripple voltage over the wide range ofthe input power factor.
Fig. 4 shows the relationship between the input power factor andthe ripple voltage. The fundamental frequency component and thesecond-order frequency component is drawn by (7). The secondorder frequency component of the ripple voltage does not change
against the change of the input power factor because the input
apparent power S is constant. On the other hand, the fundamental
frequency component becomes maximum when the input power
factor is 1.0 or 1.0. Thus, it is necessary to design the capacitanceonly when the input power factor is 1.0, i.e. the worst case.
4.3
Clarification of ripple current
In this section, theformula of the ripple current in the cell capacitor is clarified. In
general, the ripple current value of the capacitor is shown in thedatasheet of commonly-marketed electrolytic capacitors which are
generally implemented into products. The capacitor should beselected in order that the ripple current value which flows to each
1  22 E cost  f   Vmmc  .......................... (2)n  3
i arm t   

1
2

2 S
P ..................................
(3)cos t 
3 E
3Vmmc

where S is an apparent input power, P is an input active power, Q is
4

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Design Guidelines for Modular Multilevel Converter (Toshiki Nakanishi et al.)dvC ......................................................................
(8)dt

From (7) and (8), it is concluded that the relationship between the
input phase difference f and the maximum value does not changeeven with the use of the differential of the ripple voltage. Therefore,
the ripple current reaches maximum when the input phasedifference f is 0. The maximum RMS value of the fundamental
frequency component in the ripple current IC_1 is given by (9). As aresult, the maximum RMS value of the ripple current does notchange when the number of cells and the capacitance changes.
I C _1 

Output voltage Vmmc

: 1200 V

Number of cell per leg n: 18

Cell capacitor C: 9000 F

Capacitor voltage VC0: 740 V

Input active power P: S cosf

0.045
0.045
1 p.u. = Average value of capacitor voltage

0.004
0.004

0.040
0.040

0.035
0.035
0.003
0.003

0.030
0.030
0.025
0.025

0.002
0.002

0.020
0.020
Second-orderfrequency
components

0.015
0.015
0.010
0.010

0.001
0.001

Fundamental
frequency
components

0.005
0.005

0.000
0.000
0.000
0.000
-1.0 -0.8-0.8 -0.6-0.6 -0.4
0.4 0.6
0.8 1.0
1.0-0.2 0.0
0.0 0.2
0.2 0.4
0.6 0.8-0.4 -0.2
-1.0

2 E
1
P
1 V mmc  .............



(9)

3  2
 3 V mmc 2 E 
 2 E  V mmc  
 3




S1

S3

iarm

D3 VC

D1
vcell
S2

S4
D4

D2
Fig. 5.

Circuit model of H-bridge cell for loss analysis.

 a 0biBr(iarm)In this chapter, the formulae of semiconductor losses in the Hbridge cell are clarified for the design of the heat sink. First, it isnecessary to analyze the arm current which flows to each switching
device because the arm current becomes AC including the DC
component or DC including the AC component according to the
input power factor. Second, the formulae of semiconductor losses
are derived based on the analysis of the arm current.
5.1 Analysis of arm current
Fig. 5 shows the circuit
model of the H-bridge cell in order to analyze the semiconductor
losses. As a first step of the circuit analysis, it is necessary toconsider the circuit operation in an ideal state. Hence, the capacitor
is replaced with the ideal voltage source in order to neglect theeffect of the ripple voltage. Similarly, the inductor is replaced with
the ideal current source in order to neglect the effects of the ripple
current and the harmonic distortion.
First, the cell output voltage and the arm current in the lower sideof the MMC are defined by (2) and (3) respectively. The cell output
voltage and the arm current includes the DC component and the ACcomponent. From (3), the condition which the arm current becomesthe DC current including the AC component is given by (10).
P
1
3Vmmc 2

: 6600 Vrms

Input power factor

Clarification of Semiconductor Losses for Heat
Sink Design0vB_cell(vcell)f0

0 a 

Fig. 6. Relationship between cell output voltage andarm current in lower side of MMC.
In contrast, the arm current becomes AC which includes the DC
component when the left part of (11) is negative. The angle 0
whose direction of the arm current changes is defined by (12) when
the arm current is AC.

2 3 E
cosf  ...................................... (12)
 3 2 Vmmc
From (12), the angle a depicting the duration when the directionof the arm current becomes positive is given by (13). In contrast,
the angle b depicting the duration when the arm current becomes
negative is given by (14).

 0  cos 1 

2 S ..........................................................
(10)
3 E

   a   0 ,  0   a   ....................................... (13) 0   b   0 ................................................................ (14)The condition where the arm current becomes DC including the
AC component is given by (11).
23Input line voltage E: 50 Hz

Fig. 4. Relationship between input power factor andripple voltage.

In conclusion, as the worst case for the electrolytic capacitor
design in the MMC, the ripple current should be designed when the
input power factor is 1.0. In particular, the fundamental frequency
component with the same frequency as the grid frequency ismaximum in the unity power factor.

5.

: 200 kVA

Input voltage frequency fSecond-order frequency components ofripple voltage (peak-to-peal value) [p.u.]iC  C

Input apparent power S

Fundamental frequency components ofripple voltage (peak-to-peal value) [p.u.]

capacitor is sufficiently small compared to the specified value oneach datasheet in terms of the lifetime. Additionally, the number ofthe capacitors which are connected in parallel on each cell should
be increased in order to meet the specification of the ripple current.
Hence, it is necessary to clarify the relationship between the ripple
current and the circuit parameters in order to design the lifetime.
The relationship between the capacitor current ic and thecapacitor voltage vc is given by (8).

Fig. 6 shows the relationship among the cell output voltage, thearm current and the angles a and b.
5.2 Calculation of conduction loss
In the H-bridge cell,

3 E
cosf  1  0 ................................................. (11)2 Vmmc5

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Design Guidelines for Modular Multilevel Converter (Toshiki Nakanishi et al.)the semiconductor losses are same in pair devices. For example, S1and S4 which are shown in Fig. 5 operate in pairs. Moreover, S2 andS3 operate in pairs. Therefore, the semiconductor losses of only one
leg in the H-bridge cell are calculated.
The average value of the conduction loss during one cycle Pcon is
given by (15)(36).

V0 _ SW  V mmc   2 S
2 P
 1 sin  0 
0 

4 
nVC   3 E
3 V mmc 
1  P
4 2 PEcos f sin  0   2 0  sin 2 0  
nVC  3
3 3 V mmc
 R  V   1 S 2
2 0  sin 2 0   2 2 PS sin  0
 SW  1  mmc  
4 
nVC   12 E 2
3 3 EVmmc
PB _ S 2 _ Con 

1
V0  RiB _ cell i B _ cell d SD d ....................... (15)2 

Pcon 

where V0 is the voltage drop of the switching device when thecurrent is zero, R is the on-resistance of the device, iB_cell is thecurrent which flows to the device, dSD is the duty of each switching
device(36). The voltage drop V0 and the on-resistance R are obtained
from the datasheets.
When the arm current becomes positive, by substituting thevariable number  of (15) by the angle a of (13), the current whichflows to S1, S4, D2 and D3 is given by (16). In contrast, when thearm current becomes the negative, by substituting the variable
number  of (15) by the angle b of (14), the current which flows to
S2, S3, D1 and D4 is given by (17).
i B _ cell _ P  

i B _ cell _ N 

1
2

1
2

2 S
P ............................
(16)cos a 
3 E
3Vmmc

2 S
P ..............................
(17)cos b 
3 E
3Vmmc

where VC is the capacitor voltage.
Each conduction loss of S1, S2, D1 and D2 is given by (22), (23),(24) and (25) respectively.


V0 _ SW  V mmc   2 S
2 P
 1    0 
sin  0 4 
nVC   3 E
3 V mmcR SW  V mmc   1 S 22   0   sin 2 0 
 1 
4 
nVC   12 E 2



2
3



1  1 2 PS 1
 3 sin  0  sin 3 0 
nVC  6 3 E 
3



2 PS
2 P2
   0 
sin  0 
2
3 EVmmc
9 V mmc

R FWD  V mmc   1 S 2
2 0  sin 2 0 
 1 
4 
nVC   12 E 2



2
3



1  1 2 PS 1
 3 sin  0  sin 3 0 
nVC  6 3 E 
3



2 PS
2 P2
sin  0 
0 
2
3 EVmmc
9 V mmc


4 P2 
1
 4
  0  sin 2 0  
9 V mmc 2
 9
V0 _ FWD  Vmmc   2 S
2 P
 1    0 
sin 0 4 nVC   3 E
3 Vmmc


 
2 PE
cos f sin 0  
3 Vmmc 1  P4  2   0   sin 2 0  
nVC  3
3



RFWD  Vmmc   1 S 22   0   sin 2 0 
 1 
4 
nVC   12 E 2

2 PS
2 P2
   0 
sin 0 
3 EVmmc
9 Vmmc 2


1  1 2 PS 1
 3 sin 0  sin 3 0 
nVC  6 3 E 3

4 P2 
1
 4
    0   sin 2 0  
9 Vmmc 
2
 9

(25)

2 P2E
 
cos f sin 0  
2
3 Vmmc 

5.3 Calculation of switching loss and recovery loss
Theswitching loss PSW and the recovery loss PRec are given by (26)(36).

PSW ( Rec )  VC

2 P2E
 
cos
f
sin


0
3 V mmc 2 ............................................................................................... (22)


 
2 PE
cos f sin  0  
3 V mmc
 

1  P4 2 0  sin 2 0  
nVC  3
3

2

3

 
2 PE
cos f sin  0  
3 V mmc
 




V0 _ FWD  V mmc   2 S
2 P
 1 
sin  0 
0 
4 
nVC   3 E
3 V mmcPB _ D 2 _ Con 

d D 2  1  d S1 ................................................................. (21)1  P4  2   0   sin 2 0  
nVC  3
3

2 P2E
 
cos f sin  0  
2
3 V mmc
 

 
2 P2E
cos f sin  0  
2
3 V mmc ............................................................................................... (24)

 
1 
1  22 E cos b  f   V mmc   .... (19)
1 

2 
nV C  3
 



4 P2 
1
 4
  0  sin 2 0  
9 V mmc 2
 9d D1  1  d S 2 ................................................................. (20)

PB _ S 1 _ Con 

PB _ D1 _ Con 

 
1 
1  22 E cos a  f   Vmmc   .......... (18)
1 


2  nVC  3d S2 


2 P2
1  1 2 PS 1
0  
 3 sin  0  sin 3 0 

9 V mmc 2  nVC  6 3 E 
3............................................................................................... (23)Next, each duty is given by (18), (19), (20) and (21) respectively.

d S1 

1 
w
i B d
f c ............................... (26)2 
Vdcd I md

where w is the loss energy which is described in the datasheet, Vdcd
and Imd are the voltage value and the current value when w ismeasured, fc is the carrier frequency(36).
Each switching loss in S1 and S2 is given by (27) and (28)

4 P2 
1
 4
    0   sin 2 0  
9 V mmc 2
 9

6

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Design Guidelines for Modular Multilevel Converter (Toshiki Nakanishi et al.)respectively. Similarly, each recovery loss in D1 and D2 is given by(29) and (30) respectively.

w w
VC  1 2 S
P  0  on off f csin 0   2 3 E
3Vmmc
 Vdcd I md

V  1 2 SP won  woff
PB _ S 2 _ SW  C sin 0 
0 
f c ...... (28)  2 3 E
3Vmmc  Vdcd I md

PB _ D 2 _ Re c  w
VC  1 2 S
Psin  0 
 0  rr f c ........ (29)  2 3 E
3Vmmc  Vdcd I md
VC  1 2 S
P  0  wrr f csin 0   2 3 E
3Vmmc
 Vdcd I md

Output voltage Vmmc : 1200 V: 740 V

Carrier frequency

300
0.0015

Switching device : FF150R17KE4

ACDCLine : Theoretical value
Mark : Simulation value

250

200
0.0010S1_Switching loss
D2_Recovery loss

150

100
0.0005

D2_Conduction loss
S1_Conduction loss

50

00.00000.00
0.0: 8 kHz

0.10

0.20
0.2

0.40
0.4

0.30

0.50

0.60
0.6

0.70

0.80
0.8

0.90

1.00
1.0

Input power factor(a) S1 and D2

Semiconductor loss per cell [p.u.]............................................................................................... (30)
5.4 Relationship between input power factor andsemiconductor losses
The relationship between the input
power factor and semiconductor losses of the H-bridge cell isclarified in order to design the heat sink in the worst case. The
formulae of the semiconductor losses include the number of cells as
the variable. However, the switching device should be selected
when the number of cells changes. The semiconductor loss
drastically changes depending to the loss characteristic of theapplied switching device. Therefore, this paper focuses on only the
relationship between the input power factor and the semiconductor
loss as the fundamental consideration of the design in the MMC.
Fig. 7 shows the comparison result of the theoretical formula ofthe semiconductor loss and the simulation. Note that the input
apparent power S is constant. The theoretical values of the formulae
agree with the simulation values in the maximum error of 1.0% orless even though the arm current changes from AC to DC in the
input power factor of 0.22. Moreover, the losses of S 1 and D2
increase as raising of the input power factor. In contrast, the lossesof S2 and D1 decrease. The reason why the semiconductor losses
change is because the DC component in the arm current changes
depending on the input power factor. When the input power factor
is zero, the semiconductor loss is generated by only the ACcomponent because the active input power, i.e. the output power iszero. The semiconductor loss which is generated by the DC
component increases gradually when the input power factor moves
toward 1.0. Thus, the losses of S1 and D2 increase as increasing of
the DC component. In contrast, the losses of S2 and D1 decrease tozero because the arm current does not flow to S2 and D1. As a result,
the total loss becomes maximum when the input power factor is 1.0.
In conclusion, as the worst case for the semiconductor loss andthe design guideline of the heat sink in the MMC, it is necessary todesign the heat sink when the input power factor is 1.0. Besides, it
is also necessary to focus on the switching device which the loss
generates because the semiconductor loss occurs in the particularswitching device at the unity power factor.

6.

: 6600 V

Capacitor voltage VC

Number of cell per leg n : 18............................................................................................... (27)

PB _ D1_ Rec 

Input line voltage E

Semiconductor loss per cell [p.u.]

PB _ S1_ SW 

Input apparent power S : 200 kVA Input active power P : S cosf

AC

DC

20
0.00010

S2_Switching loss
D1_Recovery loss

15

Line : Theoretical value
Mark : Simulation value
100.00005

S2_Conduction loss ()

D1_Conduction loss ()

500.00000
0.00
0.0

0.10

0.20
0.2

0.30

0.40
0.4

0.50

0.60
0.6

0.70

0.80
0.8

0.90

1.00
1.0

Input power factor(b) S2 and D1

Fig. 7. Comparison result of theoretical formula ofsemiconductor loss and simulation.
ripple factor of the inductor current. In particular, the ripple current
changes drastically as the feature of the multilevel converter when
the number of cells or the switching frequency changes. Therefore,both the number of cells and the switching frequency should be
included in the formula of the ripple current as the variable. First,
the relationship between the ripple current and the number of cells
is clarified by the equivalent circuit model in the simulation. Second,from the derived relationship, the formula of the ripple current isclarified based on a chopper circuit. Finally, the theoretical value
with the formula and the simulation result are compared.
6.1
Modulation for H-bridge cellFig. 8 shows thediagram of the unipolar modulation for the H-bridge cell (ex. vArj*).
In Fig. 5, the leg of the H-bridge cell is constructed by S1 and S2.
The other leg is constructed by S3 and S4. The switching patterns of
S1 and S2 are determined by the voltage command vArj*. Moreover,the switching patterns of S3 and S4 are determined by the inverted
voltage command -vArj*. In the H-bridge type circuit such as thegrid-tied inverter with the unipolar modulation, the waveform of theinverter output voltage is three-level.
In addition, the phase-shifted triangular carrier is applied to eachcell. The phase shift angle PF is determined by (31).

Clarification of Ripple Current Formula for Arm
Inductor Design PF  2 / n ................................................................. (31)In this chapter, the formula of the ripple current in the arm
inductor is clarified for the design of the arm inductor based on thewhere n is the number of cells per leg.
7

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Design Guidelines for Modular Multilevel Converter (Toshiki Nakanishi et al.)Note that the phase shift angle in each cell is determined basedon the arm. On the other hand, it is possible to reduce the ripple
component of the output voltage or the ripple component of the
input current by adjusting the phase shift angles in the upper arm
and the lower arm (37). The phase shift angles in each arm should be
set according to the objectives of the user’s system.
In the MMC, the number of levels in the output voltage
waveform is determined by the number of cells. In particular, in the
H-bridge cell type MMC, the number of levels of the arm output
voltage including the zero level is determined by (32).

vArj*
0

-vArj*
1
0
1
S2
0
1
S3
0
1
S4
0
S1

N ao  n  1 ................................................................. (32)where Nao is the number of levels of the arm output voltage.
6.2 Analysis of ripple current on each arm inductor withequivalent circuit model
As a first-step of the arm inductor
design, it is necessary to clarify the relationship between the ripple
current and the number of cells.
Fig. 9 shows the equivalent circuit model of the single-phasecircuit in the MMC. The circuit operation and the change of theripple current are simply determined by the single-phase circuit. In
the equivalent circuit, the cell capacitor is replaced by the ideal
voltage source to neglect the ripple voltage of the capacitor. Notethat the output voltage of the cell is determined by (2). Therefore,
the total output voltage of cells in the arm is equal to the summationof the input voltage and the half value of the MMC output voltage.
Hence, only the ripple component is extracted.
Fig. 10 shows the frequency analysis of the ripple current. The
carrier frequency of the cell is 1.5 kHz. In Fig. 10, the fundamental
component is 12 kHz, whereas the frequencies of the second-ordercomponent and the third-order component are 24 kHz and 36 kHz.
In the H-bridge cell, with the employment of the unipolar
modulation, the output voltage of the cell has twice the frequencyof the carrier frequency. The equivalent switching frequency of thecell total output voltage vBr in each arm ftc_eq is given by (33).
n* 2 f c  nfc
2

Vin _ ch
L

Ton 

L

cell

vAr(n/2)

cell

VDC
Vmmc/2

iAr

La

iBr

La

VDC

Vmmc/2

vBr1

cell

VDC

vBr(n/2)

cell

VDC

Fig. 9. Equivalent circuit model of single phase circuitin MMC.
0.20
0.20

Carrier frequency fc : 1.5 [kHz]The number of cells per leg n : 8
Equivalent switching frequency : 12 [kHz]( = nfc (Unipolar modulation) )

0.18
0.18
0.16
0.16

.......................................... (33)

Vin _ ch

vAr1

vBr

From (33), under the condition which the number of cells is 8 andthe carrier frequency is 1.5 kHz, the equivalent switching frequency
ftc_eq is 12 kHz. It is confirmed that the theoretical value by (33) isequal to the result from the frequency analysis. Moreover, the above
result implies that the frequency of the ripple current on each arm
inductor is determined by the equivalent switching frequency ftc_eq.
From the above result, in following considerations of the ripple
current, only the lower arm in Fig. 9 is focused on.
6.3
Relationship between duty of switching device andripple current in chopper circuit
The relationship between
the duty and the ripple current is clarified based on the general
power converter as the fundamental consideration.
Fig. 11 shows the circuit diagram of a chopper circuit and thepattern which shows the relationship between the duty and theripple current(38). In the chopper circuit, the duty of SW1 is definedas Don. In contrast, the duty of SW2 is defined as (1-Don). In Fig. 11(b), the ripple current in the chopper circuit iL_ch is varied by Don.
The peak-to-peak value of the ripple current in the chopper
circuit iLpp_ch is given by (34)(38).

 i Lpp _ ch 

Unipolar modulation for H-bridge cell (ex. vArj*)vAr

Ripple current [A]f tc _ eq 

Fig. 8.

0.14
0.14

0.12
0.12
0.10
0.10

0.08
0.08
0.06
0.06

0.04
0.04
0.02
0.02

24 kHz5101536 kHz
20

25

30

35

40

0
1000
2000
3000
4000
5000
6000
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
21000
22000
23000
24000
25000
26000
27000
28000
29000
30000
31000
32000
33000
34000
35000
36000
37000
38000
39000
40000

0.00
0.00
0

12 kHzFrequency [kHz]Fig. 10.
Frequency analysis of ripple current insimulation.
The boost ratio  is defined by (35)(38).

Vout _ ch
Vin _ ch1.................................................... (35)
1  Donwhere Vout_ch is the output voltage of the chopper circuit.
From (35), the relationship between the input voltage Vin_ch andthe output voltage Vout_ch is given by (36).
Vin _ ch  Vout _ ch 1  Don  ................................................. (36)

By substituting (36) into (34), the peak-to-peak value iLpp_ch andthe maximum value iLm_ch is given by (37) and (38) respectively.
Note that the average value of the inductor current is set to zero inorder to calculate only the ripple component.

Don T .............................. (34)where Vin_ch is the input voltage, L is the inductance, Ton is the ontime of SW1, and T is the switching cycle.
8

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Design Guidelines for Modular Multilevel Converter (Toshiki Nakanishi et al.)

 i Lpp _ ch 

 i Lm _ ch 

Vin_ chL

Don T  i Lpp_ ch2Vout _ ch

Vout _ ch2L

L

TDon 1  Don  .............. (37)

iL_ch

A

TDon 1  Don  ..................... (38)nmlVout_chSW1(Don)(a) Chopper circuit

iL_ch
0

t

iL_ch iLpp_ch iLm_ch
0

t
Ton
=DonT

Toff
=(1-Don)T

T (= (1/nfc))(b) Pattern diagram of ripple current in chopper circuit

Fig. 11. Circuit diagram of chopper circuit and pattern
diagram of ripple current in chopper circuit.
Command5000

5 msecMultilevel
voltage

[V] 0
-5000
(Nml -1)

1.000
7
0.875
6
0.750 5
0.625
4
0.500
3
0.375 20.250
10.125 00.000

ml

where Nml is the index which is varied from 1 to n.
For example, in n = 8, the step of the multilevel voltage varies
periodically when dmlbi is 0.125, 0.250 or 0.375. From (39) and Fig.
12, it is understood that the variation of the duty in each step suchas 0.125, 0.250 is determined solely by the number of cells n.
Fig. 12 (c) shows the duty dmlvs in each step of the cell total output
voltage. The duty dmlvs varies from 0.0 to 1.0 in each step. As thederivation of the duty dmlvs, first, the difference between thecommand voltage and the basic level voltage is calculated. Then,the difference is divided by the capacitor voltage. As a result, theduty dmlvs is defined by (40).

Basic level
voltage(a) Cell total output voltage on arm
Duty ofCommand
Duty of
Basic level
voltage(b) Duty of cell total output voltage on arm

1.0

0.5

0.0
(c) Duty of cell total output voltage in each stepd mlvs   N ml  1  nD .................................................. (40)Fig. 12. Multilevel waveform of total output voltage,command of cell total output voltage and basic level
voltage.

where D is the duty of the cell output voltage such as (18). Note that
it is possible to replace D to ds1. Moreover, Nml should be modified
according to the number of voltage levels when the number ofvoltage levels changes depending on the modulation.
6.5
Clarification of ripple current formula
In orderto clarify the formula of the ripple current in the arm inductor, eachparameter of (38) is replaced respectively as following;

Vout _ ch  VC , T 

VL

Vin_ch

6.4
Definition of duty in each multilevel-voltage step forclarification of ripple current formula
In this section, theripple current in the arm inductor is clarified. From (37) and (38),the relationship between the duty of the switching device and theripple current of the inductor in the chopper circuit is clarified. In
the same way, it is possible to clarify the formula of the ripple
current in the MMC with the duty of the multilevel voltage. The
general duty is given by (18), (19), (20) and (21). However, theseduties cannot express the variation of the pulse width in each stepof the multilevel voltage. As discussed above, the ripple current isvaried by the variation of the pulse width. Thus, it is necessary todefine a duty with which the variation of the pulse width in eachstep of the multilevel voltage waveform is considered.
First, the basic level in each step of the multilevel voltage is
employed in order to consider the variation of the pulse width ineach step of the multilevel voltage.
Fig. 12 (a) shows the multilevel waveform of the cell total output
voltage vBr, the command waveform of the cell total output voltage
and the basic level voltage. The multilevel waveform is obtained,
whereas the basic level in each step of the multilevel voltage is also
obtained as the lower limit of each step. In other words, the MMC
outputs the pulse voltage based on the basic level in each step.
Fig. 12 (b) shows the command duty of the cell total output
voltage vBr as well as the duty of the basic level voltage. It is
possible to calculate the duty of the basic level voltage dmlbi by (39).
1d N  1
N  1,2,3 n ................. (39)
mlbl

SW2
(1-Don)L

In (42), the maximum value of the ripple current is varied by the
duty dmlvs which changes frequently. Therefore, the formula of (42)shows the envelope of the ripple current which traces the maximum
value of the ripple current. The peak value of the ripple current isgiven by differentiating (42) with dmlvs and clarifying the extremum.

1, Don  d mlvs, , L  La .............. (41)nf C

d i Lm
VC1  2 d mlvs  ................................................ (43)d d mlvs 2nf C La

The maximum value of the ripple current iLm is given by (42).

From (43), when dmlvs is 0.5, the formula reaches the extremum.
Thus, iLm reaches the peak value when dmlvs is 0.5.
Fig. 13 shows the multilevel voltage waveform of the cell total

VC
 i Lm 
d mlvs 1  d mlvs  ....................................... (42)2nf C La
9

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Design Guidelines for Modular Multilevel Converter (Toshiki Nakanishi et al.)output voltage in one arm, the duty of the cell total output voltage
in each step and the waveforms of the ripple current, the envelopeof the ripple current and the reversed envelope of the ripple current.
It is confirmed that the envelope of the ripple current calculated by(42) traces the maximum value of the ripple current. Additionally,
the ripple current has the peak value when dmlvs is 0.5.
In conclusion, as the worst case for the design of the arm inductor,
it is necessary to determine the inductance when the duty dmlvs in
each step of the cell total output voltage is 0.5. In addition, it isnecessary to focus on the number of voltage levels because thenumber of voltage levels changes depending on the modulation.

7. Experimental Result in Miniature ModelIn this chapter, the theoretical formulae are verified by theexperiment in the miniature model. Note that it is assumed that theunity power factor is obtained over entire load range where thetheoretical values are calculated. Thus, the apparent power S in each
formula is replaced by the output power P. In addition, the output
voltage Vmmc is calculated from the output power and the load
resistor in the calculation of theoretical values.
7.1
Verifications of fundamental operation for stepdown rectifier using MMC
Table I shows experimental
conditions. The miniature model is constructed by four cells per leg.
Additionally, as fundamental experiments, the resistance of 5.3 
is employed as the load of the MMC without a smoothing capacitor.
Fig. 14 shows the waveforms of the input phase voltage, the input
current of R-phase and the output DC voltage. First, from the
waveforms of the input phase voltage and the input current, it isconfirmed that the unity power factor is obtained in the input stage.
Moreover, the total harmonic distortion (THD) of the input current
is 3.1% when the normalized impedance %Z of the inductor is 6.1%.
Second, the waveform of the output DC voltage in the lower side ofFig. 14 shows that the step-down rectifier converts from the input
voltage of 200 V into the output DC voltage of 75 V, which ismaintained at constant. Moreover, it is possible to determine theoutput DC voltage freely because the output voltage is controlled
by varying the DC offset of the cell output voltage. As a result, theproposed rectifier of the MMC achieves the step-down rectification.
Fig. 15 shows the waveforms of the arm voltage which is thesummation of the output voltage of all cells in each arm and the
waveform of the line voltage between R-phase and S-phase in theupper side. First, the arm voltage of five levels is obtained because
one of the H-bridge cells with the unipolar modulation obtains
three-level voltage and the arm has two cells. In addition, thewaveforms are not symmetry in the positive side and the negativeside because the cell output voltage includes the DC component.
Besides, the waveform of the line voltage between R-phase andS-phase in the upper side is nine levels. However, the multilevel
voltage waveform becomes non-uniform. This reason is that thearm voltage is not symmetry in the positive side and the negativeside because the command voltage of the cell includes the DC bias
with the MMC output voltage control. However, the voltage
fluctuation is still smaller compared to the employments of the
chopper cells and the H-bridge cells with bipolar modulation. Thus,

Cell total output voltage on arm [V]5000

5 msec0-5000
Duty of cell total output voltage in each step
1.0
0.5
0.0
Ripple current on arm inductor [A]Envelope of ripple current

2.0
0.0
-2.0
Ripple current

Reversed envelope of ripple current(a) one cycle

Cell total output voltage on arm [V]5000
0500 sec-5000
Duty of cell total output voltage in each step
1.0
0.5
0.0

Table I.
Ripple current on arm inductor [A]

2.0
0.0
-2.0
Ripple current

Experimental conditions

Envelope of ripple current

Reversed envelope of ripple current

Rated output power PO

1000 W

Input line voltage E

200 Vrms

Input voltage frequency

50 Hz

Output voltage Vmmc

75 V

Number of cell per leg n(b) Expanded waveforms

Fig. 13. Multilevel voltage waveform of cell total
output voltage in one arm, duty of cell total output voltage
in each step and waveforms of ripple current, envelope ofripple current and reversed envelope of ripple current.
104DC capacitor C

1300 F

Load R

5.3 

Carrier frequency

8 kHz

Arm inductor La

8 mH (%Z = 6.1%)
IEEJ Trans. ●●, Vol.●●, No.●, ●●●Design Guidelines for Modular Multilevel Converter (Toshiki Nakanishi et al.)the MMC achieves the size reduction of the arm inductors.
Fig. 16 shows the waveforms of all cell capacitor voltages which
are connected to the R-phase leg. The cell capacitor voltage iscontrolled according to the capacitor voltage command vc*. As aresult, the proposed step-down rectifier maintains the capacitor
voltage of each H-bridge cell to the voltage command of 130 V.
Therefore, the MMC also achieves the capacitor voltage control. In
addition, the maximum voltage error between the voltage commandof the cell capacitor and the measured voltage is 2% or less.
7.2 Verifications for theoretical formula of ripple current
in capacitor
In this section, the verification result for thetheoretical formula of the capacitor ripple current is shown. In orderto evaluate the ripple current of the capacitor, the frequency analysisof the capacitor voltage is conducted because it is difficult tomeasure the ripple current of the capacitor directly in the miniaturemodel. However, because the ripple voltage is caused by the ripple
current, the validity of the formula is still verified when themeasured ripple voltage and the theoretical value by (7) are proved
to be same. In particular, the fundamental frequency component andthe second-order frequency component of the ripple voltage which
are given by (7) and the measured value are compared.
Fig. 17 shows the comparison result of the theoretical value andthe measured value of the fundamental frequency component in the
ripple voltage. From the result, measured values agree withtheoretical values with the small error. In particular, the maximum
error between the theoretical value and the measured value is 4.0 %.
Fig. 18 shows the comparison result of theoretical values andmeasured values of the second-order frequency component. The
difference between the theoretical value and the measured value islarge. The maximum error is 49.0%. The cause of the large error isthe mismatch of the input active power and the output power due tothe semiconductor loss and the inductor loss.
Fig. 19 shows the comparison result of theoretical values andmeasured values of the second-order frequency component basedon the input active power. In particular, the input active power isassigned to the power P in the theoretical formula of (7). From theresult, the maximum error is reduced to 10.3% compared to theresults from Fig. 18. Hence, this result clarifies the reason of thehigh error between the theoretical value and the measured value ofthe second-order frequency component in Fig. 18, which is themismatch of the input active power and the output power due to thesemiconductor loss and the inductor loss. In the practical converter,
every losses are minimized in order to obtain the high efficiency.
Thus, the error in the second-order frequency component based on
the output power is small because of the low loss. On the other hand,in the above evaluation, when the output power is low, the error
between the theoretical value and the measured value of the secondorder frequency component may be large because the unity power
factor is not obtained. However, the ripple voltage including thesecond-order frequency component should be designed in the worst
case when the ripple voltage is maximum in the rated output power.
Hence, the effect of the above error is small for the design.
In conclusion, the validity of the formula for the capacitor
voltage ripple is verified. Besides, this result confirms that thecapacitor ripple current can be calculated exactly by the formula.
7.3 Verifications for theoretical formula of ripple current
in arm inductor
In this section, the verification result of theripple current in the arm inductor is shown.
Fig. 20 shows the expanded waveforms of the lower arm voltage
in the R-phase and the arm current. The arm voltage is the total

Input Phase Voltage (R-phase) [250 V/div] 10 msec

0
Input Phase Current (R-phase) [5 A/div]0

MMC Output Voltage [25 V/div]0
Fig. 14. Waveforms of input phase voltage, input phasecurrent and output voltage.
Output voltage of all cells in upper side vAr,vAs [250 V/div]00Line voltage of upper side (A side) vArs [250 V/div]

0
4msec
Fig. 15. Waveforms of arm voltage which is thesummation of output voltage of all cells in each arm andline voltage between R-phase and S-phase in upper side.

Capacitor voltage (R-phase) [50 V/div]
vcAr1, vcAr2, vcBr1, vcBr2,

130 V

10 msec0
Fig. 16.

Waveforms of all capacitor voltage in R-phase.

output voltage of two cells. In addition, the expanded waveform
focuses on the output voltage of which the duty in each step of thecell total output voltage dmlvs is 0.5, i.e. when the ripple current
becomes maximum. As shown in Fig. 20, the measured peak-topeak value of the ripple current is 118 mA. The theoretical value ofthe twice value by (42) is 124 mA because the peak-to-peak value
is twice value of the maximum value. As a result, the error between
the theoretical value and the measured value is 4.9%. Note that theinductance used in (42) is measured at the frequency of 32 kHz
because 32 kHz is the equivalent frequency of one arm in theminiature model. Moreover, the unipolar modulation is employed.
Fig. 21 shows the comparison result of theoretical values andmeasured values of the ripple current in the arm inductor dependent
11

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Design Guidelines for Modular Multilevel Converter (Toshiki Nakanishi et al.)on the capacitor voltage. In the low voltage section, the error
between the theoretical value and the measured value is 10% or less.
In the high voltage section, the error is increased to the maximum
value of 11.8%. Whereas theoretical values increase linearly,
measured values have non-linear characteristic. Besides, in the highvoltage section, measured values are larger than theoretical values.
This is caused by the decrease of the inductance due to thecharacteristic of the core. In general, the permeability of the corechanges according to the core temperature. In the experiment, the

7.0
7.0

Capacitor voltage : 104 V, Inductance : 6.6 mH @ 32 kHz
The number of cells per leg : 4
Carrier frequency : 8 kHz (Output frequency of cell : 16 kHz)

Voltage of lower arm on R-phase [100 V/div]0
10 sec

0

Ripple voltage of fundamental
frequency component [V]

6.0
6.0

Ripple current in arm current [50 mA/div]

5.0
5.0

Maximum error :4.0%

Theoretical value

4.0
4.0

Fig. 20. Waveforms of lower arm voltage in R-phaseand arm current.

Measured value

3.0
3.0
2.0
2.0

0.18
0.18

1.0
1.0

0.16
0.16

00

200
200

1000
1000

400
600
800
400
600
800
Output power [W]

Ripple current [A]

0.0
0.0

iLpp=118 mA

Capacitor voltage VC : 136.4 V

1200
1200

0.14
0.14
0.12
0.12

Fig. 17. Comparison result of theoretical values andmeasured values of fundamental frequency component inripple voltage.

0.10
0.10
0.08
0.08

Ripple voltage of second-orderfrequency component [V]

1.0
1.0

0.06
0.06
80
80

Capacitor voltage VC : 136.4 V

0.8
0.8

Measured value

Theoretical value

0.2
0.2
0.0
0.0

200
200

1000
1000

400
600
800
400
600
800
Output power [W]

1200
1200

Fig. 18. Comparison result of theoretical values andmeasured values of second-order frequency component
in ripple voltage.

Ripple voltage of second-orderfrequency component [V]1.0
1.0Capacitor voltage VC : 136.4 V

0.8
0.8

Measured value

0.6
0.6
Theoretical value

0.4
0.4
0.2
0.2
0.0
0.0

Maximum error : 10.3%

00

200
200

400
600
800
400 active
600 power
800[W]1000
1000
Input

90
90

100
110
100
110
Capacitor voltage [V]

120
120

130
130

magnetic flux increases due to the increase of the capacitor voltage,
which increases the iron loss of the core. As a result, the coretemperature becomes higher at the high voltage section. Thus, theinductance decreases due to the decrease of the permeability when
the core temperature raises.
7.4 Verifications
fortheoreticalformulaeofsemiconductor losses
In this section, the verification result for
the theoretical formula of the semiconductor loss is shown. In theexperiment, semiconductor losses, inductor losses and the no-loadloss are considered. The no-load loss is measured when the MMC
operates in state where the converter does not connects to the load.
In general converters, the switching device has the parasitic
capacitor and the current flows between the parasitic capacitor andthe switching device when the switching device turns on. In thisstate, the measured input power is defined as the no-load loss. Next,
the input power, the output power and the inductor loss aremeasured same time when the MMC operates in state where theconverter connects to the load. By subtracting the output power, theinductor loss and the no-load loss from the input power, thesemiconductor loss is obtained.
Table II shows the circuit parameters and the loss parameters in
the verification for formulae of semiconductor losses. The loss
parameters relating to the conduction loss are obtained from thedatasheet of the used device, whereas the loss parameters relating
to the switching loss and the recovery loss are obtained from themeasured values in the switching test.

Maximum error : 49.0%

00

Value in Fig. 20
Measured value

Fig. 21. Comparison result of theoretical values andmeasured values of ripple current in arm inductor
dependent on capacitor voltage.

0.6
0.6
0.4
0.4

Maximum
error :
11.8%

Theoretical value

1200
1200

Fig. 19. Comparison result of theoretical values andmeasured values of second-order frequency component
based on input active power.
12

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Design Guidelines for Modular Multilevel Converter (Toshiki Nakanishi et al.)Table II.

Fig. 22 shows the comparison result of measured values andtheoretical values. The theoretical value is defined as the total valueof the conduction loss, the switching loss and the recovery loss inall cells. The maximum error is 3.4%. On the other hand, in all range,measured values are larger than theoretical values. The reason ofthis error is the loss in the equivalent series resistance (ESR) of thecapacitor and the wiring loss which is not considered in themeasurement. Thus, the semiconductor loss which is measured in
the experiment includes the above losses which are not considered.
As a result, measured values are larger than theoretical values.
Besides, the error between the measured value and the theoreticalvalue increases with the increase of the output power. This reason
is that both the loss in the capacitor and the wiring loss increase
with the increase of the output power because the ripple current of
the capacitor and the arm current increases.
On the other hand, the switching device has the tolerance in theloss characteristic. This tolerance may affect the errors between
calculated and measured losses. However, the MMC consists ofmany switching devices. As a result, the effect of the difference
between the nominal value and the practical value of each switching
device is small for overall system by averaging tolerance of theswitching device. In addition, the relationship between the input
power factor and the semiconductor loss is not changed in principle.
Thus, it is possible to design the heat sink as same as general power
converters after considering the worst case or the margin even when
the tolerance in the loss characteristic exists.
Fig. 23 shows the breakdown of the losses in the MMC. The noload loss is constant against the change of the output power. On theother hand, the semiconductor loss and the inductor loss increase
with the increase of the output power because the arm current
increases. From Fig. 23, it is understood that the semiconductor loss
is the majority of the overall loss. Hence, the semiconductor loss
should be decreased by the design to achieve the high efficiency.
One of methods to reduce the semiconductor loss is to decrease thearm current by raising the MMC output voltage because thesemiconductor loss varies according to the arm current drastically.

Input line voltage E

200 V

The number of cells n

4 /legCapacitor voltage VC

135 V

Load resistance R

5.3 

Carrier frequency fC

8 kHz

Output power PO

200 - 1000 W

Switching device

FGW30N60VD

Drop voltage of switch V0_SW

0.74 V @ Tj =25 °C

Resistance of switch RSW

0.0536  @ Tj =25 °C
0.8 V @ Tj =25 °C

Drop voltage of FWD V0_FWD

0.0492  @ Tj =25 °C

Resistance of FWD RFWD
Turn-on energy of switch won

75.46 J@Vdcd=135 V Imd=6.7 A

Turn-off energy of switch woff

53.98 J@Vdcd=135 V Imd=8.3A

Recovery energy of FWD wrr

6.21 J@Vdcd=135 V Imd=0.6 A

Semiconductor loss [W]

160
160
140
140

Maximum
error :
3.4%

120
120
100
100

Measured value

80
80

Theoretical value

60
60
40
40

00

200
200

800
400
600
400
600
800
Output power [W]

1000
1000

Fig. 22. Comparison result of theoretical values andmeasured values of semiconductor loss.
200
200

180
180
160
160
140
140

Loss [W]8.

Circuit parameters and loss parameters for verification

120
120

Conclusion

Semiconductor
loss

100
100

This paper presented the theoretical formula focused on thenumber of cells and the output DC voltage for the circuit parameter
design in the H-bridge cell type Modular Multilevel Converter(MMC) in order to show the design guideline. Moreover, the worst
case for each component design was also clarified as following;(i) As the worst case in the cell capacitor design, the ripple
component was maximum when the input power factor was 1.0. In
particular, it was necessary to design the rated ripple current in thispoint when the electrolytic capacitor was applied.
(ii) As the worst case in the heat sink design, the semiconductor
loss was maximum when the input power factor was 1.0.
(iii) As the worst case in the arm inductor design, the ripple
current was maximum when the duty in each step of the cell total
output voltage was 0.5.
In addition, theoretical formulae were verified in the miniaturemodel of the MMC. As a result, the following results were obtained.
(a) As the verification of the capacitor ripple voltage, themeasurement resulted in the maximum error of 4.0% between
theoretical values and measured values. Because the ripple voltage
was caused by the ripple current, it is possible to calculate exactly
the ripple current of the electrolytic capacitor with the formula.
(b) As the verification of the ripple current in the arm inductor,

80
80
60
60

Inductor
loss

40
40
20
20
00

No-load
loss
1

200
2

400
600
800
3
4
5
Output power [W]1000
6

Fig. 23. Breakdown of losses in MMC. The inductor
loss and the semiconductor loss increase with the increaseof the output power because the arm current increases.
the measurement resulted in the maximum error of 11.8% between
theoretical values and measured values. The error was caused by
the change of the core characteristic.
(c) As the verification for the formulae of semiconductor losses,
the measurement resulted in the maximum error of 3.4% between
the theoretical value and the measured value. Hence, it is possible
to calculate the semiconductor loss for design of the heat sink.
It is expected that these results promote the discussion of thedesign focused on the number of cells and the MMC output voltage.

13

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Toshiki Nakanishi(Student member) received the B.S. degrees inelectrical, electronics and information engineeringfrom Nara National College of Technology (NNCT),
in 2011. He received master degrees in Nagaoka
University of Technology (NUT) in 2014. And hehas been in doctoral course of NUT. He is the student
member of IEEJ and IEEE. His main researchinterests include multilevel converters.

Jun-ichi Itoh

(Senior Member) received his M.S. and PhD degrees
in electrical and electronic systems engineering from
Nagaoka University of Technology, Niigata, Japan in
1996 and 2000, respectively. From 1996 to 2004, he
was with Fuji Electric Corporate Research andDevelopment Ltd., Tokyo, Japan. Since 2004, He has
been with Nagaoka University of Technology as an
associate professor. He received the IEEJ Academic
Promotion Award (IEEJ Technical Development Award) in 2007 and the
Isao Takahashi Power Electronics Award in 2010. His research interests
include matrix converters, DC/DC converters, power factor correction
techniques and motor drives. He is a senior member of the Institute ofElectrical Engineers of Japan and the Society of Automotive Engineers ofJapan.

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