Zero Voltage Switching Scheme for Flyback
Converter to Ensure Compatibility with
Active Power Decoupling Capability
Hiroki Watanabe1*, Jun-ichi Itoh1
1 Department of Electrical, Electronics and Information Engineering, Nagaoka University of Technology, Nagaoka, Japan*E-mail: hwatanabe@stn.nagaokaut.ac.jp
Abstract—In this paper, a novel ZVS method withsynchronous rectifier is proposed in order to achieve the soft
switching and the active power decoupling without additional
component. The proposed method separates the ZVS
operation and the snubber capability to keep thediscontinuous current mode (DCM) for the power decoupling.
In addition, an active clamp circuit which achieves soft
switching operation is applied for the surge voltage
suppression of a main switch. From the experimental results,
0.4% of a second-order harmonics on a DC input current isobtained in comparison with a DC component. In addition, it
is confirmed that the surge voltage is reduced by 50% owing
to the active clamp circuit, and the ZVS operation by theexperiment.
Keywords— micro inverter; active power decoupling; zerovoltage switchingI.

INTRODUCTION

Recently, micro inverter systems for PV applications
are actively researched for a sustainable power solution
due to the attractive characteristics such as; flexibility,
high-system efficiency, and low manufacturing cost [1].
The micro inverter promisingly becomes a trend for the
future PV system instead of the large capacity inverters,
and the micro inverter requires the high reliability because
the large number of the converter units are adopted to the
PV generation system. Generally, in the power converter
for DC to single-phase AC grid system, an electrolytic
capacitor is usually employed owing to the large
capacitance for the double-line frequency power ripplecompensation. These capacitors limit the life-time of theconverter, which results in low reliability.
According to this problem, the active power decouplingtechniques which have a film or ceramic capacitor are
attracted as the one of this solution [2]-[9]. The active
power decoupling circuit charges and discharges thedecoupling capacitor in order to absorb the double-line
frequency power ripple, which enables to small
capacitance. As a result, large electrolytic capacitor does
not necessary. However, a lot of conventional active
power decoupling circuits require the additional
components such as the switching devices and the
additional inductor. Although the low cost is the one of theadvantages in the micro inverter, these components

increase complexity of the circuit configuration and thecost. Therefore, the active power decoupling techniquewhich utilize the discontinuous current mode (DCM) was
already proposed by authors [10], and it reduces the DC
link capacitance without the additional components.
The ZVS techniques for the flyback converter havebeen hot research topics in order to reduce the switchinglosses and the voltage stress due to the leakage energy oftransformer [11]. The quasi-resonant (Q-R) operation is
the one method, which adjusts the switching timing to thezero voltage by a pulse frequency modulation (PFM) [12].
The other technique utilizes an active clamp circuit for
the ZVS operation. In this method, the magnetizing current
becomes negative due to the series resonance between theleakage inductance and the clamp capacitor, and theparasitic capacitor is discharged before turn-on. As a result,the ZVS operation is obtained.
In the active power decoupling technique by authors,
the flyback converter has to limit the operation condition
because it is achieved under the constant switchingfrequency and the DCM operation. In this case, theconventional ZVS method as the Q-R operation and theactive clamp circuit cannot apply to the proposed
converter. This is because the Q-R operation needs thePFM, and conventional active clamp method has tooperate under the continuous current mode (CCM).
This paper proposes a novel ZVS scheme to ensurecompatibility with the active power decoupling circuit. For
that, the synchronous rectifier is applied instead of thediode rectifier. In addition, the active clamp circuit is onlyused to reduce the turn-off surge voltage of the main
switch. The originality of this paper is that the switchingpattern is added to a synchronous rectifier for ZVS
operation. Similar ZVS method with forward converter
was already reported by Ref. [13], however, this method is
also operated under the CCM condition. The differential
point is that the proposed converter needs the zero current
period of the magnetizing current for power decoupling. In
addition, the magnetizing current should be negative todischarge the parasitic capacitor of the main switch. Inorder to satisfy these condition, the conduction modes forthe synchronous rectifier switch is turned-on before themain switch is turned-on, and the active clamp circuit isturned-off when the released energy of the magnetizing

inductance becomes zero to ensure the zero current period
for DCM. Finally, the active power decoupling and theZVS operation is confirmed by experiment.
II.

CIRCUIT CONFIGURATION

Fig.1 shows a conventional micro inverter topology
with the conventional active power decoupling circuit[14]. In order to reduce the buffer capacitance Cbuf, thesmall decoupling capacitor Capd and the auxiliary circuit
are adopted on the transformer secondary side. The
decoupling capacitor Capd is charged and discharged insynchronized with the double-line frequency tocompensate the power ripple with small capacitor.
However, these additional components complex the circuit
configuration, and the transformer has to compose thethree winding transformer which has complicate
configuration.
Fig. 2 shows the proposed converter which consists ofthe flyback converter, the voltage source inverter (VSI)and small buffer capacitor Cbuf. The flyback converter
isolates between the PV and the single-phase grid, and it
has the high voltage gain to push up the DC input voltage.
The proposed converter compensates the double-line
frequency power ripple by the small DC link capacitor Cbuf
without additional components. In addition, the active
clamp circuit is applied for the surge voltage suppression
due to the leakage energy of the transformer. Moreover,the synchronous rectifier is implemented for the ZVS
operation and the reduction of the conduction losses.
The hard switched flyback converters undergo
substantial switching losses in the high switchingfrequency and high voltage stress on the each switching
devices. This is because the parasitic capacitor of S1 isquickly charged due to the leakage energy. Typically, The
RCD snubber is connected to primary side in order tosuppress the huge surge voltage. However, the reductionof the switching losses and the snubber losses is theimportant to improve the conversion efficiency.
According to these reason, the active clamp circuit isconsidered. The leakage energy transfers to the clamp
capacitor Cclamp when the active clamp switch Sclamp isturned-on. In order to reduce the peak surge voltage, theCclamp should be large to delay the charge period incomparison with the parasitic capacitor.
Fig. 3 shows the principle of the power decoupling
between the DC and single-phase AC sides. The proposed
active power decoupling separates the DC component anddouble-line frequency component by the flyback converter.
Thus, the DC input power Pin is always constant, and theDC link capacitor Cbuf stores the differential power
between input and output power.
When both the output voltage and current waveforms
are sinusoidal, the instantaneous output power pout isexpressed aspbuf =

Vacp I acp
2(1 − cos 2ωt )(1)where Vacp is the peak voltage, Iacp is the peak current, andω is the angular frequency of the output voltage. From (1),

Fig 1. Conventional flyback micro inverter with active power
decoupling circuit. It can reduce the capacitance of Cbuf. However,auxiliary circuit is necessary.

Fig 2. Circuit configuration of proposed flyback converter. Active
clamp circuit suppress turn-off surge voltage. Synchronous rectifier
utilizes ZVS operation for S1.

Fig 3. Relationship between input and output power. DC link
capacitor receives differential power due to double-line frequency
power ripple, and input power becomes constant.

the power ripple that contains double-line frequency of thepower grid, appears at DC link.
In order to absorb the power ripple, the instantaneous
power pbuf is expressed as1
pbuf = Vacp I acp cos 2ωt2(2)where, the polarity of the pbuf, is defined as positive when
the DC link capacitor Cbuf discharges. Note that the active
power of Cbuf should be zero. Owing to the power
decoupling capability, the input power is matched to the
output power. Thus, the relationship between the input andoutput power is expressed as

1
p pv = Vacp I acp = Vin I in
2

(3)

vgs_s1

id_s1

iD

The proposed converter achieves the active power
decoupling by the DC link capacitor Cbuf. As a result, theDC link voltage vcbuf fluctuates at the double-line
frequency of the single-phase grid frequency as Fig. 3.
III.

Iave_CCM

DonTsw

DoffTsw
Tsw(a)Continuous current mode (CCM)

OPERATION MODES OF PROPOSED CONVERTER

A. Active power decoupling operation
Fig. 4 shows the drain current waveforms of the main
switch S1 without active clamp circuit. The proposed
active power decoupling method is very simple, and thedetail is following.
Firstly, the average primary current both CCM and
DCM are expressed as
I ave _ CCM =I ave _ DCM =I peak =

Vdc
I dc
Vin

I peak2

Don

Vin
DonTsw
Lm

(4)

(5)

(6)

where, Iave_ccm is the average current in CCM, Vdc is the DC
link voltage, Idc is the DC link current, Vin is the DC input
voltage, Lm is the magnetizing inductance, Don is the on
duty ratio of the main switch S1, Tsw is the switching period.
Note that, the Vdc fluctuates at double-line frequency when
the DC link capacitor is small. In the CCM condition, thePV side average current Iave_ccm is decided from DC linkparameters such as Vdc and Idc. As a result, the power
decoupling fails.
On the other hand, the PV side average current in DCM
Iave_DCM is only decided primary parameters such as DC
input voltage, and the switching period and on duty. In
order to achieve the active power decoupling, the proposed
converter is operated by the constant on duty reference andthe constant switching frequency. As a result, constantaverage current is obtained, and the double-line frequency
power ripple does not occurs on PV side.
Fig.5 shows the current waveforms of the DC input
current Iin, DC link current idc, and the inverter output
current iac. The proposed converter obtains the constant
input power by the flyback converter, and the DC link
capacitor Cbuf compensates the power ripple due to singlephase AC grid. In this case, the DC link current includes(b) Discontinuous current mode (DCM)
Fig.4. Fundamental waveforms without active clamp circuit. In
DCM, power decoupling can achieve under constant duty reference
and switching frequency condition.

the charge and discharge current of Cbuf, and it has the
double-line frequency component as Fig. 5.
According to these method, the proposed converter
decouples the DC components and the double-line
frequency components. However, it limits the operation
condition of the flyback converter to constant dutycommand and switching frequency. As a result, theconventional ZVS techniques cannot apply to the proposed
converter. This is because the Q-R operation needs thePFM. In addition, the ZVS with the active clamp circuit isoperated under the CCM condition. In order to solve thisproblem, the new ZVS method is proposed from the next
chapter.

B. Operation modes of flyback converter
Fig. 6 shows the key ZVS switching waveforms of theconventional and proposed method. The large surge
voltage occurs on main switch S1 due to the resonancebetween leakage inductance Lleak and the parasitic
capacitor of S1 at turn-off transition when the snubber
circuit does not places. The active clamp circuit suppresses
the peak drain-source voltage Vds_s1 by the clamp capacitor
Cclamp, and the clamp voltage is expressed as
VdS _ s1 = Vin +Vdc
Nwhere, N is the turn ratio of the transformer.

(7)

According to Fig. 6 (a), the active clamp circuit is used
for both the ZVS operation and the surge voltage
suppression. The active clamp switch Sclamp and S1 areswitched to complementation through the dead-time
period [15]. At the dead-time before turn-on of S1, themagnetizing current iLm reaches to the negative current. In
this state, the parallel diode is turned-on, and the parasitic
capacitor discharged. As a result, ZVS is achieved at S1.
However, this method is only applied the continuous
current mode, and it disturbs the proposed power
decoupling operation as (4). Thus, the magnetizing current
has to become discontinuous current for the proposed
power decoupling.
Fig. 6 (b) shows the proposed ZVS method usingsynchronous rectifier. In the proposed method, the active
clamp circuit is only used for the surge voltage
suppression. Instead, synchronous rectifier switch Srec has
the turned-on state before turn-on of S1 in order to generate
the negative current for ZVS.
Fig.7 shows the operation modes of the proposed
flyback converter, and the detail of each mode aredescribed in the following.

Mode 1 (t0 - t1):
In mode 1, the main switch S1 is turned-on, and theactive clamp switch Sclamp is remaining off-state. The DC
input voltage is applied to the transformer and each energy
storage. The magnetizing current linearly increases until
the end of the mode 1, and the energy is stored bothleakage inductance and magnetizing inductance.
Mode 2 (t1 – t2, dead-time):
This mode starts when the main switch S1 is turned-off.
In this mode, the energy of the leakage inductance Lleak istransferred to the parasitic capacitor Coss. In this mode, thesynchronous rectifier switch Srec and the parallel diode of
Srec is remaining off-state. Thus, the primary side
composes the series resonance circuit with Lm, Lleak andCoss. Note that Coss is very small, and it is charged quickly.
This mode is the end when the Vds_s1 reaches to (7).

Fig.5. Current waveforms of PV input current Iave_DCM, DC link current
idc and inverter output current iac. DC link capacitor is charged anddischarged due to double-line frequency in order to compensate thedifferential power during input and output power.

(a) Conventional ZVS method with active clamp circuit. This method,
active clamp circuit and main circuit are switched to complementation.
Mode1

vgs_s1

Tt 3−t 4 = I peak

NLm
Vdc

(8)

where, Ipeak is the magnetizing peak current, N is the turnratio of the transformer, Lm is the magnetizing inductance,
and the Vdc is the DC link voltage. At the t = t3, Sclamp

4

5

6 7

vgs_sclamp
Additional switching period
vgs_srecvds_s1 Vpv+Vdc/N

Mode 3 (t2 – t3, dead-time):
This mode starts when the parallel diode of Srec andSclamp is turned-on, and the magnetizing inductor energy isreleased and delivered to the VSI side. Lleak, Cclamp areresonant during in this interval. This mode is the end when
the Sclamp is turned-on.
Mode 4: (t3 – t4)
This mode starts when Srec and Sclamp is turned-on. The
period of this interval is set to the energy release period of
the magnetizing inductance, and it is expressed as

23

Zero current

iLm

Negative current

ILm_bti_sclamp
t0

t1 t3
t2

t4

t5 t6 t7(b) Proposed ZVS method with active clamp circuit.
Fig.6. Key waveforms of flyback converter in switching cycle. In orderto achieve ZVS, negative current period is necessary before S1 is turned-on. In addition, zero current period is required for proposed active
power decoupling capability.

achieves the ZVS because the parasitic capacitor of Sclamp
is already discharged before the turn-on.
Mode 5: (t4 – t5)This modes starts when the magnetizing current
becomes zero. The all switches are tuned-off, and themagnetizing current remaining zero. The proposed active
power decoupling method operates under DCM. Thus, thismode is important in order to achieve the active power
decoupling capability without the additional components.
In this interval, the primary side composes the series
resonance circuit with Lm, Lleak and Coss, and the voltage
oscillation occurs. The resonance period is expressed as

Tres = 2π ( Lleak + Lm )Coss(9)

Mode 6: (t5 – t6)
This mode is for the ZVS operation of the main switch
S1. The negative voltage provides to the transformer, andthe magnetizing current reaches negative when thesynchronous rectifier Srec is turned-on. The bottom currentof the magnetizing inductance ILm_bt is expressed as
I Lm _ bt =Vdc
Tt 5−t 6
NLm(10)

Mode 7 (t6 – t7, dead-time):
At the t = t6, the magnetizing current is remaining
negative. In this interval, the parasitic capacitor Coss isdischarged, and the drain source voltage vds-s1 is decreased
to zero. After that, the parallel diode of S1 is turned-on.

After this mode, S1 is turned-on, and the ZVS is achieved.
The proposed converter is added the switching state ofmode 6 and 7 for ZVS. Due to these modes, the parasitic
capacitor Coss is discharged before turn-on of S1. In
addition, the operation mode of the proposed converter has
the zero current period as mode 5, and the magnetizing
current becomes discontinuous current. As a result, theproposed power decoupling is also achieved.
C. Control block diagram
The control block diagrams of the flyback converter isshown in Fig. 7. The Flyback converter operates by theconstant duty reference and switching frequency. In order
to avoid the short circuit between S1, Sclamp, and Srec, thedead-time is implemented after modulation part. In
addition, the dead-time of S1 is separated to two steps forgeneration of the synchronous rectifier on-state.
According to (5), the PV side average current isdecided by the peak current of the magnetizing current,
and the on duty including the dead-time period isexpressed as
Don _ s1 = Dref −Tdead = Td 1 + Td 2

Tdead
Tsw

(11)
(12)

where, Tdead is the dead-time period, and it is the sum of
the dead-time Td1 and Td2. The turn-on period of Sclamp
equal to the energy release period of the magnetizing
inductance, and it is expressed as

Fig.7. Operation modes and the control block diagrams of flyback converter. In order to achieve ZVS, mode 6 and 7 which discharge theparasitic capacitor are proposed.

Don _ sclamp =

NV pv
Vdc

(13)

Don _ s1

The gate signals for Srec is the sum of the active clamp
switch gate signals Vgs_sclamp and the turn-on signals for
ZVS (e.g. Pulse 3). Note that, pulse period is set by thedead-time of Td1.
IV.

SIMULATION RESULT

Table. 1 shows the simulation parameters. In thissimulation, the leakage inductance Lleak and the parasitic
capacitor Coss is adopted to evaluate the ZVS operation. In
order to suppress the surge voltage, the clamp capacitor isset to 10μF.
Fig. 8 shows the switching waveforms with the dioderectification and the proposed method. Firstly, the surge
voltage is suppressed by the Active clamp circuit bothcondition. However, according to Fig. 8 (a), the drainsource voltage vds_s1 does not zero when the S1 is turnedon, and the magnetizing current becomes positive value. It
is meaning that the hard-switching condition occurs, andthe parasitic capacitor cannot be discharged by themagnetizing current.
On the other hand, according to Fig. 8 (b), the vds_s1
becomes zero before the turn-on of S1. In addition, it isconfirmed that the magnetizing current becomes negativevalue at dead-time period. From these result, the operationof the proposed method is confirmed. Note that, theconduction mode of the rectifier circuit is necessary inorder to achieve ZVS, and the conduction losses becomesincrease on the synchronous rectifier circuit without theZVS operation. However, the additional conductive period
is short, and the secondary current is small in comparison
with the primary current. Thus, the increase of conduction
losses is small.
V.

EXPERIMENTAL RESULT

Table. 2 shows the experimental parameters. This
chapter presents experimental results using 300 W
prototype drawn in Fig. 2 to confirm the active power
decoupling operation and the proposed ZVS method. Notethat VSI is operated under the open loop control with R-L
load. Besides, the duty command compensation is applied
to the VSI control. This is because the DC link voltage
Table.1 Simulation parameters

5 s/div

Gate voltage vgs_s1[-]
Gate voltage of clamp circuit vgs_sclamp[-]
Magnetizing current iLm[A]
Drain-source voltage vds_s1[V]
Gate voltage vgs_s1[-]
Magnetizing current iLm[A]iLm : Positive
Drain-source voltage vds_s1
Hard switching

[V]

(a)

Diode rectifier(b) Proposed method
Fig.8. Simulation result with switching waveforms both diode rectifier and proposed method

fluctuates by the power decoupling operation. The
switching frequency is set to 50 kHz, and the decoupling
capacitor is selected to 33μF in order to apply the small
film capacitor.
Fig. 9 shows the input and output waveforms withproposed method. According to Fig. 9 (a), the DC input
current is regulated under the constant value, and the DC
link capacitor voltage fluctuates at the double-line
frequency as 100 Hz owing to compensate the singlephase AC power ripple. In addition, the sinusoidal
waveforms of the inverter output voltage and current are
obtained. According to Fig. 9 (b), the second orderharmonics of 100 Hz is 0.4% by the DC components.
From this result, the power decoupling operation with
33μF is confirmed by experiment.
Fig. 10 shows the experimental results which does
not use the snubber circuit and the proposed method.
Note that the evaluation of the surge voltage suppression
and the ZVS operation is confirmed by light loadcondition because the huge surge voltage occurs bysnubber less condition. As shown in Fig. 10, the surge
voltage occurs when the S1 is turned-off due to theleakage inductance of the transformer. In addition, thecurrent oscillation also occurs at turn-on period by the
hard switching operation. In order to improve thesewaveforms, the active clamp circuit and the proposed
method is applied in Fig. 11.
Fig. 11 shows the switching forms with active clamp
circuit and proposed method at light load condition.
Note that, Fig. 11 (a) is the diode rectifier condition, andthe synchronous rectifier is constantly turned-off.
According to Fig.11 (a), the surge voltage is suppressedby 50% using the active clamp circuit. However, thecurrent oscillation cannot improve due to the hardswitching operation as shown in Fig. 11(c).
According to Fig. 11 (b), the surge voltage
suppression and the ZVS are achieved by the active
clamp circuit and the proposed method. As shown in Fig.
11 (d), the drain-source voltage of S1 becomes zero
before the S1 is turned-on. From these results, the active
power decoupling and the ZVS operation are confirmedby the experiment.
VI.

CONCLUSION

Table.2 Experimental parameters(a) Input and output waveforms(b) DC input current harmonic analysis result
Fig.9. Experimental results with over all operation waveforms and DC
input current harmonic analysis result.

This paper discussed ZVS operation method of the
flyback converter with the active power decoupling
capability. The proposed method converter is operated
under constant frequency and duty command for theactive power decoupling, and the synchronous rectifier
is applied in order to achieve ZVS for the flyback
converter. From the experimental result, the secondorder harmonics in the DC input current becomes 0.4%of the DC average current. Finally, the surge voltage
suppression and the ZVS operation are confirmed by theexperiment.
In the future work, the circuit design and operation
optimization will be considered in order to improve theconversion efficiency.
Fig.10. Experimental results with snubber less and diode rectifiercondition.

Gate voltage vgs_s1 20 [V/div]

4 [ s/div]0Gate voltage vgs_srec 20 [V/div]0
Hard switching0
Drain current id_s1 5 [A/div]
Surge voltage is suppressed0
Drain-source voltage vds_s1 25 [V/div](a) Diode rectifier.

(b) Proposed method(c) Extend waveforms of fig. 11 (a).
(d) Extend waveforms of fig. 11 (b).
Fig.11 Experimental result with switching waveforms both hard switching condition and ZVS condition.
[9]

VII.

ACKNOWLAGEENT

This study was supported by New Energy and Industrial
Technology Development Organization (NEDO) of Japan.
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