電気学会論文誌●（●●●●●●●部門誌）
IEEJ Transactions on ●●●●●●●●●●●●●●●
Vol.●● No.● pp.●-●●
DOI: ●.●●/ieejeiss.●●.●

Paper

Open-loop-based Island-mode Voltage Control Method
for Single-phase Grid-tied Inverter with Minimized LC Filter
Jun-ichi Itoh＊a) Senior member

Satoshi Nagai＊ Student member,(Manuscript received Jan. 00, 20XX, revised May 00, 20XX)
This paper proposes an island-mode voltage control method using an open-loop control that applies a high-gain disturbanceobserver (DOB) for a single-phase inverter with a low-capacitance output filter. The output voltage is distorted with low capacitanceobtained from the conventional method that consists of a PID regulator for an automatic voltage regulator and a PI regulator for an
automatic current regulator. To compensate for the output voltage distortion, the high-gain DOB for the output voltage is applied
for open-loop-based voltage control. DOB is implemented into a field-programmable gate array with high-speed sampling. In the
LC filter of a 1-kW prototype, the impedance of the inductor is minimized to 1.0% of the normalized inverter impedance, whereas
the admittance of the capacitor is reduced to 0.25% of the normalized inverter admittance. Using the proposed method, the inverter
output voltage total harmonic distortion is reduced by 82.4% even with the diode rectifier load compared to conventional voltage
control, whereas the constant output voltage is achieved regardless of load conditions.
Keywords : Grid-tied inverter, Island-mode, Minimized LC filter, Open-loop-based voltage control

1.

control response of the voltage controller and the current controller
are increased to enhance the disturbance suppression performance.
However, the increase in the control response is based on the limited
detection delay time and the sampling frequency. Moreover, toimprove the output voltage distortion, voltage control methods,
such as an uninterruptible power supply (UPS) system, areproposed in (11), (12). It is not necessary to consider the FRT
operation for the operation of a UPS. Thus, it is possible to increase
the capacitance of the filter capacitor of the output filter. The
voltage control methods of (11) and (12) do not consider the outputof the low capacitance filter. Therefore, in the grid-tied inverter, thevoltage control with low capacitance must be considered. Moreover,
it is necessary to implement a complex control or sampling method
for the control methods of (11) and (12).
This paper proposes a new open-loop-based island-mode voltage
control method equipped with high-gain disturbance suppression inorder to achieve low total harmonic distortion (THD) of the output
voltage. The originality of this paper is that an island-mode voltage
control with a minimized LC filter can compensate for an output
error voltage for the load current without a current feedback loop.
Moreover, it is not necessary to consider the interference between
the voltage controller and the current controller. This control isdefined as the voltage disturbance compensation open-loop control(VDCOLC) in this paper. The proposed VDCOLC compensates forthe load current disturbance by using the output voltage detection
value to calculate the disturbance through a high-gain disturbanceobserver (DOB) (13-15). In order to compensate for the disturbancewith high-speed sampling, the high-gain DOB is implemented
using a field-programmable gate array (FPGA). By using this
proposed VDCOLC, a reduction of THD for the inverter output
voltage is confirmed with a 1-kW prototype.

Introduction

In recent years, grid-tied inverters such as photovoltaic systems,
fuel cell systems, and wind turbine systems have been actively
studied for energy conservation (1-3). An inverter must have a small
volume to increase the power density of the system (4, 5). Becauseinterconnected inductors account for most of the inverter size, it isdesirable to reduce the size of the interconnected inductors. By
reducing the inductance, it is possible to reduce the volume of theinductor. This can be achieved using high switching frequency
silicon carbide (SiC) or gallium nitride (GaN)-based devices,
applied using the same current ripple. Moreover, the capacitance ofthe filter capacitor can be reduced by designing a filter with a highcutoff frequency. Therefore, it is possible to apply a high resonancefrequency output filter for the inverter by increasing the switchingfrequency. On the other hand, the inverter output current overshootrate becomes high during the voltage sag when the inductance of
the interconnected inductor is reduced. Thus, the authors propose ahigh-speed gate-block method and the design of an LC or LCL filter
to meet the fault ride-through (FRT) requirements (6, 7). In particular,
to meet the FRT requirements, a filter capacitor with low
capacitance is designed to reduce the resonance.
The grid-tied inverter is required to perform the island-mode
operation to supply power to the load, when a blackout in a long
period that exceeds the FRT requirements occurs (8-10). In order to
output the voltage, it is necessary to implement a voltage controller
for the inverter. However, the disturbance suppression performanceof the voltage controller worsens due to the low capacitance of thefilter capacitor in the minimized LC filter. The inverter output
voltage is distorted when the island-mode operation with low
disturbance suppression performance is connected to a nonlinear
load, such as a rectifier load. As a solution to this problem, the2. Problem of Island-mode Voltage Control with
Minimized LC Filtera) Correspondence to: Jun-ichi Itoh. E-mail: itoh@vos.nagaokaut.ac.jp＊
Nagaoka University of Technology.
1603-1, Kamitomioka-machi, Nagaoka, Niigata, Japan 940-2188© 200● The Institute of Electrical Engineers of Japan.

Figure 1 shows a circuit configuration of a single-phase grid-tied
1

Open-loop-based Island-mode Voltage Control Method (Satoshi Nagai et al.)Output voltage [V]

400

S1

S3
iL

iout

L
Vdc

vC

iC

Cf

Load

200
0
-200
-400

S4

Filter capacitor current [A]S2Fig. 1. Circuit diagram for island mode. In this paper, theoutput LC filter is minimized.
CircuitvC
Vdce sTd _ ce

 sTd _ v

iout
-

+

1 iL -iC 1
sC f
sL +

s 2C f  sK p 

Kp

-0.2
-0.4

Detection value

10 ms/div

0.4

Detection delay time: 6.25 s

Measurement value

0.2
0.0
-0.2
-0.4

Detection value

10 ms/div

Filter capacitor current [A]0.4

Detection delay time: 10 s

Measurement value

0.2
0.0
-0.2
-0.4

10 ms/div

Detection value(c) Current detection delay time is not half the carrier period.
Fig. 3. Comparison of filter capacitor current detection withdifferent current detection delay time.

............................................ (1),Timode with the minimized LC filter.
Figure 3 shows the filter capacitor current detection value under
the same output voltage with different detection delay time of thefilter capacitor current, where the impedance of the interconnectedinductor is 1.0% of the normalized inverter impedance, and theadmittance of the filter capacitor is 0.25% of the normalized
inverter admittance in the 1-kW system. The detection of the filter
capacitor average current for one switching period is required, as
shown in Fig. 2. However, the filter capacitor current has a large
current ripple when the low capacitance of the filter capacitor isapplied, because the switching frequency becomes higher than thefundamental frequency component of the output current. Thus, it is
impossible to detect the filter capacitor average current per theswitching period due to the current detection delay time. In Fig. 3(a) and (b), it is possible to detect the average filter capacitor current
as a sinusoidal wave when the detection delay time is 0 s or half thecarrier period (6.25 s). However, the detection point of the output
current is different from the average value, i.e., the filter capacitor
current detection value becomes a non-sinusoidal wave when thedetection delay time of the filter capacitor current becomes longer,
as shown in Fig. 3(c) as 10 s. Thus, it is impossible to detect thefilter capacitor average current due to the above problem. As aresult, the inverter output voltage THD becomes worse. It isnecessary to apply multirate sampling for the average capacitor

where Cf is the capacitance of the filter capacitor; Kp is the
proportional gain; Ti is the integral time; s is the Laplace operator;
and the current control gain is unity. The disturbance suppression
performance worsens due to the increase in the disturbance gain
when the capacitance of the filter capacitor Cf is decreased in (1).
Thus, it is necessary to improve the disturbance suppression
performance to achieve the island-mode operation with theminimized LC filter.

3.

0.0

(b) Current detection delay time is half the carrier period.

inverter with an LC filter. Owing to its simplicity, an H-bridge
single-phase two-level inverter is employed in this paper. In orderto reduce the inverter volume, the size of the LC filter is minimized.
In the island-mode operation, the output voltage is controlled byconfiguring the voltage controller with the filter capacitor of theoutput LC filter as the control object. The disturbance gain of theoutput current iout GD(s) when the voltage controller is constructedusing a PI controller is expressed ass

Measurement value(a) Without current detection delay time.

Fig. 2. Control block diagram of conventional closed-loopbased voltage control for island-mode operation. To improvethe disturbance suppression performance, the control responsemust be increased.

GD ( s ) 

Detection delay time: 0 s

0.2

vC
Filter capacitor current [A]Control System
DSP
iC*
1
*
PIDv
PIc
vC
+ + Vdc
iCdet
vCdet

0.4

Open-loop-based Voltage Control for IslandMode Operation

3.1 Current Detection Problem of Filter Capacitor
Figure 2 shows a conventional closed-loop-based island-mode
voltage control with a current controller consisting of a PI regulator.
In general, island-mode voltage control is carried out by a voltage
controller that has an inner loop of the current controller. Note thatthe disturbance suppression performance is improved by using thefilter capacitor current control (16). The disturbance for the voltage
controller, such as the load current, is included in the filter capacitor
current. Thus, the disturbance compensation for the output voltage
controller is not necessary by the filter capacitor current feedback
control. Moreover, it is necessary to increase the control response,
which is limited due to the controller hardware, to achieve the island
2

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Open-loop-based Island-mode Voltage Control Method (Satoshi Nagai et al.)current detection (11, 12) to solve above problem.
3.2 Proposed Open-loop-based Island-mode Voltage
Control
The resonant frequency of the filter is shifted to the highfrequency range when the LC filter is minimized. The transfer
function for the output voltage command with the open-loop
operation Gcom_OL(s) is expressed as
Gcom _ OL (s) Control System
DSP

+

1
Vdc

Vdc

+

iout
-

1 iL - ic
sL +

vc

1
sC f

fswTdeadVdcsign(vc*)

Fig. 4. Control block diagram of conventional open-loop-based
island-mode voltage control for island-mode operation.

1.................................................. (2).
s 2 LC f  1

Control System
FPGA *
vconv 1
+ +
Vdc
v̂dis
c

vc*

The transfer function becomes wide bandwidth for the output
voltage command vc* with the minimized LC filter by (2). Therefore,
an open-loop-based voltage control can be employed without theoccurrence of the output voltage resonance. Nevertheless, theoutput voltage with the open-loop-based voltage control varies
highly, dependent on the load, because the output voltage is not fed
back and is not regulated by the voltage controller. Furthermore, an
odd number of harmonic components occur in the output voltage
due to the nonlinear output current when a diode rectifier load isconnected to the inverter. Therefore, it is necessary to compensate
for the disturbance of the output current to obtain a stable andconstant output voltage regardless of the load.
Figure 4 shows the conventional open-loop-based island-mode
voltage control with typical dead-time compensation. The output
voltage error due to the dead-time error voltage is compensated byusing this method. However, the harmonic components due to anonlinear load, such as the diode rectifier, cannot be compensated.
Figure 5 shows the proposed VDCOLC. In order to achieve highgain compensation, the compensator is implemented by an FPGA.
Moreover, the compensator is operated as a DOB that compensates
for the disturbance due to the output current iout. The disturbance
estimation value vˆdis is expressed byvˆdis +vc*

Circuitvcs  cc+-s  cCircuit
vc
-

Vdc

vcdet

iout

+

e

1 iL - ic 1
sC f
sL +

vc

 sTd _ v

Fig. 5. Control block diagram of proposed VDCOLC for islandmode operation. To compensate for the output voltage in thehigh-gain, the DOB is implemented using an FPGA.
3.3

Application Area of Proposed Open-loop-based
Voltage Control for Island ModeIn the disturbance compensator of (3), the low-pass filter (LPF)
is implemented into the DOB in order to suppress the resonancecomponents of the LC filter for the voltage command in the voltage
controller. The resonant frequency of the LC filter fres_LC isexpressed as

f res _ LC 

1........................................................ (4).
2 LC f

In order to reduce the resonance component of the LC filter by using
an LPF, the cutoff frequency of the LPF is designed to be less than
1/10 to 1/2 for the resonant frequency of the LC filter fres_LC. Thus,
it is possible to reduce the effect of the LC filter resonance.
However, in order to increase the performance of the disturbancecompensator, it is necessary to increase the cutoff frequency of the
LPF. Due to the output current disturbance caused by the dioderectifier load, the odd-order harmonic components are included in
the inverter output voltage. For instance, when considering the
reduction of the harmonics to 11th order for the fundamental waveof the output voltage, the 11th order harmonic wave is 550 Hz when
the fundamental wave is 50 Hz. Thus, it is necessary to increase the
LPF cutoff frequency of the DOB to greater than 550 Hz. Therefore,
in order to consider the suppression of the harmonics to k order, theproposed method is applied subject to the following condition:

cc*vconv vcdet ................................ (3),s  cs  cwhere c is the cutoff angular frequency of the DOB; vconv* is thevoltage command after the disturbance compensation; and vcdet isthe detection value of the filter capacitor voltage.
Moreover, a grid-tied inverter is disconnected from the grid whena blackout or a long period voltage sag occurs in the grid and theinverter is only connected to the load. Switching behavior fromgrid-tied to island operation is determined by detection of theblackout or the long period voltage drop. The transition of the gridtied operation to island-mode operation is carried out when thefollowing conditions are detected: (i) drop of the grid voltage below
the threshold of the voltage drop defined by the FRT requirements,
such as the E.ON grid code (17); (ii) occurrence of a long period
voltage drop exceeding the FRT operation duration defined in the
FRT requirements (17). Thus, the voltage source inverter (VSI)
control is switched from the grid-tied operation with the current
control to the proposed voltage control for the island operation
mode when the above conditions are detected. Moreover, theproposed island mode operates with the DOB to obtain thesinusoidal waveforms based on the voltage command. Therefore, it
is possible to supply the power to the load during the transition
operation because the output voltage and frequency commands are
the same as the grid voltage and grid frequency. However, when anonlinear load, such as a diode rectifier load, is connected, an inrush
current prevention method, such as an initial charge circuit or an
output current limiter, is necessary to stabilize the inverter operation.

kf out  f c 

f res _ LCn ,  n : 2  10, f c  c  ................... (5),2 where fout is the frequency of the output voltage; and n is the ratio
for the resonant frequency of the LC filter fres_LC, which implies a
DOB cutoff frequency from 1/10 to 1/2 for the resonant frequencyof the LC filter. In this paper, the resonant frequency of the LC filter
is approximately 10 kHz, where L is 1.29 mH (%Z = 1.0%), and Cf
is 0.2 F (%Y = 0.25%); therefore, if k is eleven, it is possible tomeet (5). Furthermore, to compensate for the 11th order harmonic
without interfering with the resonant frequency of the LC filter, the
DOB cutoff frequency is set to 2 kHz.
Figure 6 shows the comparison of the disturbance gain
characteristics of a conventional closed-loop-based voltage control
and the proposed VDCOLC. The controller of the conventional
method is similarly constructed as in Fig. 2, where the angular
3

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Open-loop-based Island-mode Voltage Control Method (Satoshi Nagai et al.)frequency of the voltage controller is 3000 rad/s, and the angularfrequency of the current controller is 30 000 rad/s. Moreover, thedisturbance suppression gain is calculated from the transfer
function, where the output current iout is the input, and the output
voltage vc is the output. Furthermore, the disturbance suppression
performance is analyzed by sweeping the frequency of the
disturbance suppression gain from 1 Hz to 100 kHz, as shown in
Fig. 6; the disturbance gain is reduced with the proposed control
from 30 Hz to 1 kHz of the disturbance frequency, which includes
the harmonic components from 1st to 20th for the fundamental
frequency of the output voltage. Thus, it is possible to reduce theoutput voltage distortion by using the proposed method.

4.

Disturbance gain vc/iout [dB]

100

0
-50

Proposed method

-100
-150

1

10

100
1000
10000
Disturbance frequency [Hz]100000Fig. 6. Characteristics of disturbance gain from output current iout
to output voltage vc. The resonance due to the controller iseffected to the output voltage distortion with the conventional
method.

Simulation Results for Proposed VDCOLC

Table 1 shows the simulation conditions for the proposed method.
The LC filter parameter and the DOB cutoff frequency are changedin the simulation results.
Figure 7 shows the simulation results of the proposed methodwith the diode rectifier load. In Fig. 7(a), it is possible to suppress
the inverter output voltage THD to less than 5.0%, when theresonant frequency of the LC filter is 10 kHz (L = 1.29 mH; %Z =1.0%, Cf = 0.2 F; %Y = 0.25%), and the DOB cutoff frequency is
2 kHz. The LC filter parameter is designed to suppress the output
current overshoot with low inductance during the voltage sag (7). In
order to reduce the resonance of the output current at the voltage
fluctuation, the capacitance of the filter capacitor is designed to besmall. The inverter output voltage THD is 1.56%. Moreover, with
the DOB cutoff frequency lower than the resonant frequency of the
LC filter, it is possible to reduce the resonance component in the
inverter output voltage. Thus, the resonance component of theinverter output voltage in Fig. 7(a) does not occur, i.e., the conditionof Fig. 7(a) meets (5). In Fig. 7(b), the resonant frequency of the LC
filter and the DOB cutoff frequency are 2 kHz. The inverter output
voltage THD is higher than 5%; in addition, the resonance occurs
in the inverter output voltage. This is because the condition of Fig.
7(b) does not meet (5), i.e., the LC filter resonance component isincluded in the voltage command. In Fig. 7(c), the resonant
frequency of the LC filter is 10 kHz and the DOB cutoff frequency
is 200 Hz. The inverter output voltage THD is higher than 5.0% inthis condition. This is because the disturbance suppression
performance of the DOB decreases due to the low DOB cutoff
frequency. Thus, the inverter output voltage THD is worse for thediode rectifier load due to the disturbance. In addition, the deadtime error voltage compensation by the DOB is not effective
enough due to the low DOB cutoff frequency. In Fig. 7(d), theresonant frequency of the LC filter is 2 kHz and the DOB cutoff
frequency is 200 Hz. The inverter output voltage THD is also higher
than 5.0% in this condition. The inverter output voltage includes the
distortion due to the low resonant frequency of the LC filter.
Furthermore, the disturbance compensation value is not effective
enough for the diode rectifier load due to the low DOB cutoff
frequency. Thus, the inverter output voltage THD in Fig. 7(d) ishigher than the condition of Fig. 7(c). In conclusion, the proposed
method can only be applied in the area of (5).

5.

Conventional island mode

50

Table 1. Simulation conditions.
Output power Pout 1 kW

Carrier fre. fcry 80 kHz
Samp. fre.
DC link vol. Vdc 380 V
fso 80 kHz
of DOB
Output volt.
vc* 200 Vrms Crest factor
3.0
commandof load(b) Linear load, such as resistance load.
(c) Nonlinear load, such as diode rectifier load.
Table 2 shows the experimental conditions. By considering thefrequency of the voltage command as 50 Hz, the angular frequencyof the voltage controller for the conventional closed-loop-based
island-mode voltage control is designed to ten times the voltage
command frequency. Thus, the angular frequency is set to 3000
rad/s. Moreover, in order to prevent interference, the angularfrequency of the current controller is designed to ten times theangular frequency of the voltage controller. Thus, the angularfrequency of the current controller is set to 30 000 rad/s. Note thatthe minimized LC filter parameter is designed such that the FRT
requirements are met during the voltage sag (7). The island-mode
operations are compared with the conventional closed-loop-based
voltage control, the conventional open-loop-based island modewith dead-time error compensation, and the proposed VDCOLC.
5.1 No-load Operation
Figure 8 shows the experimental results for the no-load operation.
In Fig. 8(a), (b), and (c), the output voltage THD of the threemethods are suppressed to less than 5.0%. However, the inverter
output voltage THD in Fig. 8(a) is high in the conventional closedloop-based voltage control. This is because the filter capacitor
current detection has a delay time that is different from the half
period of the carrier, as shown in Fig. 3(c). Thus, it is impossible todetect the average value for the filter capacitor current. Therefore,
the inverter output voltage is distorted in Fig. 8(a). In particular, thedistortion of the inverter output voltage with the proposed method
is reduced by 70.2% compared with the conventional closed-loopbased voltage control. In addition, the output voltage in Fig. 8(a) ishigher than the voltage command due to the high gain of the current
controller. In order to regulate the output voltage in Fig. 8(a), it isnecessary to reduce the gain of the current controller. Moreover, theoutput voltage in Fig. 8(b) is also higher than the voltage commanddue to typical dead-time compensation. The dead-time error voltage
does not occur in the no-load operation. Thus, the output voltage
increases by the dead-time compensation value. On the other hand,Experimental Results

In the experimental verification of the island-mode operation,
three cases of load test are considered. The load conditions are as
follows:(a) No-load.
4

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Open-loop-based Island-mode Voltage Control Method (Satoshi Nagai et al.)600

THD: 1.56%200

Output voltage [V]Output voltage [V]

300

100
0
-100
-200

0
-200
-400

10

Output current [A]Output current [A]

200

-600
20

-300
15

5
0
-5
-10
-15

10 ms/div

10
0
-10
-20

(a) With high-resonant frequency LC filter.
300

THD: 5.07%

200
100
0
-100
-200

THD: 8.51%

200
100
0
-100
-200
-300
10

Output current [A]-300
10Output current [A]

10 ms/div(b) DOB cutoff frequency and LC filter resonant
frequency are the same.

Output voltage [V]Output voltage [V]

300

5
0
-5
-10

THD: 26.8%

400

10 ms/div

5
0
-5
-10

10 ms/div(c) With high-resonant frequency LC filter and low-DOB(d) DOB cutoff frequency and LC filter resonant
cutoff frequency.
frequency are low.
Fig. 7. Simulation results for any condition of resonant frequency of LC filter and DOB cutoff frequency with the proposed VDCOLC.
The inverter output voltage THD is suppressed to less than 5% when (5) is met.
Table 2. Experimental conditions.

the output voltage in Fig. 8(c) is almost same compared with thevoltage command.
5.2 Linear-load Operation
Figure 9 shows the experimental results for the linear load
operation. In Fig. 9(a), (b), and (c), the output voltage THD at the
rated power with three methods are also suppressed to less than
5.0%. The inverter output voltage THD in Fig. 9(a) is highcompared with both methods of Fig. 9(b) and (c), for the same
reason as in Fig. 8(a). In particular, the inverter output voltage THDwith the proposed method is improved by 61.4% compared with theconventional closed-loop-based voltage control at the rated load. In
addition, the output voltage in Fig. 9(a) is higher than the voltage
command for the same reason as in Fig. 8(a). Moreover, the output
voltage in Fig. 9(b) decreases due to the load current compared with
Fig. 8(b). On the other hand, the output voltage in Fig. 9(c) is almost

Output power Pout 1 kW
fcry 80 kHz
Carrier fre.
DC link vol. Vdc 380 V
Samp. fre. of DSP fs 20 kHz
Output volt. vc* 200 Vrms
Angl. fre. of AVR avr 3000 rad/s
command
Inter. Induc. L 1.29 mH Angl. fre. of ACR acr 30000 rad/s(1.0%)(%Z)
Samp. fre. of DOB fso 80 kHz
Filter cap.
Cf 0.2 F(0.25%) Cutoff fre. of DOB fc 2 kHz(%Y)

the same as the voltage command.
Figure 10 shows the output voltage THD characteristic and theoutput voltage variation against the linear load. In Fig. 10(a), theoutput voltage THD with the proposed method is reduced more
effectively than with the conventional closed-loop-based voltage
control. The maximum improvement of the output voltage THD is
5

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Open-loop-based Island-mode Voltage Control Method (Satoshi Nagai et al.)Output voltage 250 V/div

THD: 3.69%

Output voltage 250 V/div

0

THD: 3.08%0Output voltage: 208 Vrms

Output voltage: 209 Vrms

00

Output current 5 A/div
Output current 5 A/div

4 ms/div(a) Conventional closed-loop-based voltage control.
Output voltage 250 V/div

4 ms/div(a) Conventional closed-loop-based voltage control.

THD: 1.83%

Output voltage 250 V/div

0

THD: 1.57%0Output voltage: 184 Vrms

Output voltage: 208 Vrms

00

Output current 5 A/div

Output current 5 A/div

4 ms/div(b) Conventional open-loop-based voltage control.
Output voltage 250 V/div

4 ms/div(b) Conventional open-loop-based voltage control.

THD: 1.10%

Output voltage 250 V/div

0

THD: 1.19%0Output voltage: 203 Vrms

Output voltage: 203 Vrms

00

Output current 5 A/div
Output current 5 A/div

4 ms/div

4 ms/div(c) Proposed VDCOLC.
Fig. 8. Experimental results for no-load operation. The output
voltage THD is suppressed to less than 5.0% in both theconventional method and the proposed method.

(c) Proposed VDCOLC.
Fig. 9. Experimental results for linear load operation at rated
load. The output voltage THD is suppressed to less than 5.0%
in both the conventional method and the proposed method.

80.8% at a load of 0.9 p.u. Moreover, the inverter output voltage
THD characteristic with the conventional open-loop-based islandmode or the proposed method are approximately constant comparedwith the conventional closed-loop-based voltage control in the load
range from 0 p.u. to 1.0 p.u. The cause of the difference for the
inverter output voltage THD with the conventional closed-loopbased voltage control is that the variation in the load current causes
the error of the filter capacitor average current detection value. Dueto the detection error of the filter capacitor average current, theinverter output voltage becomes a non-sinusoidal wave. Thus, theoperation of the conventional closed-loop-based voltage control
becomes unstable. On the other hand, in Fig. 10(b), the inverter
output voltage with the conventional closed-loop-based voltage
control is almost constant in the load range from 0 p.u. to 1.0 p.u.
This is because the voltage controller regulates the inverter output

voltage. However, the output voltage with the conventional openloop-based voltage control varies significantly depending on theload. This is because the inverter output voltage decreases due tothe decrease in the filter capacitor current by the load current. On
the other hand, the output voltage with the proposed method isconstant. In the proposed control, the DOB uses the detection valueof the output voltage to estimate the output current and thencompensates for the disturbance of the output current. On otherperspective, the output voltage is indirectly regulated by a feedback
loop in the DOB. Therefore, in the proposed method, it is possible
to have the inverter output a constant voltage during the islandmode with a linear load.
5.3 Nonlinear-load Operation
Figure 11 shows the experimental results for the nonlinear load
operation. The diode rectifier is applied as a nonlinear load. The
6

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Open-loop-based Island-mode Voltage Control Method (Satoshi Nagai et al.)Output voltage THD [%]5.0

THD: 6.76%

Output voltage 250 V/div

Conventional closed-loop
method

4.0

0

3.0

Open-loop withdead time compensation

Output voltage: 208 Vrms

2.0
0

1.0
Proposed method
0

0

0.2
0.4
Output power [p.u.]

0.6
0.8(1.0 p.u. = 1 kW)

Output current 10 A/div

1.0(a) Conventional closed-loop-based voltage control.

(a) Output voltage THD characteristic with linear load.
215

4 ms/div

THD: 6.75%

Output voltage 250 V/div

Conventional closed-loop method

Output voltage [Vrms]

210
205

0

Proposed method200

Output voltage: 205 Vrms

195
Open-loop withdead time compensation

190
185
180

0

0.2
0.4
Output power [p.u.]

0

0.6
0.8
(1.0 p.u. = 1 kW)

Output current 10 A/div

1.0

4 ms/div(b) Conventional open-loop-based voltage control.

(b) Output voltage variation with linear load.
Fig. 10. Relationship between output voltage and resistive
load in 1-kW system. By the proposed method, the output
voltage THD is better than for the other two methods. In
addition, the output voltage is constant.

Output voltage 250 V/div

THD: 1.19%

0crest factor of the diode rectifier load is approximately 3.0. The
output voltage THD is higher than 5.0% when using theconventional closed-loop-based voltage control and theconventional open-loop-based island mode, as shown in Fig. 11(a)and (b). The inverter output voltage with the conventional closedloop-based voltage control distorts due to the reduction of the
disturbance suppression performance by the low capacitance of thefilter capacitor and the error of the filter capacitor average current
detection. In particular, the disturbance compensation is noteffective enough for the output current control with the nonlinear
load. Moreover, the inverter output voltage with the conventional
open-loop-based island mode also distorts due to the non-sinusoidal
output current that flows during the output voltage peak. On theother hand, by using the proposed method, as shown in Fig. 11(c),the output voltage THD is less than 5.0%. It is possible tocompensate for the voltage drop due to the open-loop-based
operation with the high-gain DOB in the proposed method. Thus,
the inverter output voltage becomes a sinusoidal wave even withthe diode rectifier load. Therefore, it is possible to suppress theoutput voltage THD by using the proposed method.
Figure 12 shows the THD characteristic and the output voltage
variation against the nonlinear load. In Fig. 12(a), the output voltage
THD with the proposed method is reduced more effectively thanwith the conventional closed-loop-based voltage control or theconventional open-loop-based voltage control. The maximum
improvement of the output voltage THD with the proposed method
compared with the conventional closed-loop-based voltage control
at the heavy nonlinear load is 82.4%. Moreover, in Fig. 12(b), theOutput voltage: 203 Vrms

0

Output current 10 A/div

4 ms/div(c) Proposed VDCOLC.
Fig. 11. Experimental results for diode rectifier load operation.
By using the proposed method, the output voltage THD is
reduced to 1.19% with the nonlinear load.
output voltage with the conventional open-loop-based island mode
decreases greatly at the heavy nonlinear load. On the other hand,the output voltage with the conventional closed-loop-based voltage
control and the proposed method has a constant value. Thus, in the
proposed method, it is possible to have the inverter output aconstant voltage during the island mode with a nonlinear load.
Therefore, it is confirmed that by using the proposed method, theoutput voltage is constant regardless of any conditions of load, i.e.,
linear/nonlinear load, or light/heavy load.

6. Conclusion
This paper proposed an open-loop-based island-mode voltage
control with high-gain disturbance compensation when the LC filter
is minimized. Moreover, the application area of the proposed
method is clarified by the DOB cutoff frequency and the resonant

7

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Open-loop-based Island-mode Voltage Control Method (Satoshi Nagai et al.)(7)

Output voltage THD [%]8.0

Output capacitance of rectifier
7.0 : 1300 F
6.0

(8)

Conventional closed-loop
method

5.0
4.0
3.0
2.0

(9)

Open-loop withdead time compensation
Proposed method

1.0
0
0.1

(10)

0.2
0.3
0.4
0.5
0.6
Output power [p.u.] (1.0 p.u. = 1 kW)

0.7(a) Output voltage THD characteristic with nonlinear load.

Output voltage [Vrms]

(11)

212
Output capacitance of rectifier: 1300 F
211
210
Conventional closed-loop
method209
208
207
Open-loop with
206
dead time compensation
205
Proposed method
204
203
202
0.1
0.2
0.3
0.4
0.5
0.6
0.7
Output power [p.u.] (1.0 p.u. = 1 kW)

(12)

(13)

(14)

(b) Output voltage variation with nonlinear load.
Fig. 12. Relationship between output voltage and rectifier loadin 1-kW system. By using the proposed method, the output
voltage THD is suppressed to less than 5%. Moreover, theoutput voltage is constant.

(15)

frequency of the LC filter. By using the proposed method, theoutput voltage is constant in the island mode regardless of any
conditions of load. Furthermore, the output voltage THD with theproposed method is suppressed to less than 5.0%. In particular, theoutput voltage THD was improved by 82.4% compared with theconventional closed-loop-based voltage control when the nonlinear
load was connected. Therefore, the proposed method wasconfirmed as to the utility of the island mode with the minimized
LC filter.

(17)

(16)

Satoshi Nagai(Student member) received his B.S. and M.S.
degrees in electrical and electronics engineering from
Niigata University, Niigata, Japan in 2011, andelectrical, electronics and information engineeringfrom Nagaoka University of Technology, Niigata,Japan in 2017, respectively. Since 2011, he has beenwith Diamond Electric Mfg. Co., Ltd., Japan.
Presently, he is a Ph.D. candidate at Nagaoka
University of Technology, Niigata, Japan. He is the student member of IEEJ
and IEEE. His current research interests include control techniques anddesign of grid-tied systems.

References
(1)

(2)

(3)

(4)

(5)

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Jun-ichi Itoh

(Senior member) received his M.S. and Ph.D. degree
in electrical and electronic systems engineering from
Nagaoka University of Technology, Niigata, Japan
in 1996, 2000, respectively. From 1996 to 2004, he
was with Fuji Electric Corporate Research andDevelopment Ltd., Tokyo, Japan. He was with
Nagaoka University of Technology, Niigata, Japanas an associate professor. Since 2017, he has been aprofessor. His research interests are matrix converters, dc/dc converters,
power factor correction techniques, energy storage system and adjustablespeed drive systems. He received IEEJ Academic Promotion Award (IEEJ

8

IEEJ Trans. ●●, Vol.●●, No.●, ●●●Open-loop-based Island-mode Voltage Control Method (Satoshi Nagai et al.)Technical Development Award) in 2007. In addition, he also received Isao
Takahashi Power Electronics Award in IPEC-Sapporo 2010 from IEEJ, 58th
OHM Technology Award from The Foundation for Electrical Science andEngineering, November, 2011, Intelligent Cosmos Award from Intelligent
Cosmos Foundation for the Promotion of Science, May, 2012, and Third
prize award from Energy Conversion Congress and Exposition-Asia, June,
2013. Prizes for Science and Technology (Development Category) from theCommendation for Science and Technology by the Minister of Education,
Culture, Sports, Science and Technology, April 2017. He is a senior memberof the Institute of Electrical Engineers of Japan, the Society of Automotive
Engineers of Japan and the IEEE.

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IEEJ Trans. ●●, Vol.●●, No.●, ●●●