Ethernet POWERLINKPart B: Multiple-ASnd
EPSG Draft Standard V1.1.1

EPSG Draft Standard 302-B

Ethernet POWERLINKPart B: Multiple-ASnd

Version 1.1.1©

B&R(B&R Industrial Automation GmbH)
2023

EPSG DS 302-B V1.1.1-2-

B&R Industrial Automation GmbH

POWERLINK-Office
B&R Straße 15142 Eggelsberg
Austria

powerlink.office@br-automation.com
https://www.br-automation.com/en/technologies/powerlink/

The EPSG Draft Standard 302-B “Ethernet Powerlink, Part B: Multiple-ASnd” has been provided by
Ethernet POWERLINK Standardisation Group (hereinafter referred to as “EPSG”). As a consequenceof the EPSG being dissolved from March 31st, 2023, B&R Industrial Automation GmbH will – as theformal successor of EPSG regarding the rights and content – make the Ethernet Powerlink Part B:
Multiple-ASnd available as open source on it’s own website subject to the conditions mentioned in thedisclaimer under clause Pre. 1 of this document. B&R Industrial Automation GmbH especiallydisclaims liability for any personal injury, property or other damage, of any nature whatsoever, whether
special, indirect, consequential, or compensatory, directly or indirectly resulting from the publication,use of, or reliance upon this, or any other EPSG Standard document.

EPSG DS 302-B V1.1.1

Pre. 1-3-Disclaimer

Use of this EPSG Standard is wholly voluntary. The EPSG disclaims liability for any personal injury,
property or other damage, of any nature whatsoever, whether special, indirect, consequential, orcompensatory, directly or indirectly resulting from the publication, use of, or reliance upon this, or any
other EPSG Standard document.
The EPSG does not warrant or represent the accuracy or content of the material contained herein,and expressly disclaims any express or implied warranty, including any implied warranty ofmerchantability or fitness for a specific purpose, or that the use of the material contained herein is freefrom patent infringement. EPSG Standards documents are supplied “AS IS”.
The existence of an EPSG Standard does not imply that there are no other ways to produce, test,
measure, purchase, market, or provide other goods and services related to the scope of the EPSG
Standard. Furthermore, the viewpoint expressed at the time a standard is approved and issued issubject to change brought about through developments in the state of the art and comments received
from users of the standard. Users are cautioned to check to determine that they have the latest editionof any EPSG Standard.
In publishing and making this document available, the EPSG is not suggesting or rendering
professional or other services for, or on behalf of, any person or entity. Nor is the EPSG undertaking toperform any duty owed by any other person or entity to another. Any person utilizing this, and anyother EPSG Standards document, should rely upon the advice of a competent professional indetermining the exercise of reasonable care in any given circumstances.
Interpretations: Occasionally questions may arise regarding the meaning of portions of standards as
they relate to specific applications. When the need for interpretations is brought to the attention of the
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represent a consensus of concerned interests, it is important to ensure that any interpretation has also
received the concurrence of a balance of interests. For this reason, the EPSG and its members are
not able to provide an instant response to interpretation requests except in those cases where thematter has previously received formal consideration.
Comments for revision of EPSG Standards are welcome from any interested party, regardless ofmembership affiliation with the EPSG. Suggestions for changes in documents should be in the form ofa proposed change of text, together with appropriate supporting comments. Comments on standards
and requests for interpretations should be sent to the address given on the page before.

Pre. 1.1

Patent noticeAttention is called to the possibility that implementation of this standard may require use of subject
matter covered by patent rights. By publication of this standard, no position is taken with respect to theexistence or validity of any patent rights in connection therewith. B&R shall not be responsible for
identifying patents for which a license may be required by an EPSG standard or for conducting
inquiries into the legal validity or scope of those patents that are brought to its attention.

EPSG DS 302-B V1.1.1-4-Pre. 2

History

Vers.
0.0.0
0.0.1

Date
2006-09-22
2006-10-18

Author
S. LimalS. Limal

AlstomAlstom

0.0.2
0.0.3

2006-10-30
2006-11-17

S. LimalF. Matejka

AlstomB&R

S. Limal

Alstom

0.0.4
0.0.5

2007-10-25

S. Potier

Alstom

0.0.6

2008-01-08

S. Potier

Alstom

0.0.7

2008-01-28

S. Kirchmayer

B&R

0.1.0

2008-02-06

S. Kirchmayer

B&R

0.1.1
1.0.0
1.0.1
1.0.2
1.0.3
1.1.0

2008-04-15
2008-07-23
2013-01-29
2013-11-15
2016-04-11
2016-06-22

S. Kirchmayer
S. Kirchmayer
S. Kirchmayer
S. Kirchmayer
S. Kirchmayer
S. Kirchmayer

B&R
B&R
B&R
B&R
B&R
B&R

1.1.0a1.1.1

2021-08-21
2023-05-23

S. Kirchmayer
S. Kirchmayer

B&R
B&R

short description
Creation Multiple-PRes part
Modifications after 6/10/06 and 13/10/06 conference calls and Addition
Multiple-ASnd part
Modifications after WSP V0.0.1 feedbacks
Formal changes in header and cover page. Changed status to working
draft proposal (not approved by TWG yet). File name changed to reflect
document status.
MultiMessage document split in MultiplePRes and Multiple-ASnddocuments as recommended by the TWG.
- Timing information for sending of AInv added.
- Indication that AInv is a unicast message which type is 0x0D (13)added.
- Sub-Index 04h ASndMaxNumber changed to Sub-Index 03h andcomments reworded.
- Description for bit 15 of object 1F81h changed.
- Chapter on Additional Device description entries removed- Consistency with communication profile specification reviewed.
Comments from Stephan Kirchmayer taken into account
Change EPSG address to new POWERLINK office
Default value of sub-index 3 of 1F8A was not changed from 4
to 3
Some changes in chapter names and orderSome minor modifications in wording- Typos corrected- Obj. 1F81h bit 15 changed to a positive logic.
- Fig.6 moved to new chapter ‘MN Cycle State Machine’- Minor layout and wording changes- Status changes from WDP to DSP.
- Bit offset of flag in NMT_NodeAssignment_AU32 changes.
Status changes from DSP to DS
D_NMT_CNMaxAInv_U32 added
Proposal Overview renamed to Overview
Status changed from WDP to DSP- New office address- Allignment with DS 301 V1.3.0- Wording improved- Double definitions and not used abbreviations removed- Additional device description entry for MN- Status changes from DSP to DS
Typos and other corrections© B&R due to dissolution of the EPSGEPSG DS 302-B V1.1.1

Pre. 3Pre. 1Pre. 1.1
Pre. 2Pre. 3Pre. 4Pre. 5Pre. 6Pre. 6.1
Pre. 6.2
Pre. 7
1
2
3
4
4.1
4.2
4.3
5
5.1
5.1.1
5.1.2
5.1.3
5.2
5.2.1
5.2.2
5.2.3
5.3
6
7

-5-

Content
Disclaimer
Patent noticeHistory
Content
TablesFiguresDefinitions and Abbreviations
Definitions
Abbreviations
References
Introduction
Overview
AInv Frame Structure
Additional Object Description
Object 1F8Ah: NMT_MNCycleTiming_REC
Object 1F82h: NMT_FeatureFlags_U32
Object 1F81h: NMT_NodeAssignment_AU32
Cycle State Machines
Multiple-ASnd MN Cycle State Machine
New Event
MN Cycle State MachineTransitions
Multiple-ASnd CN Cycle State Machine
New Event
CN Cycle State MachineTransitions
Non Multiple-ASnd CN Cycle State Machine
Additional Device Description Entry
Conclusion

3
3
4
5
6
7
8
8
9
10
11
13
14
15
15
16
16
17
17
17
18
19
19
19
20
21
22
23
24

EPSG DS 302-B V1.1.1

Pre. 4
Tab. 1
Tab. 2
Tab. 3
Tab. 4
Tab. 5-6-

TablesPOWERLINK AInv Frame structure
Multiple-ASnd NMT_FeatureFlags_U32 additional bit interpretation
Multiple-ASnd NMT_NodeAssignment_AU32 additional bit assignment
MN Cycle State Machine transitions modified to allow Multiple-ASnd
CN Cycle State Machine transitions modified to allow Multiple-ASnd

14
16
16
19
22

EPSG DS 302-B V1.1.1

Pre. 5
Fig. 1.
Fig. 2.
Fig. 3.
Fig. 4.
Fig. 5.
Fig. 6.

-7-

Figures
Example of POWERLINK achievable cycle
11
Example of POWERLINK multiplexed cycle.
11
Example of POWERLINK cycle with Multiple-ASnd
12
Example of POWERLINK with Multiple-ASnd cycle and 3 asynchronous exchanges
configured.
13
MN Cycle State Machine valid for MN NMT states NMT_MS_OPERATIONAL,
NMT_MS_READY_TO_OPERATE and NMT_MS_PRE_OPERATIONAL_2
18
CN Cycle State Machine, valid for CN NMT states NMT_MS_OPERATIONAL,
NMT_MS_READY_TO_OPERATE and NMT_MS_PRE_OPERATIONAL_2
20

EPSG DS 302-B V1.1.1-8-Pre. 6

Definitions and Abbreviations

Pre. 6.1

Definitions

Communication Slot

Umbrella term for Asynchronous or isochronous communication slot.
In the isochronous phase the communication slot consists of the PReq andPRes messages for a particular node or one PResMN message to all nodes
In the asynchronous phase the communication slot consist of the SoA and
ASnd (or any frame) messages, the AInv and ASnd (or any frame) messages
or one ASnd (or any frame) from the MN message.

EPSG DS 302-B V1.1.1

Pre. 6.2-9-Abbreviations

AInv

Asynchronous Invite

ASnd

Asynchronous Send

CN

Controlled NodeCS

Communication Slot

MN

Managing Node

PDO

Process Data Object

PReq

Poll Request

PRes

Poll Response

SDO

Service Data Object

SoA

Start of Asynchronous

SoC

Start of CycleEPSG DS 302-B V1.1.1

Pre. 7[1]-10-References

EPSG Draft Standard 301 (EPSG DS 301), Ethernet POWERLINK, Communication Profile
SpecificationEPSG DS 302-B V1.1.1-11-

Introduction

1

With respect to the POWERLINK Communication Profile Specification [1], a current POWERLINK
cycle timing is set the way illustrated by the following figure.

MN
FramesCS

Communication slot

Communication slot

SoC

PReq toCN1

PReq toCN2

CS

Communication slot

PResfrom MN

SoA

PRes
from
CN1

CN
Frames

PRes
from
CN2

ASnd

Isochronous Phase

Idle
Phase

t

Asynchronous Phase
Cycle

Fig. 1.

Example of POWERLINK cycle

Only one ASnd can be sent each cycle in the asynchronous phase (sender is elected by MN).
We consider an application with a given POWERLINK cycle time in which the process does not
require the lowest possibly reachable cycle time. This could result in a long idle phase. Depending on
the number of nodes the isochronous phase is guaranteed but the ASnd frame rate sticks to one ASnd
per cycle.
However the more nodes are on the network, the more number of ASnd messages are required to
manage configuration, monitor status or do any other SDO communication.
The current POWERLINK Communication Profile Specification [1] allows improving the ASnd frame
rate by means of multiplexed communication, like in Fig. 2.
The multiplexed cycle time equals the time required by the process. All POWERLINK cycles of thismultiplexed cycle enable one asynchronous exchange each.
By this a better ASnd frame rate will be achieved than configuring one POWERLINK cycle with cycle
time equal to the time required by the process.
This may result in over solicitation of nodes. More SoCs will have to be processed for the sameprocess-given cycle. Moreover configuration may become more complicated. Finally, this might
increase the message total error probability.
SoC

PRes
from
MN

PReq
to CN1

PRes
from
CN1

Fig. 2.

SoA

SoC

PReq
to CN2

SoA

SoC
t

ASnd

PRes
from
CN2

ASnd

Example of POWERLINK multiplexed cycle.

The purpose of this specification is to define Multiple-ASnd per POWERLINK cycle in order to achieve
the following cycle timing (Fig. 3).

EPSG DS 302-B V1.1.1

SoC

PReq
to CN1

PRes
from
MN

PReq
to CN2

PRes
from
CN1

Fig. 3.

-12-

PRes
from
CN2

SoA

AInv

SoC
t

ASnd

ASnd

Example of POWERLINK cycle with Multiple-ASnd

POWERLINK Multiple-ASnd improves the asynchronous performances of POWERLINK thanks to an
optimized use of the asynchronous phase. It allows POWERLINK to offer best performance toapplications which have no need for very short cycle time but have a need for large asynchronous
bandwidth.
The Multiple-ASnd specification is an add-on of the POWERLINK Communication Profile Specification[1]. It is designed in a way to ensure full compatibility with standard POWERLINK devices.

EPSG DS 302-B V1.1.1-13-

Overview

2

The introduction shows that some applications may have less requirements to the minimum cycle timethan POWERLINK is offering. Such applications could result in a POWERLINK timing with a long idle
phase This long idle phase is used to improve the performance of the asynchronous exchanges.
This specification describes how multiple asynchronous frames (Multiple-ASnd) are achieved bytaking advantage of a possibly introduced long idle phase: The Multiple-ASnd feature avoids the useof the multiplex feature when having a lot of nodes, with the same required sending rate, only because
the asynchronous frame rate needs to be increased.
This specification mainly relies on the definition of a new POWERLINK message type ID.
The new POWERLINK datagram “AsynchronousInvite” (AInv) shall be sent in a unicast manner tonodes handling Multiple-ASnd. This AInv message shall not occur if SoA has not yet been sent (Figure4). Current nodes are supposed to discard it since they do not recognize this new message extension(cf. [1]).
The Multiple-ASnd extension is also based on planning the maximum number of asynchronous
messages per cycle during configuration.

MN
FramesSoC

Communication Slot

Communication SlotCS

Communication SlotCS

Communication Slot

PReq
to
CN1

PReq
to
CN2

PRes
from
MN

SoA

ASnd

AInv

Idle
Phase

t

CNs
FramesFig. 4.

PRes
from
CN1

PRes
from
CN2

ASnd

ASnd

Example of POWERLINK with Multiple-ASnd cycle and 3 asynchronous exchanges
configured.

As an ASnd could be sent in a unicast manner from a CN to another CN, the MN does not receive
such an ASnd. So the sending of AInv by the MN cannot be based on reception of a previous ASndand shall be triggered by a timeout. This timeout shall be computed in the following manner:
AInvSendingTimeout=((C_DLL_T_MIN_FRAME+
C_DLL__T_PREAMBLE)+
AsyncSlotTimeout_U32 + (AsyncMTU_U16*8*C_DLL_T_BITTIME + C_DLL_T_PREAMBLE))
In order to ensure a minimum idle phase, an AInv message shall not be sent in the following cases:•
Time remaining before next SoC is less or equal to the value of AInvSendingTimeout•
Number of ASnd sending has reached ASndMaxNumber.

EPSG DS 302-B V1.1.1-14-

AInv Frame Structure3

Bit Offset
Octet Offset

7

0

Res

Tab. 1

6

5

4

3

2

1

0

EA

ER

Res

Message Type1

Destination2source3

NMTStatus

4

Res

Res

5

Res

Res

Res

Res

Res

Reserved

6

RequestedServiceID

7

RequestedServiceTarget

8

EPLVersion

9-45

Reserved

Reserved

POWERLINK AInv Frame structure

The AInv is a new message type (value is 13 = 0x0D1) sent in a unicast manner. Only nodes
supporting this new message type may be requested by AInv (support indicated by object 1F81h
bit13, see chapter 4.3).
The AInv message has nearly the same functionalities as the SoA, but does not start theasynchronous phase.
If there is no pending request for an asynchronous communication slot, no AInv message shall be
sent.
If a pending asynchronous communication slot is assigned to the MN itself, no AInv message shall besent, the MN skips it and sends its ASnd directly.

1 AInv 13d=1101b, SoA 5d=0101b. So one filter may be used for both message types.

EPSG DS 302-B V1.1.1

-15-

4

Additional Object Description

4.1

Object 1F8Ah: NMT_MNCycleTiming_REC••

Sub-Index

1F8Ah

Object CodeName

NMT_MNCycleTiming_REC

Data Type

NMT_MNCycleTiming_TYPE Category

RECORDM

Sub-Index 00h: NumberOfEntries

Sub-Index

00h

Name

NumberOfEntries

Value Range

3 .. 4

AccessRo

Default Value-PDO MappingNo

Sub-Index 02h: AsyncSlotTimeout_U32

Sub-Index

02h

Name

AsyncSlotTimeout_U32

Data TypeUNSIGNED32

CategoryO

Value Range>=250

AccessRw, valid on reset

Default Value

100 000

PDO Mapping

No

The sub-index describes the worst case time interval in ns between the end of the SoA resp.
AInv transmission and the beginning of the reception of an ASnd frame issued by a CN.
This sub-index is used in the computation of the timeout used to trigger sending of AInv
messages. Please refer to the chapter “Overview” for details.
•

Sub-Index 03h: ASndMaxNumber

Sub-Index

03h

Name

ASndMaxNumber

Data Type

Unsigned8

Value Range

1..
Access
D_NMT_MNMaxAsynchronousSlots_U8

Rw, valid on
reset

Default Value

1

No

Category

PDO Mapping

M

ASndMaxNumber indicates the maximum number of ASnd which can be sent within one
POWERLINK cycle.
During cycle time computation ASndMaxNumber shall be taken into consideration. The cycle
time computation shall ensure that at least ASndMaxNumber ASnd frames can be sent in theasynchronous phase.
If ASndMaxNumber equals to 1, the asynchronous phase is as defined in the current
POWERLINK specification [1]. No AInv message shall be sent.

EPSG DS 302-B V1.1.1-16-

An AInv message cannot be sent since the number of sent ASnd messages reaches
ASndMaxNumber value.

4.2

Object 1F82h: NMT_FeatureFlags_U32

The Feature Flags indicate communication profile specific properties of the device given by its design.
The object shall be setup by the device firmware during system initialisation.
Octet
2

Bit
16
17…23

Tab. 2

4.3

Name
Multiple-ASnd
SupportRes

TRUE
Device supports
Multiple-ASnd
--

FALSE
Device doesn’t
Multiple-ASnd--

supportMultiple-ASnd NMT_FeatureFlags_U32 additional bit interpretation

Object 1F81h: NMT_NodeAssignment_AU32

The NMT_NodeAssignment_AU32 allows the MN to know if it is possible to send an AInv message tothis CN. This bit may be set only if the corresponding feature flag on the CN is set.
Octet

Bit

value

Description

Property

Evaluate

1

13

0b

Multiple-ASnd disabledCN

MN, CN

1b

Multiple-ASnd enabled

Tab. 3

Multiple-ASnd NMT_NodeAssignment_AU32 additional bit assignmentEPSG DS 302-B V1.1.1

5

-17-

Cycle State Machines

The
CN
and
MN
cycle
state
machinesforstates
NMT_MS_OPERATIONAL,
NMT_MS_READY_TO_OPERATEandNMT_MS_PRE_OPERATIONAL_2
respective
NMT_CS_OPERATIONAL,
NMT_CS_READY_TO_OPERATEandNMT_CS_PRE_OPERATIONAL_2 are almost the same as in [1], only the management of the new
AInv message type has to be added in transitions between the states.

5.1

Multiple-ASnd MN Cycle State Machine

5.1.1

New Event

DLL_ME_ASND_TIMEOUT: This event is produced when the ASnd frame was not (or not completely)received within a preconfigured time since SoA or AInv has been sent.

EPSG DS 302-B V1.1.1-18-

MN Cycle State Machine

5.1.2

DLL_MS_NON_CYCLIC(DLL_MT0)
DLL_ME_SOC_TRIG

DLL_MS_CYCLIC

DLL_MS_
WAIT_SOC_TIME(DLL_MT7)
DLL_ME_SOC_TIMEOUT(DLL_MT1)
DLL_ME_SOC_TRIG(DLL_MT3)
DLL_ME_PRES
DLL_ME_PRES_TIMEOUT(DLL_MT5)
DLL_ME_SOC_TRIG(DLL_MT4)
DLL_ME_PRES
DLL_ME_PRES_TIMEOUTDLL_MS_
WAIT_PRES(DLL_MT2)
DLL_ME_PRES
DLL_ME_PRES_TIMEOUT

Fig. 5.

(DLL_MT6)
DLL_ME_SOC_TRIG(DLL_MT8)
DLL_ME_ASND_TIMEOUTDLL_ME_SOC_TRIG
DLL_ME_ASND

DLL_MS_
WAIT_ASND(DLL_MT9)
DLL_ME_SOC_TRIG

MN Cycle State Machine valid for MN NMT states NMT_MS_OPERATIONAL,
NMT_MS_READY_TO_OPERATE and NMT_MS_PRE_OPERATIONAL_2

EPSG DS 302-B V1.1.1

5.1.3
DLL_MT3

DLL_MT7

DLL_MT8

Tab. 4•••-19-

Transitions
DLL_ME_PRES [ isochr = 0 & async_in = 0] / send PRes [isochr_out != 0], SoA and
ASnd [async_out!= 0]
DLL_ME_PRES_TIMEOUT [ isochr = 0 & async_in = 0] / send PRes [isochr_out != 0],
SoA and ASnd [async_out != 0 & ], report error DLL_MEV_LOSS_PRES
The
isochronous
phase
ends
with
eithera
DLL_ME_PRESora
DLL_ME_PRES_TIMEOUT (configurable via NMT_MNCNPResTimeout_AU32[NodeID]). If there is no more communication to be done (neither isochronous nor
asynchronous), the MN sends a SoA frame and changes the state to
DLL_MS_WAIT_SOC_TRIG.
If there are outgoing asynchronous communications to be done in the current cycle, the
MN sends these frames after the SoA since enough time is remaining.
DLL_ME_SOC_TRIG [ isochr = 0 & async_in = 0] / send SoC, PRes [isochr_out != 0],
SoA and ASnd
[async_out != 0]
Immediately after the DLL_ME_SOC_TRIG event a SoC frame will be sent, thecommunication with the NMT State Machine will be done.
If there is no communication to be done, then a SoA frame is additionally sent. The state
doesn’t change. If there is outgoing asynchronous communication to be done in thecurrent cycle, the MN sends these frames after the SoA since enough time is remaining.
DLL_ME_SOC_TRIG [ isochr = 0 & async_in != 0 ] / send SoC and SoA with Invite
DLL_ME_ASND [ ] / process the frame, send AInv [async_in != 0 & AsyncSlot_OK !=0]or send ASnd [async_out!= 0 & AsyncSlot_OK !=0]
DLL_ME_ASnd_TIMEOUT/ send AInv [async_in != 0 & AsyncSlot_OK !=0] or send
ASnd [async_out!= 0 & AsyncSlot_OK !=0]
Immediately after the DLL_ME_SOC_TRIG a SoC frame will be sent. Then, thecommunication with the NMT State Machine will be done. If there are only asynchronous
frames to send, the SoA frame will be send. If the asynchronous communication is
directed to a CN, an ASnd frame will be sent additionally.
Since enough time is remaining, depending on its queuing policy, MN can send ASnd or
AInv to enable other asynchronous communication slot dynamically.
MN Cycle State Machine transitions modified to allow Multiple-ASnd„async_in != 0" means that some invite shall be sent in this cycle and some ASnd or some non
POWERLINK frame could be received.
“async_out != 0” means that some ASnd shall be sent (only, no invite is needed) in this cycle
after a SoA was sent.
AsyncSlot_OK !=0 means that there is enough time before SoC to insert an asynchronous
communication slot

5.2

Multiple-ASnd CN Cycle State Machine

5.2.1

New Event

DLL_CE_AINV: This event signals that a POWERLINK AInv frame was received from the MN.

EPSG DS 302-B V1.1.1

5.2.2

-20-

CN Cycle State Machine
DLL_CS_CYCLIC(DLL_CT4)
DLL_CE_PREQ
DLL_CE_PRES
DLL_CE_SOA
DLL_CE_AInv
DLL_CE_ASND
DLL_CE_FRAME_TIMEOUTDLL_CS_
WAIT_SOADLL_CS_
WAIT_SOC(DLL_CT3)
DLL_CE_SOA
DLL_CE_AInv
DLL_CE_PREQ
DLL_CE_FRAME_TIMEOUT(DLL_CT1)
DLL_CE_SOC(DLL_CT10)
DLL_CE_PRES
DLL_CE_ASND(DLL_CT8)
DLL_CE_SOA
DLL_CE_AInv
DLL_CE_FRAME_TIMEOUT(DLL_CT2)
DLL_CE_PREQ

DLL_CS_
WAIT_PREQ(DLL_CT9)
DLL_CE_SOC(DLL_CT7)
DLL_CE_PRES
DLL_CE_SOC
DLL_CE_ASND

Fig. 6.

CN Cycle State Machine, valid for CN NMT states NMT_MS_OPERATIONAL,
NMT_MS_READY_TO_OPERATE and NMT_MS_PRE_OPERATIONAL_2

EPSG DS 302-B V1.1.1

5.2.3
DLL_CT3

DLL_CT4…

-21-

Transitions
DLL_CE_SOA [ ] / process SoA, if allowed send an ASnd frame or a non POWERLINK
frame
DLL_CE_AINV [ ] / process AINV; if invited, transmit a legal Ethernet frame, additionallyreport error DLL_CEV_LOSS_SOA
DLL_CE_FRAME_TIMEOUT [ ] / Synchronize to the next SoC, report error
DLL_CEV_LOSS_SOC and DLL_CEV_LOSS_SOA
DLL_CE_PREQ[ ] / accept the PReq frame and send a PRes frame, report error
DLL_CEV_LOSS_SOC and DLL_CEV_LOSS_SOAThe DLL_CE_SOA event denotes the end of the isochronous phase and the beginning of
the asynchronous phase of the current cycle. If the SoA frame includes an invitation to
the CN, the CN may respond with one valid frame.
The occurrence of a DLL_CE_PREQ signifies that an expected SoA and SoC frame
were lost. The DLL_CS will attend to synchronize the new cycle. The DLL Error Handlingshall be notified.
The occurrence of a DLL_CE_AINV signifies that an expected SoA frame was lost. The
DLL_CS will attend to synchronize the new cycle. The DLL Error Handling shall be
notified.
In case of a DLL_CE_FRAME_TIMEOUT event happened, SoA and SoC frames may
have been lost. The DLL Error Handling shall be notified.
DLL_CE_ASND [ ] / process frame
DLL_CE_ AINV [ ] / process AINV, if allowed send an ASnd frame or a non POWERLINK
frame
DLL_CE_PREQ [ ] / respond with PRes frame, report error DLL_CEV_LOSS_SOC
DLL_CE_PRES [ ] / report error DLL_CEV_LOSS_SOC
DLL_CE_SOA [ ] / report error DLL_CEV_LOSS_SOC
DLL_CE_FRAME_TIMEOUT [ ] / report error DLL_CEV_LOSS_SOC
If an ASnd frame has been received it shall be processed. If the AInv frame includes aninvitation to the CN, the CN may respond with one valid frame. The state shall not bechanged. The state machine of the CN does not limit the amount of sent or received
frames within the asynchronous phase of the cycle.
If a SoA, PReq or PRes frame is received, there may be a loss of a SoC frame inbetween. The DLL Error Handling shall be notified with the error DLL_CEV_LOSS_SOC.
If a PReq frame was received, the incoming data may be ignored and a PRes frame shallbe sent.

EPSG DS 302-B V1.1.1-22-…
DLL_CT8

DLL_CE_SOA [ CN = multiplexed ] / process SoA; if invited, transmit a legal Ethernetframe
DLL_CE_SOA [ CN != multiplexed ] / process SoA; if invited, transmit a legal Ethernet
frame, additionally report error DLL_CEV_LOSS_PREQ
DLL_CE_FRAME_TIMEOUT [ ] / Synchronize on the next SoC, report error
DLL_CEV_LOSS_SOC and DLL_CEV_LOSS_SOA
DLL_CE_AINV [ CN = multiplexed ] / process AINV; if invited, transmit a legal Ethernetframe
DLL_CE_AINV [ CN != multiplexed ] / process AINV; if invited, transmit a legal Ethernet
frame, additionally report error DLL_CEV_LOSS_PREQ and DLL_CEV_LOSS_SOA
If the CN is in the NMT_CS_OPERATIONAL or NMT_CS_READY_TO_OPERATE the
CN will assume a LOSS_OF_PREQ if the number of cycles since the last PReq isgreater than that expected. (1 for non multiplexed CN, n for multiplexed CN where n is
NMT_CycleTiming_REC.MultipleCycleCnt_U8)
In case of a DLL_CE_FRAME_TIMEOUT event happened, SoA and SoC frames may
have been lost.
On non-multiplexed nodes or if a multiplexed node should have been requested thiscycle, the PRes frame was additionally lost. The DLL Error Handling shall be notified.
If an AInv frame has been received, it shall be processed; there may be a loss of a SoA
in addition to loss of PReq. The DLL Error Handling shall be notified with the error
DLL_CEV_LOSS_SOA (and DLL_CEV_LOSS_PREQ eventually)

Tab. 5CN Cycle State Machine transitions modified to allow Multiple-ASnd

5.3

Non Multiple-ASnd CN Cycle State Machine[1] tells that: “The unexpected frame types and unexpected sender shall be accepted. The state does
not change. The PRes frames shall be passed to the NMT State Machine, which may analyse thisframes (and e.g. remove the corresponding CN from the communication). The state machine does notreact in any other way to this event.”
Since current POWERLINK CNs are not invited to send an ASnd or another Ethernet frame with AInv,
it will not detect any error due to Multiple-ASnd.
Thus implementation of the extension shall plan priority of SoA invitation to current CNs, as it will be
the only asynchronous communication slot they could use.

EPSG DS 302-B V1.1.1

6

-23-

Additional Device Description Entry

Name
D_NMT_CNMaxAInv_U32
D_NMT_MNMaxAsynchronousSlots_U8

Description
Maximum number of AInv the CN is able to process per cycle
Maximum number of asynchronous slots per cycle

Type
UNSIGNED32
UNSIGNED8

Category
MN
CN
M
M
-

Default
MN
1

CN
0
-

EPSG DS 302-B V1.1.1

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-24-

Conclusion

Thanks to this extension, POWERLINK asynchronous phase is more efficient. As the POWERLINK
cycle time is fixed, the asynchronous phase could dynamically take advantage of time remaining after
the isochronous phase.
In applications where the data update rate (i.e. POWERLINK cycle time inverse) is fixed and not
optimized to be the highest possible, asynchronous frame and data rate would be well improved.
The only point to take care, with respect to existing POWERLINK CNs (not handling Multiple-ASnd), is
to invite them in priority when the MN sends a SoA.
Finally, fair distribution of Multiple-ASnd to nodes shall be manufacturer-specific.
A future version of this specification may precise the handling of asynchronous transmit priorities.