Multi-Modular Isolated Three-Phase AC-DC Converter for Rapid Charging
with Autonomous Distributed Control
Masakazu Adachi 1) Keisuke Kusaka 1) Jun-ichi Itoh 1)
1) Nagaoka University of Technology, Electrical, Electronics and Information Engineering1603-1 Kamitomioka-machi, Nagaoka, Niigata, 940-2188, Japan (E-mail: itoh@vos.nagaokaut.ac.jp)

Presented at EVS 31 & EVTeC 2018, Kobe, Japan, October 1 - 3, 2018

ABSTRACT: This paper proposes autonomous distributed control method for the multi-modular isolated three-phase AC-

DC converter. Multi-modular topologies, which have multiple modules, are suitable for high voltage rapid charging of an
onboard battery of electric vehicles. In conventional control for multi-modular topology, balance control with fast responsemust be employed by centralized controller. In the proposed method, the high-speed communication between thecontroller on each module and centralized controller is not needed because the input current and the output voltage isautonomously controlled by each distributed controller on the modules. As experimental results confirmed that the input
current is balanced among the modules without high-speed response main controller.
KEY WORDS: Battery charging, Rapid charging, Autonomous distributed control, Power factor correction converter

three separate phases. Each phase is independently controlled as asingle-phase AC-DC converter. The multi-module single phase

1. INTRODUCTION

AC-DC converter is reduces the number of the switching devices
In recent years, charging power of rapid chargers for electricvehicles has been increasing(1)-(6). Thus, the input AC voltage
should be increased from the 100 V or 200 V in the present system
to the medium voltage corresponding to the increase of charging
power. However, in a conventional single-circuit topology, thevolume of system and switching devices rapidly increases with thehigh voltage and the high charging power. For example, rapid
chargers for electric vehicles is connected to 500 V according to
the CHAdeMO association(7). Thus, the volume of the transformer
is bulky because the high transform ratio is required in order toconvert from the grid voltage of 6.6 kV to several hundred volts.
As a solution to suppress volume of the circuit, multi-modular
topology has been proposed because the multi-modular topology
is suitable for medium or high voltage system and high-power
converter(8)-(9). The multi-modular topology has advantages that
low-voltage-rating semiconductors are used. Moreover the multimodular

topology

will

improvepower

density throughminiaturization of passive components because rated power per
module is lowered in the multi-modular topology. In theconventional method, the three-phase voltage is separated into

compared to the multi-module three-phase AC-DC converter(10).
As described above, an unbalance of the three-phase input currents
may occurs due to the error of detection gain of each module wheneach phase of the three-phase AC-DC converter is independently
controlled. Thus, the multi-modular topology needs current
balance control among each phase by centralized control, e.g., themaster-slave control. Consequently, the conventional control
method requires fast response for the communication among themaster controller and the slave controller (11)-(12).
This paper proposes autonomous distributed control method forthe isolated three-phase AC-DC converter in which a controller is
included in each module. Therefore, the droop control is applied
to the controller in order to stably control the input current of eachphase(13)-(15). The input current divergence is avoided bycontrolling the droop gain range to be larger than the detection
error.
In addition, the current balance control is operated byaveraging the input current amplitude of each phase. Thus, theautonomous distributed control is achieved by slow responses ofthe droop control and the current balance control without the

Copyright © 2018 Society of Automotive Engineers of Japan, Inc. All rights reserved

Resonant DC-DC converter

PFC converter

Sllc1

Spfc1
U phase conv.
Module

vin_u

Lu
iL_u
Spfc2

Vdc_u

Cs Ls

+

Cconv

Sllc2

S2
Cout +

S2

Vout

S1

Lm

Rout

V phase conv.

S1

Vout
W phase conv.
Fig. 1. Configuration of isolated three-phase AC-DC converter with autonomous distributed control.
mutual communication among each phase. Therefore, the main

converter corrects the power factor to be unity and controls thecontroller is needed only to have a function of the mutual

input current to be sinusoidal. In this proposed circuit, a large

communicating among each phase, whereas the high-speed

capacitor is not needed, difference from the conventional PFC,

control is performed in the module controller. As a result, wirelessbecause the power pulsation at the output is canceled by the phasecommunication is used for communication among the maindifference of the three-phase alternating current by connecting thecontroller and each module controller.

output of each phase in parallel. Therefore, the single-phase power

This paper is organized as follows. In the second section thepulsation at twice the grid frequency does not occur.

circuit configuration of the proposed isolated three-phase AC-DC

The resonant isolated DC-DC converter provides isolation

converter is introduced. Then, a control method of the output DC

between input and output. High frequency excitation and zerovoltage and the input current are described. In addition, the droop

current switching (ZCS) are achieved by utilizing the series

control and the current balance control, which are applied forresonance between leakage inductance Ls of high frequency

balancing the currents of the modules, are shown.

transformer and capacitor Cs connected to the primary side of the

In the second section shows the current imbalance rate whentransformer. Each MOSFET of the high-frequency inverter

the droop control and the current balance control of an isolated

switches at the zero current crossing points by matching thethree-phase AC-DC converter are applied. The current imbalanceswitching frequency to the resonance frequency.

rate is reduced from 49.4% to 0.1% by adding the current balance

As a result, switching loss is greatly reduced. The magnetizing

control compared with only the droop control. Therefore, eveninductance is designed to be sufficiently large compared to thewhen the imbalance occurs in the detection gain, it confirms thatleakage inductance. Therefore, the magnetizing inductance isinput current balance is achieved.

negligible. The resonance frequency fo is given by

Finally, the experiment results shows that the sinusoidal input
current and the balanced current share among each phase areachieved.

fo 

1
2 L s C s(1).

As described above, in order to achieve turn-on and turn-off
ZCS, the switching frequency of the resonance DC-DC converter

2. CONFIGURATION OF PROPOSED SYSTEM

is set to be equal to the resonance frequency, and the resonanceisolated DC-DC converter is operated in open loop with a duty

2.1. Circuit configuration
Figure 1 shows the circuit configuration of the proposed
isolated three-phase AC-DC converter. In the proposed circuit,control of a single-phase AC-DC converter is employed because
each phase is independently controlled.
Each phase module consists of the power-factor-correction(PFC) converter and the resonant DC-DC converter. The PFC

ratio of 50%.
2.2. Control block diagram
Figure 2 shows the control block diagram. The control of the
proposed circuit consists of several module controllers and themain controller. In the module controllers, automatic output
voltage regulator (AVR) and automatic input current regulator(ACR) are implemented.

Copyright © 2018 Society of Automotive Engineers of Japan, Inc. All rights reserved

Vout*
Vout*

Vout

iu*

+
iv* + +

1
3

Main controller0+-i0* - +
iu*

-

-

+
K

iu'*

iu*

+

+

1
sT

i 0*
iu,v,w*

iw*

* +

+

×

PI

Vout

abs
sin

Vin
Vout*

PI

-

Conv.

v u*

Mod._uiL_uMod._vq

PLL

Mod._w

vin_u

iu’*
Droop control

Current balance
control

Module controller(U phase)：Wirelesscommunication

Module controller(V phase)
Module controller(W phase)
Fig. 2. Control block diagram of proposed circuit.

In AVR, the PI controller is applied in order to regulate theoutput voltage into the DC voltage reference value from the main
controller. In the input current control, the power factor in the
primary side is corrected. Consequently, the input current iL
flowing through the boost inductor is controlled into full-wave
rectification waveform. The current reference values iLu, v, w* aregiven by


1   Rout Vout _ u  Vout _ v  Vout _ w    Vout _ x 
RK  
3Rout  RK




1

Vout  Vout _ x RKix  

(3), x  u , v, w 

where Rout ,Vout and Vout_x are the load resistance, the summationof the output voltages of all three phases and the output voltage ofi Lu,v, w  I amp sin(t )*(2),each phase including the error. According to (3), as the droop gain

where Iamp is the amplitude of the reference. The phase information

increases, the output voltage Vout decreases in proportion to theis obtained by detecting the input voltage. The response of AVR

virtual resistance RK. In order to control without divergence, theis designed to be sufficiently slow in comparison with ACR.

current of each phase ix must be larger or equal to zero because theHence, the gain of ACR is assumed as one, and the control

droop control is not established. In other words, if the output

interference is avoided. In addition, since the input current is feed-voltage of each phase becomes larger than the output voltage,back in each individual phase, interference in control with othercontrol does not diverge. Therefore, the divergence is suppressed

phases does not occur.

by setting the droop gain higher than a predicted error. For

2.3. Droop control

example, the divergence is suppressed by designing the droop gain

In actual system is inevitable that error occurs in the detection

higher than the nominal error of the voltage sensor.

gain due to the sensor. The unbalance of output current causes rush

Since the amplitude of the input current is determined by thecurrent when the potential difference occurs in the output voltage

detection voltage and the droop gain with the droop control, theof each phase due to parallel connection of each phase. Therefore,

current amplitude differs between each phase; therefore, thein this proposed system, the droop control is applied to eachcurrent balance control is required.

module controller in order to eliminate rush current. The droop
control is operated by dropping the dc voltage reference value
according to the droop gain K in order to make the voltage gain
within the range of the droop gain K.
Figure 3 shows an equivalent circuit of the droop control whenRK

the gain K is regarded as the virtual resistance RK. On the other
hand, the rush current is suppressed by regarding the droop gain K

RK

RK

Vout_v

iv
Vout_w

iu
Vout_uiw Vout

as the virtual resistance when the droop control is applied. The
current of each phase ix is introduced by (3) using the virtual

Fig. 3. Equivalent circuit of droop control.

resistance RK,

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RoutBesides, the angular cut-off frequency of AVR is designed to 50

2.4. Current balance control
The unbalance of each current is not eliminated although therad/s because the reference value is direct current; therefore,

droop control is applied because the droop control is suppressed

response is not required. The rated capacity of the system is 150

divergence. Therefore, the unbalance of each current is suppressed

kW, and the input voltage is 400 V. In order to simulate theby applying current balance control. As shown in Fig. 2, the direct

detection error of the output voltage, the detection value of thecurrent reference value of each phase is calculated in the main

output voltage of U phase is decreased by 5% on purpose.

controller. Then, the averaged DC reference value i0* and the DC

Furthermore, the integration time of current balance control is 0.1

current reference values iu, v, w* of each phase are computed in thes, which is slower than the response of the voltage control.

module controller to generate deviation. Then, this deviation is

Figure 4 shows simulation results when only the droop control

feed-back to the voltage reference value of each phase to eliminate

is applied, and when both the droop control and the current balance

the deviation between the direct current reference value i0* and thecontrol are applied. It is seen that the power factor of the input

direct current reference value of each phase iu,v,w*.

current is almost unity.

Consequently, the current of each phase is balanced. The
average value of the direct current reference i0* is given byi  iv  i w
i0  u3***

In the case of the application of only the droop control, thecurrent imbalance rate is 49.4%. On the other hand, the current(4).

imbalance rate is reduced to 0.1% when both the droop control andthe current balance control are employed. Therefore, it is

In the conventional balance control, the main controller directly

confirmed that the imbalance of the current is reduced compared

controls the current reference value. Therefore, it is necessary towith the case of the application of only the droop control. In

increase fast response until that there is no influence on the voltage

addition, the input current THD is 0.09%. The output voltage iscontrol among the centralized controller and module controller.

491 V with a reference value of 500 V.

This results in requirements of fast response main controller, andhigh-speed. Thus, the wireless communication is not implemented.
In contrast, since the proposed control is controlled by the outer

Table 1. Simulation condition.

Input voltage
Rated power
Conveter capcitance
Output capcitance
Input inductanceLoad resistance
Voltage reference
Switching frequency (PFC)

vin
P
Cconv
Cout
L
RL
Vdc*
fsw

400 V
150 kW
1000 mF
680 mF
7 mH
1.67 W
500 V
20 kHz3. SIMULATION RESULT

Resonant frequency(Resonant DC-DC converter)fo

50 kHzIn this section, the effectiveness of the current balance control

Angular frequency of ACR
Angular frequency of AVR

ACR
AVR
K
N1:N2

6000 rad/s
50 rad/s
0.10p.u.

loop of the voltage control, lower response is acceptable incomparison with the voltage control.
As a result, the proposed system does not require fast or highspeed communication between the main controller and the module
controller. This enables the employment of the wirelesscommunication instead of the wired communication.

is confirmed with simulation. Table I shows simulation conditions.
In Fig. 1, each phase is composed of multiplicity of modules. In
this consideration the number of the module on each phase is one

Droop gain
Trans turns ratio

1.0

for simplicity.
As mentioned in section 2, since the current reference of ACR

4. EXPERIMENTAL RESULT

as full-wave rectification waveform has the frequency componentsof the twice the grid frequency, i.e. 100 Hz or 120 Hz fast response

In this section, the operation of the circuit with both

ACR is required. The angular frequency is 628 rad/s when the gridcombination of the droop control and the current balance control

frequency is 50 Hz. Therefore, in this simulation, the angular cut-is confirmed. Table II shows specifications and experimental

off frequency of ACR is designed to 6000 rad/s which is about 20

conditions.

times angular grid frequency.

In Fig. 1, each phase is composed of multiplicity of modules,
but in the experiment, it is composed of one module. In order to

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Input voltage [V]400

U phase V phase W phase

200
0
-200
-400
[10ms/div][10ms/div]

Input current [A]

600
400
200
0
-200
-400
-600

(a) With droop control[10ms/div](b) With droop control and[10ms/div]

current balance control

Fig. 4. Waveforms of input voltage, input current and output voltage.
confirm the effect of the proposed control, the output voltage
detection value of the U phase was decreased by 10% on purpose,

V-phase current iv [1 A/div]
W-phase current iw [1 A/div]
U-phase current iu [1 A/div]

and the droop gain was set to 0.15 p.u.
Figure 5 (a) shows the input current waveform before
application of proposed control. It is confirmed from Fig. 5 (a) thatthe input current is the unbalanced and it has distortion when thevoltage detection gain is unbalanced.
Figure 5 (b) shows the input current waveform of each phasewith the proposed control. As shown in Fig. 5 (b), the input current
amplitude of each phase is almost same among each module andthe current balance control is in operation. The ripple(a) Without proposed method[4 ms/div]

superimposed on the current amplitude is generated by the gridinterconnection filter. Also, the current imbalance rates is 0.46%.

U-phase current iu [1 A/div]

W-phase current iw [1 A/div]

V-phase current iv [1 A/div]

Table 2. Experimental condition.

Input voltage
Rated power
Conveter capcitance
Output capcitance
Input inductanceLoad resistance
Voltage reference
Switching frequency (PFC)

vin
P
Cconv
Cout
L
RL
Vdc*
fsw

200 V
330 W
48 mF
680 mF
7 mH
120 W
200 V
20 kHzResonant frequency(Resonant DC-DC converter)fo

50 kHz

ACR
AVR
K
N1:N2

6000 rad/s
50 rad/s
0.15p.u.

Angular frequency of ACR
Angular frequency of AVR
Droop gain
Trans turns ratio[4 ms/div](b) With proposed method

Fig. 5. Grid current waveforms

1.0

The difference in the current amplitude in each phase is caused byerror of the detection gain.
It is confirmed that it is controlled without divergence by the
proposed control. Then, the input current THD of each phase is

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U-phase voltage vin_u [250 V/div]

199.9 V

Output voltage Vout [50 V/div]

Input current iu，iv, iw [1 A/div]

U-phase current iu [2 A/div]

Output voltage Vout [100 V/div][4 ms/div]

165 W (0.5 p.u.)[40 ms/div]

Fig. 6. U-phase waveforms of input voltage,
input current and output voltage.
2.97% for U phase, 2.33% for V phase and 2.36% W phase. Figure(a) detection error = 0%204.5 V

6 shows the U-phase input voltage, input current and output
voltage waveform. From Fig. 6, the input current of the U phase is

330 W (1.0 p.u.)

Output voltage Vout [50 V/div]

Input current iu，iv, iw [1 A/div]a sinusoidal. Moreover, and power factor is unity. In addition, theaverage value of the output voltage is 206 V, which is almost equal
to the reference value 200 V. It is confirmed that it is operatesatisfactorily. The output voltage is higher than the reference value
owing to the effect of the droop gain.

165 W (0.5 p.u.)

330 W (1.0 p.u.)

Figure 7 shows the transient response of the input current when
the load resistance value is stepped from 0.5 p.u. to 1.0 p.u.. From
Fig. 7 it is confirmed that even in the case where the voltage[40 ms/div](b) detection error = 10%
Fig. 7. Step response of output voltage and input current.

detection gain is unbalanced. In the steady state, the gain iscontrolled in the same way as when the gain is in the equilibrium
state. Then the average value of the output voltage is almost equal

DC-link voltage Vdc_u,v,w [50 V/div]

to the reference value when load resistance value is changed.
Finally, the error between the voltage command and the detection
votage is compensated control. This is because the detection gainis adjusted by the droop control and the current balance control.

Output voltage Vout [50 V/div]

Figure 8 shows the output voltage and the DC-link voltage ofeach phase. The resonance DC-DC converter is driven by open
loop with a duty ratio of 50%. Also, the DC-link voltage is twice
the output voltage. As shown in Fig. 8, the unbalance rates of the(a) detection error = 0%

[2 ms/div]

DC-link voltage average values are 0.47% when the detection
error ratio is zero. In other words the output voltage becomes
constant by the proposed control. Also, the unbalance rate of theDC-link voltage Vdc_u,v,w [50 V/div]

average value of DC-link voltage is 0.45% when the detection
error ratio is 10%. DC-link voltage is the same value as when thegain was balanced, and it was confirmed that it was well controlled.

Output voltage Vout [50 V/div]

Also, since each phase operates as a single-phase PFC circuit,pulsating current of twice the frequency of the system frequency
occurs in the DC-link voltage. Since the output of modules are[2 ms/div]

connected in parallel, the pulsating flows cancel each other and(b) detection error = 10%
Fig. 8. Waveform of output voltage and DC-link voltage.

only the DC component is obtained.

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5. CONCLUSION

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