MP2307
3A, 23V, 340KHz Synchronous Rectified
Step-Down Converter
The Future of Analog IC Technology

DESCRIPTIONFEATURES

The MP2307 is a monolithic synchronous buckregulator. The device integrates 100mΩ
MOSFETS that provide 3A of continuous load
current over a wide operating input voltage of
4.75V to 23V. Current mode control provides
fast transient response and cycle-by-cycle
current limit.

•

An adjustable soft-start prevents inrush current
at turn-on and in shutdown mode, the supply
current drops below 1µA.
This device, available in an 8-pin SOIC
package, provides a very compact systemsolution with minimal reliance on external
components.

EVALUATION BOARD REFERENCE
Board Number

Dimensions

EV2307DN-00A

2.0”X x 1.5”Y x 0.5”Z

•
•
•
•
•
•
•
•
•
•

3A Continuous Output Current
4A Peak Output Current
Wide 4.75V to 23V Operating Input Range
Integrated 100mΩ Power MOSFET Switches
Output Adjustable from 0.925V to 20V
Up to 95% Efficiency
Programmable Soft-Start
Stable with Low ESR Ceramic Output Capacitors
Fixed 340KHz Frequency
Cycle-by-Cycle Over Current Protection
Input Under Voltage Lockout
Thermally Enhanced 8-Pin SOIC Package

APPLICATIONS
•
•
•
•
•

Distributed Power Systems
Networking Systems
FPGA, DSP, ASIC Power Supplies
Green Electronics/Appliances
Notebook Computers“MPS” and “The Future of Analog IC Technology” are Registered Trademarks ofMonolithic Power Systems, Inc.

TYPICAL APPLICATION
C5
10nF

INPUT
4.75V to 23V

Efficiency vsLoad Current
100
95

8

1
BS
SW

EN

MP2307
SS
GND

FB
COMP

4

6

3

OUTPUT
3.3V
3A

5

C3
3.9nF

EFFICIENCY (%)

7

90

2
IN

VIN = 5V
VIN = 12V

85
80

VIN = 23V

75
70
65
60
55
50
0.1

1.0
LOAD CURRENT (A)10MP2307_EC01

MP2307_TAC01

MP2307 Rev. 1.9
5/28/2008

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MP2307 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTERABSOLUTE MAXIMUM RATINGS (1)PACKAGE REFERENCE

Supply Voltage VIN ....................... –0.3V to +26V
Switch Voltage VSW ................. –1V to VIN + 0.3V
Boost Voltage VBS ..........VSW – 0.3V to VSW + 6V
All Other Pins................................. –0.3V to +6V
Junction Temperature...............................150°C
Lead Temperature ....................................260°C
Storage Temperature .............–65°C to +150°C

TOP VIEW
BS

1

8

SS

IN

2

7

EN

SW

3

6

COMP

GND

4

5

FB

EXPOSED PAD
ON BACKSIDE

Recommended Operating Conditions(2)

Input Voltage VIN ............................ 4.75V to 23V
Output Voltage VOUT .................... 0.925V to 20V
Ambient Operating Temp .............. –40°C to +85°C

MP2307_PD01_SOIC8N

Thermal ResistancePart Number*

Package

Temperature

MP2307DN

SOIC8N(Exposed Pad)

–40° to +85°C* For Tape & Reel, add suffix –Z (eg. MP2307DN–Z)

(3)

θJA

θJC

SOIC8N .................................. 50 ...... 10... °C/W

Maximum Power Dissipation Operating(TA=25°C)(4)
SOIC8N , POUT ....................... .......... ........ 2W

For Lead Free, add suffix –LF (eg. MP2307DN–LF–Z)
Notes:
1)
2)
3)

4)

Exceeding these ratings may damage the device.
The device is not guaranteed to function outside of its operating conditions.
Measured on approximately 1” square of 1 oz copper.
Derating 20mW/°C at TA > 25°C

ELECTRICAL CHARACTERISTICS
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameter

SymbolCondition

Min

Typ

Max

Units

Shutdown Supply Current

VEN = 0V

0.3

3.0

µA

Supply Current

VEN = 2.0V, VFB = 1.0V

1.3

1.5

mA

0.925

0.950

V

Feedback Voltage

VFB

4.75V ≤ VIN ≤ 23V

0.900

Feedback Overvoltage Threshold
Error Amplifier Voltage Gain (5)AEA

Error Amplifier Transconductance

GEA∆IC = ±10µA

1.1

V

400

V/V

820

µA/V
mΩ

(5)

RDS(ON)1100

Low-Side Switch On-Resistance (5)RDS(ON)2

100

High-Side Switch On-Resistance

High-Side Switch Leakage Current

VEN = 0V, VSW = 0V

Upper Switch Current Limit

Minimum Duty Cycle

Lower Switch Current Limit

From Drain to Source

COMP to Current Sense
Transconductance

GCS

Oscillation Frequency

Fosc1

Short Circuit Oscillation Frequency

Fosc2

VFB = 0V

Maximum Duty Cycle

DMAX

VFB = 1.0V

Minimum On Time (5)TON

EN Shutdown Threshold Voltage
EN Shutdown Threshold Voltage
Hysterisis

MP2307 Rev. 1.9
5/28/2008

0
4.0

300

VEN Rising

mΩ
10

5.8

A

0.9

A

5.2

A/V

340

380

110

1.1

µA

KHz
KHz

90

%

220

ns

1.5
220

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2.0

V
mV

2

MP2307 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTERELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameter

Symbol Condition

EN Lockout Threshold Voltage
EN Lockout Hysterisis
Input Under Voltage Lockout
ThresholdInput Under Voltage Lockout
Threshold Hysteresis
Soft-Start Current
Soft-Start Period
Thermal Shutdown (5)VIN Rising

VSS = 0V
CSS = 0.1µF

Min

Typ

Max

Units

2.2

2.5
210

2.7

V
mV

3.80

4.05

4.40

V

210

mV

6
15
160

µA
ms
°C

Note:
5) Guaranteed by design, not tested.

MP2307 Rev. 1.9
5/28/2008

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MP2307 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTERTYPICAL PERFORMANCE CHARACTERISTICS
C1 = 2 x 10µF, C2 = 2 x 22µF, L= 10µH, CSS= 0.1µF, TA = +25°C, unless otherwise noted.
Steady State Test
Waveforms

Steady State Test
Waveforms

Startup throughEnable Waveforms

VIN = 12V, VOUT = 3.3V, IOUT = 0A

VIN = 12V, VOUT = 3.3V, IOUT = 3A

VIN = 12V, VOUT = 3.3V, No Load

VIN
20mV/div.

VIN
200mV/div.

VOUT
20mV/div.

VOUT
20MV/div.

VSW
10V/div.

VSW
V/div.

IL
1A/div.

VEN
5V/div.
VOUT
2V/div.

IL
1A/div.

IL
2A/div.

VSW
10V/div.

2ms/div.
MP2307-TPC01

MP2307-TPC02

MP2307-TPC03

Startup ThroughEnable Waveforms

Shutdown ThroughEnable Waveforms

Shutdown ThroughEnable Waveforms

VIN = 12V, VOUT = 3.3V,
IOUT = 3A (Resistance Load)

VIN = 12V, VOUT = 3.3V, No Load

VIN = 12V, VOUT = 3.3V,
IOUT = 3A (Resistance Load)
VEN
5V/div.

VEN
5V/div.
VOUT
2V/div.

VEN
5V/div.
VOUT
2V/div.
IL
2A/div.
VSW
10V/div.

IL
1A/div.

VOUT
2V/div.
IL
2A/div.

VSW
10V/div.

VSW
10V/div.

2ms/div.

2ms/div.
MP2307-TP04

MP2307-TPC05

MP2307-TPC06

Load Transient Test
Waveforms

Short Circuit Test
Waveforms

Short Circuit Recovery
Waveforms

VIN = 12V, VOUT = 3.3V,
IOUT = 1A to 2A step

VIN = 12V, VOUT = 3.3V

VIN = 12V, VOUT = 3.3V

VOUT
200mV/div.

VOUT
2V/div.

VOUT
2V/div.
IL
1A/div.
ILOAD
1A/div.

IL
2A/div.

MP2307 -TPC07

MP2307 Rev. 1.9
5/28/2008

IL
2A/div.

MP2307-TPC08

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MP2307-TPC09

4

MP2307 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTERPIN FUNCTIONS
Pin #

Name

1

BS

2

IN

3

SW

4

GND

5

FB

6

COMP

7

EN

8

SS

MP2307 Rev. 1.9
5/28/2008

Description
High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel MOSFET
switch. Connect a 0.01µF or greater capacitor from SW to BS to power the high side switch.
Power Input. IN supplies the power to the IC, as well as the step-down converter switches.
Drive IN with a 4.75V to 23V power source. Bypass IN to GND with a suitably large capacitor
to eliminate noise on the input to the IC. See Input Capacitor.
Power Switching Output. SW is the switching node that supplies power to the output. Connect
the output LC filter from SW to the output load. Note that a capacitor is required from SW to
BS to power the high-side switch.
Ground (Connect the exposed pad to Pin 4).
Feedback Input. FB senses the output voltage and regulates it. Drive FB with a resistive
voltage divider connected to it from the output voltage. The feedback threshold is 0.925V. See
Setting the Output Voltage.
Compensation Node. COMP is used to compensate the regulation control loop. Connect aseries RC network from COMP to GND. In some cases, an additional capacitor from COMP to
GND is required. See Compensation Components.
Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on
the regulator; low to turn it off. Attach to IN with a 100kΩ pull up resistor for automatic startup.
Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND
to set the soft-start period. A 0.1µF capacitor sets the soft-start period to 15ms. To disable thesoft-start feature, leave SS unconnected.

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MP2307 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTEROPERATIONFUNCTIONAL DESCRIPTION
The MP2307 regulates input voltages from
4.75V to 23V down to an output voltage as low
as 0.925V, and supplies up to 3A of load
current.
The MP2307 uses current-mode control toregulate the output voltage. The output voltage
is measured at FB through a resistive voltage
divider and amplified through the internaltransconductance error amplifier. The voltage at
the COMP pin is compared to the switch current(measured internally) to control the output
voltage.

The converter uses internal N-Channel
MOSFET switches to step-down the input
voltage to the regulated output voltage. Since
the high side MOSFET requires a gate voltage
greater than the input voltage, a boost capacitor
connected between SW and BS is needed todrive the high side gate. The boost capacitor ischarged from the internal 5V rail when SW is low.
When the FB pin voltage exceeds 20% of thenominal regulation value of 0.925V, the overvoltage comparator is tripped and the COMP
pin and the SS pin are discharged to GND,
forcing the high-side switch off.

+
CURRENTSENSEAMPLIFIER

OVP
1.1V

-OSCILLATOR+

FB 5

110/340KHz
0.3V

RAMP

1

BS

3

SW

4

GND

5V

--+

+
0.925V

IN

--

CLK

-SS 8

+

2

+

ERROR
AMPLIFIER

S

Q

R

Q

CURRENTCOMPARATORCOMP 6
--

EN 7
2.5V

+

EN OK

OVP

1.2V

IN < 4.10V

LOCKOUTCOMPARATOR

IN
+

7V
Zener
1.5V

--

INTERNAL
REGULATORSSHUTDOWNCOMPARATOR

MP2307_BD01

Figure 1—Functional Block Diagram

MP2307 Rev. 1.9
5/28/2008

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MP2307 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTERAPPLICATIONS INFORMATION
The inductance value can be calculated by:

COMPONENT SELECTION
Setting the Output Voltage
The output voltage is set using a resistive
voltage divider connected from the output
voltage to FB. The voltage divider divides theoutput voltage down to the feedback voltage by
the ratio:
VFB = VOUT

R2
R1 + R2

R1 + R2
R2

Where VOUT is the output voltage, VIN is the
input voltage, fS is the switching frequency, and∆IL is the peak-to-peak inductor ripple current.

ILP = ILOAD +R2 can be as high as 100kΩ, but a typical value
is 10kΩ. Using the typical value for R2, R1 isdetermined by:
R1 = 10.81 × ( VOUT − 0.925 ) (kΩ)

For example, for a 3.3V output voltage, R2 is
10kΩ, and R1 is 26.1kΩ. Table 1 lists
recommended resistance values of R1 and R2
for standard output voltages.
Table 1—Recommended Resistance Values
VOUT

R1

R2

1.8V
2.5V
3.3V
5V
12V

9.53kΩ
16.9kΩ
26.1kΩ
44.2kΩ
121kΩ

10kΩ
10kΩ
10kΩ
10kΩ
10kΩ

Inductor
The inductor is required to supply constantcurrent to the load while being driven by theswitched input voltage. A larger value inductor
will result in less ripple current that will in turnresult in lower output ripple voltage. However,the larger value inductor will have a larger
physical size, higher series resistance, and/or
lower saturation current. A good rule fordetermining inductance is to allow the peak-topeak ripple current to be approximately 30% of
the maximum switch current limit. Also, makesure that the peak inductor current is below the
maximum switch current limit.

MP2307 Rev. 1.9
5/28/2008

⎛
⎞
VOUT
V
× ⎜⎜1 − OUT ⎟⎟f S × ∆I L ⎝VIN ⎠Choose an inductor that will not saturate underthe maximum inductor peak current, calculatedby:Thus the output voltage is:
VOUT = 0.925 ×

L=

⎛
⎞
VOUT
V
× ⎜1 − OUT ⎟⎟2 × f S × L ⎜⎝VIN ⎠Where ILOAD is the load current.
The choice of which style inductor to use mainly
depends on the price vs. size requirements andany EMI constraints.
Optional Schottky Diode
During the transition between the high-side
switch and low-side switch, the body diode ofthe low-side power MOSFET conducts theinductor current. The forward voltage of thisbody diode is high. An optional Schottky diodemay be paralleled between the SW pin and
GND pin to improve overall efficiency. Table 2
lists example Schottky diodes and their
Manufacturers.
Table 2—Diode Selection Guide
Part Number

Voltage/Current
RatingB130
SK1330V, 1A
30V, 1A

MBRS130

30V, 1A

Vendor
Diodes, Inc.
Diodes, Inc.
International
RectifierInput Capacitor
The input current to the step-down converter isdiscontinuous, therefore a capacitor is required
to supply the AC current while maintaining the
DC input voltage. Use low ESR capacitors forthe best performance. Ceramic capacitors are
preferred, but tantalum or low-ESR electrolytic
capacitors will also suffice. Choose X5R or
X7R dielectrics when using ceramic capacitors.

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MP2307 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
Since the input capacitor (C1) absorbs the input
switching current, it requires an adequate ripple
current rating. The RMS current in the input
capacitor can be estimated by:
I C1 = ILOAD ×

VOUT ⎛⎜ VOUT ⎞⎟× 1−
VIN ⎜⎝
VIN ⎟⎠

When using tantalum or electrolytic capacitors,
the ESR dominates the impedance at theswitching frequency. For simplification, theoutput ripple can be approximated to:∆VOUT =

VOUT ⎛
V⎞× ⎜1 − OUT ⎟⎟ × R ESR
f S × L ⎜⎝VIN ⎠The worst-case condition occurs at VIN = 2VOUT,
where IC1 = ILOAD/2. For simplification, use an
input capacitor with a RMS current rating
greater than half of the maximum load current.

The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP2307 can be optimized for a wide range ofcapacitance and ESR values.

The input capacitor can be electrolytic, tantalum
or ceramic. When using electrolytic or tantalum
capacitors, a small, high quality ceramic
capacitor, i.e. 0.1µF, should be placed as close
to the IC as possible. When using ceramic
capacitors, make sure that they have enoughcapacitance to provide sufficient charge toprevent excessive voltage ripple at input. The
input voltage ripple for low ESR capacitors canbe estimated by:Compensation Components
MP2307 employs current mode control for easycompensation and fast transient response. The
system stability and transient response arecontrolled through the COMP pin. COMP is theoutput of the internal transconductance error
amplifier.
A
seriescapacitor-resistor
combination sets a pole-zero combination to
govern the characteristics of the control system.

⎛
⎞
I
V
V
∆VIN = LOAD × OUT × ⎜⎜1 − OUT ⎟⎟C1 × fS
VIN ⎝
VIN ⎠

The DC gain of the voltage feedback loop is
given by:
A VDC = R LOAD × G CS × A EA ×

Where C1 is the input capacitance value.
Output Capacitor
The output capacitor (C2) is required tomaintain the DC output voltage. Ceramic,
tantalum, or low ESR electrolytic capacitors arerecommended. Low ESR capacitors are
preferred to keep the output voltage ripple low.
The output voltage ripple can be estimated by:∆VOUT =⎞
⎞ ⎛VOUT ⎛
V1⎟
× ⎜⎜1 − OUT ⎟⎟ × ⎜⎜ R ESR +fS × L ⎝VIN ⎠ ⎝
8 × f S × C2 ⎟⎠Where C2 is the output capacitance value and
RESR is the equivalent series resistance (ESR)
value of the output capacitor.
When using ceramic capacitors, the impedanceat the switching frequency is dominated by thecapacitance which is the main cause for the
output voltage ripple. For simplification, theoutput voltage ripple can be estimated by:∆VOUT =

MP2307 Rev. 1.9
5/28/2008

VFB
VOUT

Where VFB is the feedback voltage (0.925V),
AVEA is the error amplifier voltage gain, GCS isthe current sense transconductance and RLOAD
is the load resistor value.
The system has two poles of importance. One
is due to the compensation capacitor (C3) andthe output resistor of the error amplifier, and theother is due to the output capacitor and the load
resistor. These poles are located at:
fP1 =

GEA
2π × C3 × A VEA

fP2 =

1
2π × C2 × R LOAD

Where GEA is the error amplifier transconductance.

⎛⎞V× ⎜⎜1 − OUT ⎟⎟VIN ⎠× L × C2 ⎝VOUT
8 × fS

2

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MP2307 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
The system has one zero of importance, due to thecompensation capacitor (C3) and the compensation
resistor (R3). This zero is located at:
f Z1 =

1
2π × C3 × R3

The system may have another zero ofimportance, if the output capacitor has a large
capacitance and/or a high ESR value. The zero,due to the ESR and capacitance of the output
capacitor, is located at:
1
fESR =
2π × C2 × R ESR

In this case, a third pole set by thecompensation capacitor (C6) and thecompensation resistor (R3) is used tocompensate the effect of the ESR zero on theloop gain. This pole is located at:
fP 3 =

1
2π × C6 × R3

The goal of compensation design is to shape
the converter transfer function to get a desired
loop gain. The system crossover frequency
where the feedback loop has the unity gain is
important. Lower crossover frequencies resultin slower line and load transient responses,
while higher crossover frequencies could cause
system instability. A good standard is to set thecrossover frequency below one-tenth of theswitching frequency.
To optimize the compensation components, thefollowing procedure can be used.

2. Choose the compensation capacitor (C3) toachieve the desired phase margin. For
applications with typical inductor values, setting
the compensation zero (fZ1) below one-forth ofthe crossover frequency provides sufficientphase margin.
Determine C3 by the following equation:
C3 >4
2π × R3 × f C

Where R3 is the compensation resistor.
3. Determine if the second compensation
capacitor (C6) is required. It is required if the
ESR zero of the output capacitor is located atless than half of the switching frequency, or thefollowing relationship is valid:f1< S
2π × C2 × R ESR
2

If this is the case, then add the secondcompensation capacitor (C6) to set the pole fP3
at the location of the ESR zero. Determine C6
by the equation:
C6 =C2 × R ESR
R3PCB Layout Guide
PCB layout is very important to achieve stable
operation. It is highly recommended to duplicate
EVB layout for optimum performance.
If change is necessary, please follow theseguidelines and take Figure2 for reference.
1)

Keep the path of switching current shortand minimize the loop area formed by Input
cap., high-side MOSFET and low-side
MOSFET.

2π × C2 × fC VOUT 2π × C2 × 0.1 × fS VOUT×<×
GEA × GCSVFB
GEA × GCS
VFB

2)

Bypass ceramic capacitors are suggested
to be put close to the Vin Pin.

Where fC is the desired crossover frequency
which is typically below one tenth of theswitching frequency.

3)

Ensure all feedback connections are shortand direct. Place the feedback resistors
and compensation components as close to
the chip as possible.

4)

ROUT SW away from sensitive analog areas
such as FB.

1. Choose the compensation resistor (R3) to set
the desired crossover frequency.
Determine R3 by the following equation:
R3 =MP2307 Rev. 1.9
5/28/2008

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MP2307 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
5)

Connect IN, SW, and especially GND
respectively to a large copper area to cool
the chip to improve thermal performanceand long-term reliability.

External Bootstrap DiodeAn external bootstrap diode may enhance theefficiency of the regulator, the applicableconditions of external BS diode are:z

VOUT is 5V or 3.3V; andz

Duty cycle is high: D=

VOUT
>65%
VIN

In these cases, an external BS diode isrecommended from the output of the voltage
regulator to BS pin, as shown in Figure3
External BST DiodeIN4148BSMP2307SW

CBST

L

5V or 3.3V
COUT

Figure 3—Add Optional External Bootstrap
Diode to Enhance Efficiency
The recommended external BS diode is IN4148,
and the BS cap is 0.1~1µF.
TOP Layer

Bottom Layer
Figure 2―PCB Layout (Double Layer)

MP2307 Rev. 1.9
5/28/2008

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MP2307 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTERTYPICAL APPLICATION CIRCUIT
C5
10nF

INPUT
4.75V to 23V

7

8

2

1

IN

BS
SW

EN

MP2307
SS
GND

FB
COMP

4

6

C6
(optional)

OUTPUT
3.3V
3A

3

5

C3
3.9nF

D1
B130
(optional)

MP2307_F03

Figure 4—MP2307 with 3.3V Output, 22uF/6.3V Ceramic Output Capacitor

MP2307 Rev. 1.9
5/28/2008

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MP2307 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTERPACKAGE INFORMATIONSOIC8N (EXPOSED PAD)
0.189(4.80)
0.197(5.00)
80.124(3.15)
0.136(3.45)
50.150(3.80)
0.157(4.00)

PIN 1 ID1

0.228(5.80)
0.244(6.20)

0.089(2.26)
0.101(2.56)

4

TOP VIEW

BOTTOM VIEW

SEE DETAIL "A"

0.013(0.33)
0.020(0.51)

0.051(1.30)
0.067(1.70)
SEATING PLANE
0.000(0.00)
0.006(0.15)

0.0075(0.19)
0.0098(0.25)

SIDE VIEW

0.050(1.27)
BSC

FRONT VIEW

0.010(0.25)
x 45o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC

0.050(1.27)

0.024(0.61)

0o-8o

0.016(0.41)
0.050(1.27)

0.063(1.60)

DETAIL "A"
0.103(2.62)

0.138(3.51)

RECOMMENDED LAND PATTERN

0.213(5.40)

NOTE:1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASHOR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA.
6) DRAWING IS NOT TO SCALE.

NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will notassume any legal responsibility for any said applications.
MP2307 Rev. 1.9
5/28/2008

www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2008 MPS. All Rights Reserved.

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