DATASHEETFMC160: FMC VITA 57.1 Compliant
Single channel 12-bit 3.6Gsps A/D and 14-bit 5.7Gsps D/A
FEATURES:• One ADC12D1800: Singlechannel 12-bit 3.6Gsps• One AD9129: Single channel
14-bit D/A up to 5.7 Gsps
(2.85Gsps without 1:2interpolation) - LVDS
• VITA 57.1-2010 compliant• Conduction Cooled - StandardOption• Single ended AC-coupled analogsignals• 6 MMCX/SSMC connectors
available from the front panel• 4 LVTTL signals available froman HDMI connector on the frontpanel• 4 Xilinx MGT available from an
HDMI connector on the frontpanel• Clock Source, Sampling
Frequency through SPI
communication busses• Flexible clock tree enables:-- on board VCO: 2200MHz 4400MHz-- external reference clock-- external sampling clock• Power-down modes to switch
off unused functions for system
power savings• Mil-I-46058c Conformal
Coating Compliant (optional)• HPC (high-pin count) compatible• LVDS IO signaling X

The FMC160 provides one 12-bit A/Dchannel at 3.6Gsps and one 14-bit D/Achannel at 5.7Gsps (2.85Gsps direct RFsynthesis) clocked by either an internalclock source (optionally locked to anexternal reference) or an externally supplied
sample clock. In addition, a trigger input
for customized sampling control is available
to users. The FMC160 daughter card ismechanically and electrically compliant to
the FMC standard (ANSI/VITA 57.1).
The HPC (high-pin count)-compatible
FMC160 has front panel I/O and can beused in a conduction-cooled environment.
The design is based on Texas Instruments’
ADC12D1800 Analog-to-Digital converter

ANSI/VITA 47

and Analog Devices’ AD9129 Digital-toAnalog converter. The analog signals are ACcoupled connecting to MMCX or SSMC coax
connectors on the front panel.
The FMC160 allows flexible control on clock
source through serial communication busses.
Furthermore the card is equipped withpower supply and temperature monitoringand offers several power-down modes toswitch off unused functions in order toreduce system level power consumption.
It is well suited for low power applications
such as airborne where the highest level ofperformance is required while ensuring thatmission range does not get affected.

Air-cooled

Conduction-cooled

EAC4

EAC6

ECC1

ECC4

Operatingtemperature

0C to +55C

-40C to +70C

0C to +55C

-40C to +85C

Storagetemperature-40C to +85C

-50C to +100C-40C to +85C

-55C to +105C

Humidity

95%

95%

95%

95%

Operatingvibration

5Hz to 100Hz PSD =0.04g2/Hz

5Hz to 100H PSD =0.04g2/Hz

100 Hz to 1000 Hz
PSD = 0.04 gs^2/Hz

100 Hz to 1000 Hz
PSD = 0.04 gs^2/Hz

5 Hz to 100 Hz PSD
increasing at 3 dB/
octave5 Hz to 100 Hz PSD
increasing at 3 dB/
octave1000 Hz to 2000 Hz
PSD decreasing at 6dB/octave

1000 Hz to 2000 Hz
PSD decreasing at 6dB/octave

100 Hz to 1000 Hz
PSD = 0.1 g2/Hz

100 Hz to 1000 Hz
PSD = 0.1 g2/Hz

1000 Hz to 2000 Hz
PSD decreasing at 6dB/octave

1000 Hz to 2000 Hz
PSD decreasing at 6dB/octave

Operating shock

20g, 11 millisecond,
half-sine or 20g, 11millisecond, terminal
sawtooth shock
pulses in all threeaxes

20g, 11 millisecond,
half-sine or 20g, 11millisecond, terminal
sawtooth shock
pulses in all threeaxes

40g, 11 millisecond
shock half-sine or40g, 11 millisecond,
terminal sawtoothshock pulses in all
three axes

40g, 11 millisecond
shock half-sine or
40g, 11 millisecond,
terminal sawtooth
shock pulses in all
three axes

Operating altitude-1500 ft to 60,000 ft(with airflow)-1500 ft to 60,000 ft(with airflow)-1500 ft to 60,000 ft-1500 ft to 60,000 ft

Conformal coating

Optional

Optional

Optional

Optional

DATASHEETFMC160: FMC VITA 57.1 Compliant Single channel 12-bit 3.6Gsps A/D and 14-bit 5.7Gsps D/ASpecifications

Block diagram

MGT[4]

Board
Control

Board
Monitor

EEPROM
2I C
Clock out

FMC High-pin Count 400-pinsLVDSSupport• Stellar IP available for this product. A
simple way to design FPGA firmware with
automated code and bitstream generation.
• Can be used on any VITA 57.1 compliant
carrier card
• For support, please visit our support
forum www.abaco.com/forum

LVTTL[4]HDMIApplication• Direct RF Down Conversion• Software defined radio (SDR)• RADAR/SONAR• Ultra Wideband Satellite Digital Receiver• Medical equipment• Aerospace and test instrumentation

Clock &Sync Tree

Clock in /Ref inTrigger /Sync

AS9100 CertifiedAnalog
Out A

AC coupling
4.5MHz-3GHzAD9129
14-Bit, 5.7 Gsps
D/AAC coupling
4.5MHz-3GHz

ADC12D1800
12-Bit, 3.6 Gsps
A/DAnalog
in B
Analogin A

LVDS
1x Clock
1x Frame
2x14 Data
LVDS
2x Clock
4x12 Data

Ordering information
Build your part number online on the product page http://www.abaco.com
Talk to us about your algorithmic requirements, Abaco Systems is a full-service firmware and softwaredevelopment house. We are a specialist at high performance FFT and Video Processing. Check with us, we may
have IP Cores that meet requirements for your application, right off the shelf.

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