DATASHEETFMC165 FPGA Mezzanine Card
Dual Channel ADC and Single Channel DAC
The FMC165 provides two 14-bit analogto-digital (A/D) channels supporting RFsampling at 2.6 GSPS and one 14-bit
digital-to-analog (D/A) channel with sampling
rates up to 5.2 GSPS (2.6 GSPS direct RFsynthesis). The converters are clocked byeither an internal clock source (optionallylocked to an external reference) or an
externally supplied sample clock. In addition,a trigger input for customized sampling
control is available to users.
The FMC165 daughter card is mechanicallyand electrically compliant with the FMC
standard (ANSI/VITA 57.1). It has frontpanel I/O and can be used on any FMC/
FMC+ compatible carrier in an air-cooled
configuration. In a conduction-cooled
environment, it can be used with Abaco FPGA
carrier cards.

The design is based on Texas Instruments’high-speed, high-performance ADC32RF44A/D converter (ADC) and Analog Devices’AD9129 D/A converter (DAC). The analog
signals are AC coupled connecting to SSMB
coax connectors on the front panel.

FEATURES:• ADC32RF44 ADC: dual-channel
14-bit up to 2.6 GSPS with DDC(or 14-bit @ 2.5 GSPS with fulldata rate)

The FMC165 allows flexible control of clock
source through serial communication buses.
The card is equipped with power supply andtemperature monitoring and offers several
power-down modes to switch off unused
functions in order to reduce system level
power consumption.

• AD9129 DAC: single-channel
14-bit up to 5.2 GSPS (2.6GSPS data rate)

The FMC165 is well suited for low power
applications such as airborne where thehighest level of performance is required while
ensuring that mission range is not affected.

• Single-ended AC-coupled
analog signals• RF input bandwidth up to 3.2
GHz and output up to 2.6 GHz
in x2 interpolation mode
• JESD204B (A/D), LVDS (D/A)
FPGA data buses• 6 SSMB connectors available
from the front panel• Clock source, sampling
frequency and calibration
through I2C communication• buses• Flexible clock tree enables- on board VCO - 1.5 to 2.6 GHz- external reference clock- external sampling clock• Multi-board synchronization
capable• ANSI/VITA 57.1 compliant• HPC (high pin count)compatible• Conduction-cooled
configuration available on
Abaco FPGA carrier cards

DATASHEETFMC165 FPGA Mezzanine Card Dual Channel ADC and Single Channel DAC
Block diagram
Operating Temperature• 0°C to +55°C (air-cooled environment with400 LFM mean airflow)• -40°C to +75°C (conduction-cooledenvironment at the card thermalinterface)
Applications• Direct RF down conversion• Electronic warfare (EW)• Radar/Sonar• Software defined radio (SDR)• Ultra-wide-band satellite digital receiver• Medical equipment• Aerospace and test instrumentationSupport• StellarIP and compatible reference
designs are available for this product;
StellarIP provides a simple way to design
FPGA firmware with automated code
• Xilinx IP Integrator reference designs
available for selected FPGA carrier cards• Windows® and Linux® (for VxWorks®
support contact factory)• User manual• Performance report• Support provided on Abaco Systems
private support forum

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08/20 A-DS-5260