P03

Feasibility study of Ge2Sb2Te5/GeCu2Te3 memory cellwith multi-level resistance1

S. Shindo1, Y. Saito2, Y. Sutou1, J. Koike1, J.M. Lee3 and Y.H. Song3
Dept. of Materials Science, Tohoku University, Sendai, Miyagi, Japan, 2 Nanoelectronics Research Institute, AIST,Tsukuba, Ibaraki, Japan, 3Dept. of Electronic Engineering, Hanyang University, Seoul, Korea
E-mail: ysutou@material.tohoku.ac.jp
ABSTRACTIn this work, as a feasibility study of multi-level resistance PCRAM, we investigated the phase change characteristics ofGe2Sb2Te5(GST)/GeCu2Te3(GCT) memory cell. Since GCT shows lower meting and higher crystallization temperatures
than GST, the direct transition for multi-level resistance states can be expected to be obtained. GST/GCT memory cellshowed double switching phenomenon, which is due to the crystallization of GST layer and GCT layer. Moreover, after ahigher and shorter reset pulse was applied to the memory cell, such double switching phenomenon was reconfirmed.
Key words: Ge-Cu-Te, Ge-Sb-Te, multi-level recording, multi-layer memory cell

1. INTRODUCTION
For high-density integration, the scaling-down of a cell size of phase change random access memory (PCRAM) has
been widely studied. Moreover, the function of a multi-level recording is also essential to PCRAM like flash memoryfor high density. In the case of PCRAM having one phase change material, multiple states must be realized byadjusting set/reset pulse conditions. However, since one phase change material doesn’t give a sufficient resistancemargin for multi-level states in viewpoint of reliability, the structural innovation is needed [1, 2]. Meanwhile, themulti-level resistance PCRAM with two kinds of phase change materials has been proposed. However, for thecombination using the conventional phase change materials like Ge2Sb2Te5 (GST), Sb-Te-based alloy etc, since its
melting point is proportional to its crystallization temperature, direct data transitions from original data to new data
are impossible. In this work, as a feasibility study, we investigated the phase change characteristics of GST/GeCu2Te3(GCT) memory cell. Since GCT shows lower meting and higher crystallization temperatures than GST [3,4], the direct transition for multi-level resistance states is expected to be obtained.
2. MULTI-LEVEL OPERATION
Fig. 1(a) shows schematics of multi-level states (4 states) for PCRAM with serial connection of three kinds of phasechange materials, M1, M2 and M3, where the resistance of amorphous state is higher in the order of M1, M2 and M3.
Fig. 1 (b) and (c) show phase change and data transition characteristics of multiple phase change materials withdifferent melting point and crystallization temperatures. Here, two cases can be discussed in viewpoint of phasechange temperatures. In case of Fig. 1(b), M1, M2 and M3 have high, middle and low crystallization temperatures,respectively, and high, middle and low melting points, respectively. Basically, since a phase change material with ahigher crystallization temperature shows a higher melting point, the combination of phase change materials as shownin Fig. 1(b) is common case. In this case, troubles in some data writing happen. For example, to conduct the writingfrom “10” to “01”, all materials must be crystallized first and then only M3 must be amorphized. Similarly, theM1 HLLL

M2 H

HLLM3 H

HH

L

R11 >> R10 >> R01 >> R00

Resistance(b)amo.

M1
M2
M3A

amo.
amo.

Temperature

(c)

amo.

M1
M2
M3amo.
amo.

M3 T M2 T M1
TxM1 TxM2 TxM3 Tm
mm

Temperature

B

00

00

M3 T M2 T M1
TxM3 TxM2 TxM1 Tmmm

Resistance

(a)

01

10○

○

11○

○

○

01

○

10○

×11○

××

B

00

01

10○

○

○

○

○

A

00
01

○

10○

○

11○

○

○

11○
○

Fig.1. (a) Multi-level states in a combination of M1, M2 and M3 materials, where H and L mean high and low
resistance, respectively. (b)(c) Combination of multiple phase change materials with different melting point andcrystallization temperature. Tx and Tm indicate crystallization and melting temperatures. ×:direct transition (A→B) isimpossible. ○:direct transition (A→B) is possible.

writing from “11” to “01” or “10” cannot be done directly. Such additional operation results in speed delay and power
consumption in multi-level operation. Meanwhile, in a combination as shown in Fig. 1(c), a direct transition can beachieved because the materials show non-proportional relationship between melting point and crystallization
temperature. As a feasibility study of a combination of Fig. 1(c), we investigated the phase change characteristics ofGST/GCT memory cell.
3. EXPERIMENTS
TiN films with a thickness of 50 nm were used for medium and bottom electrode as a role of heater. The top andbottom phase change materials were GST and GCT, respectively. The contact area was 10 μm × 10 μm for both phasechange materials. And, the top electrode was Al. The schematic of the device structure is shown in the inset of Fig. 2.
4. RESULTS AND DISCUSSION
Fig. 2 shows R-I curve of GST/GCT memory cell, where the inset shows the schematic of the device. The initialstate of the both layers was amorphous. When a pulse current approaches to around 18 μA, the first resistance change
from high to middle resistance is observed. And, when a pulse current increases to 70 μA, a change of an additional
resistance is also observed, which shows data transition to lower resistance state. These results indicate that the middlestates of “10” or “01” are directly achieved from “11” like Fig 1(c). Moreover, after a higher and shorter reset pulse
was applied to the memory cell, such double switching phenomenon was reconfirmed [5]. Fig. 3 shows cyclic
behaviors of the multi-layer cell. It was confirmed that transition from low- to middle-level, from middle- to low-level,from low- to high-level and from high- to low-level could be achieved by controlling the applying electrical pulse.
These results suggest that the combination of GST/GCT gives better scaling feasibility to achieve gigabit array.
105TEGST
GCTBEME

Cell resistance (Ω)

Device resistance (Ω)

amo.-GST + amo.-GCT
510cry.-GST + amo.-GCT

410cry.-GST + cry.-GCT
3100.0-5

5.0x10-4

1.0x10-4

1.5x10High-level
104
Middle-level
Low-level103-42.0x10Applied current (A)Fig.2. R-I characteristic of memory cell with GST andGCT. Here, three resistance states are confirmed. TE, ME
and BE indicate top, middle and bottom electrodes.

01234567

Number of cycles

89 10Fig.3. Cyclic characteristic of the multi-layer cell. Threestate transition was confirmed by controlling the applying
electrical pulse.

5. CONCLUSION
Multi-layer device with GST and GCT showed multi-resistance level state. The present results suggest that the GCT
can be one of candidate materials for a middle or low data state in multi-level PCRAM cell providing a directtransition without any additional step during writing operation. Such a multi-level PCRAM cell is expected to showhigh speed operation and low power consumption.
ACKOWLEADGMENT

This work was supported by “Japan Science and Technology Agency” and KAKENHI (23360297).
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