Application Report
SLLA436 – January 2018

Signal and power isolation with 3.3 V / 5 V input and 12 V /15 V output
Gary Chu ...................................................................................... Field Applications Engineer, Isolation
ABSTRACTThis application note gives out information on how to make a compact-design for a combination of signal
and power isolation. There are several important points to achieve a proper design for isolation power
supply that will be discussed in this app note. The board contains three independent lanes that showtransformer and component selection for different requirements.

1
2
3
4
5
6

Contents
Product Introduction ......................................................................................................... 2
Schematic ..................................................................................................................... 2
Design Specifications ....................................................................................................... 4
PCB Board Design........................................................................................................... 6
Testing Results ............................................................................................................... 7
Conclusion .................................................................................................................. 11
List of Figures

1

LP2951-Q1 is compatible for 5 V, 3.3 V output .......................................................................... 42

UA78L05 is used for 15 V to 5 V rail ...................................................................................... 4

3

PCB lsyout .................................................................................................................... 64+15 V Without LDO .......................................................................................................... 75–15 V Without LDO .......................................................................................................... 7

6+12 V With LDO ............................................................................................................. 77–12 V With LDO.............................................................................................................. 78

5 V With LDO................................................................................................................. 79

5 V Without LDO ............................................................................................................. 710

5 V After LDO ................................................................................................................ 8

11+15 V After LDO ............................................................................................................. 812+15 V Without LDO .......................................................................................................... 813

5 V After LDO ................................................................................................................ 914+15 V After LDO ............................................................................................................. 915+15 V Without LDO .......................................................................................................... 91

Configurations of the Output Rectifier .................................................................................... 22

Single Output Transformer ................................................................................................. 53

Multiple Output Transformers .............................................................................................. 5

4

Maximum Input Voltage Calculations ..................................................................................... 55

Suggested Transformers .................................................................................................. 12

List of Tables

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1

Product Introduction

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Trademarks
All trademarks are the property of their respective owners.

1

Product Introduction
ISO7741 and SN6505 are devices chosen to implement the signal and power isolation. For thetransformer, single and multiple output push-pull transformers of Wurth Electronics are used for thisdesign.
The ISO774x devices are high-performance, quad channel digital isolators with 2500 VRMS isolation
which also provide high electromagnetic immunity and low emissions at low power consumption. This
device comes with enable pins which can be used to put the respective outputs in high impedance formulti-master driving applications and to reduce power consumption. The ISO7741 has three forward and
one reverse-direction channels. If the input power or signal is lost, the default output is high for devices
without suffix F in their part name and low for devices with suffix F, which is the fail-safe mode of theisolator. An ISO7741 with DBQ package is used to reduce the solution size of each lane by placing theisolator at the same place with the transformer but on different layers.
The SN6505 is a low-noise, low-EMI push-pull transformer driver specifically designed for small form
factor, isolated power supplies. It drives center-tapped transformers from a 2.25 V to 5 V DC power
supply. Ultra-low noise and EMI are achieved by slew rate control of the output switch voltage and throughSpread Spectrum Clocking (SSC). The SN6505 consists of an oscillator followed by a gate drive circuitthat provides the complimentary output signals to drive ground referenced N-channel power switches. The
device includes two 1-A Power-MOSFET switches to ensure start-up under heavy loads. The switchingclock can also be provided externally for accurate placement of switcher harmonics or when operatingwith multiple transformer drivers. SN6505 includes a soft-start feature that prevents high inrush current
during power up with large load capacitors.

2

Schematic
This section discusses how to configure the signal and power isolation. Refer to the block diagram below;
different rectifier configurations can create different scaling of output voltage.
Table 1. Configurations of the Output Rectifier
VOUT = 4n x VIN

n

n

n
VIN

VIN

VOUT = +n x VIN

VIN+

VOUT = 2n x VIN

±

+
±

+
±

+

+
±

±
VOUT = -n x VINa) Secondary enablebipolar outputb) Secondary voltage
doublingc) Secondary voltage
quadruplingTo create a bipolar output voltage at the secondary side, configuration (a) from Table 1 is used in thisdesign.

2Signal and power isolation with 3.3 V / 5 V input and 12 V / 15 V output
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Schematic

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2.1

Single Output Transformer Configuration
U1
2

VCC1
C17 ENP1
0.1µF
CLK1

C112 C1110µF 10µF

5
6

D1

1

EN

D2

3

CLK

GND

4

VCC

T11

SN6505BDBVR

6

2

5

D12

D13

D14
C12
1µF

4

VCC1
J12

3
2 ENP1
1

TP3

GNDp
3

J11

D11

+15Vs1-T
VCC1GNDp
GNDp GNDp

1

350µH
CLK1
VCC1

GNDp

TP11

GNDp

C18
1µF

GNDp

C13
1µF

GNDs1

TP12

-15Vs1-T
TP14

Single output configuration
Single output transformer can be used when there is limited space when only a single power rail isneeded for field side. An optional Buck converter or LDO can also be used to generate a lower power railor reduce the noise from switching.

2.2

Multiple Output Transformer Configuration+15Vs3-o
T41
U4
2

VCC1
C413
10µF

C41
10µF

GNDp

C49 ENP3
0.1µF
CLK3

VCC

D1

10

+15Vs3-o3

9

5Vs3-o

EN

D2

3

6

CLK

GND

4

VCC1

GNDp

4

SN6505BDBVR

8

D42

D43

D44

D45

5Vs3-o
D46

D47

D48

-15Vs3-T+15Vs3-T

GNDs3

GNDp

VCC1
3
2 ENP3
1

D41

1

5

GNDp
J41

2

-15Vs3-o7-5Vs3-o6-15Vs3-o -5Vs3-T

J42
CLK3

GNDp

GNDp

1

NC

NC

5Vs3-T

572µH-5Vs3-oMultiple Outputs with Multiple Secondary Windings
Multiple output transformers can be used to implement multiple power rails as needed for larger current
loads.

2.3+/– 12 V and +/– 15 V LDO
U42-15Vs3-T

2
3
6
7
5
8

VIN
VIN
VIN
VIN

TP42
VOUT

R43
240
ADJ

NC
NC

U41
-15Vs3

1+15Vs3-T 3
C412
1µF

C43
1µF

4

IN

OUT

2

ADJ

1

+15Vs3
R41
470

TP41
C42
1µF

LM317LIPK
GNDs3

R44
2.7k GNDs3

R42
5.17k

LM337LMX/NOPB

GNDs3

GNDs3
GNDs3

An adjustable LDO is used in this design because it can achieve +/– 12 V and +/– 15 V compatible
solutions with enhanced load regulation capabilities.

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Schematic

2.4

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3.3 V and 5 V LDO
U13

U43
5Vs3-T

8
7
3

INPUT

OUTPUT

FEEDBACKSHUTDOWN

TP43

SENSE

2

VTAP

6

ERROR
GND
EP

GNDs3

+15Vs1-T 3

5Vs3

1

C48
1µF

OUTPUT

1

COMMON

2

INPUT

C19
1µF

C16
1µF

UA78L05CPK
GNDs1

5
4
9

5Vs1
TP17

GNDs1
GNDs1

GNDs3

Figure 2. UA78L05 is used for 15 V to 5 V rail

LP2951-33DRGR

GNDs3

Figure 1. LP2951-Q1 is compatible for 5 V, 3.3 V output

A fixed output LDO is used here to reduce component count and solution space.

2.5

Isolator Configuration
VCC1

C21

U2

GNDp

5Vs1
0.1µF

1

VCC1

VCC2
OUTA

SDI2_iso

OUTB

13

CONV2_iso12

SCLK2_iso

IND

11

SOD2_iso

EN2

10

EN22

GND2
GND2

9
15

3

INA

CONV2_spi

4

INB

SCLK2_spi

5

INC

OUTC

SOD2_spi

6

OUTD

EN21

7

EN1

2
8

GND1
GND1

GNDs1

14

SDI2_spi

C22

16

0.1µF

ISO7741DBQR
GNDp

GNDs1

GNDp

GNDs1
1 SDI2_spi
3 CONV2_spi
5 SCLK2_spi
7 SOD2_spi
EN21
9

2
4
6
8
10

SDI2_iso 2
CONV2_iso4
SCLK2_iso 6
SOD2_iso 8
EN22
10

J21

1
3
5
7
9

J22

GNDp

GNDs1

There are different I/O combination of isolators from ISO7740 to ISO7742; the selection decision depends
on the digital channel configuration in the system. Signal input and output are connected to the connector
directly.

3

Design Specifications

3.1

Transformer Selection and Design
In total, there are three lanes of isolation power in this design. Each of them using a different push-pulltransformer.

4

Signal and power isolation with 3.3 V / 5 V input and 12 V / 15 V output
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Table 2. Single Output Transformer
Transformer

Rail I/O voltage

Turns ratio

V-t productCurrent capability

750316818

5 V to 15 V

3.5

9 µVs

333 mA

750316769

5 V to 15 V

3.45

11 µVs

75 mA

Both of the single output transformers are used for 5 V to 15 V. Transformer -6818 has a big rating thatcan convert much more power at the field side. It can be used to support power for isolation gate drivers
in motor drive applications. Transformer -6769 has smaller rating and size, and even though it has a lower
rated power, it’s better for compact designs. Transformer -6769 should be more suitable for PLC or similar
applications that don’t need much power at the field side.
Table 3. Multiple Output Transformers
Transformer

Rail I/O voltage

Turns ratio

V-t productCurrent capability

750316018

5 V to 15 V, 5 V

3.14; 1.14

8.9 µVs

15 V – 90 mA ; 5 V – 127 mA

Transformer -6018 is a multiple output transformer with two output windings. Due to the design output
voltage being higher than the rated voltage, this transformer is used with a 12 V LDO, although thistransformer is originally designed to operate without an LDO at a 15 V output configuration.
For consistent supply voltages, LDOs are recommended on each power rail. An extra converter or LDO
may be needed if other power rails are in the system design. To reduce the amount of components
needed and increase the current capability, multiple output transformers can also be used in designs.

3.2

LDO Selection
Current capability of LDOs should slightly exceed the specified load current of the application to preventthe LDO from dropping out of regulation. Therefore, for a load current of 75 mA, choose 75 mA to 125 mA
output LDOs. While regulators with higher drive capabilities are acceptable, they also usually possess
higher dropout voltages that reduce the converter's overall efficiency.
Dropout voltage is also important when choosing LDOs because different LDOs have different minimum
dropout voltages. Minimum input voltages are required to prevent the regulator from dropping out of line
regulation. The minimum voltage required on the input of the LDO is modeled by Equation 1:

VIFmin = VDO Fmax + VOFmax.5 8

Ex: 8+FIEJ = 2.2 + 15.3 = 17.5 8(1)

The maximum regulator input voltage must be higher than the rectifier output under no-load. Under thiscondition there is no secondary current reflected back to the primary, thus making the voltage drop across
RDS-on negligible and allowing the entire converter input voltage to drop across the primary. At this point,
the secondary reaches its maximum voltage, demonstrated by Equation 2:

VSFmax = VINFmax × n
Ex: 85FI=T = 5.5 × 3.5 = 19.25(2)

Table 4 shows calculation of maximum input voltage for LDO that is used in this app note.
Table 4. Maximum Input Voltage Calculations
Part Number

Vin-max

Turn ratio

Vs-maxMax LDO Vin

UA78L05

5.5 V

3.5

19.25

20

LM337L

5.5 V

3.5

19.25

32

LM317L

5.5 V

3.5

19.25

35

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PCB Board Design

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Table 4. Maximum Input Voltage Calculations (continued)
Part Number

Vin-max

Turn ratio

Vs-maxMax LDO Vin

LP-2951-Q1

5.5 V

1.14

6.27

35

If the dropout voltage of an LDO is much higher than that of the switching regulator, efficiency will become
worse under the same load conditions when the voltage step down is large. Since the 5 V rail of thisdesign is supplied from a 15 V rail transformer output, thermal performance becomes important in thisdesign.

4

PCB Board Design
To achieve a low emissions power design, there are several device placement and layout criteria thatneed to be adhered to. These are shown in the following section; this design places the signal isolation
directly under the isolated power path to achieve compact board design.

4.1

Isolation PowerThe PCB layout that uses multiple output transformers is shown in Figure 3

Figure 3. PCB lsyout
The decoupling cap (C49) of SN6505 (U4) should be placed as closely as possible to the Vcc pin. One
reason why is to filter out the input noise, and the other is to supply any transient current with low parasitic
inductance. The 10 uF cap (C413) is placed as closely as possible to the power input of the transformer
for high frequency current supply to the transformer during switching. Closer capacitor placement can
reduce parasitic inductances and support the high frequency switching current through the transformer.
At the output side of the transformer, C411 and C44 are placed right at the output of the rectifier diodes(D41-D44) to create a proper ground return path for the high frequency switching current. Short return
paths of high frequency currents can reduce the total emissions of a design.

6

Signal and power isolation with 3.3 V / 5 V input and 12 V / 15 V output
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4.2

Signal Isolation

The digital isolator in this design is placed on the bottom layer to reduce board space. Its 0.1 µF
decoupling capacitor should be placed as closely to the supply and ground pins of the isolator as possible,
This placement also reduces parasitic inductance on the trace between the capacitor and isolator. The
small pour and vias used to connect Vcc and GND can reduce inductance between the bottom layer andpower plane.

5

Testing Results
Definition of testing result:

Data Plots Legend

5.1

Efficiency and Load Regulation
Multi-output transformer (750316018):

Figure 4. +15 V Without LDO

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Figure 5. –15 V Without LDO

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Testing Results

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Data Plots Legend (continued)

Figure 6. +12 V With LDO

Figure 7. –12 V With LDO

Figure 8. 5 V With LDO

Figure 9. 5 V Without LDO

Single output transformer (750316818):

Figure 10. 5 V After LDO

8Signal and power isolation with 3.3 V / 5 V input and 12 V / 15 V output
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Figure 11. +15 V After LDO

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Data Plots Legend (continued)

Figure 12. +15 V Without LDO

Single output transformer (750316769):

Figure 14. +15 V After LDO

Figure 13. 5 V After LDO

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Testing Results

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Data Plots Legend (continued)

Figure 15. +15 V Without LDO

10Signal and power isolation with 3.3 V / 5 V input and 12 V / 15 V output
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5.2

Testing Waveform

Switching Waveform on D1 at 200 mA Load for -6818 Transformer

Output Ripple at 200 mA Load for -6818 Transformer

6

Conclusion
To have better regulation at the output voltage, an LDO or converter may be needed after rectification.
Depending on the design's load demand, tradeoffs will be made between accuracy, solution size, cost,and efficiency.

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Conclusion

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PCB design for high frequency applications mainly considers the effect of parasitic inductance on asystem. Because impedance of inductance becomes extremely high when signals or switching are highfrequency, any reduction in inductance is beneficial, so care must be taken during layout design andplacement. Another place where parasitic inductance is considered is on capacitor selection: capacitorswith smaller values have smaller inductances. Decoupling capacitors used in high frequency signal or
power rails should have smaller values and be placed as closely as possible to IC devices. After
minimizing inductance, the capacitor can provide proper support to the device.
Table 5 is a summary table for suggested transformers in this design from Wurth Electronic:
Table 5. Suggested Transformers

12Part Number

Input Voltage

Output Voltage and Current

Isolation Rating Per Min

750316018

5V+/– 15.7 V @ 85 mA, +/– 5.7 V @ 200 mA

2500 VAC

750316818

5V

15 V @ 390 mA

2500 VAC

750316769

5V

15 V @ 17 5mA2500 VAC

750316819

5V

12 V @ 460 mA

2500 VAC

750316770

5V

12 V @ 225 mA

2500 VAC

750316016

5V+/– 12.8 V @ 95 mA, +/– 5.7 V @ 200 mA

2500 VAC

750316017

5V+/– 12.8 V @ 95 mA, +/– 4.2 V @ 200 mA

2500 VAC

750316019

5V+/– 15.7 V @ 95 mA, +/– 4.2 V @ 200 mA

2500 VAC

750316668

5V+/– 12.8 V @ 95 mA, +/– 5.7 V @ 200 mA

2500 VAC

750316669

5V+/– 12.8 V @ 95 mA, +/– 4.2 V @ 200 mA

2500 VAC

750316670

5V+/– 15.7 V @ 85 mA, +/– 5.7 V @ 200 mA

2500 VAC

750316671

5V+/– 15.7 V @ 95 mA, +/– 4.2 V @ 200 mA

2500 VAC

750316853

3.3 V

12 V @ 165 mA

2500 VAC

750316854

5V

12 V @ 230 mA

2500 VAC

750316855

3.3 V

23 V @ 90 mA

2500 VAC

750316856

5V

23 V @ 145 mA

2500 VAC

750316886

5V

5 V @ 675 mA

2500 VAC

750316887

3.3 V

5 V @ 460 mA

2500 VAC

750316888

5V

3.3 V @ 900 mA

2500 VAC

750317072

3.3 V

20 V @ 90 mA

2500 VAC

Signal and power isolation with 3.3 V / 5 V input and 12 V / 15 V output
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