DISCO Technical Review Mar. 2016

The effects of edge trimming
Engineering R&D Division, Operation V
Abstract
In recent years, the thickness of flash memory and its controller chips has been reduced due to theminiaturization and the capacity enlargement of smartphones and tablet devices. Moreover therequirements of more precision thinning process and yield improvement become more severe in
manufacturing process. An edge chipping at the outer area of the wafer, which causes wafer breaking, is
one of critical issues in ultra-thinning process due to the influence ofrounded shape. A process called“Edge trimming” effectively removes the rounded shape on the outer edge of the wafer which causesedge chipping, preventing the wafer from breaking. In this review, we report the effects of edge trimming,
which has been adopted for improving yield when performing ultra-thin wafer grinding.
1. Introduction
During wafer ultra-thinning, the edges chipping
because of the rounded shape of the wafer's outeredges induces wafer breaking. Therefore, aprocess called "edge trimming" is employed toremove the rounded area at the outer edges using
a blade before grinding.
There are the two edge trimming methods: edge
trimming before bonding, in which the device
wafers are processed from the front before
bonding, and edge trimming after bonding, inwhich the device wafers are fully cut from theback after carrier wafer bonding.
For the edge trimming before bonding, depth ofapproximately 150-200 µm is cut from the surfaceof the device wafers. Thus, this method is better
than the edge trimming after bonding in terms ofedge-chipping size and feed speed. However, as
the surface of the device wafer is exposed, it
might cause particle contamination and contact on
the device surface during wafer handling (Fig. 1).
In contrast, for the edge trimming after bonding,the device wafers must be fully cut, and thecutting amount almost equals to the original
thickness of the silicon (Si) wafers. Thus, higher
cutting capability is required for the blade thanthat required in edge trimming before bonding.
Therefore, a blade with larger grit size is normallyused. The feed speed is usually set at low
considering the processing load. However, as thewafers are already bonded, particle contaminationand contact on the device surface during wafer
handling are prevented.
This review presents the test results to verify theeffect of edge trimming before bonding in thewafer grinding process.

Fig. 1 Edge trimming

2.

Effect of edge trimming and processverification
2.1
Effect of edge trimming
To verify the actual effect of edge trimming,
wafers with and without trimmed edges wereground and their chipping at the edge sections
were compared.
The results in Fig. 2 show that grinding withoutedge trimming caused edge chipping; however,grinding with edge trimming allowed mitigating
this problem.

Fig. 2 Wafer edges after grinding with and withoutedge trimming

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DISCO Technical Review Mar. 2016

2.2
Process verification
For processing, a dicing saw with blades ofthickness 1-3 mm was used. The width for edge
trimming is generally 0.5-3 mm, and the blade
thickness is determined depending on the process.

Damage depth (µm)

Damage depth at the edge section after rough grinding

After the edge is trimmed using the blade, theedge shape normally has an angle of 90°. To
determine the most effective trimming angle, theangles were compared. Fig. 3 shows the images ofthe compared angles. This confirms that edge
trimming is most effective for reducing edge
chipping when the angle is 90°. At other angles,edge chipping occurs because the effect of edge
trimming is insufficient. Fig. 4 shows theverification process with various edge trimmingangles.

80706050403020100Avg*Varies depending on the processing parameters.
Finished thickness Finished thickness Finished thickness Finished thickness Finished thickness+ 25 µm+ 60 µm+ 80 µm+ 100 µm+ 250 µm

Edge trimming cut depth (µm)

Fig. 6 Damage depth in the Z-direction after roughgrinding.

The wafers were thinned and polished to theirfinished thicknesses to verify edge chipping. Fig.
7 shows the number of edge chippings. This graphconfirms the correlation between the number ofedge chippings and the extent of damage due torough grinding. When the edge is trimmed for afinished thickness plus 100 µm or more, edge
chipping can be prevented.
The aforementioned results show that a finishedthickness plus 100 µm is recommended as theadequate edge trimming depth based on theassumption that the fine grinding depth is 40 µm.

Fig. 3 Comparison of edge trimming angles.

The recommended width of edge trimming differs
depending on the bonding method. Chemicalmechanical polishing (CMP) is normally
performed when fabricating interconnects on
wafers. Owing to the characteristics of CMP
process, the outer edges tend to be lower thancenter area. The lower areas vary depending on
the process and are usually below 3 mm fromthe outer edges. Therefore, when the wafers arebonded through oxide bonding, which is used in
the manufacturing of Backside Illumination
CMOS sensors (BSI; a type of image sensor), it
produces areas at the outer edges of a wafer wherebonding is insufficient. If these wafers are ground,it may cause problems, such as peeling. Thus, therecommended edge trimming width is 3 mm. In
resin bonding, which is used in the manufacturingof 3D-IC using through-silicon vias (TSVs), gaps

Fig. 4 Process of this verification with various edge
trimming angles

Next, the adequate depth of edge trimming wasverified. Thinning after edge trimming is usuallyconducted in two stages of rough and finegrinding. After edge trimming, the remnant part isremoved during a low-speed process of the roughgrinding (Fig. 5). Based on the assumption thatthe depth of the damage created during thisprocess may relate to edge chipping, the extent of
the damage after rough grinding was examined.
Fig. 6 shows the extent of damage at each cutting
depth of edge trimming. This graph confirms thatthe remnant section was removed when it wasthinned through rough grinding, and the wafer
was damaged.

Numb er o f ed ge ch ip ping s

3025201510501 st

2 nd

1 st

2n d

Fin ish ed th ick ness

Finished thickn ess+ 2 5 µm

+ 60 µ m

1st2n d1st2 ndFin ish ed th ick ness Fin ish ed th ick ness
+ 8 0 µm

+ 10 0 µm

1 st

2 nd

Finished thickn ess+ 2 50 µ m

Fig.7 Comparison of the number of edge chippings

Fig. 5 Grinding in this review

2DISCO Technical Review Mar. 2016

4. Conclusion
As explained in this review, edge trimming isessential to meet the ultra-thinning process of Siwafers. We have verified and evaluated thistechnology to achieve the best results. In thefuture, to provide optimal applications withenhanced performance, we will verify edge
trimming for materials currently available but notlimited to Si wafers.

caused by the lower areas at the outer edges canbe absorbed by the resin thickness. Thus, noinsufficient bonding areas are produced.
Therefore, the edge-trimming width must be
considered only at the rounded areas of waferedges. The width of the rounded area is often
approximately 0.3-0.4 mm. It is necessary tocompletely remove this area, and thus therecommended width is 0.5 mm, considering theprocessing variation. Fig. 8 shows edge
conditions after each type of bonding.

Fig. 8 Edge conditions after bonding

3. Introduction of edge trimming in FEOL
(Front-End-of-Line) processes
Edge trimming before bonding requires high-levelcleanliness because the device wafer must be
bonded to a carrier wafer in the subsequent
process. Therefore, we developed the advanced
equipment that can handle the edge clamp transfer
system and chemical cleaning. Fig. 9 displays aparticle counts after edge trimming using theadvanced equipment. The result shows five
particles with sizes of 0.1 µm or less (edgeexclusion: 4 mm).
Edge trimming has gradually been adopted inFEOL processes. We will further evaluate anddevelop this technology to satisfy the requirementin the advanced device process.

Fig. 9 Particle map

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