Voltage reference
selection basics

Voltage references are key components in data
conversion systems which enable the ADC and
DAC to read accurate values and are used invarious sensing applications.
While they are simple parts which often may only have two or three pins, there
are numerous parameters that affect the performance of a reference, and carefulconsideration of all the parameters are required to select the proper one.
This paper covers the differences between the shunt and series architectures, explains
key parameters and special features, and shows how to properly calculate the error for agiven reference in a given operating condition.
Choosing the best shunt or seriesreference for your application

VREF

Analog
Input

Digital
Input

VREF

Dn

Voltage references are a key building block in++‘ANALOG METER STICK’

specifications and how they contribute to error
is necessary for selecting the right reference forthe application. Figure 1 shows the application ofa voltage reference in a simple analog-to-digital++

DECODERDn

DIGITAL
LOGIC

DigitalOutput-‘ANALOG METER STICK’

data conversion systems. Understanding their

D n-1

D n-2

+

-

D n-3

Buffer+acts as a very precise analog ‘meter stick’ against-

which the incoming analog signal is compared

ADC

D1

DAC

(as in an ADC) or the outgoing analog signal
is generated (as for a DAC). As such, a stable

Figure 1. Simplified ADC/DAC diagrams.

system reference is required for accurate andrepeatable data conversion; and as the number ofquality references. In most cases, the internal

bits increases, less reference error can be tolerated.

reference can be overdriven by an external one

Monolithic voltage references produce an output

to improve performance. Terms such as “highvoltage which is substantially immune to variations

precision” and “ultra-high precision” are common inin ambient temperature as well as loading, input

reference datasheets but do little to help designers

supply, and time. While many ADCs and DACs

in their selection. This article seeks to provide anincorporate an internal reference, beyond 8 to 10

explanation of common reference specifications,bits it is rare to find one with sufficient precision

rank their relative importance and show how aas high-density CMOS technologies commonly

designer can use them in some simple calculations

used for data converters typically produce low-

to narrow the search.

Voltage reference selection basics

I

2

D n-3

D1

converter (ADC) and digital-to-analog converter(DAC). In each case, the reference voltage (VREF)

D n-1
D n-2

September 2018

AnalogOutputFigure 2 shows the two available voltage referencesload current plus the reference’s minimum operating

topologies: series and shunt. A series reference

current (the minimum bias current required forprovides load current through a series transistor

regulation). In applications where the maximum

located between VIN and VREF (Q1), and is basicallyload current is low (e.g. below 100 μA to 200 μA),a high-precision, low-current linear regulator. A

the disparity in power consumption between series

shunt reference regulates VREF by shunting excess

and shunt references shrinks. There is no inherent

current to ground via a parallel transistor (Q2).

difference in accuracy between the two topologies

In general, series references require less powerand high- and low-precision examples are available

than shunt references because load current isin both varieties.

provided as it is needed. The bias current of a

The advantages and disadvantages of the two

shunt reference (IBIAS) is set by the value of RBIAS

architectures are summarized in Table 1. Generally,

and must be greater than or equal to the maximum

shunt references offer more flexibility (VIN range,

SeriesReference

Shunt
Reference

VIN

VIN

R BIAS

ILOAD

VIN

VIN

VREF

IBIAS

ILOAD

VREF

GND

VREF

ISHUNT

C OUT

C OUT

VIN

BANDGAP
CELL

VBG

-

Q1

+

R BIAS

ILOAD

VREF

VREF
R1
= VBG (1 + R 2 )

R1

IBIAS

ILOAD

R1

ISHUNT

+

C OUT
R2

R2

= VBG (1 +BANDGAP
CELL

VBG

C OUT

Q2

-

R1
)
R2

Figure 2. Circuit symbols and simplified schematics of series and shunt architectures.
Series References
P

Advantages

VSUPPLY

Series REF

R1

Shunt REF
Series REF
ResistanceControl
IREF
ResistanceControl
IQ
P

ResistanceControl
IQ

Number of Terminals

VSUPPLYR1

VSUPPLY

Diagram

Shunt References

VSUPPLY

Load

At least 3• Significantly lower power dissipation• Generally higher precision• Low IQ
• Low dropout

Shunt REF
Load
Load

ResistanceControl
IREF

Load

At least 2• Wide VIN tolerant with proper resistor selection• Can be used to create negative or floating reference voltage• Inherent current sourcing and sinking

Disadvantages• Limited max VIN

Key Markets• Factory automation, grid, medical, test

TI Nomenclature• LM41xx, REFxxxx• VIN current fixed at max load
• No shutdown mode
• Isolated power supplies, adapters, automotive• LM40xx-N, LM(V)431, LM1/2/385, LM1/2/336• TL43xLI, ATL43xLI, TL(V)43x, TLVH43x

Table 1. Series vs shunt architectures.
Voltage reference selection basics

I

3

September 2018

creation of negative or floating references) and

The majority of monolithic references are based

better power supply rejection at the expense of

on a bandgap reference. A bandgap reference ishigher power consumption while series references

created when a specific Proportional To Absolute

typically dissipate less power and can achieve

Temperature (PTAT) voltage is added to thebetter performance for extremely high-precision

Complementary To Absolute Temperature (CTAT)

applications. The typical application diagram ofbase-to-emitter voltage of a bipolar transistor yielding

data converters will often show a zener diodea voltage at roughly the bandgap energy of silicon

symbol representing the reference, indicating(~1.2 V) where TC1 is nearly zero. Neither the PTAT

the use of a shunt reference. This is merely

nor CTAT voltage is perfectly linear leading to non-a convention, and in nearly all cases a series

zero higher-order TC coefficients, with TC2 usuallyreference could be used as well.

being dominant. References designed for drifts lessthan 20 ppm/°C generally require special circuitry

Voltage reference specifications

to reduce TC2 (and possibly higher-order terms),

As with all ICs, voltage references have standardized

and their datasheets will often mention some formof “curvature correction.” Another common type ofparameters for determining the right part for areference is based on a buried-zener diode voltage

design. The following are key specifications in orderplus a bipolar base-to-emitter voltage to produce aof importance that are pertinent to all suppliers.

stable reference voltage on the order of 7 V. The drift

1. Temperature coefficientperformance of buried-zener references is on par

The variation in VREF over temperature is defined bywith that of bandgap references, although their noise

its temperature coefficient (TC, also referred to as

performance is superior. Buried-zener references“drift”) which has units of parts-per-million per degree

usually require large quiescent currents and must

Celsius (ppm/°C). It is convenient to represent thehave an input supply greater than 7.2 V, so theyreference voltage temperature dependence as acannot be used in low-voltage applications

polynomial for the sake of discussion:(VIN = 3.3 V, 5 V, etc.).
The temperature coefficient can be specified over

2
3


 T 
 T 
 T 
V REF (T) = V REF | 25°C  1 + TC 1  °  + TC 2  °  + TC 3  °  + ...
 25 C  25 C  25 C several different temperature ranges, including thecommercial temperature range (0 to 70°C), theindustrial temperature range (-40 to 85°C), and the

TC1 represents the first-order (linear) temperatureextended temperature range (-40 to 125°C). Theredependence, TC2 the second-order, and so on.

are several methods of defining TC, with the “box”

Higher than first-order terms are usually lumped

method being used most often. The box method

together and described as the “curvature” of the drift.

calculates TC using the difference in the maximum

Box Method

Endpoint Method

VREF MAX

Box Method
Underestimate

Dual Endpoint Method
VREF (25o C)

VREF (TMAX )VREF (TMAX )VREF MAX

VREF (T MIN )VREF (TMIN )VREF MIN

TMIN

25 o CVREF MIN

TMAX

TMIN

25 o C

TMAX

TMIN

25o C

TMAX

TAPPLICATIONTSPECIFICATION

Figure 3. Different methods for TC calculation.
Voltage reference selection basics

I

4

September 2018and minimum VREF measurements over the entire

the estimated number of bits of resolution (ENOB).

temperature range whereas other methods use theDatasheets provide separate specifications forvalues of VREF at the endpoints of the temperature

low- and high-frequency noise. Broadband noise isrange (TMIN, TMAX).

typically specified as an rms value in microvolts over

Neither method is ideal. The weakness of thethe 10 Hz to 10 kHz bandwidth. Broadband noise is
the less troublesome of the two as it can be reduced

endpoints method is the failure to account for any

to some degree with a large VREF bypass capacitor.

curvature in the drift (TC2, TC3, etc.). Calculating theBroadband noise may or may not be important inincremental TC from room temperature to both thea given application depending on the bandwidth

minimum and maximum temperatures improves theof the signal the designer in interested in. Low-

situation as information on TC2 can befrequency VREF noise is specified over the 0.1 Hz togarnered using three data points rather than two.

10 Hz bandwidth as a peak-to-peak value (in μV or

While the box method is more accurate thanppm). Filtering below 10 Hz is impractical, so theusing endpoints, it may underestimate TC if thelow-frequency noise contributes directly to the total

temperature range of the application is smaller thanreference error. Low-frequency noise is characterized

the range over which the TC is specified.

using an active bandpass filter composed of a
1st-order high-pass filter at 0.1 Hz followed by an V REF_MAX | T − V REF_MIN | T  1⋅TC BOX = 10 6 ⋅ V REF | 25 C  T MAX − T MIN 

nth-order low-pass filter at 10 Hz. The order of the°

low-pass filter has a significant effect on measured
peak-to-peak value. Using a 2nd-order low pass at

 V |
 

−V |
1
TC ENDPOINTS = 10 6 ⋅  REF TMAX REF TMIN  ⋅ 
VREF | 25 C  TMAX − TMIN 

10 Hz will reduce the peak-to-peak value by 50 to60% compared to a 1st-order filter.

°

Some manufacturers use up to 8th-order filters, so
2. Initial accuracy

a designer should read the datasheet notes

The initial accuracy of VREF indicates how close to thecarefully when comparing references. From a design
perspective, the 0.1 Hz to 10 Hz noise is mainly

stated nominal voltage the reference voltage isdue to the flicker (1/f ) noise of the devices andguaranteed to be at room temperature under statedresistors in the bandgap cell, and therefore scales

bias conditions. It is typically specified as a percentage

linearly with VREF. For example, a 5 V reference will

and ranges from 0.01% to 1% (100-10,000 ppm). For

have twice the peak-to-peak noise voltage as theexample, a 2.5 V reference with 0.1% initial accuracy

2.5 V option of the same part. Reducing the noise

should be between 2.4975 V and 2.5025 V whenrequires considerably higher current and larger

measured at room temperature. The importancedevices in the bandgap cell, so very low noiseof initial accuracy depends mainly on whether thereferences (<5 μVPP) often have large quiescentdata conversion system is calibrated. Buried-zener

currents (hundreds of microamps to milliamps)

references have very loose initial accuracy (5-10%)
and will require some form of calibration.

and tend to be in larger packages. Buried zener

3. 0.1-10 Hz peak-to-peak noise

available because no gain is required to generate

The internally-generated noise of a voltage reference

the output voltage. Bandgap cells typically have areferences have the best noise performanceclosed loop gain of 15 V/V to 20 V/V, causing device

causes a dynamic error that degrades the signal-

and resistor noise to be amplified.

to-noise ratio (SNR) of a data converter, reducing
Voltage reference selection basics

I

5

September 2018

4. Thermal Hysteresis

designer should locate the reference on a portion of

Thermal hysteresis is the shift in VREF due to one or

the PCB least prone to flexing. Different packages
will have different sensitivity to stress; metal cansmore thermal excursions and is specified in parts-

are largely immune, and surface-mount plastic

per-million. A thermal excursion is defined as an

packages become progressively more sensitive theexcursion from room temperature to a minimum or

smaller the package (for example, the same die will

to a maximum temperature and finally back to room

perform better in an SO-8 than an SC70 package).

temperature (for example 25ºC to -40ºC to 25ºCor 25ºC to 125ºC to 25ºC). The temperature range

6. Load Regulation(commercial, industrial, extended) and definition of

Load regulation is the measure of the variation inthermal excursion may vary by manufacturer, making

VREF as a function of load current and is specified

direct comparison difficult. Thermal excursions overeither as a percentage or in parts-per-million pera wider temperature range typically lead to a larger

milliamp (ppm/mA). It is calculated by dividing theshift in VREF. Even if the temperature range of therelative change in VREF at minimum and maximum

application is narrow, the thermal excursion whenload currents by the range of the load current.

soldering the IC to the PCB and any subsequent

Load regulation depends on both the design of thesolder reflows will induce thermal hysteresis.

reference and the parasitic resistance separating it

The main cause of thermal hysteresis is thermo-

from the load, so the reference should be placedmechanically induced die stress and therefore isbut also the package, molding compound, die-⎞
⎛VREF | ILOAD_MAX −VREF |ILOAD_MIN⎞ ⎛1⎟⎟⎜
LOAD_REG(ppm/mA) =10 6 ⋅ ⎜⎟⎟ ⎜I⎜
VREF |ILOAD_MIN⎠ ⎝ LOAD_MAX − I LOAD_MIN ⎠⎝attach material, as well as the IC layout itself.

as close to the load as the PCB layout will allow.

As a rule of thumb, references in larger molded

References with pins for both forcing and sensing

packages tend to exhibit lower thermal hysteresis.

VREF provide some immunity to this problem. The

Thermal hysteresis is not tested in production and

impedance of the reference input is large enoughdatasheets only provide a typical shift value.

(>10 kΩ) on many data converters that loada function of not only the temperature excursion,

regulation error may not be significant. Maximum

5. Long Term Stability

load current information can be found in ADC/

Long-term stability describes the typical shift in VREF

DAC datasheets specified as either a minimum

after 1000 hours (6 weeks) of continuous operationreference pin resistance (RREF) or a maximum

under nominal conditions. It is meant to give thereference current (IREF). In situations where thedesigner a rough idea of the stability of the reference

reference is buffered with a high-speed op amp,

voltage over the life of the application. The prevailingload regulation error can usually be ignored. The

wisdom is that the majority of the shift in VREF occurs

dual of load regulation for shunt references is thein the first 1000 hours as longterm stability is related‘change in reverse breakdown voltage with current’

logarithmically with time. A six-week test time isthat specifies the change in VREF as a function of the

not feasible in production, so long-term stability iscurrent shunted away from the load. It is calculatedcharacterized on a small sample of parts (15 to 30

with the same equation as load regulation whereunits) at room temperature and the typical shift isload current is replaced with shunted current

specified. Once a reference is soldered down on a

(ISHUNT). The amount of shunted current depends on

PCB, changes in the board stress can also cause

both the load current and the input voltage so thepermanent shifts in VREF. Board stress dependence‘change in reverse voltage with current’ specification

is not currently captured in datasheets, so thealso indicates line sensitivity.

Voltage reference selection basics

I

6

September 2018

7. Line Regulation

can also be used at low voltages, but the bias

Line regulation applies only to series voltage

current may vary widely with changes in VIN due toreferences and is the measure of the change in thethe small RBIAS resistor required.

reference voltage as a function of the input voltage.

References do not require many external passive

The importance of line regulation depends on thecomponents but proper selection can improve

tolerance of the input supply. In situations where

performance. A bypass capacitor on VREF

the input voltage tolerance is within 10% or less,substantially improves PSRR (or reverse dynamic

it may not contribute significantly to the total error.

impedance in the case of a shunt reference) at⎞⎛ V REF | VIN_MAX − V REF | VIN_MIN ⎞ ⎛⎜1⎟⎟⋅
LINE_REG = 10 6 ⋅ ⎜
⎜
⎟ ⎜V
⎟
V
|
V
−
REF VIN_MIN⎝⎠ ⎝ IN_MAX IN_MIN ⎠higher frequencies. It will also improve the load

The extension of line regulation over frequency is theis achieved with the largest bypass capacitor

Power Supply Rejection Ratio (PSRR). PSRR is rarely

allowed. The range of allowable bypass capacitors

specified but typical curves are usually provided in

depends on the stability of the reference, which

the datasheet. As with line regulation, the importanceshould be detailed along with ESR restrictions inof PSRR depends on specifics of the input supply.

the component selection section of the datasheet.

If VIN is noisy (generated with a switching regulator,

When using a large bypass capacitor (>1 μF) it may

sensitive to EMI, subject to large load transients),

be advantageous to bypass it with a smaller value,

PSRR may be critical. The analogous specification

lower-ESR capacitor to reduce the effects of the ESR

for shunt references is the reverse dynamic

and ESL. The reverse dynamic impedance of a shunt

impedance, which indicates the sensitivity of VREF toreference varies inversely with the amount of current

an AC current. Noise on the supply powering a shunt

shunted. If noise immunity is more important thanreference is converted to a noise current throughpower consumption in a given application, a smaller

RBIAS. Some shunt reference datasheets will specify

RBIAS may be used to increase ISHUNT.

the reverse dynamic impedance at 60 Hz andSome series references have a TRIM/NOISE

transient response, and reduce high-frequency
noise. Generally speaking, the best performance

120 Hz, and nearly all will provide a plot of reverse

REDUCTION (NR) pin to further enhance

dynamic impedance versus frequency.

performance. By using a series of resistors shown

8. Special Featuresin Figure 4, the TRIM/NR pin can be used to adjust

In applications where power consumption is crucial,

output voltage by up to ±15 mV. The pin can also
be used to create a low pass filter to decreasea series reference is usually the right choice. The

overall noise measured on VOUT by using a capacitor

quiescent current of most series references ranges

as shown in Figure 5. Note that increasing thefrom 25 μA to 200 μA, although several are available

capacitor size will continue to improve noisewith IQ<1 μA. Low quiescent current generally comes

performance, but also increases startup time.

at the expense of precision (TC and initial accuracy)+V SUPPLY+V SUPPLY

and higher noise. Some series references can also

REF50xx

REF50xx

be disabled via an external ENABLE / SHUTDOWN

DNC

DNC

DNC

pin causing the quiescent current to drop to a

VIN

NC

VIN

NC

TEMP

VOUT

TEMP

VOUT

GND

TRIM/NR

GND

TRIM/NRfew microamps or less when VREF is not needed.

470 kΩ

A power-saving mode is not possible in shunt

10 kΩ

DNC

C1
1µF

1 kΩ

references. Additionally, series references can havedropout voltages less than 200 mV, allowing them

Figure 4. VOUT adjustment using the TRIM/NR pin (left).

to be used at lower input voltages. Shunt references
Voltage reference selection basics

I

Figure 5. Noise reduction using the TRIM/NR pin (right).

7

September 2018

9. Other Considerations

the same part number and should do a thoroughVoltage references are becoming increasingly

comparison of the performance to ensure that the

popular in the automotive space and as reliability

key parameters are indeed the same.

becomes more critical, the need for AEC-Q100

Voltage reference selection begins with satisfying thequalified parts increases as well. The AEC-Q100

application operating conditions, specifically: nominal

qualification was created by the Automotive

VREF, VIN range, current drive, power consumption,

Electronics Council and requires specific quality

and package size. Beyond that, a reference isand testing procedures to ensure a device’s

chosen based on the accuracy requirements

performance. On top of the general qualification,of a given data converter application. The mostthere are also grades from 0-4 which indicate theconvenient unit for understanding how the reference

temperature range of the qualified device. At theerror affects accuracy is in terms of the least

time of this article, the most common is grade 1

significant bit (LSB) of the data converter. The LSB inwhere the operating temperature range of the device

1
LSB(ppm) = 10 6 ⋅  
2spans from -40 to 125°C. It should be noted thatmany manufacturers offer voltage references in the

NOB

NOB : Number of Bits

extended temperature range of -40 to 125°C andBits

LSB (ppm)

mention that the device is “suitable for automotive

8

3906

applications” but this does not mean that the device

10

977

is AEC-Q100 grade 1-qualified. Therefore, designers

12

244

for automotive applications should be cautious

14

61

16

15

of devices that state suitability for automotive
applications unless it is specifically specified in the

Table 2. LSB values in PPM for common data converter resolutions.

datasheet as AEC-Q100 qualified.
Due to the popularity of voltage references, many

units of parts-per-million is simply one million divided

manufacturers have produced “identical” productsby two raised to the number of bits power. Table 2

and sometimes even release them as the same
part number as the original manufacturer forprovides the LSB values for common resolutions.

part recognition. While the main performance

ADCs / DACs have their own sources of error

characteristics are identical, there are times

including integral nonlinearity (INL), differential on

when there are subtle differences which could

linearity (DNL), and gain and off set error. If webe of concern to a designer depending on theirconsider the case of the more common unipolar

application. For example, the LM4040 offered fromdata converter, voltage reference error is functionally

Texas Instruments has a wideband noise value ofequivalent to a gain error. INL and DNL gauge

35 µVRMS for a 2.5V output. The same part fromthe nonlinearity of a data converter, on which theanother supplier has a wideband noise value ofreference voltage has no effect. The gain and off

350 µVRMS which is 10x the value even though

set errors can be understood conceptually by

the initial accuracy and temperature coefficient arerecognizing that ADCs / DACs have two reference

the same. Other differences that are prevalently

voltages: VREF and GND in the case of a unipolar

found are operating temperature range and current

data converter, and VREF and -VREF for bipolar data

consumption. A designer should be careful whenconverters. The offset error is the deviation in theconsidering secondary or alternate parts with

output (in bits for an ADC and voltage for a DAC)

Voltage reference selection basics

I

8

September 2018

from the ideal minus full-scale (MFS) value when areference to minimize the accuracy loss from PFS.

MFS input is applied. The MFS reference voltage is

If the designer has no idea what kind of reference

GND so VREF error has no effect. The gain error iserror they can live with, matching the worst-casethe deviation from the ideal positive full-scale (PFS)reference error to the maximum gain error is a

output for a PFS input, minus the offset error. The

reasonable starting point. In systems where error

PFS reference voltage is VREF, so any shift in thecontributors are statistically independent, andreference voltage equates to a gain error. The types

consequently add together as a root mean squaredof shifts in a VREF that affect PFS are errors such assum, balancing the error contributions represents

initial accuracy, temperature coefficient, and longthe optimal case. Otherwise, the error will tend to beterm drift. As such, the reference error can cause

dominated by one variable and the accuracy of theloss of dynamic range for input signals near PFS,

other variable(s) is essentially wasted.

which is also where it has the most pronounced

In calculating the total error in VREF it is helpful toeffect on accuracy. Therefore when designing aseparate the specifications where a maximum value

system it is necessary to account for these errors foris guaranteed (TC, initial accuracy, load regulation,

signals that approach PFS. The effect of referenceline regulation) and those where only a typicalerror on a mid-scale (MS) input signal is half thatvalue is provided (0.1 Hz to 10 Hz noise, thermal

for a PFS input, and is negligible for inputs near

hysteresis, and long-term stability). Other than initial

MFS. For example, a worst-case reference error of

accuracy, the guaranteed specifications are all linear

8 LSB would result in a loss of 3 bits of accuracy

coefficients and their contribution to the total error

for a PFS input, 2 bits of lost accuracy at mid-scale,can be calculated based on the operating ranges ofand no loss of accuracy at MFS. For example, in a

the reference (temperature range, load current, andsystem where dynamic range is the priority, it will

input voltage).

be important to use the largest acceptable voltage

ERROR | TEMP = TC ⋅ (TMAX − T MIN )ERROR | LOAD = LOAD_REG ⋅ (I LOAD_MAX − I LOAD_MIN)
ERROR | LINE = LINE_REG ⋅ (VIN_MAX − VIN_MIN)
ERROR | GUARANTEED = ERROR |INITIAL_ACCURACY + ERROR | TEMP + ERROR | LOAD + ERROR | LINE
Example using REF3425
ERROR | TEMP = (6 ppm/ oC) ⋅ (55 o C − 0oC) = 300 ppm
ERROR | LOAD = (40 ppm/mA ) ⋅ (0.5 mA − 0 mA) = 20 ppm
ERROR | LINE = (15 ppm/V) ⋅ (5.5 V − 4.5 V) = 15 ppm
ERROR | GUARANTEED = (0.05% = 500 ppm) + 300 ppm + 20 ppm + 15 ppm = 835 ppm

Voltage reference selection basics

I

9

September 2018

In calibrated systems, initial accuracy can be

the average reference error, they can take the rms

dropped from the equation. The above calculation

sum of the individual error sources rather than justrepresents the worst case, and most of the time aadding them up. For simplicity, one can convert fromreference will perform better than the guaranteedpeak to peak to rms value by using the equation

maximums (especially when it comes to line andpeak-to-peak = 6.6x rms. This is because 99.99% ofload regulation where the maximum may be more

the error will fall within 6.6 standard deviations of thea function of the testing system due to the very low

total error distribution. In most cases, the TC error

signal-to-noise ratio of the measurement). It is worth

will be dominant, so TC error by itself gives a goodnoting that the statistical methods through which theindication of average reference performance.

guaranteed maximum specifications are calculated

Datasheets only provide typical values for thermalvary by manufacturer, so comparing datasheets may
not tell the full story. If the designer wants to estimate

hysteresis and long-term stability,

ERROR | THERMAL _HYSTERESIS ≈ (Typ. Thermal Hysteresis )ERROR | LONG −TERM_STABI LITY ≈ (Typ. Long - Term Stability)⎛ 0.1 − 10 Hz Peak − to − Peak ⎞ERROR | LF_ NOISE = 10 6 ⋅ ⎜
⎟
VREF
⎠
⎝
ERROR | TOT = ERROR | GUARANTEED + ERROR | THERMAL _HYSTERESIS + ERROR | LONG −TERM_STABI LITY + ERROR | LF_NOISE

Example using REF3425
ERROR | THERMAL _HYSTERESIS = 30 ppm
ERROR | LONG −TERM_STABILITY = 25 ppm
ERROR | LF_ NOISE = 5 ppm
ERROR | TOT = 835 ppm + 30 ppm + 25 ppm + 5 ppm = 895 ppm

but both are likely to vary a great deal unit toestimate of the worst-case shift. This is assuming

unit. The typical specification is not very helpful inthat the standard deviation of the distribution is on

estimating worst-case error without knowing thethe order of the mean value and designing for a twostandard deviation of the distribution. Many times

or three standard deviation worst case. The loss of

this information can be obtained by calling theresolution due to noise is harder to predict and canmanufacturer. Otherwise, a conservative, albeit

only really be known by testing a reference in the

crude, approach would be to multiply the typicalapplication.

specification by three or four to get a ballpark

Voltage reference selection basics

I

10

September 2018

Low-frequency noise should be very consistent on

Once the worst-case reference error in parts-per-a unit-to-unit basis and no ‘sand-bagging’ of themillion is estimated, it can be converted into LSB for

typical value is required. Over a 10-second window,

different data converter resolutions using the values

one can expect the VREF to shift by an amount equalin Table 2. The worst-case accuracy loss at positive

to the 0.1 Hz to 10 Hz peak-to-peak specification.

full-scale and mid-scale can then be calculated
taking the log base-2 of the number of LSB of error.

895 ppm= 0.9 LSB (10 bit) = 3.6 LSB (12 bit) = 14.6LSB (14 bit)
⎛ ppm
⎞
LSB ⎠
⎝
Worst Case Lost Accuracy = log2 (ERROR | TOTAL (LSB))ERROR | TOTAL (LSB) =Worst Case Lost Accuracy (PFS) = 0 bit (10 bit) = 1.8 bits (12 bit) = 3.8 bits (14 bit)
Worst Case Lost Accuracy (MS) = 0 bit (10 bit) = 0.8 bits (12 bit) = 2.8 bits (14 bit)

If the average rather than the worst case is considered, the rms sum of reference error contributors can betaken (replacing the maximum values for the typical values).
Example ( REF3425 ) :ERROR | RMS =(300) 2 + (500) 2 + (20) 2 + (15) 2 + (30) 2 + (25) 2 + (5) 2 = 585 ppm

585 ppm= 0.6 LSB (10 bit) = 2 .4 LSB (12 bit) = 9.6 LSB (14 bit)
⎛ ppm
⎞
LSB ⎠
⎝
Worst Case Lost Accuracy = log2 ( ERROR | TOTAL (LSB) )ERROR | RMS (LSB) =Worst Case Lost Accuracy (PFS) = 0 bit (10 bit) = 1.3 bits (12 bit) = 3.3 bits (14 bit)
Worst Case Lost Accuracy (MS) = 0 bit (10 bit) = 0.3 bits (12 bit) = 2.3 bits (14 bit)Conclusion
Using the voltage reference specifications to performcritical in their application. These often include

the above analysis, a designer should be able tooperating temperature range for temperature drift,

predict the typical and worst-case accuracy loss

initial accuracy if calibration is not possible, and low

due to reference error in their data conversion

frequency noise which often cannot be filtered. Knowing

system. Repeating this exercise for several different

which parameter is the dominant error factor helps

references should provide the designer with more

to narrow down the reference options significantly

insight into what reference specifications are mostand makes choosing the right reference easier.

Voltage reference selection basics

I

11

September 2018

Resources

Appendix

1. “Voltage Reference Selection Basics” Power

Unit Conversion

Designer, issue #123 by David Megaw
2. Voltage Reference e-book Tips and tricks fordesigning with voltage references
3. For online resources for reference designs,
technical documents, and selector wheel, visit
the Voltage Reference landing page ti.com/vref
For online resources such as reference designs
and other technical resources, visit the Voltage
Reference landing page (ti.com/vref)
4. Try the interactive selection tool to help instantly
choose the proper reference for an ADC from thebroad TI portfolio, see the WEBENCH® Series
Voltage Reference Selector Tool atti.com/webenchvref

Parts-per million (ppm): Parts-per million is acommon units notation that is often used to describe
ratios of very small numbers. ppm stands for
1 part per million such as percent stands for 1 partper hundred. It is often very useful to do all error
calculations in ppm due to its unit neutral nature but
not all electrical characteristics come in ppm. Hereare some common conversions examples that areused to get ppm.

Example 1: 0.2% accuracy to ppm
1. Convert percent to a ratio
Percent0.2%== 0.002100
100
2. Convert ratio into ppm
ratio * 1000000 = 0.002 * 1000000 = 2000 ppm
Example 2: 30 µV deviation to ppm of a 3 V source
1. Convert 30 µV to V
30 µV
= 0.00003 V
1000000
2. Divide by 3 V to get the ratio based on a 3 V source
0.00003 V= 0.00001
3V
3. Convert the ratio into ppm
ratio * 1000000 = 0.00001 * 1000000 = 10 ppm

Important Notice: The products and services of Texas Instruments Incorporated and its subsidiaries described herein are sold subject to TI’s standard terms andconditions of sale. Customers are advised to obtain the most current and complete information about TI products and services before placing orders. TI assumes
no liability for applications assistance, customer’s applications or product designs, software performance, or infringement of patents. The publication of information
regarding any other company’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
The platform bar,is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.
© 2018 Texas Instruments Incorporated

SLPY003AIMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCEDESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANYIMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRDPARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicablestandards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
permission to use these resources only for development of an application that uses the TI products described in the resource. Other
reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third
party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims,
damages, costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either onti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicablewarranties or warranty disclaimers for TI products.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2018, Texas Instruments Incorporated