Application Report
SLUA886A – April 2018 – Revised July 2020

DDR VTT Power Solutions: A Competitive Analysis
Qian ChenABSTRACTThis application report describes the series stub termination logic (SSTL) and tracking termination voltage(VTT) in DDR applications. It analyzes and compares the power loss and voltage deviation of passive andactive VTT terminations, and highlights the advantages of active termination.

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5
67Contents
Introduction ...................................................................................................................
Series Stub Termination Logic (SSTL) Used in DDR Design ..........................................................
Power Dissipation of Passive Termination ...............................................................................
Passive Termination vs. Active Termination .............................................................................
VTT Power Solution Offered By TI ..........................................................................................
Summary ......................................................................................................................
References ...................................................................................................................

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4555

List of Figures
1Series Stub Termination Logic (SSTL) ................................................................................... 2

2High Bit Line With Passive Termination ................................................................................. 3

3Low Bit Line With Passive Termination .................................................................................. 3List of Tables

1DC Input Logic Levels of SSTL_18 ....................................................................................... 2

2Power Loss of Passive Termination ...................................................................................... 4

3Comparison Between Passive Termination and Active Termination.................................................. 44

TI VTT Power Solutions ...................................................................................................... 5Trademarks
All trademarks are the property of their respective owners.

1Introduction
Double data rate (DDR) memory is the most popular type of dynamic RAM (DRAM). Computer, laptop,servers, and other electronic devices use DDR memory.
DDR memory power requires two power rails: VDDQ (drain-to-drain core voltage) and VTT. Typically theswitching power supply provides power to the VDDQ rail because of the high current requirement.
Depending on the current requirement, the VTT rail can be powered by either passive termination or byactive termination. This application report explains how VDDQ and VTT provide power for DDR memory. It
analyzes and compares the power loss and voltage deviation of two types of VTT terminations,summarizes the advantages of active termination. This application report also describes some VTT power
solutions offered by Texas Instruments.

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Copyright © 2018–2020, Texas Instruments Incorporated1Series Stub Termination Logic (SSTL) Used in DDR Design2

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Series Stub Termination Logic (SSTL) Used in DDR Design
Figure 1 shows the series stub termination logicl (SSTL) used in DDR design. It uses one series resistor(RS) connected from the output buffer (driver) to the memory (receiver) and one termination resistor (RT)connected to the termination rail (VTT). The typical VTT voltage and VREF are equal to VDDQ/2.
When the output buffer is in a high state, the Q1 switch is on and Q2 swtich is off. Also, the current flows
from VDDQ to VTT through resistors RS and RT. Because the VTT termination then sinks the current, thereceiver input voltage (VIN) is higher than VREF. When the output buffer is in a low state, Q1 is off and Q2 ison, the current flows from VTT to ground thru RT and RS, VTT termination sources current, consequently VIN
is lower than VREF.
VDDQ

Q1

OutputBuffer(Driver)RSRTVTTVOUTVIN

Q2

VREF
ReceiverFigure 1. Series Stub Termination Logic (SSTL)
To avoid a data read/write error, the value of VIN must be within the specification window. For example for
SSTL_18 (DDR2), VIN must be higher than VREF + 125 mV in order for receiver to interpret the high bit
signal correctly. VIN must be lower than (VREF – 125 mV) in order for the receiver to interpret the low bit
signal correctly. If the value of VIN is outside of the specification window, a data read/write error mayoccur.
Table 1. DC Input Logic Levels of SSTL_18

3

SYMBOLPARAMETERMINMAX

VIH(dc)dc input logic high

VREF + 125 mV

VDDQ + 300 mV

VIL(dc)dc input logic low–300 mV

VREF - 125 mVPower Dissipation of Passive Termination
The simplified circuit shown in Figure 2 illustrates a high bit line of SSTL_18 (DDR2) with passivetermination. The simplified circuit shown in Figure 3 illustrates a low bit line with passive VTT termination.
In these examples, VDDQ voltage is 1.8 V and VREF is 0.9 V. The on-resistance RON of Q1 and Q2 and its
typical value 20 Ω is used in the following calculation. The typical values of RS and RT are 20 Ω and 25 Ω,respectively. Two resistors (RP) with the same value act as passive termination.

2DDR VTT Power Solutions: A Competitive Analysis
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VDDQ

Q1

RON
20 Ÿ

OutputBuffer(Driver)

VOUT

RS
20 Ÿ

RP

RT
25 Ÿ
IVTTVIN

RP
Passive
Termination

VREF

Q2

VTT

ReceiverFigure 2. High Bit Line With Passive Termination
VDDQ

Q1

VOUT

OutputBuffer(Driver)

RS
20 Ÿ

RP

RT
25 Ÿ
IVTT

RON
20 Ÿ
Q2

VIN

VTTRP

VREF
ReceiverPassive
Termination

Figure 3. Low Bit Line With Passive Termination
In DDR memory, multiple bit lines share one VTT voltage. The output buffer is either in a high state for thehigh bit or in a low state for the low bit. If the number of high bit lines and low bit lines is exactly equal, theVTT sink current (current goes into termination) from high bit lines is equal to the source current (currentgoes out of termination) from low bit lines. As a result, the net VTT current is zero. In this example, the VTT
voltage is exactly VDDQ/2.
If the number of high bit lines and low bit lines are not equal (which is the typical case in the application)
the VTT voltage does not equal VDDQ/2. The net VTT current and the RP resistor value determines the actual
VTT voltage.
Assuming the number of low bit lines is larger than that of high bit lines, the net VTT current goes out oftermination and VTT voltage is lower than VDDQ/2. Based on calculation, to make VIN at high bit line higher
than logic high threshold (VREF + 125 mV = 1.025 V), VTT voltage must be higher than 0.54 V.
For a DDR2 memory application with 32 data lines and 10 address lines, there are total 42 lines.
Assuming VTT termination sources current and the VTT voltage is 0.54 V, use Table 2 to determine therequired RP resistor value and the total power loss on two resistors. As calculated, if all lines are low bit,
this application requires two 2.07-Ω resistors. These resistors yield a total power loss of 0.91 W. In orderto make the VTT voltage higher than 0.54 V (for the purpose of increasing the margin), the RP resistor
value must be smaller and the power loss on two resistors increases.

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Table 2. Power Loss of Passive Termination
BIT LINE QUANTITY

4HIGH

LOW

IVTT (A)RP (Ω)PLOSS (W)

042

0.35

2.07

0.91

141

0.32

2.24

0.84

240

0.29

2.46

0.77

339

0.27

2.71

0.69

438

0.24

3.03

0.62

537

0.21

3.43

0.55

636

0.18

3.95

0.48

735

0.15

4.65

0.40

834

0.13

5.67

0.33

933

0.10

7.25

0.26

1032

0.07

10.06

0.19

1131

0.04

16.40

0.11

1230

0.02

44.44

0.04

Passive Termination vs. Active Termination
Compared to passive termination operation, active termination operation offers a smaller amount of VTT
voltage deviation and lower power loss. Using the TPS51200 device as an example, the voltage deviation
is below 25 mV when the VTT current is 2 A.
Table 3 compares passive termination and active terminations in DDR2 applications. In this table, two 2-Ω
resistors act as passive termination. The TPS51200 device is used as active termination. Because the VTT
voltage with active termination is very close to 0.9 V, use 0.9 V to calculate across the current range. Thistable lists the VTT voltage deviation and power loss of two types of terminations at different VTT current
conditions.
As the calculations listed in Table 3 shows, the VTT voltage during passive termination operation drops
significantly when the current increases. When the current level is 0.35 A, the VTT voltage drops from 0.9 V
to 0.55 V. If the current is higher than 0.35 A, VTT voltage drops below 0.54 V, and the VIN voltage in ahigh-bit line no longer remains within the specification window. As a result of this change, a read/writeerror may occur.
Table 3. Comparison Between Passive Termination and Active Termination
PASSIVE TERMINATIONACTIVE TERMINATION

VTT
(V)

PLOSS
(W)

VTT
(V)

0.00

0.90

0.81

0.9

0

0.05

0.85

0.81

0.9

0.045

0.10

0.80

0.82

0.9

0.09

0.15

0.75

0.83

0.9

0.135

0.20

0.70

0.85

0.9

0.18

0.25

0.65

0.87

0.9

0.225

0.30

0.60

0.90

0.9

0.27

0.35

0.55

0.93

0.9

0.315

VTT Source
Current
(A)

PLOSS
(W)

In addition to the smaller voltage deviation, the power loss during active termination operation is much
lower than that during passive termination operation. When VTT current is 0 A, the power loss during active
termination operation is nearly 0 W, whereas it is 0.81 W during passive termination operation. The effectof this difference is that passive termination consumes much more power than active termination when VTT
current is very small in standby mode. When VTT current is 0.35 A, the power loss of active termination is0.315 W. This amount of power loss is only one-third of 0.93-W power loss of passive termination.
4

DDR VTT Power Solutions: A Competitive Analysis
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Use similar calculations to determine DDR3, DDR3L and DDR4 application comparisons.

5VTT Power Solution Offered By TI
Because of the advantages of small voltage deviation and low power loss, most DDR applications now
use active VTT terminations. Table 4 lists the VTT power solutions offered by TI. Both the TPS51206 deviceand the TPS51200 device are sink/source LDO regulators requiring small output capacitance andminimum external components count. The TPS51206 device supports 2 A and the TPS51200 supports 3
A. The TPS53317A is a 6-A switching regulator which is suitable for high-current applications.
TPS7H3301-SP is radiation-hardened 3-A regulator qualified to Total Ionizing Dose (TID) 100 krad (Si) forradiation and military application.
TI also provides VDDQ and VTT integrated power solutions such as the TPS51116 and TPS51916 devices.
See the TI website and device data sheets for more information.
Table 4. TI VTT Power Solutions

6

DEVICETPS51200,
TPS51200-Q1

TPS51206

LP2996

LP2997MEMORY
TYPE

DDR, DDR2,
DDR3, DDR3L,
LPDDR3,
DDR4,

DDR2, DDR3,
DDR3L,LPDDR3,DDR4,DDR, DDR2

DDR2

LP2998,LP2998-Q1

TPS53317A

DDR, DDR2,DDR, DDR2, DDR3, DDR3L,DDR3, DDR3L
LPDDR3,DDR4

TPS7H3301-SP
DDR, DDR2,DDR3, LPDDR3,DDR4IOUT (A)

32

1.5

0.5

1.5

63

VIN (V)

1.1 to 3.5

1 to 3.51.8 to 5.5

1.8 to 5.5

1.35 to 5.5

0.9 to 6

0.9 to 3.5

Summary
In a passive termination application, a low-value resistor helps to reduce VTT voltage deviation and helps
avoid read/write error, but results in high power loss. A high-value resistor helps to reduce power loss but
it increases the chance of bit errors.
Compared to passive termination, the active termination solution brings much lower power loss andsmaller VTT voltage deviation, hence, improves data read/write accuracy and integrity.
Because an application typically converts VTT power from VDDQ power, the active VTT termination demands
a lower amount of current from the VDDQ rail. Therefore, the VDDQ current rating can be reduced when theapplication uses active termination.

7References
1. Jim Aliberti, "How To Match The DDR Memory Power Solution To The Application," Texas
Instruments, 2013
2. Peter James Miller, "Powering DDR Memory and SSTL," Texas Instruments, 2011
3. JEDEC Standard, JESD8-15A
4. TPS51200 datasheet

Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (April 2018) to A Revision .......................................................................................................... Page
•Added support for TPS7H3301-SP in Section 5 and Table 4. ...................................................................... 5

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