High Performance Leadership in Action:
Powering Next Generation Data Center and AutomotiveArchitectures
June 2023

Ventana Founding Team Overview
Balaji Baktha
Founder and CEO

Greg Favor

Co-founder and Chief Architect

Pioneer in Data Center semiconductors:
30+ years experience

One of the world’s leading CPU architects:
35+ years experience• World’s first 64-bit ARM with Veloce(Acquired by AppliedMicro)• Led Marvell BU delivering Data Center class Networking,Communications, Compute, Storage and Wirelessinfrastructure products• World’s first iSCSI with Platys,(Acquired by PMC-Sierra (Adaptec))• Architected K6 processor at startup NexGen,acquired by AMD• Chief Architect at Siara Systems, acquired by RedBack• Architected first successful 64-bit ARM CPU

Founded in 2019 by industry veterans with a proven track record of delivering Data Center class processors2

Ventana: Leadership in Action
1. Performance Leadership2. Contribution to the RISC-V International Community
Member of Board of Directors

Balaji Baktha

Vice-Chair of Technical Steering Committee

Greg Favor

Greg Favor

Chair of Privileged Architecture Standing
Committee

Greg Favor’21 RVI BoD Technical Leadership Award’20 RVI BoD Technical Contributor Award

Chair of Platforms Horizontal Sub-Committee

Kumar Sankaran

Chair of CacheOps Task GroupDavid Kruckemyer

Chair of Marketing Events Committee

Omar Hassen

Anup Patel

Vice-Chair of Debug Task GroupPaul Donahue’22 RVI BoD Technical Leadership Award

Co-author of Advanced Interrupt Architecture

Greg Favor

Chair of Hypervisor SIG

Anup Patel

3. Driving the RISC-V Software Ecosystem…
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Founding Member of RISE to Ensure RISC-V Software ReadinessMission• Accelerate the development of open source software for RISC-V• Raise the quality of RISC-V Platform software implementations• Push the RISC-V Software ecosystem forward and align partners’ efforts• Ensure RISC-V is a tier 1 platform for all tools and libraries• Accelerate RISC-V adoption for Client and above segments

4Ventana: The Leading RISC-V & Chiplet CompanyJan ‘23:

Ventana placed among AMD,
Nvidia, Intel, Qualcomm, andArm as a Top 10 Semis To
Watch for 2nd year in row• Most Recognized High Performance RISC-V Leader• One of the Best CPU Teams in the world• World-Class RISC-V CPU Product and Roadmap• Pioneered Chiplet based Productization and Business Model• Strong Customer Traction in Data Center, Automotive andMobile Client Markets

Invited Speaker on
How RISC-V & Chiplets

Most Influential
Founding Team

Invited Speaker onRISC-V in Data Center

2x Presenter at Thought
Leadership Conference• Led the way in Defining and Creating a Robust Server ClassPlatform and Software Ecosystem, driving Mobile Ecosystem• Co-founded RISE with Andes, Google, Imagination, Intel,Mediatek, nVidia, Qualcomm, Red Hat, Rivos, Samsung,
SiFive, and T-head• One of the most influential companies at RISC-V Internationalat the Board of Directors, Technical and Marketing
Committees

5Ventana: High-Performance RISC-V Leadership• Highest Socket Performance• Highest Single Thread Performance;

significantly better than closest RISC-V
competitor• Easily portable across process nodes• Drastic reduction in Dev Time and Cost:
IP model: ~3 years & $100M+
Chiplet: ~1 year & $25M

• UCIe based D2D interconnect• Core (5/3nm) and Uncore (12/16nm)• Founding member of RISE
HighestPerformance
RISC-V
Competitive with
x86 and Arm

Pioneered
Chiplets for Rapid
Productization

Complete
Platform
Solution

CustomDomain SpecificAcceleration• Complete reference design ready today• Complete open-source software stack
optimized for Veyron V1• Customer innovation through extensible
architecture• Multi-chiplet Heterogenous Architecture

chiplets implemented in optimal process
nodes to maximize yield and cost

6Veyron V1: World’s First Data Center Class RISC-V Processor
ASSP Based on High Performance
Chiplet Architecture

Highest Performance RISC-V CPU
3.6GHz in 5nm process technology

SPECint2017 per socket

Significant reduction in development Time and Cost
compared to prevailing monolithic SoC model

Xeon®
Ice Lake 8380
270W

EPYC™
Milan 7763
280W

AWS G3
Neoverse V1
TDP Not Disclosed

VeyronV1-128C
280W

Launched December 2022 | 2nd Generation Underway | 2+ Year Lead vs Followers

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The Semiconductor Innovator’s Dilemma• Semiconductors are the foundation of the modern economy• Unrelenting massive semiconductor consolidation since 2008
• Led to monopoly in each of the semi markets• Average lifecycle of products is extended from 18 months to 3years due to the lack competition• No room for innovation and differentiation
oOEMs are forced to use silicon from limited sources• OEMs cannot build their own SoCs
oo

Very high development cost: $100-200M per project
Incumbent ISAs don’t allow them to innovate• How do you break the cycle?

8Dilemma to Opportunity!
Compute Chiplets

Domain SpecificAccelerator

Accelerator
ComputeIO Hub

CHI-based Coherent
On-chip
Interconnect
PCIe/CXL

CHI-based Coherent
On-chip
Interconnect
PCIe/CXL

Monolithic SoC

Doman SpecificAccelerator

D2D Interfaces

CustomerInnovation

Chiplet-based SoC•

TTM: 3+ years•

TTM: ~1 year•

Development cost: $100M+•

Development cost: < $25M•

Leading edge process node•

Each chiplet in optimal process node•

Fixed performance•

Scalable Compute, Accelerator and I/O performance•

Large die/high unit cost•

Cost optimized solution•Risk of incorrect definition by time itcomes to market•

Chiplets introduce the concept of late binding andscalability

The Ventana Solution

9Resurgence of Semiconductor Innovation: RISC-V + Chiplets

Automotive

Data Center

Generative AI atthe Edge

Client• Zonal architectures are a compelling opportunity to innovate and differentiate with Veyron
Chiplets and Cores in ADAS, Infotainment (IVI), and Telemetryo Automotive-class RAS, Functional Safety and Securityo Rapidly developing Software ecosystem and toolchaino UCIe for Automotive• Sovereign Data Centers with Security & User Privacy• Explosive use cases of Generative AI at the Edge
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Ventana Veyron: Server Class RISC-V IP + Chiplets
Veyron High Performance RISC-V CPU IP
Up to 16 cores

IOMMUVeyron V1 Core
512 KBI-cacheVeyron Chiplet Solutions
Ventana compute chiplets

48MB

64 KB L1 D-cache

Shared L3(sliced per core)

512 KB L2 D-cache

AIA

IO HubCoherent Bus
Domain SpecificAcceleration

D2D Interface

AMBA® CHI
(Coherent Interconnect)• Veyron compute chiplets•

Eight wide, aggressive out-of-order instruction pipelineo•High core count multi-cluster scalability (Up to 192 cores)o•Advanced side channel attack mitigations•

Comprehensive RAS features•

IOMMU & Advanced Interrupt Architecture (AIA) system IP

In latest process node technology
Scalable CPU performance/count• IO Huboo

Implemented in process node of choice
Customized for application requirements• Custom Domain Specific AccelerationoLow-cost process node11

Scalable Architecture for Server-class Compute

D2D Interfaces

D2D Interfaces

D2D Interfaces

CHI-based Coherent
On-chip Interconnect

CHI-based Coherent
On-chip Interconnect

CHI-based Coherent
On-chip Interconnect

D2D Interfaces

D2D Interfaces

D2D Interfaces

2 chiplets (32 cores)

Entry level server

4 chiplets (64 cores)

Mid level server

8-12 chiplets (128-192 cores)

High end server

12Realizing Efficient Chiplet D2D PHYRequirements• Power efficient• Small area overhead• High data rates
Parallel D2D interconnects such as UCIe or
BoW offer much lower power, area, andcomplexity overhead compared to serial/
SERDES based solutions like PCIe

PCIe Gen5

BoW-Fast

Power
Efficiency
pJ/bit70.55

Area Density
Tbps/mm20.10.69

Example Parallel D2D Interconnect:
BoW Minimal Bidirectional Refence Link

D2D Refinement Required for Automotive• Failure predictability through monitoring• Detection & reporting of failures13

Pioneering Efficient Chiplet Interconnect Controller< 7ns latency
Requirements
vs 100ns+ for PCIe
• Low D2D latency• Predictable memory performance• Standard SoC buses and networks must
map easily to D2D transport

Chiplet A

Ventana Controller

UCIe or BoW D2D Physical Layer• CHI, AXI, …

• HW memory coherency for efficient
support of accelerators
UCIe or BoW D2D Physical Layer

Ventana has developed a low latency
controller IP which maps standard,coherent SoC buses to D2D PHY

Ventana Controller

Chiplet B14

Automotive Following Server Architecture
Future: Zonal Architecture

Today: Domain Architecture

Infotainment

Powertrain

Zonal
Gateway

ADAS
Telematics

Gateway

Zonal
Gateway

SafetyZonal
Gateway

Body & Comfort••••

Dedicated, lower performance controllers
Increasing hardware varieties
Fragment code development environments
Not easily upgraded or scaled••

Gateway
Telematics

Zonal
Gateway

Centralized high-performance compute
Unified software environmentooo••CentralComputeZonal
Gateway

Automotive-class RAS, Functional Safety and Security
Rapidly developing Software ecosystem and toolchain
UCIe for Automotive

Efficient development
Scalable and easy to develop hardware

Same RISC-V + Chiplets concept applies

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RISC-V and Chiplets Driving Innovation in Automotive
Optional integrated AI& GPU

Veyron Auto Grade
Compute Chiplets

AI/ML

AI/ML

GPUGPU

Automotive Grade
UCIe D2D links

IOMMU

Auto-Grade Interconnect
ISP

Display

Zonal
Interface

DDR

DDR

Safety Island

VentanaASIL
certified
IOMMU

IVN /Storage

12x CSI-2 2x eDP/DSI Low-Speed High-Speed
CameraCenter
8x CAN-FD
PCIe5 x4LIDAR
HUD
2x FlexRay 2-8x 2.5/5/10GE
RADAR
16x LIN
A-PHY/ASAML*• Automotive can benefit from same
cost efficient chiplet architectures tocreate differentiated platforms• Ventana ASIL certified chiplets and IP• Partners create automotive Hub• Accelerators can be integrated in
Hub or scaled up in chiplets

Automotivefocused IO

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Ventana Veyron Optimized Software Stack
Storage

Networking
SwitchVirtualization

Web Apps

Security

Load Balancer

Stream & Blog

In-Memory DBSearch

Web ServerGuest OSPHP
MemcachedMySQL
Linux
Firmware/BIOS

OpenSBI

Tools
Ventana Veyron V1 Platform
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In Closing …
• High Performance Leader with Veyron V1• Established Leadership with Veyron V1 to address all HighPerformance RISC-V Target Markets• Sustaining Leadership with upcoming next generation Veyron• Ventana is a uniquely positioned to drive the adoption of highperformance RISC-V in Japan across automotive, data center, andother markets
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Thank You