ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com■General description

ELM7C377342xA is Power supply monitoring IC that instantaneously detects abnormalities such as
instantaneous interruption or drop of power supply voltage and generates a reset signal. Since the watchdog
timer is built in, various microcomputer systems can have a fail-safe function. It has output of both logic ofRESET_B and RESET output with internal pull-up. In addition, the reference amplifier outputs the correctreference voltage externally.

■Features■Application• Reset for Microprocessor, etc.
• Detection voltage with hysteresis function.
• Watchdog timer by edge trigger input built in.
• Minimal external parts( one capacitor).
• Reset signal of both positive and negative logic outputs.
: 4.2V±2.5%• Detect accurate supply voltage drop
• Accurate reference voltage output: 1.245V±1.45%• Low reset minimal power supply voltage : Typ.0.8V• Package: SOP-8 150mil, SOP-8 208mil
SON8-3×3■Maximum absolute ratings
Power supplyParameterInput Voltage
RESET_B, RESET output Voltage

SymbolVcc
VsVckVoh

Power dissipation

Pd

Operating temperature
Storage temperature

TopTstg

Limit
6.5

Unit
V

Vss-0.3 to Vcc+0.3

V

Vss-0.3 to Vcc+0.3
300 (SOP-8)500 (SON8-3×3)-40 to +85-55 to +125

VmW°C°C■Selection guide
ELM7C377342xA-x
Symbola, bcde

Detection voltage 42: Vsl=4.2V
D: SOP-8 150mil
Package
P: SOP-8 208mil
G: SON8-3×3
Product version A
S: SON8-3×3 (Refer to PKG file)
Taping direction
N: SOP-8 (Refer to PKG file)

ELM7C3773 4 2 x A - x↑↑↑ ↑ ↑a bc d e* Taping direction is one way.

Rev.1.9
1 / 14

ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com■Pin configuration
SOP-8(TOP VIEW)
��

�

��

�

�

�

(BOTTOM VIEW) (BOTTOM VIEW)(TOP VIEW) VIEW)(TOP VIEW) SON8-3x3(BOTTOM
SON8-3x3(TOPVIEW)
87658

7655

67123

41

2385

678321**443214* The potential of the tab on the back is the ground(GND) level.
Please connect to GND pin(recommended) or set it to be open.

Pin No.

Pin nameDescription

1CT

2RESET

Outputs reset pin (positive logic)

34CKGND

Inputs clock pin
Ground pin

567

VCC
VREF
VS

Power supply pin
Reference voltage output pin
Comparator minus input pin

8RESET

Outputs reset pin (negative logic)

Power-on reset hold time setting and Watchdog
timer monitor time setting pin■Standard circuit

51VCC

VCC

ELM7C3773

MicroController

RESET

CTRESET

CtCK

823GND

RESET
RESET

CKGND

4* The VREF of pin6 and the VS of pin7 are open.

Rev.1.92 / 14

ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com■Block diagram
CT
11.2uA

10uA

RESET
8Q

RS

RESET

10uA

Comp. S

135k

VS55k

7

2

1.215V

InhibitCK
3
GND

4PulseGen

WatchDog
Timer

VREF
61.245V

VCC

ELM7C3773

Vref5■Functional descriptions
1. Comp.S
Comp.S is comparator including hysteresis. it compare the reference voltage and the voltage of Vs, so thatwhen the voltage of Vs terminal falls below approximately 1.215V, reset signal outputs.
Instantaneous breaks or drops in the power can be detected as abnormal conditions by the ELM7C3773 within
a 2 μs interval. However because momentary breaks or drops of this duration do not cause problems in actual
systems in some cases, a delayed trigger function can be created by connecting capacitors to the Vs terminal.
2. Output circuit
A comparator is built in for turning on/off the RESET/RESET outputs and, compare the voltage of the Ct
terminal and the threshold voltage. Because the RESET/RESET outputs have built-in pull-up circuit, there is noneed to connect to external pull-up resistor when connected to a high impedance load such as CMOS logic IC.(Itcorresponds to 500 kΩ at Vcc = 5V.)
3. Pulse generation circuit
When the voltage of the CK terminal changes from the “high” level into the “Low” level, pulse generator issent to the watch-dog timer by generating the pulse momentarily at the time of drop from the threshold level.
4. Watchdog timer circuit
When power-supply voltages fall more than detecting voltages, the watch-dog timer becomes an interdiction.
5. Reference amplifier
The Reference amplifier is an op-amp to output the reference voltage. If the comparator is put up outside, twoor more power-supply voltage monitor and overvoltage monitor can be done.
6. Logic circuit
The logic circuit controls the charging and discharging of the power-on reset hold time setting and watch-dog
timer monitor time setting capacitor(Ct).
Rev.1.9
3 / 14

ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com■Electrical characteristicsParameter

Vcc=5.0V, Top=25°C

SymbolCondition

Min.

Typ.

Max.

Unit

Supply voltage

Vcc-

1.2

5.0

6.0V

Supply current

Icc-

100200μA

Vcc falling

4.10

4.20

4.30

Top=-40°C to +85°C(4.05)*

4.20(4.35)*

Vcc rising

4.20

4.30

4.40

Top=-40°C to +85°C(4.15)*

4.30(4.45)*

50100

150

Vcc=3.5V to 6.0V

1.227

1.245

1.263

Top=-40°C to +85°C(1.215)*

1.245(1.275)*

Vsl
Detection voltage
Vsh

Watch-dog timer operating

VV

Hysteresis width

Vshys Vsh-VslReference voltage

Vref

Reference voltage change rate

ΔVref1 Vcc=3.5V to 6.0V-310mV

Reference voltage outputloadingchange rate

ΔVref2 Iout=-200μA to +5μA

-5-5mVCK threshold voltage

Vth1

CK falling, Top=-40°C to +85°C

0.80

1.25

2.00

VIih

Vih=5.0V

-0

1.0

Iil

Vil=0.0V-1.00-

CK input current
Ct discharge current

Ictd

Watch-dog timer operating, Vct=1.0V

(8.5)

11.0

(14.5)Voh1

Vs open, Ireset=-5μA

4.5

4.9-Voh2

Vs=0.0V, Ireset=-5μA4.5

4.9-

Vol1

Vs=0.0V, Ireset=3mA

-

0.2

0.4

Vol2

Vs=0.0V, Ireset=10mA

-0.3

0.5

Vol3

Vs open, Ireset=3mA

-

0.2

0.4

Vol4

Vs open, Ireset=10mA

-

0.3

0.5

Iol1

Vs=0.0V, Vreset=1.0V

2060

-

Iol2

Vs open, Vreset=1.0V

2060

-

Ct charge currentIctu

Power on reset operating, Vct=1.0V

(0.5)

1.2

(2.5)

Min supply voltage for RESET

Vccl1 Vreset=0.4V, Ireset=0.2mA

-0.8

1.2

High level output voltage

Output saturation voltage

Output sink current

mVV

μA
μA
VVmAμA
V-

0.8

1.2

Vcc input pulse width

Vreset=Vcc-0.1V,
Vccl2
RL=1MΩ(Between RESET and GND)
tpi
Vcc : 5V → 4V → 5V

8.0-

-

us

CK input pulse widthtckw

3.0-

-

us

CK input frequency

tck

20-

-

us

Watch-dog timer watching timetwd

Ct=0.1μF *51015ms

Watch-dog timer reset timetwr

Ct=0.1μF

123ms

Rising reset hold time

tpr

Ct=0.1μF, Vcc rising

50

100150ms

Output propagationdelay timefrom Vcc

tpd1RESET, RL=2.2kΩ, CL=100pF-210

tpd2 RESET, RL=2.2kΩ, CL=100pF
Output rising time*tr
RL=2.2kΩ, CL=100pF
Output falling time*tf* The values enclosed in parentheses ( ) are setting assurance values.
* Ct range is 0.001 μF to 10 μF.
* The voltage range is 10% to 90% at testing the reset output transition time.

-31.0
0.1

101.50.5

Min supply voltage for RESETCK : Positive pulse or negative pulse-usus

Rev.1.94 / 14

ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com■Timing chart
Fig.1: Basic operation■Operation sequence(1) When Vcc rises to about 0.8V, RESET goes “Low” and RESET goes “High”. The pull-up current of approximately
1μA (Vcc = 0.8V) is output from RESET.
(2) When Vcc rises to VSH (≈ 4.3V), the charge with Ct starts.At this time, the output is being reset.
(3) When Ct has been charged for a certain period of time Tpr, RESET goes “High” and RESET goes “Low”.
Reset hold time: Tpr (ms) ≈ 1000 × Ct (μF)
After releasing reset, the discharge of Ct starts, and watch-dog timer operation starts. Tpr is not influenced
by the CK input.
(4) C changes from the discharge into the charge if the clock (Negative edge) is input to the CK terminal while
discharging Ct.
(5) Ct changes from the charge into the discharge when the voltage of CT reaches a constant threshold (≈ 1.245 V).
(4) and (5) are repeated while a normal clock is input by the logic system.
(6) When the clock is cut off, and the voltage of Ct falls on threshold (≈ 0.35V) of reset on, RESET goes“Low” and RESET goes “High”.Discharge time of CT until reset is output: Twd is watch-dog timer monitoringtime.
Twd (ms) ≈ 100 × Ct (μF)
Because the charging time of Ct is added at accurate time from stop of the clock and getting to the output ofreset of the clock, Twd becomes maximum Twd + Twr by minimum Twd.

Rev.1.9
5 / 14

ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com(7) Reset time in operating watch-dog timer : Twr is charging time where the voltage of Ct goes up to offthreshold (≈ 1.245V) for reset.
twr (ms) ≈ 20 × Ct (μF)
Reset of the output is released after Ct reaches an off threshold for reset, and Ct starts the discharge, afterthat if the clock is normally input, operation repeats (4) and (5), when the clock is cut off, operation repeats (6)and (7).
(8) When Vcc falls on Vsl (≈ 4.2V), reset is output. Ct is rapidly discharged at the same time.
(9) When Vcc goes up to Vsh, the charge with Ct is started. When Vcc is momentarily low, After falling Vsl orless Vcc, the time to going up is the standard value of the Vcc input pulse width in Vsh or more. After thecharge of Ct is discharged, the charge is started if it is Tpi or more.
(10) Reset of the output is released after Tpr, after Vcc becomes Vsh or more, and the watch-dog timer starts.
After that, when Vcc becomes Vsl or less, (8) to (10) is repeated.
(11) While power supply is off, when Vcc becomes Vsl or less, reset is output.
(12) The reset output is maintained until Vcc becomes 0.8V when Vcc falls on 0V.
(13) Equation of the time setting capacity Ct and each setting time:
tpr(ms) ≈ 1000 × Ct(μF)
twd(ms) ≈ 100 × Ct(μF)
twr(ms) ≈ 20 × Ct(μF)
Example (When Ct = 0.1 μF)
tpr [ms]
twd [ms]
100
10

twr [ms]
2■MarkingSOP-8

SON8-3×3SymbolaMark
0 to 9Content
Last numeral of A.D.

bc

A to M (excepted I.)
0 to 9Assembly monthLot No.

Rev.1.9
6 / 14

ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com■Application circuit example
1) Monitoring 5V supply voltage and watchdog timer＊ Supply voltage is monitored using Vs. Detection voltage are Vsh and Vsl.
＊ By adding an external capacitor C between the Vs terminal and GND, the minimum input pulse width Tpi canbe lengthened.

2) 5V Supply Voltage Monitoring (external fine-tuning type)* Vs detection voltage can be adjusted externally.
* Based on selecting R1 and R2 values that are sufficiently lower than the resistance of the IC’s internal voltage
divider, the detection voltage can be set according to the resistance ratio of R1 and R2 (Refer to the table below.)R1(kΩ)
10.0

R2(kΩ)
3.9

Detection voltage: Vsl(V)4.32

Detection voltage: Vsh(V)
4.43

9.1

3.9

4.06

4.16

Rev.1.9
7 / 14

ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com

3) With Forced Reset (with reset hold)* Grounding pin 7 at the time of SW ON sets RESET (pin 8) to Low and RESET (pin 2) to High.

* Feeding the signal to terminal RESIN and turning on Tr sets the RESET terminal to Low and the RESET terminal
to High.

4) Stopping Watch-dog Timer (Monitoring only supply voltage)
These are example application circuits in which the ELM377342xA monitors supply voltage alone without resetting the microprocessor even if the latter, used in standby mode, stops sending the clock pulse to theELM377342xA.
(Notes)
The watch-dog timer is inhibited by clamping the Ct terminal voltage to Vref. The supply voltage is constantly
monitored even while the watch-dog timer is inhibited. For this reason, a reset signal is output at the occurrenceof either instantaneous disruption or a sudden drop to low voltage. Note that in application examples (a) and (b),the hold signal is inactive when the watch-dog timer is inhibited at the time of resetting.If the hold signal is active when the microprocessor is reset, the solution is to add a gate, as in examples (c) and (d).

Rev.1.9
8 / 14

ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com(a) Using NPN transistor
Vcc(5V)
Logic circuit

ELM3773
12348765RESET
RESET
CK
HALT
GND

R2=1kΩ

R1=1MΩ

Ct(b) Using PNP transistor
Vcc(5V)
Logic circuit

ELM3773
12348765RESET
RESET
CK
HALT
GND

R2=1kΩ

R1=51kΩCt(c) Using NPN transistor
Vcc(5V)

Logic circuit

ELM3773
12348765

R1=1MΩ

RESET
RESET
CK
HALT

GND
R2=1kΩ
Ct

Rev.1.99 / 14

ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com(d) Using PNP transistor
Vcc(5V)Logic circuit

ELM3773
12348765RESET
RESET
CK
HALT

R1=51kΩ

GND
R2=1kΩ
Ct5) Reducing Reset Hold Time(a) Tpr reduction method(b) Standard usage

Vcc(5V)
Vcc(5V)

Vcc(5V)
Vcc(5V)

ELM3773
ELM3773

CtCt

1 1
2 2
3 3
4 48 8
7 7
6 6
5 5

Logic
Logiccircuit
circuit

ELM3773
ELM3773

RESET
RESET
RESET
RESET
CKCK
GND
GND

CtCt

1 1
2 2
3 3
4 4

8 8
7 7
6 6
5 5

Logic
Logiccircuit
circuit

RESET
RESET
RESET
RESET
CKCK
GNDGND(Notes)• RESET is the only output that can be used.
• Standard Tpr, Twd and Twr value can be found using the following formulas.
<Formulas>
Tpr (ms) ≈ 100×Ct (μF)
Twd (ms) ≈ 100×Ct (μF)
Twr (ms) ≈ 16×Ct (μF)• The above formulas become standard values in determining Tpr, Twd and Twr. Reset hold time is compared
below between the reduction circuit and the standard circuit.
Ct = 0.1μF
Tpr ≈Twd ≈Tpr reduction circuit
10 ms
10 ms

Standard circuit
100 ms
10 ms

Twr ≈1.6 ms

2.0 msRev.1.910 / 14

ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com■Reference land pattern
SOP-8 208mil

7.45mm

1.27mm

0.60mm

1.75mm

SOP-8 150mil

Rev.1.911 / 14

ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com■Typical characteristic curves

Output voltage Verset(V)0.14

Top=+25°C

0.12

Top=+85°C

0.10

0.08

0.06

0.04

0.02

Top=-40°C

012348765

Top=-40°C, +25°C, +85°C

4.0

3.0

2.0

1.00

Output voltage vs. Supply voltage

Detection voltage (Vsh, Vsl) vs.
Operating ambient temperature

4.0

3.0

2.0
Top=+85°C
Top=+25°C

1.0

Top=-40°C

1.0

2.0 3.0 4.0 5.0
Supply voltage Vcc(V)

6.0

Vsh

4.30
4.20Vsl

4.10

4.00

3.90
-60 -40 -20

Top=+85°C

400
300
Top=-40°C

0Top=+25°C0(RESET terminal)500
Output saturation voltage Vol8(mV)

Output saturation voltage Vol2(mV)

Ct=0.1�F

100+20 +40 +60 +80 +100

Output saturation voltage vs.
Output sink current(RESET terminal)

200

0Operating ambient temperature Top(°C)

Output saturation voltage vs.
Output sink current
600

7.0

4.40

3.80

7.0

6.0

(RESET, RESET terminal)

4.50
Detection voltage Vsh, Vsl (V)Pull up resistance 2.2k�

5.05001.0

2.0 3.0 4.0 5.0
Supply voltage Vcc(V)(RESET terminal)0

Pull up resistance 2.2k�

5.0

Supply voltage Vcc(V)6.0

Output voltage Vreset(V)(RESET terminal)

6.0

Ct=0.1�F

0.16
Supply current Icc(mA)

Output voltage vs. Supply voltage

Supply current vs. Supply voltage

0.18

400

Top=+85°C300200
Top=-40°C

1000

2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0
Output sink current Iol2(mA)

Ct=0.1�F

Top=+25°C

02.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0
Output sink current Iol8(mA)

Rev.1.9
12 / 14

ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com

High level output voltage vs.
High level output current

High level output voltage vs.
High level output current(RESET terminal)

4.5

4.001.255

Top=+25°C

1.250

510High level output current Ioh2(�A)

Reference voltage vs. Supply voltage

Top=+85°C

1.245
Top=-40°C

1.240

1.235

1.230

1.225

1.0

Reference voltage Vref(V)

1.27

2.0

3.0 4.0 5.0 6.0
Supply voltage Vcc(V)

7.0

1.24

1.23

1.22

1.21-60 -40 -2000510
High level output current Ioh8(�A)

Ct=0.1�F
Top=-40°C

Top=+85°C

1.245
Top=+25°C

1.240

1.235

1.230

160

0

40200
80
160120
Reference current Iref(�A)

240

Rising reset hold time vs.
Operating ambient temperature
Vcc=5V
Ct=0.1(�F)

140
120100806040200-60 -40 -20+20 +40 +60 +80 +10015

Reference voltage vs. Reference current

1.250

Reference voltage vs.
Operating ambient temperature

1.25

Top=+25°C

Top=-40°C

1.225

8.0

1.26

4.5

1.255

Ct=0.1�F
Top=+25°C

Ct=0.1�F

Top=+85°C

4.0

15

Rising reset hold time tpr(ms)Reference voltage Vref(V)High level output voltage Voh8(V)Top=+85°C

Top=-40°C(RESET terminal)

5.0

Ct=0.1�F

Reference voltage Vref(V)High level output voltage Voh2(V)5.00+20 +40 +60 +80 +100

Operating ambient temperature Top(°C)

Operating ambient temperature Top(°C)

Rev.1.9
13 / 14

ELM7C377342xA CMOS Voltage detector with watchdog timer
http://www.elm-tech.com

Watch-dog timer watching time vs.
Operating ambient temperature

Reset time vs. Operating ambient temperature

3

Watch-dog timer watching time twd(ms)(At watch-dog timer)

Reset time twr(ms)Vcc=5V
Ct=0.1(�F)2

10-60 -40 -20

0161210864

20-60 -40 -20+20 +40 +60 +80 +100

(at watch-dog timer)

105

Top=-40°C

10104
Top=+25°C

102

Top=+85°C

10Top=-40°C110-1

10-4

1Top=+25°C

10-1
Top=+85°C

10-2

10-2

10-3+20 +40 +60 +80 +100

Reset time vs. Ct terminal capacitance102

Reset time tw�(ms)Watch-dog timer watching time twd(ms)Watch-dog timer watching time vs.
Ct terminal capacitance1030Operating ambient temperature Top(°C)

Operating ambient temperature Top(°C)

106

Vcc=5V
Ct=0.1(�F)

14

10-3 10-2 10-1
101
Ct terminal capacitance Ct(�F)

10-3

102

10-4

10-3 10-2 10-1
101
Ct terminal capacitance Ct(�F)

102

Rising reset hold time tpr(ms)Rising reset hold time vs. Ct terminal capacitance106105
Top=-40°C

104
103

102

Top=+25°C

10

110-1

Top=+85°C-2

10

10-3

10-4

10-3 10-2 10-1
10
1Ct terminal capacitance Ct(�F)

102

Rev.1.9
14 / 14