Issue

May. 10, 2024

No.

T712C02Le

L

RFID System Z Series
Technical Manual for Identification Processor
Type code : Z4-Q002
MELSEC-Q series BUS Interface（ID dedicated instruction specification）

Thank you very much for purchasing the RFID system Z series of B&PLUS lately.
Before using this Processor, read this manual carefully and operate properly, paying attention to the safety
aspects.

Processor Z4-Q002

Safety Considerations（Please read this before use）
Before using this Processor, read this manual carefully and operate properly, paying attention
to the safety aspects.
Incorrect handling may cause not only malfunction or failure, leading to an accident or injury.
In this manual, the instructions are described in the following two levels.

CautionAttention

Application

The incorrect handling may cause hazardous conditions that lead to death orserious injury.
The incorrect handling may cause hazardous conditions that lead to
injury of human or equipment.

◆ This manual applies to Processors in Z4-Q002.
◆ Carefully read this manual before using the Processor and handle the productcorrectly.
◆ Installation and operation should be carried out by trained personnel who has
knowledge of electrical equipment.

◆ Even if the abnormality of power supply and this product break down, please

Designconsiderations

design the system so that the whole system acts on the safe side.
◆ About power supply and using conditions, be carefle not to exceed the range of
specifications.
◆ About the standard or the rule, to which your equipment should adapt, please do

Caution

Wiringconsiderations

Attention

appropriate measures after confirm by yourself.
It is the responsibility of the operator to ensure that the locally applicable safety
regulations are maintained.

◆ Wiring should be carried out after the power is turned off.
◆ When wiring the Processor, follow the chapters containing the wiring diagrams
closely, and wire all connections properly.
Incorrectly connected wiring may cause malfunction or unexpected problems.

◆ Unauthorized work and improper use will void the warranty and liability.

Usage◆ Please carry out the periodical confirmation of the system including setting

considerations◆ The Processor must be operated only using approved power supplies.

environment and the apparatus concerned.
There is a risk of fire or heat generation exceeds the rated voltage power is being

Attention

supplied.
◆ Be sure to turn off the power before cleaning, maintenance and failure treatment.
Do not touch the terminals while the electricity is on.
◆ Do not disassemble or modify the Processor. It may cause failure, malfunction,
injury or fire.
◆ When disposing of the Processor, treat it as industrial waste.

＜ Note >(1) Specifications and contents in this manual are subject to change without notice(2) Please let us know if there is any mistake or notice in this manual-2-Processor Z4-Q002

Contents

1. Description
1.1
1.2
1.3
1.4

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  4
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
System configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  5
Components and Applicable Unit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  6

2. Specification of the System
2.1
Specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  7
2.2
Dimension. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  7
2.3
LED indication and ConnectingTerminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  8
3. Installation
3.1
3.2
		
		
3.3
3.4

Procedure of Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  9
Processor Installation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  9
3.2.1 Setting condition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  9
3.2.2 Processor fixation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  9
Wiring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  10
Setting of Switches([GX Developer]). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  11

4. Communicating Function
4.1
Communicating Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  12
4.2
Memory of Data carrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  14
4.3
I/O signals to Sequencer CPU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  15
4.4
Data Processing time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  17
4.5
Buffer memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  17
		
4.5.1 Buffer memory list. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  18
		
4.5.2 Buffer memory details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  20
5. Communication with Data carrier
5.1
Communication with Data carrier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  22
		
5.1.1 System connection and handling data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  22
		
5.1.2 Data structure (Unit processing) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  22
		
5.1.3 Notes at the time of Programming. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  23
5.2
About the dedicated instruction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  24
		
5.2.1 Detail of setting data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  24
5.3
Initial setting (IDINIT □ ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  27
5.4
Data reading instruction (IDRD □ /IDARD □ /IDCRD □ /IDSRD □ ). . . . . . . . . . . . . . . . . .  28
5.5
Data writing instrucion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  31
		
5.5.1 Data writing instrucion (IDWD □ /IDAWD □ /IDCWD □ /IDSWD □ ) . . . . . . . . . . . .  31
		
5.5.2 Data writing at once instrucion (IDFILL □ ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  33
5.6
Comparison Instruction (IDCM □ ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  36
5.7
Data copy Instruction（IDCOPY □ ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  38
5.8
Clear Instruction (IDCLR □ ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  40
5.9
Lifetime control Instruction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  42
		
5.9.1 About the lifetime determination of writing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  42
		
5.9.2 Count writing Instruction (IDMW), continuous count writing Instruction (IDLW) . . . . . .  43
		
5.9.3 Batch update of the number of writing Instruction (IDMD). . . . . . . . . . . . . . . . . . . . . .  46
5.10 Write protect information Instruction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  48
		
5.10.1 About write protect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  48
		
5.10.2 Write protect information reading Instruction (RP). . . . . . . . . . . . . . . . . . . . . . . . . . .  50
		5.10.3 Write protect information writing Instruction (WP) . . . . . . . . . . . . . . . . . . . . . . . . . . .  51
5.11 Memory setting Instruction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  52
		
5.11.1 About the memory type. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  52
		
5.11.2 Life extension bank switching Instruction (BK). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  55
5.12 Writing lifetime management and Life extension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  56
		5.12.1 About the lifetime of Data carrier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  56
		5.12.2 Prevention Instruction for troubles caused by data-carrier lifetime of writing . . . . . . .  56
		5.12.3 Life extention of writing lifetime by bank switching. . . . . . . . . . . . . . . . . . . . . . . . . .  57
		
5.12.4 Pprogramming example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  60
5.13 Error cancel Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  63
6. Error information
6.1
List of Error code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  64
App.1 Diversion of Sequencer program for A/QnA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  65

-3-

１.

Description

Processor Z4-Q002

1.1 Description[B&PLUS RFID System Z series] is an RFID System for factory automation which read or writes data wirelessly by
inductive coupling principal.
Identification Processor / Z4-Q002 is an interface unit for factory automation systems, which connects directly to
Sequencer unit "MELSEC-Q series" by Mitsubishi (2 Read/Write heads are connectable).
1.2 Features(1) Easy to program
Data reading/writing of Data carrier via Processor can be performed easily by the Dedicated instruction.
By using dedicated instruction, shorter program can be created than using the existing FROM/TO instruction.
(2) In 2-channel equipped Processor, the Read/Write head operates independently
Z4-Q002 can communicate with Data carrier by the different instructions for each channel(3) By data copy Instruction, data can be copied amoung the Data carriers.
Without of the Sequencer CPU, it can copy the data amoung the Data carriers(4) Batch communication can ensure the data simultaneity
Maximum 1000words data (344words, when bank function is effective) can be batch communicated by one
Instruction.
By this mothod, it communicates with the Data carrier while ensuring data simultaneity.
(5) Write protect function to prevent for write-errors.(when bank function is effective）
Prevents the loss for important data such as product type number or model number which are stored in the datacarrier by careless data writing(6) Possible to writing lifetime control*(when bank function is effective）"writing-lifetime control function" can manage the number of writing, and "Data carrier writing-lifetime"
management can easily be achieved(7) Data carrier life extention is possible by the bank swithcing* (when bank function is effective）
By life-extention bank switching, Data carrier( Z1-xxxx-128) writing lifetime(100,000times) can be increased up
to 1,200,000 times. (Lifetime of Z1-AA02-02K is 100 billion times）*Writing lifetime control and Bank function are effective for using Data carrier：Z1-AA02-02K[Note for System configuration]- Dedicated instruction of this Processor(Z4-Q002) is compatible to Interface unit for MELSEC
Q-series（by Mitsubishi Electric Co. Ltd.）
However, except the dedicated instruction, other features such as transmission rate, memory
construction and anti-interference function are not the same.
And communication distances and installation conditions are different, so please confirm this instruction
manual and Mitsubishi Electric's instruction manual when designing.
- In the system which using the Processor Z4-Q002, Z4-Q002 for CC-Link can be used together.
However, the bank function setting (enabled / disabled) must be the same for all Processors. Whenother controllers are mixed or bank function setting is not identical, each functions may not work properly.

-4-

１.

Description

Processor Z4-Q002

1.3 System configuration

Processor(Z4-Q002)
ID
コントローラ(BIS M-688-002/-002X)

C
C
P
P
U
U
ユ
U
ニ
N
ッ
I
ト
T

増設ベースユニット
Extention base unit

Read/Write
head ID
Data
carrier
ID アンテナ
タグ

CH1

CH2
アンテナケーブル
Read/Write
head Cable

External
power
unit(24VDC)
外部電源(24VDC)

Function of each component
Component
Function
Data carrier
Memorize and save information (data).
Read/Write head Read and write information (data) of Data carrier non-contact.
Supply power for operating of Data carriers.
Processor
Follows to the Instruction from CPU unit, read data from Data carrier and write data to
Data carrier. One or two Read/Write head(s) are connectable.

[Note for Construction of the System]- Processor (Z4-Q002) is a special unit for MELSEC-Q series which occupies
I/O 32 signals.
The maximum numbers that Melsec CPU can control are as follows.
Q00JCPU/Q00UJ : 8 pieces, Q00CPU/Q00UCPU/Q01CPU/Q01UCPU : 24 pieces,
Q02UCPU : 36 pieces,
Q12PRHCPU/Q25PRHCPU : 53 pieces (except Basic base units), other CPU : 64 pieces- Consider the following points to determine the number of Processors to be controlled by 1 CPU unit.
(1) I/O signals and data memory capacity of CPU unit.
(2) Number of occupied signals of other unit (input/output card) except Processor.
(3) Influence of programming (ladder) to processing time or tact time.
- The Processor can perform concurrent processing of separate orders by connected 2 channels of
the Read/Write head .
But communication is not carried out properly when there are plural Data carriers in thecommunication area of the Read/Write head.
Please design the system so that only one communicating Data carrier enters
the communication area of each Read/Write head.

-5-

１.

Description

Processor Z4-Q002

1.4 Components and Applicable Unit
Components and applicable unit of MELSEC-Q series including Processor (Z4-Q002) is indicated as follows.
This Identification System can only be used following applicable units.

MELSEC-Qseries
CPU unit
Qn CPUQnJ CPU
QnH CPU
QnPH CPUQnU CPUQnUJ CPUQnUD CPUQnUDE CPUQnUDEH CPU
QnUDH CPUQnUDV CPU

Basic Base unit
Q33B
Q35B
Q38B
Q312B
Q38DB

Expanded Base Unit
Q63B
Q65B
Q68B
Q612B

Q312DB
Q38RB
Q32SB
Q33SB

Q52B
Q55B
Q68RB
Q65WRB

Q35SB

Processor *1

Notes- this product cannot be used with the safe
CPU(QS001CPU).
- When the duplexing CPU(QnPRH CPU) is used,
this product cannot be attached to the Baseunit.
- When confirm about the combination of the CPU
unit and the Base unit, refer to the manual of
Mitsubishi Electric corp for MELSEC-Q CPU.

Z4-Q002

External Power
Unit (24VDC)

Cable
Z7-A001-PU__
Z7-A002-PU__

Read/Write head
Z3-A010-CN*1：Data carrier specification
112 byte type : ISO 15693 based		
Memory type EEPROM
		Memory capacity 112byte(56word）
		
Writing 100,000 times/reading Unlimited
2K byte type : ISO 15693 based		
Memory type FRAM			
Memory capacity 2000byte(1000word）
		
Writing 10 billion times/reading Unlimited-6-

Identification communication
Data carrier
Z1 series

2.

Specification of the System

Processor Z4-Q002

2.1 Specification
Type code
Power supply

Z4-Q002
24 VDC+/-10 %5 VDC(Sequencer electric supply source)(External power supply）
Current consumption
0.75 A(External power supply）
0.5 A(Sequencer electric supply source)
Occupied I/O signals
32 signals
2K byte: Z1-AA04-02K
Applicable Data carrier
112 byte: Z1-CB16-112, Z1-CB27-112, Z1-CB45-112, Z1-BB10-112, Z1-B011-128
Applicabel R/W head
Z3-A010-CN
Read/Write heads
Connectable up to two Read/Write heads
Connecting Heads
Terminal connecting
Cable length R/W heads
5 m standard (max.25 m)
O p e r a t i n g t e m p e r a t u r e , 0...+55 degree C, 35...85 % RH (not in dew condensation)
humidity
Storage temperature, humidity -25...+70 degree C, 35...85 % RH (not in dew condensation)
Vibration rating
Frequency
Acceleration
Amplitude
Sweepage10 - 57 Hz
0.075 mm
10 times
57 - 150 Hz
1G
1 octave/1 min. *Shock rating
10 G, 3 times each axis to x-y-z
Noise-proof
Noise voltage for 24 VDC power supply 800 V P-P, amplitude of noise 1 microS,
Noise frequency: operating normally with noise simulator 25...60 Hz
Operating atmosphere
WeightWithout corrosive gas and heavy dust
approx. 230 g(*) 1 octave ... Initial frequency increases to double or decreases to half.
ex. 10 Hz --> 20 Hz, 20 Hz --> 40 Hz, 40 Hz --> 20 Hz, 20 Hz --> 0 Hz / each of these change is called as 1 octave

2.2 Dimension

9701234567
8 9 AB CDEF

90.5
27

-7-

2.

Specification of the System

Processor Z4-Q002

2.3 LED indication and Connecting Terminal

01234567
8 9 AB CDEF

LED indication

Terminal for Read/Write head (CH 1)

97

use 7 signals

Terminal for Read/Write head (CH 2)
use 7 signals

Terminal for DC 24V Power supply
use 3 signals

90.5
27
LED indication
Monitor the operating condition, errors etc. by LED indication.
When error has occurred, error code would be shown
LED LED indication0--- Normal operation
1
Transmission status
2 CH1 Receiving status
3
Error indication
8--- Power supply status to read/write head
9
Transmission status
A CH2 Receiving status
B
Error indication
F*1 --- Watch dog timer (WDT) error● : OnOK
Data in transit
Data receiving
Occurrence of an error
OK
Data in transit
Data receiving
Occurrence of an error
Occurrence of an error*1：It lights on at the time of startup but it is not an error

Connecting terminal(1) Read/Write head (CH 1) connecting terminal: use 7 terminals(2) Read/Write head (CH 2) connecting terminal: use 7 terminals(3) External power unit (DC 24V) and earthing terminal: use 3 terminals-8-○ :OffNG
UnsentUnreceived
OK
NG
UnsentUnreceived
OK
OK

3.

Installation

Processor Z4-Q002

Describes the installation environment and Handling Precautions in installation of Processor.
3.1 Procedure of Installation

Installation of Processor Z4-Q002

Creating a data set

Wiring of Readwrite head

Creating a user program

Initial setting of Processor
Switch setting(「GXDeveloper」use

Turning on Processor

Communication test
Start operation
3.2 Processor Installation
3.2.1 Setting condition
Please install Processor avoiding situations where ;- May be subjected to direct sunlight, such as outdoors.
- Operating temperature exceeds 0..55 degree C.
- Dew condensation caused by severe tempareture change.
- Relative humidity exceeds 35...85%RH.
- Processor is exposed to heavy corrosive gas, combustible gas, or dust.
- Shock or vibration directly to Processor.
- Water, oil or chemical is sprayed on the Processor.
Although this product suits EMC instructions and CE mark is displayed, I am doing the examination in thestate of the installation in an operator control panel like the Sequencer.

<Note>
Please install Processor in board with particular attention to following points.
- Well ventilated space.
- Processor should not be installed close to devices which generates high heat, such as a heater,transformer or High capacity resistor.
- The surface temperature of Processor may become more than 55 deg.C. by self-fever.
Some measure to install a fan or a heat exchanger should be taken so that the board inside keeps
under 55 deg.C.
- Please remove the dustproof label, after all wiring is completed.

3.2.2 Processor fixation
This Processor should be installed in a Mitsubishi basic base unit or an additional unit by Mitsubishi.
Please refer to "1.4 Components and Applicable Unit" for available base unit.
When installing, please take in consideration the current capacity of the power supply, as well as thevoltage drop of additional cable. For details, please refer to the Sequencer CPU user manual.

-9-

3.

Installation

Processor Z4-Q002

3.3 Wiring① Wiring of FG and an external power(24VDC)
Install wiring by following the steps below
・Connect [+] of 24V DC to terminal indicated [24V DC], [-] to terminal indicated [0V].
・Connect to terminal indicated [FG], and wire to the same point of Frame Ground of Sequencer CPU unit.

01234567
89ABCDEF

Read/Write head
(CH1)

Read/Write head
(CH2)

FG and an external power② Read/Write head
Wire Read/Write head to connecting terminal for Read/Write head with reference to [Wiring diagram ] below.
To connect 2 Read/Write heads, there are terminals for CH1/CH2 and Read/Write heads are connectableto each terminal.
[Wiring diagram]

Wiring of Read/Write head with cable
Processor

Terminals
CH1/CH2ABYZVS+VSSHIELD

Read/Write head Cable[ Cable color][ BK ][ BK/WH ][ GN/WH ][ GN ][ BU ][ BU/WH ](Shield)

Connector cable : Z7-A001A-PU__(Straight type)：Z7-A002A-PU__(Angle type)

Processor
Terminals
CH1/CH2
A

Read/Write head Cable[ Cable color][ YE ][ PK ][ GY ][ GN ][ RD ][ WH ](Shield)B
Y
Z
VS+
VSSHIELD

Connector cable : Z7-A001-PU__(Straight type)：Z7-A002-PU__(Angle type)- 10 -

Read/Write head

Z3-A010-CN｝Twisted pair cable
Read/Write head

Z3-A010-CN3.

Installation

Processor Z4-Q002

Read/Write head Cable[ Cable color]

Processor
Terminals
CH1/CH2
A

Read/Write head

[ Blue ][ White ][ Brown ][ Yellow ][ Green ][ Black ](Shield)B
Y
Z
VS+
VSSHIELD

Connector cable : Z7-A001A-RB__(Straight type)：Z7-A002A-RB__(Angle type)

Z3-A010-CN｝Robot cable<Note for wiring>- Read/Write head Cable should be kept apart from power cable or high voltage unit.
- When Read/Write head is installed on unit which has metal housing, make the unit to D-class grounding.
-This product is in conformity with EMC directive and indicated CE marking.
Appropriate measures should be taken to avoid excessive surges when the cable length to the power unit islonger than10m.

3.4 Setting of Switches ([GX Developer])Switch settings set the parameters of the Processor with [GX Developer].
The switch assignments are written to the Processor from CPU unit when the Sequencer of CPU unit is started-up or reset.

GX Developerparameter
Switching set with
Layout I/O of Processor

CPU unit

Processor
Start-up /Writing

parameter

Reset

Switch setting!! Refer to user's manual of CPU unit about detail of setting.

Switch1:Bank function
0=Valid (Maximum avaiable memory 688 bytes:344 words)
1=Invalid (Available all the usable area of Data carrier)
POINT
Only Z1 - xxx - 02K (tag capacity 2000 bytes) can activate the bank function. Bank function can not be usedwith Z1 - xxx - 128. For Z1 - xxx - 128, switch 1 must be set to "1 = Bank function invalid". When Bank function isenabled, ID tag communication error (Error code ** 14H) when reading or writing.

- 11 -

4.

Communicating Function

Processor Z4-Q002

4.1 Communication Function
The following features can be performed through the ID interface unit.
Function

Instruction

Initial setting

Initial setting
Reading

Reading

Continuous
readingComparison
reading

Writing

Checking
Copy
DeleteLife
Management*2

Dedicated
Instruction
Descriptions
Page
instruction *1
code
IDINIT □--Initial setting of ID interface unit
P.27
IDRD □--Reading the data from the Data carrier
Read/Write head continuously performs reading until
the Data carrier is in its communication range, and after
IDARD □--the Data carrier is in the communication range, it will
read out the data from Data carrier.
IDCRD □---

Continuous &comparison
readingIDSRD □---

Writing

IDWD □---

Continuous
writing

IDAWD □---

Comparison
writing

IDCWD □---

Continuous &comparison
writingIDSWD □---

Writing at thesametime
Comparison
Data copy
Clear

IDFILL □---IDCM □
IDCOPY □IDCLR □-------Count writing

IDMW

---

Continuous
count writing

IDLW

---

Batch update of
the number ofwriting

IDMD---- 12 -

Read the data from Data carrier and compare the data.

P.28

Read/Write head continuously performs reading until
the Data carrier is in its communication range, and after
the Data carrier is in the communication range, it will
read out the data from Data carrier and then compare
the data.
Writing the data to the Data carrier
Read/Write head continuously performs writing until the
Data carrier is in its communication range, and after the
Data carrier is in the communication range, it will write
the data to Data carrier.
Write the data to Data carrier and compare the data.
Read/Write head continuously performs writing until the
Data carrier is in its communication range, and after the
Data carrier is in the communication range, it will write
the data to Data carrier and then compare the data.
Write the specified data into the specified area of Datacarrier at the same time.
Compare the Processor data to the Data carrier data.
Copy the Data carrier data between CH1 and CH2.
Clear the all data of Data carrier with "0".
Perform data writing to Data carrier and update thenumber of writing.
Read/Write head continuously performs writing until the
Data carrier is in its communication range, and after the
Data carrier is in the communication range, it will write
the data to Data carrier and then update the number ofwriting.
Adding the number of optional writing

P.31

P.36
P.38
P.40

P.42

4.

Communicating Function
Reading thewrite protect

Write protect*2

information
Writing write
protect

Memorysetting*2

information
life extensionbank switching
Cancelsequential

Instruction---RP(5052H)

Reading write protect information from Data carrier.
P.48

---

---

---

WP
(5057H)
BK---

Writing write protect information to Data carrier.
Setting the momory type (No of bank) in the Data

(4B42H)

instruction
Clear error

Processor Z4-Q002

carrier.
Forced termination of sequential instruction

P.52

---

Clear error process(turn of the error LED, reset the error
---

---

detection signal, clear the error code strage area of P.63
Buffer memory)*1：□ in the dedicated instruction column indicates "1" for CH1 and "2" for CH2（ex：IDRD1

IDRD2)*2 : When the bank function is invalid by switch setting, BK, IDMW, IDLW, IDMD, RP and WP become unavailable.

- 13 -

4.

Communicating Function

Processor Z4-Q002

4.2 Memory of Data carrier
Data carrier memory that can communicate with Processor are shown below.
Depending on the setting of memory type, the data capacity and data range will be changed, please refer to P.49 for details.
1) Bank function valied : Only for Z1-xxx-02K (tag capacity 2000 bytes)
Memory configurationis set to have 1 bank

0
1
2
3
4
5
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
338
339
340
341
342
343
User notspecifiedBank No.1

Memory configurationis set to have 4 banks

0
1
2
・
・
78
79
0
1
2
・
・
78
79
0
1
2
・
・
78
79
0
1
2
・
・
78
79
User notspecified

344word*1

BankNo.1

80wordBank No.2

80wordBank No.380wordBank No.480word*1*1: No. of writing storage area
(IDMD,IDMW,IDLW instruction

POINT
The difference between byte and word-processing, please refer to P.22.
Number of write storage area is automatically allocated to each bank and when executing IDMD,IDMW,IDLW
instructions it stores the count value of writing.
Points to be noted for using bank function(1)Data carrier data is erased when you change the number of banks.
(2)Mixing the Data carrier with different number of banks may be unable to read or write data due toifferences in their capacity.
(3)With the tag Z1 - xxx - 128, the bank function can not be used.

2) Bank function invaliedIf bank function is unused, all area of Data carrier is available.
・ Z1-xxxx-128 : 56 word （112 byte）
・ Z1-xxxx-02K : 1000 word（2000 byte）- 14 -

4.

Communicating Function

Processor Z4-Q002＜ Notes ＞
Read / write instruction is up to 1000 words (3E8 H) to accept.
Even the instruction which exceeds the memory capacity of Data carrier of 112 byte(56 word) is issued,
Processor will accept it and try to execute the instruction. In that case, within the memory of the Data carrie,reading and writing will be executed correctly, but when trying to access an address out of range, it becomesstatus of "Data carrier communication error"
For example, when executing writing instructions of 1000 words from the address 0 to Z1-xxxx-128 (56words) , it will write in up to 56 words and it becomes status of "Data carrier communication error"
4.3 I/O signals to Sequencer CPU
I/O signals to the Sequencer CPU when using Processor are descrived below.
(n) with X or Y is specified the upper 2 digits of 3 digits (Hexadecimal), which represents first
input/output number of the slot which the Processor is mounted.

48 signals has been used before Processor, theCPU

16signal 32signal
UNIT

UNIT

Processor

first I/O number will be "030" therefore, "Xn1"
would be "X31" and“Y(n+1)4”would be“Y44”(1) Input signal(Processor → Sequencer CPU)
There are 32 Input signals (Xn0 ～ X(n+1)F, and every input signals are to be ON/OFF by the Processor.
Input signals
CH1
CH2

Signal name

Description
After power supplied and Sequencer CPU is reset，when Processor
become ready, it will be ON（After Power is ON，it becomes ON in

Xn0

UNIT READY

seconds）
When Processor failes for continuous operation or DC24V LED turns

Xn1

---

Xn2

XnA

INZONE CONTACT

Xn3

XnB

ID-BUSY

off, in such error happens, it become OFF.
not useDuring continuous instruction execution(IDARD,IDSRD,IDAWD,IDSW
D,IDLW,IDCOPY), when it detects INZONE it becomes ON.
When ID instruction is in execution, it becomes On and after it iscompleted, it becomes OFF.
At the error, it keep ON status until error cancellation is executed
After Y(n+1)4/Y(n+1)C,Y(n+1)5/Y(n+1)D becomes ON, then when

Xn4

Xn5

XnC

XnD

Xn6 ～ Xn9
XnE ～ X(n+1)F

ID Instruction

ID instruction execution is completed, it becomes ON.

completed*1

At the error, it will not become ON and error detection signal

Error detection(Xn5,XnD) becomes ON in stead.
ON by error and Off by error cancellation(Y(n+1)1)
Without of error cancelation, dedicated instruction will not work
not use*1 During using dedicated instruction, it will not ON/OFF
POINT(1) Please don't use the unavailable devices as they are used by
the system, and in case if used, apolopriate operation of thedevice can not be guaranteed(2) During using dedicated instruction，
do not use CH.1 Xn2, Xn3, Xn4/ CH.2 XnA, XnB, XnC at interlock.

- 15 -

4.

Communicating Function

Processor Z4-Q002(2) Output signal(Sequencer CPU → Processor)
There are 32 Onput signals Yn0 to Y(n+1)F, and every onput signals is to be ON/OFF by the sequence program.
Output signal
CH1
CH2
Yn0 ～ YnF
Y(n+1)0 Y(n+1)8・・

Y(n+1)3
Y(n+1)1

Y(n+1)B
Y(n+1)9Y(n+1)2

Y(n+1)A

Y(n+1)4Signal name

Description---

not use---not useError cancellation*1 By making it ON at the error, it cancels the error
Stop continuous
By turning ON during continuous instruction (IDARD,IDSRD,IDAWD,IDSW

instruction*1
D,IDLW,IDCOPY) execution, it stops the continuous instruction.
Require ID instruction
Y(n+1)C
ON by sequence program, it will execute preset ID instruction.
execusion*2
During dedicated instruction, it is invalied.
ON by sequence program, it will execute special instruction(RP,WP,BK).

Require special
Y(n+1)5 Y(n+1)D instruction execusion*2

Require ID instruction execusion(Y(n+1)4/Y(n+1)C)
Require special
特殊命令用実行要求
instruction
execusion(Y(n+1)5/Y(n+1)D)ID-BUSY(Xn3/XnB)

IDinstruction
命令完了 completedID(Xn4/Xnc)

Y(n+1)6
Y(n+1)7

Y(n+1)E
Y(n+1)F---

not use*1 Only available during using dedicated instruction*2 Invalied during using dedicated instruction
POINT
Please don't use the unavailable devices as they are used by the system, and incase if used, apolopriate operation of the device can not be guaranteed- 16 -

4.

Communicating Function

Processor Z4-Q002

4.4 Data processing time
Data processing time for Reading and writing is shown below<2000 byte / Data carrier> (FRAM)
Processing time(1)Data Volume
Reading
Writing
1 word2 byte0.1 sec.
0.4 sec.
32 word
64 byte
0.2 sec.
0.8 sec.
250 word
500 byte
1.3 sec.
2.9 sec.
500 word 1000 byte
2.7 sec.
5.7 sec.
750 word 1500 byte
3.9 sec.
8.4 sec.
1000 word 2000 byte
5.0 sec.
11.2 sec.

<112 byte / Data carrier> (icode-sli EEPROM)
Processing time(1)Data Volume
Reading
Writing
1 word2 byte0.2 sec.
0.2 sec.
32 word 64 byte
0.2 sec.
0.6 sec.
56 word 112 byte
0.3 sec.
0.8 sec.

(1)Processing time is the time to complete the ID instruction on the ladder when each No.
of data were processed continuously.

(eg.)RD instructionPowersupplyunit

CPU

Z4-Q002

Base

Read/write
head

Data
carrier

Read/write
head

Data
carrier

External contact ON
Instruction execution
INZONE response
Data
processing
time

Read Instruction
Read response

Communication
time with
Data carrier(Communication time）

Instruction completed

External contact OFF

4.5 Buffer memory
Buffer memory is a area to store the read/write data of Data carrier as well as store the control information to
perform the data exchange between Data carrier and Sequencer CPU.
From the sequence program, the Buffer memory can be accessed with MOV instruction. Also the contentsof the Buffer memory will be returned to default value by powered off and Sequencer CPU reset.

- 17 -

4.

Communicating Function

Processor Z4-Q002

4.5.1 Buffer memory list
Buffer memory is consisted as 1 address 16 bits (one word) and is not battery backuped.
Therefore, please store the error code to Sequencer CPU file register as needed.
Address
CH.1
CH.2
Intelligent function
Intelligent function
Unit device
Un ￥G0Un ￥G1Un ￥G2

Unit device
Un ￥G4000
Un ￥G4001
Un ￥G4002

Un ￥G3

Un ￥G4003

Un ￥G4

Un ￥G4004

Un ￥G5

Un ￥G4005

Un ￥G6

Un ￥G4006

Un ￥G7

Un ￥G4007

Un ￥G8Un ￥G9Un ￥G4008

Buffer memory address name

Initialvalue

Un ￥G11

Un ￥G4011

Un ￥G12Un ￥G13Un ￥G14
Un ￥G15
Un ￥G16

Un ￥G4012
Un ￥G4013
Un ￥G4014
Un ￥G4015
Un ￥G4016

Instruction code specify area
*2,*3 4452H
Initial address specify area
*2,*30
Number of processing specify area *2
1Continuous instruction execution
interval specify area
*20(Every 100ms)
Matchied data result storage area
*20
Mismatched data result storage
*2
0
area
Lifetime determination value ofwriting specify area
10(10000times/unit)
Writing life determination result*20storage area
Number of retries specified area
*3,*4
3
Processing unit specify area
*3,*40
Data copy direction specify area
*2,*3
12Inzone detection time specify area
*3,*4
0(Every 10ms)
Error LED status storage area0
Not use
Latest error code storage area
0
Error history 1
0Error history 2
Error history
0

Un ￥G17Un ￥G4017

Error history 3

Un ￥G18

Un ￥G4018
Un ￥G4019 ～ Un

Error history 4

Un ￥G4010

Un ￥G19 ～ Un ￥G21
Un ￥G22
Un ￥G23
Un ￥G24 ～ Un ￥G25
Un ￥G26￥G4021Un ￥G4022
Un ￥G4023
Un ￥G4024 ～ Un
￥G4025
Un ￥G4026

Un ￥G27 ～ Un ￥G31

Un ￥G4027 ～ Un

Un ￥G27 ～ Un ￥G31

￥G4031Un ￥G4032

Un ￥G33

Un ￥G4033

Un ￥G34

Un ￥G4034

Storage area

R/W *1

Page

R/W
R/W
R/W

P.20
P.24
P.24

R/W

P.20

R/W

P.21

R/W

P.21

R/W

P.42

R/W

P.42

R/W
R/W
R/W

P.25
P.25
P.25

R/W

P.26

R

P.21
--P.21

R
R
R

0

R

0

R

Not useWrite count storage area(lower 16bit)
Write count storage area(Upper16bit)

--0
0

R
R

Not useNumber of writing additional value specify
area (MD dedicated instruction)

1

R/W

0

R/W

P.48

0

R/W

P.48

0

R/W

P.48

W：Writable*2 Settings will be retained after execution, in order to prevent malfunctions, please initialize
the necessary items by TOP instruction.
*3 When using a dedicated instruction ，setting to Buffer memory is automatically performed by
the Processor.（When ID instruction abend, it will not be set）
*4 After power is ON, or after resetting the Sequencer CPU, only until the first ID instruction execution
request or special instruction execution request becomes ON, it can be changed.

- 18 -

P.25---*1 Indicates whether it is possible to reading / writing from the sequence program.
R：Readable

P.25
P.25
---

Not useWrite protect setting area
Write protect start page address specified
area
Write protect finish page address specify
area

P.21

4.

Communicating Function

Address
CH.1
CH.2
Intelligent function
Intelligent function
Unit device
Un ￥G35 ～ Un ￥G39
Un ￥G40
Un ￥G41
Un ￥G42 ～ Un ￥G99

Unit device
Un ￥G4035 ～ Un
￥G4039Un ￥G4040
Un ￥G4041
Un ￥G4042 ～ Un

Un ￥G100 ～ Un

￥G4099Un ￥G4100 ～ Un

￥G1099￥G5099Buffer memory address

Processor Z4-Q002

Initialvalue

R/W *1Page

Not use

---

---

---

Memory type storage area
Memory type storage area

0
0

R/W
R

P.52
P.54

Not use

---

---

---

Indefinite

R/W

---

Data storage area(1000word)*2*1 Indicates whether it is possible to reading / writing from the sequence program.
R：Readable

W：Writable*2 When using a dedicated instruction ，setting to Buffer memory is automatically performed by
the Processor.（When ID instruction abend, it will not be set）

POINT
(1)Buffer memory as shown in this section, when diverting the sequence program for the
A-series for Z4-Q002, it will access FROM/TO instruction.
When using the dedicated instruction, access to the Buffer memory is done
automatically unless you specify particularly, there is no need to access directly fromthe sequence program.
(2)In specific use of the buffer area of memory, by setting a predetermined value,communication condition or processing unit with Data carrier can be selected.
Since the default value has been preset, unit can be operate without setting.
(3)Unavailable Buffer memory is used by the system, therefore please do not use it byuser. In case if it is used, normal operation is not guaranteed.
(4)Un¥G □ is an inteligent function unit devices. This devices directly accesses fromQCPU the Buffer memory of Inteligent function unit and special function unit which
are mounted to base unit and expansion base.
To specify：U □ ¥G □Buffer memory address（Setting range：0 ～ 16383 decimally）
I/O number of Intelligent function unit/special function unit
・Setting ：Upper 2 digits of when I / O output number are
expressed in three digits
In case of X/YF0 ･･････ X/Y1F0
Specify：1F・Setting range：00H ～ FEH- 19 -

4.

Communicating Function

Processor Z4-Q002

4.5.2 Buffer memory details(1) Instruction code specify area (Address CH.1 Un¥G0/ CH.2 Un¥G4000), it specify the instruction to
Data carrier.
		When dedicated instruction is in execution, executed instruction code will be stored along with		

successful completion of the instruction.

		Initial value ：4452H

		[Example] When specify the write protect reading instruction(RP)Exchange the high and low bytes of the instruction to be set, then convert it to the ASCII code and store it.
RP

Replacing upperorder, lower order
byte
P

R

5

ASCII CODE

0

5

2

(2) Continuous instruction execution interval specify area (Address CH.1 Un¥G3/CH.2 Un¥G4003)
		It specify the interval of Instruction execution of continuous instruction per 100ms.

				Specified range：0 ～ 32767(0ms ～ 3276700ms)

		Initial value		Continuous instruction execution interval is...

：0

Continuous instruction is running!
（IDARD,IDSRD,IDAWD,IDSWD,IDLW,IDCOPY）

Communication with data charrier completed!
Rerun the continuous instruction by the program.

It is during this time.

Stop transmission of continuous instruction Instruction.

After continuous instruction
interval time passed, it
starts continuous instruction
Instruction transmission
again.

Start transmission of continuous instruction Instruction.

- 20 -

4.

Communicating Function

Processor Z4-Q002(3) Matched data result storage area(Adress CH.1 Un ￥G4 / CH.2 Un ￥G4004)
After comparison instruction (IDCRD,IDSRD,IDCWD,IDSWD,IDCM）has executed, it will store the result
only when data matched
Initial value

：0

Point
Match result will remain stored unless it will be reset by sequence program.
Before re-running the comparison instruction, write "0" to the matched data
result storage area and clear it.

(4) Mismatched data result storage area(Adress CH.1 Un ￥G5 / CH.2 Un ￥G4005)
After comparison instruction (IDCRD,IDSRD,IDCWD,IDSWD,IDCM）has executed, it will store the result
only when data mismatched
Initial value

：0

Point
Mismatch result will remain stored unless it will be reset by sequence
program.
Before re-running the comparison instruction, write "0" to the mismatcheddata result storage area and clear it.

(5) Error LED status storage area(Address CH.1 Un ￥G12 / CH.2 Un ￥G4012)
Information of Error LED will be stored by Processor OS"0" in normal operation, "1" in error will be stored
Initial value

：K0

b15
0

b0
0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

24V DC

UnusedUnusedERR(6) Latest error code storage area(Address CH.1 Un ￥G14 / CH.2 Un ￥G40014)
When error happens, the latest error code will be stored. Please refer P.64 for error code
After error cancel instruction(refer to P.63) is executed, the latest error code will be "0" cleared as well as it will
be sequentially stored shifting to the error history storage area.
[Example] In CH1, when error happens while reading(IDRD) instruction is in execution, and also error happens
while writing(IDWD) instruction is in execution.
While reading instrucion(IDRD) is in
execution, missing Data carrier error
happens
K14
K15
K16
K17
K18

after that

0113H
0000H
0000H
0000H
0000H

While writing instrucion(IDWD) is in execution,
missing Data carrier error happens

K14
K15
K16
K17
K18

0213H
0113H
0000H
0000H
0000H

Latest error code is stored.

(7) Error code history storage area(Address CH.1 Un ￥G15 ～ Un ￥G18 / CH.2 Un ￥G40015 ～ Un ￥G40018)
4 error codes, which were occured in the past will be stored. Please refer to P.64 for error code

- 21 -

5.
5.1

Communication with Data carrier

Processor Z4-Q002

Communication with Data carrier

5.1.1 System connection and handling data
ID system reads and writes the memory data of PC and Sequencer device to Data carrier.
Also, when communicating with the Data carrier, either one of byte (8 bits) or word(16 bits 2 bytes) can beused as the data processing unit. However, to ensure data compatibility, if there are Sequencer and PC are
mixed in upper system, integrate the processing unit to either one of word unit or byte unit and use it.

5.1.2 Data structure (Unit processing)In the data processing of ID system, there are word unit processing and byte unit processing, however,default data structure of ID system is word unit.When using system with byte unit, set the "1" into theprocess unit specified divice of controle data by initial setting instruction(IDINIT □）.

Point
Byte unit processing has a special data structure and therefore, writing data andreading data are different. This manual is written in word unit processing and whenusing ID system, it is recommended to use it by word unit processing.

(1) Data flow by word unit
Buffer memory

Buffer memory

Data carrier
Writing

Reading
(L)
(H)
(L)
(H)

4241H
4443H

41H
42H
43H
44H

4241H
4443H

(2) Data flow by byte unit
Buffer memory

Data carrier
Writing

(L)
(H)
(L)
(H)

41H
42H
43H
44H

Buffer memory
Reading

(L)
(H)
(L)
(H)

41H
43H

- 22 -

(L)
(H)
(L)
(H)

41H
00H
43H
00H

５.
5.1.3

Communication with Data carrier

Processor Z4-Q002

Notes at the time of Programming

Indicates precautions that should be known before creating the program, which to communicate with theData carrier by the Processor.
(1) About the execution instruction on each channel
It is not possible to execute multiple instructions simultaneously in one channel.
Please take the interlock with the program to not run more than one instruction per channel.
It is possible to execute instruction simultaneously to CH1 & CH2 on Z4-Q002.
In addition, please do not exist more than one Data carrier in the communication area of Read/Write headof each channel.
(2) The default of Buffer memory
If it needs to change the default value of the Buffer memory specific use area to communicate with the Datacarrier, sequence program needed to be built-in.
(3) About the data retention status of Data carrier at the error.
If an error occurs while communicating with the Data carrier, data will be overwritten by mixed of new data andoriginal data in 8 word unit.
As a countermeasure, if an error occurs during writing instruction execution (IDWD □ , IDCWD □ , IDAWD □ ,IDSWD □ , IDFILL □ ,IDMW,IDLW,WP, IDCOPY □ , BK, IDMD), please run the instruction execution again after
the error cancel Instruction,.

【When using dedicated instruction】(4) About changing the data that is specified in the dedicated instruction
When executing dedicated instruction, please don't change the each data(device data or related data of the
Buffer memory specific use area), which dedicated instruction specifies.
(5) About the multiple execution of the dedicated instruction
Please do not run multiple instructions simultaneously in one channel. If run the multiple dedicatedinstructions, or run the same dedicated instructions repeatedly, please execute the next dedicatedinstruction by the ON of the completed device.
(6) About the execution format of the dedicated instruction
Dedicated instruction must be executed with GP.****,and do not executed with always running G.****.
【When using RP/WP/BK instruction】(7) About the insertion of the handshaking signals
Please be sure to insert the handshake signals with the Sequencer CPU to the program.
(8) About the Buffer memory backup
The Buffer memory is not battery back-up. When it is powered or CPU is reset, all the data which were
rewritten beforehand is returned to default values. Each time, setting and changing data needs to be written.
(9) About the ON/OFF of the Error cancel contact, stop continuous instruction contact
When executing the RP, WP, BK instruction, please do not turn ON/OFF the "error cancel Instruction( CH.1
Y(n+1)1/CH.2 Y(n+1)9)" or the "stop continuous instruction Instruction( CH.1 Y(n+1)2/ CH.2 Y(n+1)A)",
which are used with dedicated instruction.

- 23 -

5.

Communication with Data carrier

Processor Z4-Q002

5.2 About the dedicated instruction
Dedicated instruction is the instruction to facilitate the programming, which to use the features of theintelligent function module. Processor simplifies the sequence program by the dedicated instruction.
For programming, please use the dedicated instruction.
Point(1)When executing the dedicated instruction, please do not change the each data(device
data, data in specific use area of related Buffer memory), which specified by its dedicatedinstruction(2)When executing the dedicated instruction, please do not ON/OFF the execution request contact(Y(n+1)4, Y(n+1)5, Y(n+1)C, Y(n+1)D), which is used with FROM/TO instruction.
(3) If the dedicated instruction is executed under the following conditions, dedicated instruction
does not work. Completed device will also not turn ON.
① When dedicated instruction is executed to the channel where the dedicated instruction is in
execution(dedicated instruction, FROM/TO instruction)② When dedicated instruction is executed to the channel where the status is error（Xn5/XnD is ON status）(4) Please do not run multiple instructions simultaneously in one channel. If run the multiple
dedicated instructions, or run the same dedicated instructions repeatedly, please execute thenext dedicated instruction by the ON of the completed device.
(5) Dedicated instruction must be executed with GP.****, and do not executed with always running
G.****.
(6) While executing the dedicated instruction, please do not perform RUN → STOP operation ofSequencer CPU.

5.2.1 Details of setting data
Describes the setting data, which is used with dedicated instruction.
(1) Reading/writing first address(specified by reading/writing instruction）
It specifies the first address of Data carrier by word unit, and it is not Buffer memory address.
By the type of instruction which is executed, the area of the first address is different.
If the setting is out of range, it will be "setting address error ".
Specify processing units
Word unit(Default)
Byte unit

First address area
K0 ～ K999
K0 ～ K1999

Also, when the instruction execution completed, the specified data is stored to the next area.
Buffer memory specified use address： CH.1 Un¥G1 CH.2 Un¥G4001(2) Number of reading/writing word（Number of data)(specified byreading/writing instruction）
It specifies the number of the word(if specified by byte, numuber of byte), which read/wirte to Data carrier
by word unit.
By the type of instruction which is executed, the area of the number of word(number of byte) is different.
If the setting is out of range, it will be "setting number of word error" or "OPERATION ERROR" of theSequencer CPU.
Specify processing units
Word unit(Default)
Byte unit

First address area
K0 ～ K1000
K0 ～ K2000

Also, when the instruction execution completed, the specified data is stored to the next area.
Buffer memory specified use address： CH.1 Un¥G2 CH.2 Un¥G4002- 24 -

５.

Communication with Data carrier

Processor Z4-Q002(3) Specify the direction of the copy instruction（During executing the copy instruction, the contents will bereflected）
When copy instruction（IDCOPY □）is in execution, it will set the direction of the copy.
Specify direction of the copy
From CH.1 to CH.2(Default)
From CH.2 to CH.1

Setting area
K12
K21

If an invalid setting, it will work at the default value (K12).
Also, when the instruction execution completed, the specified data is stored to the next area.
Buffer memory specified use address： CH.1 CH.2 Un¥G4010(4) Store the value of the number of writing(During executing the life management instruction, the contents
will be reflected)
During the IDMD / IDMW / IDLW instruction execution, it will write to the device, which specifies the valueof number of writing of communicated Data carrier with 2 words unit.
Setting
The value of the number ofwriting

Setting area
K0 ～ K2147483647(H0 ～ HFFFFFFFF)

Also, when the instruction execution completed, the specified data is stored to the next area.
Buffer memory specified use address： CH.1 Un¥G22,Un¥G23 CH.2Un¥G4022,Un¥G4023(5)Number of writing additional value specify area(Specified with batch update of the number of writing
instruction）
During the batch update of the number of writing instruction (IDMD) execution, it will set the number ofwriting.
SettingFirst address area
Number of writing additional K0 ～ K32767
value（When K0 is specified, it won't update
the number of writing, it reads current
value of the number of writing and life
determination）
If an invalid setting, it will work at the default value(K1)Also, when the instruction execution completed, the specified data is stored to the next area.
Buffer memory specified use address： CH.1 Un¥G26 CH.2 Un¥G40026(6) Setting the Number of retry（Specified with Initial setting instruction）
If an error occurs during data communication, it sets the number of retry
Setting
Number of retryof the Processor

Setting area
K0 ～ K32767

Also, when the instruction execution completed, the specified data is stored to the next area.
Buffer memory specified use address： CH.1 Un¥G8 CH.2 Un¥G4008- 25 -

5.

Communication with Data carrier

Processor Z4-Q002(7)Specify processing units(Specified with Initial setting instruction)
Default value is word unit. Specified at the initial setting instruction, upper 8 bit data of Sequencer device
per 1 word

will be ignored, and it will read/write to Data carrier the 1 byte from the lower 8 bit as a valid data.

Specify processing units
Word unit(Default)
Byte unit

Setting value
K0
K1

If an invalid setting, it will work at the default value(K0)Point(1) Buffer memory cannot be handled by 1 byte. Please note that address anddata of the Buffer memory is word unit.
(2) Data carrier won't record the identification of byte/word, therefore, pleasemanage it in the sequence program.
(3) When the processing unit is specified, CH1 &CH2 will become same setting.
Also, when the instruction execution completed, the specified data is stored to the next area.
Buffer memory specified use address： CH.1 CH.2 Un¥G9(8) INZONE detection time（Specified with Initial setting instruction, and used in contiunous instruction）
		

INZONE detection time is a standby time, and it is the time after Data carrier comes into communication
area and until starts the in-zone detection(start communication), while continuous instruction is in
execution.

		

OUT-ZONE detection time is a standby time, and it is the time after Data carrier gets out from
communication area and until finishes the out-zone detection(finish communication), while continuous

		

instruction is in execution.

		 （OUT ZONE detection time and INZONE detection time are the same setting)Up dating
Data carrier

unstable zone

unstable zone

No answer

In zone contact(Xn2/XnA)In zone detection time
Setting
In zone detection time

Out zone detection time

Setting area
K0 ～ K32767

If an invalid setting, it will work at the default value(K0).
In zone detection time is set during initial setting instruction.
Setting time can be set from 0ms to 32767ms at the interval of 10ms.
In zone detection time for CH.1 and CH.2 can be set separately.
Also, when the instruction execution completed, the specified data is stored to the next area.
Buffer memory specified use address： CH.1 Un ￥G11 CH.2 Un¥G4011- 26 -

５.

Communication with Data carrier

Processor Z4-Q002

5.3 Initial setting(IDINIT □ )When performing data communication with the Data carrier other than the default, please make sure to write
the next Buffer memory area.
Available device
Settingdata

Inside device(System, User)
bit
---

(S)

file
registerWord○

MELSECNET/10(H)Special unit Index register
Direct J □￥□Constant
U □￥G □
Zn
bit
word
---

Others[Instruction
symbols][Execution
condition][ 命令記号][ 実行条件]IDINIT1

IDINIT2

GP.IDINIT1

Un

(S)

GP.IDINIT2

Un

(S)

Setting data
Setting data
Un

Description
First I/O signal number of the unit
（00 ～ FE：The upper 2 digits of 3 digits, when it describes the I/O
signals by 3 digits. ）(S)First number of device which stores controle data

Setting side

Data format

User

BIN16bitUser

Device name

File register for each program unit and the local device can not be used as a setting data.

Controle data
Device
(S)+0
(S)+1
(S)+2

Item
Setting data
Specify the No.
Setting the number of retryof retry
Setting the data processing unit
Specify
0：Word unit
processing units
1：Byte unit
Specify INZONE Set the INZONE detection time
detection time 0 ～ 327670ms（10ms unit）

Setting are

Setting side

Page
P25
5.2.1(6)0 ～ 32767

User

0,1

User

P26
5.2.1(7)0 ～ 32767

User

P26
5.2.1(8)Function(1) Writing the initial data to the unit specified by the "Un", in accordance with the initial setting data whichis later than the device which is specified by (S).
(2) IDINIT1 instruction is executed for the channel 1 of the Processor, IDINIT2 instruction is executed forchannel 2 of the Processor.

- 27 -

5.

Communication with Data carrier

Processor Z4-Q002

Programming Example
The programming example of the next condition is shown as follows
Instruction･･････････････････････････ CH.1Initial setting(IDINIT1)First I/O output number of unit･････ 00
Controle data storage location･････ D0
Number of retry ････････････････････ 5 times
Processing unit ････････････････････ 0（Word unit）
In zone detection time･･････････････ 10ms

External
External
signalinterlock signal

Set the retry number value
to K5
Set the processing unit toword(K0)
Set the in zone detection time to
K1
Start

IDINIT instruction execusion

Point(1)Writing to the initial setting of Buffer memory, please perform only once at therising of the Processor.
(2)The initial setting is effective until the first instruction is executed and after
the instruction, even if contents of initial setting is changed, it will be ignored. Tochange the initial setting, it needed to CPU reset.
(3)The setting of the processing unit should be in common in channels 1 and 2. If
the setting is different, the value which set later will be valid.

5.4 Data reading instruction(IDRD □ /IDARD □ /IDCRD □ /IDSRD □ )Descrive the instruction to read the data from Data carrier.
Instruction
Reading instruction

Description
Store the data which read from the Data carrier into Sequencer device.

(IDRD1/IDRD2)
Continuous reading
instruction(IDARD1/IDARD2)Comparison reading
instruction(IDCRD1/IDCRD2)

Continuously performs reading until the Data carrier is in its communication range,
and after the Data carrier is in the communication range, it will read out the datafrom Data carrier and store the data into sequence device.
Read the data from Data carrier and compare the data and store the data intosequence device..

Continuous & comparison
reading instruction(IDSRD1/IDSRD2)

Read/Write head continuously performs comparison and reading until the
Data carrier is in its communication range
When the Data carrier is in thecommunication range, it reads the data from the Data carrier and compare it, andthen it will be stored to Sequencer device.
Available devices

Setting

Inside device

data(System,User)

n1
(D1)
n2
(D2)

bit
------○

wordFileregister

MELSECNET/10(H)Direct J □￥□
bit

word

○
○
○
○

Special unit Indexregister
U □￥G □

Zn---

Constant

Others

K,H

---

K,H

---

-------- 28 -

５.

Communication with Data carrier

Processor Z4-Q002[Instruction
symbols][Execution
condition][ 命令記号][ 実行条件]IDRD1,IDRD2
IDARD1,IDARD2IDCRD1,IDCRD2IDSRD1,IDSRD2Instruction
GP. 命令記号symbols

Un

n1

(D1)

n2

(D2)

Setting data
Setting data Description
First I/O signal number of the unitUn
（00 ～ FE：The upper 2 digits of 3 digits, when
it describes the I/O signals by 3 digits.）

Setting side Data format

Page

User

BIN16 bit

---

User

BIN16 bit

P24 /5.2.1(1)n1First address of Data carrier(D1)First number of the device, which stores thedata which read out from Data carrier

SystemDevice name

---

n2

Number of data read from the Data carrier

User

BIN16 bit

(D2)

The bit device number to be turned ON with theexecution completed.
When the abnormal completion, (D2) +1 also to
be ON

P24 /
5.2.1(2)Systembit---

File register for each program unit and the local device can not be used as a setting data.

Function(1) Through the unit specified by the "Un", read the number of data specified in the "n2" from the address thatis specified by "n1" of the Data carrier and then stored it to later than the device which specified by (D1).
(2) IDRD1/IDARD1/IDCRD1/IDSRD1 instruction is executed on Channel 1 of the unit，and IDRD2/IDARD2/
IDCRD2/IDSRC2 instruction is executed on Channel 2 of the unit.
(3) In comparison reading instruction or continuous comparison reading instruction, it read the data again from
Data carrier and compares it to the data which has already been read and then store it.
If the comparison result is mismatched, it will be abnormal completion(4) In continuous reading instruction or continuous comparison reading instruction, if Data carrier is not in thecommunication range of Read/Write head, it waits the Data carrier until it comes into the communication
range, and once the Data carrier comes in to the communication range, it reads out the data from the datacarrier.
(5) In continuous reading instruction or quit the continuous comparison reading instruction executes the quit
continuous instruction Instruction.
(6) When reading is completed, while END instruction of the instruction completed scan is in execution,
it turns ON the bit device which specified in (D2) and turns it OFF automatically after 1 scan.
When the abnormal completion, completion status display device (D2) +1 also to be ON.
Error(1) When error, which detected by the Processor occurs, it performs the action below.
① Error contact( CH.1 Xn5/ CH.2 XnD) tunrs ON.
（For canceling the error contact, use the error cancel Instruction）② Completion status display device (D2) +1 will turn the 1 scan ON.
③ Error code will be stored to the Buffer memory CH.1 Un¥G14/ CH.2 Un¥G4014.

- 29 -

5.

Communication with Data carrier

Processor Z4-Q002

Programming Example(1) Programming Example		The programming example of the next condition is shown as follows
		
Instruction･･････････････････････････････ CH.1 Reading instruction(IDRD1)
		
ID interface first I/O output number･････ 00		Data carrier reading start address･･････ K100
		No. of reading word･････････････････････ K5
		Reading data storage location･･････････ D100 ～ D104
		
Error code storage location･････････････ R0External
External
signalinterlock signal

Start

IDRD1instruction execution

Set normal completion signal(M51)completion
When normal completion, store the error
code to R0(2) Operation timing		
Operation timing is shown below

END processing

END processing

END processing

Sequence program

Execution
instruction(M1)

ON
OFF

ON
ID-BUSY X03

Communication between
Data carrier and Read/
Write head

Execution
instruction
命令実行

Keep ON at abnomal completion
Normal completion OFF

OFF

ON
OFF
Keep ON at abnomal completion

ON
Error detection X05

Complete device (M100)

Normal conpletion OFF

OFF

ON
OFF

Display device of thecompletion status(M101)

ON

Abnomal completionOFF

1 scan ON

Point(1)While reading instruction is in execution, if Data carrier doesn't exist, it
executes the instruction of the number of retry and become error.
(2)When continuous reading instruction(IDARD □ /IDSRD □ ) is executed, it continuously
performs reading until the Data carrier come into communication area
If Data carrier doesn't come into communication area, it executes instructions permanently.
To stop execution, please execute the quit the continuous instruction Instruction .

- 30 -

５.

Communication with Data carrier

Processor Z4-Q002

5.5 Data writing instruction
5.6.1 Data writing insturction(IDWD □ /IDAWD □ /IDCWD □ /IDSWD □ )Descrive the instruction to write the data from Data carrier.
Instruction
Writing instruction(IDWD1/IDWD2)Continuous writing

Description
Write the data, which stored in Sequencer device to Data carrier

instruction(IDAWD1/IDAWD2)
Comparison writing
instruction(IDCWD1/IDCWD2)Continuous & comparison
writing instruction(IDSWD1/IDSWD2)

Read/Write head continuously performs writing until the Data carrier is in its
communication range. Once cata carrier is in the communication range, it will write
the data, which stored in Sequencer device to Data carrier.
After write the data, which stored in Sequencer device to Data carrier, it compares
the Data carrier data with the Sequencer device.
Read/Write head continuously performs comparison writing until the Data carrier isin its communication range.
When the Data carrier is in the communication range, it writes and compares thedata and stores it to Sequencer device.
Available devices

Setting

Inside device

data(System,User)

n1
(D1)
n2
(D2)

bit
------○File

MELSECNET/10(H)registerword

Direct J □￥□
bit

word

○
○
○
○

Special unit Indexregister
U □￥G □

Zn---

Constant

Others

K,H

---

K,H

---

-------[Instruction
symbols][Execution
condition][ 命令記号][ 実行条件]IDWD1,IDWD2
IDAWD1,IDAWD2IDCWD1,IDCWD2IDSWD1,IDSWD2Instruction
GP. 命令記号symbols

Un

n1

(S)

n2

(D)

Setting data
Setting data Description
Setting side Data format
First I/O signal number of the unitUn
（00 ～ FE：The upper 2 digits of 3 digits, whenUser
BIN16 bitit describes the I/O signals by 3 digits.）

Page
---

n1

First address of Data carrier

User

BIN16 bit

(S)First number of the device, which stores thedata which write to Data carrier

P24 /5.2.1(1)

User

Device name

---

n2

Number of data read from the Data carrier

User

BIN16 bit(D)

The bit device number to be turned ON withthe execution completed.
When the abnormal completion, (D)+1 also to
be ON

P24 /
5.2.1(2)Systembit---

File register for each program unit and the local device can not be used as a setting data.

- 31 -

5.

Communication with Data carrier

Processor Z4-Q002

Function(1) Through the unit specified by the "Un", write the n2 signals of data from the specified address with (S) to later
than the address specified in the Data carrier n1.
(2)
IDWD1/IDAWD1/IDCWD1/IDSWD1 instruction is executed on Channel 1 of the unit，and IDWD2/IDAWD2/IDCWD2/IDSWD2 instruction is executed on Channel 2 of the unit.
(3) In comparison writing instruction or continuous comparison writing instruction, it reads the data after thedata was written and then compares it to the data which has already been written. If the comparison result ismismatched, it will be abnormal completion.
(4)
In continuous writing instruction or continuous comparison writing instruction, if Data carrier is not in thecommunication range of Read/Write head, it waits the Data carrier until it comes into the communication range,and once the Data carrier comes in to the communication range, it writes the data to the Data carrier.
(5) In continuous writing instruction or quit the continuous comparison writing instruction executes the quit
continuous instruction Instruction.
(6)
When writing is completed, while END instruction of the instruction completed scan is in execution, it turns
ON the bit device which specified in (D) and turns it OFF automatically after 1 scan.
When the abnormal completion, completion status display device (D) +1 also to be ON.
(7) Only 1word (when the processing unit is byte, 1byte) in the writing area falls under the write protect settingarea, it will be write protect error and it can not be written even for non-protected area.
Error(1) When error, which detected by the Processor occurs, it performs the action below.
① Error contact( CH.1 Xn5/ CH.2 XnD) tunrs ON.
（For canceling the error contact, use the error cancel Instruction）② Completion status display device (D) +1 will turn the 1 scan ON.
③ Error code will be stored to the Buffer memory CH.1 Un¥G14/ CH.2 Un¥G4014.

Programming Example(1) Programming Example
The programming example of the next condition is shown as follows
		
Instruction･･････････････････････････････ CH.1 Writing instruction(IDWD1)
		
ID Processor first I/O output number･ ･･ 00		Data carrier writing start address･･･････ K100
		No. of writing word･･････････････････････ K5
		Writing data storage location･･･････････ D100 ～ D104
		
Error code storage location･････････････ R0External
Extrernal
signals interlock signals

Start

Set the writing data

IDWD1 instruction execution
Set normal completion
signal(M51)
Completion
When normal completion, store
the error code to R0- 32 -

５.

Communication with Data carrier

Processor Z4-Q002(2) Operation timing		
Operation timing is shown below
ENDprocessing

END processing

END processing

Sequence program

Execution instruction

ON

(M1)

OFF

ON
ID-BUSY X03

Keep ON at abnomal
completion

instruction execution

OFF

Communication between
Data carrier and Read/
Write head

Error detection X05

Normal completion OFF

ON
OFF

ON

Keep ON at abnomal
completion

OFF

Normal completion OFF

ON
Complete device (M100)

Display device of theOFFONcompletion status(M101)

When abnomal completionOFF

1 scan ON

Point(1)If writing area contains the write protect setting area, it will be the write protect error.
(It also can not be written even for non-protected area.)(2)While writing instruction(IDWD □ /IDCWD □ ) is in execution, if Data carrier doesn't exist, it
executes the instruction of the number of retry and become error.
(3)When continuous writing instruction(IDAWD □ /IDSWD □ ) is executed, it continuously performs
writing until the Data carrier come into communication area.

If Data carrier doesn't come into

communication area, it executes instructions permanently.
To stop execution, please execute the quit the continuous instruction Instruction .

5.5.2 Data writing at once instrucion(IDFILL □ )Describe the instruction to read the data from Data carrier at once.
Instruction
Data writing at once

Description
By the specified data of 1word, it will clear the data of the number of processing

instrucion

from the specified address.

(IDFILL1/IDFILL2)

When zero clear the all data, use the clear instruction (IDCLR1/IDCLR2).

Available devices
Setting

Inside device

data(System,User)

n1
(S)
n2
(D)

bit
------○

File
register

word

MELSECNET/10(H)Direct J □￥□
bit

word

○
○
○
○

Special unit Indexregister
U □￥G □

Zn---

Constant

Others

K,H

---

K,H

---

-------- 33 -

5.

Communication with Data carrier

Processor Z4-Q002[Instruction
symbols][Execution[ 命令記号][ 実行条件condition]]

IDFILL1

GP.IDFILL1

Un

n1

(S)

n2

(D)

IDFILL2

GP.IDFILL2

Un

n1

(S)

n2

(D)

Setting data
Setting data Description
First I/O signal number of the unitUn
（00 ～ FE：The upper 2 digits of 3 digits, when it
describes the I/O signals by 3 digits.）

Setting side Data format
User

BIN16 bitn1

First address of Data carrier

User

BIN16 bit

(S)First number of the device, which stores the data
which write to Data carrier

User

Device namen2

Number of data write to the Data carrier

User

BIN16 bit(D)

The bit device number to be turned ON withthe execution completed.
When the abnormal completion, (D)+1 also to be ON

Systembit

Page--P24 /
5.2.1(1)--P24 /
5.2.1(2)---File register for each program unit and the local device can not be used as a setting data.

Function(1) Through the unit specified by the "Un", clear the n2 signals of data from the specified address with (S) to
later than the address specified in the Data carrier n1.
(2) IDFILL1 instruction is executed on Channel 1 of the unit，and IDFILL2 instruction is executed on Channel 2of the unit.
(3) When writing is completed, while END instruction of the instruction completed scan is in execution, it turns
ON the bit device which specified in (D) and turns it OFF automatically after 1 scan.
When the abnormal completion, completion status display device (D) +1 also to be ON.
(4) Only 1word (when the processing unit is byte, 1byte) in the writing area falls under the write protect settingarea, it will be write protect error and it can not be written even for non-protected area.

Error(1) When error, which detected by the Processor occurs, it performs the action below.
① Error contact( CH.1 Xn5/ CH.2 XnD) tunrs ON.
		 （For canceling the error contact, use the error cancel Instruction）② Completion status display device (D) +1 will turn the 1 scan ON.
③ Error code will be stored to the Buffer memory CH.1 Un¥G14/ CH.2 Un¥G4014.

- 34 -

５.

Communication with Data carrier

Processor Z4-Q002

Programming Example(1) Programming Example		The programming example of the next condition is shown as follows
		
Instruction . . . . . . . . . . . . . . . . . . . . . . .  CH.1 writing at the sametime(IDFILL1)
		
ID interface first I/O output number . .  00
		
Data carrier writing start address . . . .  K100
		No. of writing word . . . . . . . . . . . . . . . . .  K5
		Writing data storage location . . . . . . .  D100
		
Error code storage location. . . . . . . . . .  R0

External
External
signal interlock signal

Start

IDFILL1instruction execution
Set normal completion signal(M51)
Completion
When normal completion, store
the error code to R0(2) Operation timing		
Operation timing is shown below

END processing

END processing

END processing

Sequence program

Execution
instruction(M1)

ON
OFF

ON
ID-BUSY X03

Communication between
Data carrier and Read/
Write head

Error detection X05

Keep ON at abnomal
completion

instruction execution

OFF

Normal completion OFF

ON
OFF

ON

Keep ON at abnomal
completion

OFF

Normal completion OFF

ON
Complete device (M100)

Display device of thecompletion status(M101)

OFF
ON

When abnomal completionOFF

1 scan ON

Point(1)While writing at the sametime(IDFILL □ ) is in execution, if Data carrier doesn't exist,
it executes the instruction of the number of retry and become error.
(2)If writing area contains the write protect setting area, it will be the write protect
error. (It also can not be written even for non-protected area.)- 35 -

5.

Communication with Data carrier

Processor Z4-Q002

5.6 Comparison instruction(IDCM □ )Describe the instruction to compare the data.
Instruction
Comparison instruction

Description
Compare the data with Data carrier and the data, which stored to the(IDCM1/IDCM2)

Sequencer device, and returns the comparison results.
Available devices

Setting

Inside device

data(System,User)

n1
(S)
n2
(D)

bit
------○File

MELSECNET/10(H)registerword

Direct J □￥□
bit

word

○
○
○
○

Special unit Indexregister
U □￥G □

Zn---

Constant

Others

K,H

---

K,H

---

-------[Instruction
symbols][Execution[ 命令記号][ 実行条件condition]
]

IDCM1

GP.IDCM1

Un

n1

(S)

n2

(D)

IDCM2

GP.IDCM2

Un

n1

(S)

n2

(D)

Setting data
Setting data Description
Setting side Data format
First I/O signal number of the unitUn
（00 ～ FE：The upper 2 digits of 3 digits, whenUser
BIN16 bitit describes the I/O signals by 3 digits.）
n1

First address of Data carrier

User

BIN16 bit

(S)First number of the device, which stores thedata which to be compared

User

Device namen2

Number of the data to be compared

User

BIN16 bit(D)

The bit device number to be turned ON withthe execution completed.
When the abnormal completion, (D)+1 also to
be ON

Systembit

Page--P24 /
5.2.1(1)--P24 /
5.2.1(2)---File register for each program unit and the local device can not be used as a setting data.
Function(1) Through the unit specified by the "Un", compare the n2 signals of data from the specified address with datacarrier n1 with n2 signals of data from the specified address with (S).
(2) IDCM1 instruction is executed on Channel 1 of the unit，and IDCM2instruction is executed on Channel 2of the unit.
(3)As the result of comparison, if the data mismatched, it will be abnormal completion.
（However，error contact CH.1 Xn5/ CH.2 XnD won't be turned ON）(4) When comparison is completed, while END instruction of the instruction completed scan is in execution, it
turns ON the bit device which specified in (D) and turns it OFF automatically after 1 scan.
When the abnormal completion, completion status display device (D) +1 also to be ON.
Error(1) When error, which detected by the Processor occurs, it performs the action below.
① Error contact( CH.1 Xn5/ CH.2 XnD) が ON します。
（For canceling the error contact, use the error cancel Instruction）② Completion status display device (D) +1 will turn the 1 scan ON.
③ Error code will be stored to the Buffer memory CH.1 Un¥G14/ CH.2 Un¥G4014.

- 36 -

５.

Communication with Data carrier

Processor Z4-Q002

Programming Example(1) Programming Example		The programming example of the next condition is shown as follows
		
Instruction . . . . . . . . . . . . . . . . . . . . . . .  CH.1 Compare instruction(IDCM1)
		
ID interface first I/O output number . .  00
		
Data carrier compare start address. . .  K100
		No. of compare word . . . . . . . . . . . . . . .  K5
		Compare data storage location . . . . . .  D100 ～ D104
		
Error code storage location. . . . . . . . . .  R0

External
External
signal interlock signal

Start
IDCM1instruction execution
Set normal completion
signal (M51)
Completion
When comparison
mismatch, set M52
Completion
When normal completion,
store the error code to R0(2) Operation timing		
Operation timing is shown below

END processing

END processing

END processing

Sequence program

Execution
instruction(M1)

ON
OFF

ON
ID-BUSY X03

Communication between
Data carrier and Read/
Write head

Error detection X05

Keep ON at abnomal
completion

instruction execution

OFF

Normal completion OFF

ON
OFF

ON

Keep ON at abnomal
completion

OFF

Normal completion OFF

ON
Complete device (M100)

Display device of thecompletion status(M101)

OFF
ON

When abnomal completionOFF

1 scan ON

Point(1)While comparison instrucion(IDCM □ )is in execution, if Data carrier doesn't exist, it
executes the instruction of the number of retry and become error.
(2)Before executing comparison instrucion, please be sure to 0 clear thecomparison result storage area of Buffer memory( CH.1 Un¥G4,Un¥G5/ CH.2
Un¥G4004,Un¥G4005)- 37 -

5.

Communication with Data carrier

Processor Z4-Q002

5.7 Data copy instrucion(IDCOPY □ )Describe the instruction to copy the data between Data carriers.
Instruction
Data copy instrucion

Description
The direct data transfer the Data carrier data between the CH.1 and CH.2

(IDCOPY1/IDCOPY2)

without a PLC device.

Setting
data
n1
n2
n3
(D)

Available devices
MELSECNET/10(H)File
Special unit Indexregister
Constant Others(System,User)
Direct J □￥□registerU □￥G □
Zn
bit
word
bit
word
--○
--K,H
----○
--K,H
----○
--K,H
--○
○
--Inside device[Instruction
symbols][Execution
condition][ 命令記号][ 実行条件]IDCOPY1

GP.IDCOPY1

Un

n1

n2

n3

(D)

IDCOPY2

GP.IDCOPY2

Un

n1

n2

n3

(D)

Setting data
Setting data Description
Setting side Data format
First I/O signal number of the unitUn
（00 ～ FE：The upper 2 digits of 3 digits, whenUser
BIN16 bitit describes the I/O signals by 3 digits.）
n1

First address of Data carrier of data source

User

BIN16 bitn2

First address of Data carrier of data source

User

BIN16 bitn3

Number of the data to be copied

User

BIN16 bit(D)

The bit device number to be turned ON withthe execution completed.
When the abnormal completion, (D)+1 also to
be ON

Systembit

Page--P24 /
5.2.1(1)P24 /
5.2.1(1)P24 /
5.2.1(2)---File register for each program unit and the local device can not be used as a setting data.
Function(1) Through the unit specified by the "Un", copy the n3 signals of data from the address specified with thecopy to Data carrier n1to after the address specified with Data carrier n2(2) IDCOPY1 instruction copy from channel 1 to channel 2 of the unit and IDCOPY2 instruction copy fromchannel 2 to channel 1.
(3) When copy is completed, while END instruction of the instruction completed scan is in execution, it turns
ON the bit device which specified in (D) and turns it OFF automatically after 1 scan.
When the abnormal completion, completion status display device (D) +1 also to be ON.
(4) If the number of the data specified with n3 is 0, no processing.
(5) Only 1word (when the processing unit is byte, 1byte) in the writing area falls under the write protect settingarea, it will be the write protect error and it can not be written even for non-protected area.

Error(1) When error, which detected by the Processor occurs, it performs the action below.
① Error contact( CH.1 Xn5/ CH.2 XnD) tunrs ON.
（For canceling the error contact, use the error cancel Instruction）② Completion status display device (D) +1 will turn the 1 scan ON.
③ Error code will be stored to the Buffer memory CH.1 Un¥G14/ CH.2 Un¥G4014.

- 38 -

５.

Communication with Data carrier

Processor Z4-Q002

Programming Example(1) Programming Example		The programming example of the next condition is shown as follows
		
Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CH.1 → CH.2 Data copy instruction(IDCOPY1)
		
ID interface first I/O output number . . . . . . . . . . . . 00
		Data source Data carrier reading start address . . K100
		
Data carrier carrier writing start address to copy. K200
		No. of data to be copied . . . . . . . . . . . . . . . . . . . . . . K5
		Error code storage location. . . . . . . . . . . . . . . . . . . . R0

External
External
signal interlock signal

Start

IDCOPY1instruction execution
Set normal completion
signal(M51)
Completion
When normal completion, store
the error code to R0(2) Operation timing		
Operation timing is shown below
END processing

END processing

END processing

Sequence program

ON
Execution
instruction (M1)OFFON
ID-BUSY X03

Communication between
Data carrier and Read/
Write head

Error detection X05

Keep ON at abnomal
completion

instruction execution

OFF

Normal completion OFF

ON
OFF

ON

Keep ON at abnomal
completion

OFF

Normal completion OFF

ON
Complete device (M100)

Display device of thecompletion status(M101)

OFF
ON

When abnomal completionOFF

1 scan ON

Point(1)Data copy instruction(IDCOPY □ ) copy the data between Data carriers
without a PLC device.
(2)If Data carrier to copy contains the write protect setting area, it will be
the write protect error.

- 39 -

5.

Communication with Data carrier

Processor Z4-Q002

5.8 Clear instruction(IDCLR □ )Describe the instruction to clear the data.
Instruction
Clear instruction

Description
Clear Data carrier memory with "0"(IDCLR1/IDCLR2)

Available devices
Settingdata

Inside device(System,User)
bit
○

(D)

word

File
register

MELSECNET/10(H)Direct J □￥□
bit

word

○

Special unit
U □￥G □

Index
registerConstant

OthersZn---[Instruction
symbols][Execution[ 命令記号][ 実行条件 condition]]

IDCLR1GP.IDCLR1Un(D)

IDCLR2GP.IDCLR2

Un(D)

Setting data
Setting data Description
Setting side Data format
First I/O signal number of the unitUn
（00 ～ FE：The upper 2 digits of 3 digits, whenUser
BIN16 bitit describes the I/O signals by 3 digits.）
The bit device number to be turned ON withthe execution completed.
(D)
Systembit
When the abnormal completion, (D)+1 also to
be ON

Page
---

---

File register for each program unit and the local device can not be used as a setting data.

Function(1) Through the unit specified by the "Un", it will 0 clear the all of Data carrier data area.
(2) IDCLR1 instruction is executed on Channel 1 of the unit, and IDCLR2 instruction is executed on Channel 2of the unit.
(3) When 0 clear is completed, while END instruction of the instruction completed scan is in execution, it turns
ON the bit device which specified in (D) and turns it OFF automatically after 1 scan.
When the abnormal completion, completion status display device (D) +1 also to be ON.
(4) If the write protect setting is set in the area, where will be cleared, it will clear all area except the area,
where the write protect setting is set.

Error(1) When error, which detected by the Processor occurs, it performs the action below.
① Error contact( CH.1 Xn5/ CH.2 XnD) turns ON.
（For canceling the error contact, use the error cancel Instruction）② Completion status display device (D) +1 will turn the 1 scan ON.
③ Error code will be stored to the Buffer memory CH.1 Un¥G14/ CH.2 Un¥G4014.

- 40 -

５.

Communication with Data carrier

Processor Z4-Q002

Programming Example(1) Programming Example
The programming example of the next condition is shown as follows
		
Instruction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CH.1 Clear instruction(IDCLR1)
		ID interface first I/O output number. . . . . . . . . . . . . 00
		Error code storage location. . . . . . . . . . . . . . . . . . . . R0

External
External
signal interlock signal

Start

IDCLR1 instruction execution
Set normal completion
signal(M51)
Completion
When normal completion, store
the error code to R0(2) Operation timing		
Operation timing is shown below
END processing

END processing

END processing

Sequence program

Execution instruction
(M1)

ON
OFF
Keep ON at abnomalON

ID-BUSY X03

Communication between
Data carrier and Read/
Write head

Error detection X05

completion

instruction execution

OFF

Normal completion OFF

ON
OFF

ON

Keep ON at abnomal
completion

OFF

Normal completion OFF

ON
Complete device (M100)

Display device of thecompletion status(M101)

OFF
ON

When abnomal completionOFF

1 scan ON

Point(1)While clear instrucion(IDCLR □ )is in execution, if Data carrier doesn't
exist, it executes the instruction of the number of retry and become error.
(2)Clear instrucion(IDCLR □ ) clears all data with "0". If clear it withspecified data, use Writing at the sametime(IDFILL □ ).
(3)The area, which is set for write protect, it will no be cleard and will haveno write protect error.

- 41 -

5.
5.9

Communication with Data carrier

Processor Z4-Q002

Lifetime control instruction
For program details, please refer to P.61.
Describe the instruction, which to be used for lifetime control of the Data carrier.
Point
Number of writing will not be automatically updated, please update it with the
IDMD,IDMW,IDLW instruction.

5.9.1 About the lifetime determination of writing
By counting the number of writes the Data carrier, the lifetime of the Data carrier can be determined.
When performing the lifetime determination of writing, use Buffer memory and also following instructions,count writing instruction(IDMW), continuous count writing instruction(IDLW)(refer to 5.9.2) or the
update Number of writing at the same time instruction(refer to 5.9.3)(1) The value of lifetime determination of writing specified area(Address CH.1 Un¥G6/ CH.2 Un¥G4006)
		will specify the determination value for the lifetime of writing.

		This value specifies the number of writing of Data carrier per 10,000times The following 3 kinds are		

the only instructions to determaine the lifetime of writing, the update Number of writing at the same		time instruction, count writing instruction(IDMW), continuous count writing instruction(IDLW).

		Specified range：0 ～ 32767（When“0”specified, lifetime determination is not performed.）		

Initial value：K10（100,000times）(2) The result of lifetime determination of writing storage area(Address CH.1 Un¥G7/ CH.2 Un¥G4007)
		will store the result of determination for the lifetime of writing.

		

The following 3 kinds are the only instructions to determaine the lifetime of writing, the update

		

Number of writing at the same time instruction, count writing instruction(IDMW), continuous count		

writing instruction(IDLW).

		

Initial value		At the end of their life ：1 is stored：0		

Not yet at the end of life ：0 is stored

Point
The result of lifetime determination of writing continue to be stored unless it
is reset by the sequence program.
Before executing IDMD,IDMW,IDLW instruction again, please write the "0" toclear the result of lifetime determination of writing storage area.

- 42 -

５.

Communication with Data carrier

Processor Z4-Q002

5.9.2 Count writing instruction (IDMW), Continuous count writing instruction (IDLW)（ !!This instruction is available only when the bank function is valid）
Instruction
Count writing
instruction(IDMW)

Continuous countwriting instruction(IDLW)

Description
After the writing instruction is completed, it updates one time of the total number of Datacarrier writing.
Regardless of the number of writing or the writing address, it updates one time
constantly.
In the normal communication, it stores the value of the total number of writing to
Sequencer device. Also, it performs the lifetime determination by comparing the valueof determination of lifetime writing, if the lifetime of the Data carrier is at the end, it isstored to Sequencer devices.
It keeps writing until the Data carrier come into the communication range of Read/Write
head and then after, it will update one time of the total number of Data carrier writing.
Regardless of the number of writing or the writing address, it updates one time
constantly.
In the normal communication, it stores the value of the total number of writing to
Sequencer device.Also, it performs the lifetime determination by comparing the valueof determination of lifetime writing, if the lifetime of the Data carrier is at the end, it isstored to Sequencer devices.
Available devices

Setting

Inside device

data(System,User)

n1
n2
(S)
n3
(D1)
(D2)

bit
----------○File

MELSECNET/10(H)registerword

Direct J □￥□bit

Special unit Indexregister
U □￥G □

Zn

Constant

Others

K,H
K,H

-----

K,H

---

word

○
○
○
○
○
○

-----------[Instruction
symbols][Execution[ 命令記号][ 実行条件condition]
]

IDMW
IDLW

GP.IDCLR1

Un n1 n2 (S) n3 (D1) (D2)

Setting data
Setting data Description
Setting side Data format
First I/O signal number of the unitUn
（00 ～ FE：The upper 2 digits of 3 digits, whenUser
BIN16 bitit describes the I/O signals by 3 digits.）
n1
Channel used / Setting rage is 1 or 2
User
BIN16 bit

Page----P19 /n2First address of Data carrier

User

BIN16 bit

(S)First number of the device, which stores the data
which write to Data carrier

User

Device namen3

Number of data write to the Data carrier

User

BIN16 bitUser

Device name---

System

bit

---

(D1)
(D2)

First number of the device, which stores thecurrent number of data writing information.
The bit device number to be turned ON withthe execution completed.
When the abnormal completion, (D2)+1 also to
be ONFile register for each program unit and the local device can not be used as a setting data.

- 43 -

5.3.1(1)--P19 /
5.3.1(2)5.

Communication with Data carrier

Processor Z4-Q002

Data of the number of data writing information
Setting data
Item
Description(D1)+0
Value of no. of Stores the value of number ofwriting
writing(D1)+1(D1)+2(D1)+3(D1)+4

Value ofStores the Value of the lifetime
the lifetime
determination
determination
Result ofStores the result of the lifetime
the lifetime
determination
determination
Data carrier Stores the Data carrier memory
memory type type

Setting area Setting side

Page

---

System

P19 / 5.3.1(4)---System

P37 / 5.10.1(1)---System

P37 / 5.10.1(2)---System

P47 / 5.12.1

Function(1) Through the unit specified by the "Un", write the n3 signals of data from the device specified with (S) into
the after the address, which specified with n2 of the Data carrier of the channel, which is specified by n1.
If the update was successful, update one time of total number of writing of the Data carrier, write thecurrent number of writing to 2 words from the device, which specified with (D1), write the determination
value of the writing lifetime to the (D1)+2 device, write Data carrier memory type to (D1)+4 device, andthen compare the value of the number of writing to the value of lifetime determination and performs the
lifetime determination.
(2) As the result of the lifetime determination, if the lifetime of the Data carrier is at the end, it store "1" to thedevice of (D1)+3 and become abnormal completion.
However, error contact CH.1 Xn5/ CH.2 XnD will not turn ON, normally "0" is stored to (D1)+3.
(3) When writing is completed, while END instruction of the instruction completed scan is in execution, it turns
ON the bit device which specified in (D2) and turns it OFF automatically after 1 scan.
When the abnormal completion, completion status display device (D2) +1 also to be ON.
(4) Only 1word (when the processing unit is byte, 1byte) in the writing area falls under the write protect settingarea, it will be the write protect error and it can not be written even for non-protected area.
Error(1) When error, which detected by the Processor occurs, it performs the action below.
① Error contact( CH.1 Xn5/ CH.2 XnD) turns ON（For canceling the error contact, use the error cancel Instruction）② Completion status display device (D2) +1 will turn the 1 scan ON.
③ Error code will be stored to the Buffer memory CH.1 Un¥G14/ CH.2 Un¥G4014.

- 44 -

５.

Communication with Data carrier

Processor Z4-Q002

Programming Example(1) Programming Example		The programming example of the next condition is shown as follows
		
Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  Count writing instruction(IDMW)		ID Processor first I/O output number . . . . . . . . . . . . . . . . . . .  00		
Channel used. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . K1(CH.1)
		
Data carrier writing start address . . . . . . . . . . . . . . . . . . . . . .  K100
		No. of writing word. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  K5
		Writing data storage location. . . . . . . . . . . . . . . . . . . . . . . . . .  D100 ～ D104
		
Current value of the number of writing storage location. . . . D22,D23
		
Current value of writing lifetime determination storage location D24
		Result of writing lifetime determination storage location. . .  D25		Memory type storage location . . . . . . . . . . . . . . . . . . . . . . . . .  D26		Error code storage location. . . . . . . . . . . . . . . . . . . . . . . . . . . .  R0
External
External
signal interlock signal

Start

IDMW instruction execution
Set normal completion
signal(M51)
Completion
When normal completion, store
the error code to R0(2) Operation timing		
Operation timing is shown below
END processing

END processing

END processing

Sequence program

Execution
instruction(M1)ONOFF
Keep ON at abnomalON

ID-BUSY X03

Communication between
Data carrier and Read/
Write headcompletion

instruction execution

OFF

Normal completion OFF

ON
OFF
Keep ON at abnomal

Error detection X05

ONcompletion

OFF

Normal completion OFF

ON
Complete device (M100)

Display device of thecompletion status(M101)

OFF
ON

When abnomal completionOFF

1 scan ON

Point(1)While count writing instrucion(IDMW)is in execution, if Data carrier doesn't
exist, it executes the instruction of the number of retry and become error.
(2)If writing area contains the write protect setting area, it will be the write
protect error.(It also can not be written even for non-protected area.)(3)When continuous count writing instruction(IDLW) is executed, it ntinuously
performs writing until the Data carrier come into communication area. If
Data carrier doesn't come into communication area, it executes instructions
permanently.
To stop execution, please execute the quit the continuous instruction truction.

- 45 -

5.

Communication with Data carrier

Processor Z4-Q002

5.9.3 Batch update of the number of writing instruction (IDMD)（ !!This instruction is available only when the bank function is valid）
Instruction
Batch update of the

Description
Adding the number of writing which is stored in the Data carrier number ofwriting storage area upto the specified additional value, and then use thevalue of determination of writing lifetime（ CH.1 Un¥G6/ CH.2 Un¥G4006）
as the target and perform lifetime determination.
The value of the writing number addition value CH.1 Un¥G26/ CH.2
Un¥G4026）will be changed to the set addition value after it is added.

number of writing
instruction(IDMD)

Settingdata

Available devices
Inside device(System,User)bit------○

n1
n2
(D1)
(D2)

MELSECNET/10(H)File
Special unit Indexregister
Direct J □￥□Constant Others
registerU □￥G □
Zn
word
bit
word
○
--K,H
--○
--K,H
--○
--○
---

[Instruction
symbols][Execution
condition][ 命令記号][ 実行条件]IDMD

GP.IDMD1

Un n1 n2 (D1) (D2)

Setting data
Setting data Description
Setting side Data format
First I/O signal number of the unitUn
（00 ～ FE：The upper 2 digits of 3 digits, whenUser
BIN16 bitit describes the I/O signals by 3 digits.）
n1
Channel used / Setting rage is 1 or 2
User
BIN16 bit
n2
(D1)
(D2)

Number of writing additional valueFirst number of the device, which stores thecurrent number of data writing information.
The bit device number to be turned ON withthe execution completed.
When the abnormal completion, (D2)+1 also to
be ON

Page
----P20 /User

BIN16 bitUser

Device name---

Systembit---

5.3.1(5)File register for each program unit and the local device can not be used as a setting data.
Data of the number of data writing formation
Setting data
(D1)+0(D1)+1(D1)+2(D1)+3(D1)+4

Item
Value of no. of
writing
Value ofthe lifetime
determination
Result of
the lifetime
determination
Data carrier
memory type

Description
Stores the value of number ofwriting

Setting area Setting side

Page

---

System

P25 / 5.2.1(4)---System

P40 / 5.9.1(1)Stores the result of the lifetime
determination---

System

P40 / 5.9.1(2)Stores the Data carrier memory
type

---

SystemP54 / 5.11.1

Stores the Value of the lifetime
determination

Function(1) Through the unit specified by the "Un", add the value of the total number of writing of the Data carrier of thechannel, which is specified by n1 upto the number specified with n2. Then write the current number of writing
to 2 words from the device, which specified with (D1), write the determination value of the writing lifetime tothe (D1)+2 device, write Data carrier memory type to (D1)+4 device, and then compare the value of thenumber of writing to the value of lifetime determination and performs the lifetime determination.
(2) As the result of the lifetime determination, if the lifetime of Data carrier is at the end, it store "1" to the device(D1)+3 and become abnormal completion.However, error contact CH.1 Xn5/ CH.2 XnD will not turn ON,
normally "0" is stored to (D1)+3.
(3) When writing is completed, while END instruction of the instruction completed scan is in execution, it turns ON
bit device which specified in (D2) and turns it OFF automatically after 1 scan.
When the abnormal completion, completion status display device ((D2) +1) also to be ON.
- 46 -

５.

Communication with Data carrier

Processor Z4-Q002(4) If the number of data specified with n2 is 0, it read out the value of the total number of writing without of theincrease of the number of writing

Error(1) When error, which detected by the Processor occurs, it performs the action below.
① Error contact( CH.1 Xn5/ CH.2 XnD) turns ON（For canceling the error contact, use the error cancel Instruction）② Completion status display device (D2) +1 will turn the 1 scan ON.
③ Error code will be stored to the Buffer memory CH.1 Un¥G14/ CH.2 Un¥G4014.
Programming Example(1) Programming Example		The programming example of the next condition is shown as follows
		
Instruction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Batch update of the number of writinginstruction(IDMD)		
ID interface first I/O output number. . . . . . . . . . . . . . 00
		Channel used. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CH.1
		
Value of the determination of the writing lifetime. . 100,000times（Default）
		Addition value of the number of writing. . . . . . . . . . . 10
		Current value of the number of writing storage location D22,D23
		
The value of writing lifetime determination. . . . . . . . D24
		Result of writing lifetime determination . . . . . . . . . . D25
		Data carrier memory type. . . . . . . . . . . . . . . . . . . . . . D26
		Error code storage location. . . . . . . . . . . . . . . . . . . . . R0
External
External
signal interlock signal

Start

IDMDinstruction execution
Set normal completion
signal(M51)
Completion
When abnomal completion, store
the error code to R0(2) Operation timing		
Operation timing is shown below
END processing

END processing

END processing

Sequence program

Execution
instruction(M1)ONOFF
Keep ON at abnomalON

ID-BUSY X03

Communication between
Data carrier and Read/
Write head

Error detection X05

completion

instruction execution

OFF

Normal completion OFF

ON
OFF

ON

Keep ON at abnomal
completion

OFF

Normal completion OFF

ON
Complete device (M100)

Display device of thecompletion status(M101)

OFF
ON

When abnomal completionOFF

1 scan ON

Point(1)If no Data carrier, it will execute retry instruction with certain number of times andbecome error.
(2)Regardless of whether write protect setting is set, IDMD instruction isexecuted- 47 -

5.

Communication with Data carrier

Processor Z4-Q002

5.10 Write protect information instruction  Describe the instruction, which to set/cancel the write protect area to the Data carrier（ !!This instruction is available only when the bank function is valid）
5.10.1 About write protect
Write protect is to prevent writing to the memory of the Data carrier, which is specified by user
By using Buffer memory below and the write protect information instruction(WP)(refer to P51),
write-protect is set per 8word(16byte).
Storage area of the Data carrier(Word unit）
0
8
Between the area of 16 to39(16word), write protect is set

16
32

336

(1) Write protect specified (storage) area(Address CH.1 Un ￥G32/ CH.2 Un ￥G4032)
		 Specify the setting(1) and cancel(0) write protect setting				Specified range : 0 ( cancel write protect),1 ( set write protect)
Initial value:0
Point
Please set write protect to sequental areas. It is not possible to set morethan two write protect areas in one Data carrier(2) Write protect start page specity (storage) area (address CH.1 Un ￥G33/ CH.2 Un ￥G4033)
		 Specify the start page address of when setting the write-protect with 8word(16byte)
		 This setting will be the start page address agains to the Data carrier bank				Specified range : K0 ～ K42 ( However, ≦ value of the write protect end page address)
Initial value:0(3) Write protect end page specity (storage) area (address CH.1 Un ￥G34/ CH.2 Un ￥G4034)
		 Specify the end page address of when setting the write-protect with 8word(16byte)
		 This setting will be the end page address agains to the Data carrier bank				 Specified range：K0 ～ K42（However，≧ value of the write protect start page address)
		 Initial value：0＜ NOTE ＞
・Write protect of this Processor is per 8 word.
Since the Mitsubishi Processor has its write protect area per 7word, eventhe identical ladder,
the area, which is write protect will be diffrenent.

- 48 -

５.

Communication with Data carrier

Processor Z4-Q002＜ Address correspondence table ＞
Address correspondence table
Page address
Word unit
decimalHexadecimal
decimalHexadecimal00H
0～7
0H ～ 7H
1
1H
8 ～ 15
8H ～ FH
2
2H
16 ～ 23
10H ～ 17H
3
3H
24 ～ 31
18H ～ 1FH
4
4H
32 ～ 39
20H ～ 27H
5
5H
40 ～ 47
28H ～ 2FH
6
6H
48 ～ 55
30H ～ 37H
77H
56 ～ 63
38H ～ 3FH
8
8H
64 ～ 71
40H ～ 47H
99H
72 ～ 79
48H ～ 4FH
10
AH
80 ～ 87
50H ～ 57H
11
BH
88 ～ 95
58H ～ 5FH
12CH
96 ～ 103
60H ～ 67H
13
DH
104 ～ 111
68H ～ 6FH
14
EH
112 ～ 11970H ～ 77H
15
FH
120 ～ 127
78H ～ 7FH
16
10H
128 ～ 135
80H ～ 87H
17
11H
136 ～ 143
88H ～ 8FH
18
12H
144 ～ 151
90H ～ 97H
19
13H
152 ～ 159
98H ～ 9FH
20
14H
160 ～ 167
A0H ～ A7H
21
15H
168 ～ 175
A8H ～ AFH
22
16H
176 ～ 183
B0H ～ B7H
23
17H
184 ～ 191
B8H ～ BFH
24
18H
192 ～ 199
C0H ～ C7H
25
19H
200 ～ 207
C8H ～ CFH
26
1AH
208 ～ 215
D0H ～ D7H
27
1BH
216 ～ 223
D8H ～ DFH
28
1CH
224 ～ 231
E0H ～ E7H
29
1DH
232 ～ 239
E8H ～ EFH
30
1EH
240 ～ 247
F0H ～ F7H
31
1FH
248 ～ 255
F8H ～ FFH
32
20H
256 ～ 263
100H ～ 107H
33
21H
264 ～ 271
108H ～ 10FH
34
22H
272 ～ 279
110H ～ 117H
35
23H
280 ～ 287
118H ～ 11FH
36
24H
288 ～ 295
120H ～ 127H
37
25H
296 ～ 303
128H ～ 12FH
38
26H
304 ～ 311
130H ～ 137H
39
27H
312 ～ 319
138H ～ 13FH
40
28H
320 ～ 327
140H ～ 147H
41
29H
328 ～ 335
148H ～ 14FH
42
2AH
336 ～ 343
150H ～ 157H

Byte unit
decimalHexadecimal
0 ～ 150H ～ FH
16 ～ 31
10H ～ 1FH
32 ～ 47
20H ～ 2FH
48 ～ 63
30H ～ 3FH
64 ～ 79
40H ～ 4FH
80 ～ 95
50H ～ 5FH
96 ～ 111
60H ～ 6FH
112 ～ 127
70H ～ 7FH
128 ～ 143
80H ～ 8FH
144 ～ 159
90H ～ 9FH
160 ～ 175
A0H ～ AFH
176 ～ 191
B0H ～ BFH
192 ～ 207
C0H ～ CFH
208 ～ 223
D0H ～ DFH
224 ～ 239
E0H ～ EFH
240 ～ 255
F0H ～ FFH
256 ～ 271
100H ～ 10FH
272 ～ 287
110H ～ 11FH
288 ～ 303
120H ～ 12FH
304 ～ 319
130H ～ 13FH
320 ～ 335
140H ～ 14FH
336 ～ 351
150H ～ 15FH
352 ～ 367
160H ～ 16FH
368 ～ 383
170H ～ 17FH
384 ～ 399
180H ～ 18FH
400 ～ 415
190H ～ 19FH
416 ～ 431
1A0H ～ 1AFH
432 ～ 447
1B0H ～ 1BFH
448 ～ 463
1C0H ～ 1CFH
464 ～ 479
1D0H ～ 1DFH
480 ～ 495
1E0H ～ 1EFH
496 ～ 511
1F0H ～ 1FFH
512 ～ 527
200H ～ 20FH
528 ～ 543
210H ～ 21FH
544 ～ 559
220H ～ 22FH
560 ～ 575
230H ～ 23FH
576 ～ 591
240H ～ 24FH
592 ～ 607
250H ～ 25FH
608 ～ 623
260H ～ 26FH
624 ～ 639
270H ～ 27FH
640 ～ 655
280H ～ 28FH
656 ～ 671
290H ～ 29FH
672 ～ 687
2A0H ～ 2AFH

*The page address range will vary according to the memory type that is shown below
Memory type
344Word (688byte spec.)
168Word (336byte spec.)
112Word (224byte spec.)
80Word (160byte spec.)
56Word (112byte spec.)
40Word (80byte spec.)
24Word (48byte spec.)- 49 -

Page address
decimal number Hexadecimal number
0 ～ 420H ～ 2AH
0 ～ 200H ～ 14H
0 ～ 130H ～ DH0～9
0H ～ 9H0～6
0H ～ 6H0～4
0H ～ 4H0～2
0H ～ 2H

5.
5.10.2

Communication with Data carrier

Processor Z4-Q002

Write protect information reading instruction(RP)				Write protect information reading instruction(RP) read the information of write protec, which is set in
the Data carrier				

Instruction code
Instruction：RP

Code：5052H(1) Programming Example		The programming example of the next condition is shown as follows
		
ID interface first I/O output number. . . . . . . . . . 00
		Channel used. . . . . . . . . . . . . . . . . . . . . . . . . . . . CH.1
		
Value of the write protect setting storage location
D32
		Start page address storage location. . . . . . . . . D33
		End page address storage location. . . . . . . . . . D34
		Error code storage location. . . . . . . . . . . . . . . . . R0
External
External
signal interlock signal

Start

Set instruction code "RP" to D0

Set the instruction code

Start reading write protect data

Store the write protect setting
value to D32
Store the write protect stoart pageaddress to D33
Store the write protect end pageaddress to D34
Complete reading write protect
data
Clear M1 and complete
When normal completion, store
the error code to R0(2) Operation timing		
Operation timing is shown below
ON
External signal

OFF

ON
M1

OFF

ON
Sequence program

Instruction execution
requestY15

OFF

writing parameter
MOVP

ON
OFF

ON
Instruction completion X04

Communication between Datacarrier and Read/Write head

OFF
ON
OFF
ON

Error detectionX05

Instruction execution
requestY15

OFF

ON
OFF

- 50 -

５.

Communication with Data carrier

Processor Z4-Q002

Point
When write protect information reading instruction(RP) is executed, if no
Data carrier, it will execute retry instruction with certain number of times
and become error.

5.10.3 Write protect information writing instruction(WP)		

Write protect information writing instruction（WP) set the specified write protect area in the Data carrier.

				

Instruction code
Instruction：WP

Code：5057H(1) Programming Example		The programming example of the next condition is shown as follows
		
ID interface first I/O output number. . .  00		
Channel used. . . . . . . . . . . . . . . . . . . . . . CH.1
		
Write protect setting value. . . . . . . . . .  1(Write protect setting)		
Write protect setting area. . . . . . . . . . .  8 ～ 103 (Page address：1 ～ 12)		Error code storage . . . . . . . . . . . . . . . . .  R00

External
External
signalinterlock signal

Start
Set the instruction code
"WP" to D0

Set the instruction code
Set the write protect setting
value K1
Set write protect start page
to K1
Set write protect end page to
K12Start writing write protect
information
Complete writing write
protect data
Clear M1 and completed
When normal completion,
store the error code to R0- 51 -

5.

Communication with Data carrier

Processor Z4-Q002(2) Operation timing		
Operation timing is shown below
ON
External signal

OFF

ON
M1

OFF

Writing parameter
MOVP

ON
Sequence program

OFF

ON

Instruction execution
requestY15

OFFON
Instruction completion X04

OFFCommunication between Datacarrier and Read/Write head

ON
OFF
ON

Error detection X05

OFF

Instruction execution request
Y15

ON
OFF

Point
When write protect information writing instruction(WP) is executed, if no
Data carrier, it will execute retry instruction with certain number of times
and become error.

5.11 Memory setting instruction
Describe the instruction, which to set memory type of the Data carrier.
For program details, please refer to P.55.
5.11.1About the memory type
User can extend the lifetime of the Data carrier by sequentially changing the bank used
The lifetime guarantee of the Data carrier "Z1"-xxxx-128 is up to 100,000 per bank.
Memory type is set by using the Buffer memory below and the life extension bank switching
instruction(BK)(refer to P.55)(1) Memory type specify(address CH.1 Un¥G40/ CH.2 Un¥G4040)
Specify the memory type of Data carrier to be set by the life extension bank switching
instruction(BK).
Initial value ：0
Following figure is a exampe with the number of the bank to be created：3，used bank No.：2
b15
0

b0
0

0

0 fixed

0

0

0

1

1

0

Number of thebank to be created

00

0 fixed0302H- 52 -

0

0

0

1

0

Used bank No.

５.

Communication with Data carrier

Processor Z4-Q002(a) Number of the bank to be created
Set the number of the bank to be created in the Data carrier.
Following 7 kinds are the number of the bank which can be set
1H･:･ 344word spec.. . . . . . . . . . . . . . . . . . . . . . . . . .  (Number of the bank to be created
2H･:･ 168word spec.. . . . . . . . . . . . . . . . . . . . . . . . . .  (Number of the bank to be created
3H･:･ 112word spec.. . . . . . . . . . . . . . . . . . . . . . . . . .  (Number of the bank to be created
4H･:･ 80word spec. (Number of the bank to be created =4）
6H･:･ 56word spec. (Number of the bank to be created =6）
8H･:･ 40word spec. (Number of the bank to be created =8）
CH･:･ 24word spec. (Number of the bank to be created =12）344 word spec.
No. of bank：1(Factory default)

168 word spec.
No. of bank：2

112 word spec.
No. of bank：3

80 word spec.
No. of bank：
4

Bank No.1
Bank No.1
Bank No.1

112
word

80
word

168
word

56 word spec.
No. of bank：
6

Bank No.1

Bank No.2

Bank No.2

80
word
Bank No.3

Bank No.1

344
word

Bank No.2

80
word

168
word

Bank No.4

Bank No.5
Bank No.3

112
word

Bank No.4

80
word
Bank No.6

*1

*1

*1

Bank No.1

40
word

Bank No.2

40
word

Bank No.3

40
word

56
word

56
word

Bank No.4

40
word

Bank No.5

40
word

112
word

Bank No.3

Bank No.2

56
word

40 word spec.
No. of bank：
8

*1

*1

56
word

Bank No.6

40
word

Bank No.7

40
word

56
word

56
word

Bank No.8

*1

40
word

=
=
=

1)
2）
3）

24 word spec.
No. of bank：
12
BankNo.1

24
word

Bank No.2

24
word

Bank No.3

24
word

Bank No.4

24
word

Bank No.5

24
word

Bank No.6

24
word

Bank No.7

24
word

Bank No.8

24
word

Bank No.9

24
word

Bank No.10

24
word

Bank No.11

24
word

Bank No.12

24
word

*1

*1：Number of writing storage area(IDMD,IDMW,IDLW instruction- 53 -

5.

Communication with Data carrier

Processor Z4-Q002(b) Used bank No.
Set the Data carrier bank No. to be read/write
When read/write other bank No., it needed to be change the bank No. by BK instruction.
[Example] When setting number of the bank to be created：6，Used bank No.：5Setting：0605H
Only Bank No.5 is available
56word spec.
No. of bank：6

BankNo.1

56
word

BankNo.5

56
word

BankNo.6

56
word

*1

*1：Number of writing storage area(IDMD,IDMW,IDLW instrucion)

Point
If the number of the bank change is performed during Data carrier is in use, alldata in the Data carrier will be deleted. Number of the bank setting should be
performed only the first time of the memory setting.

(2) Memory type storage are(address CH.1 Un¥G41/ CH.2 Un¥G4041)
After ID communication instruction completes normally, memory type of Data carrier is stored
Contents to be stored is same as the memory type specified area( CH.1 Un¥G40/ CH.2
Un¥G4040)
Initial value ：0
Following figure is a exampe with the number of the existing bank：8，used bank No：7

b15
0

b0
0

0

0 fixed

0

0

0

1

1

0

0

0

0 fixedBank NO. to becreated

0

0

0

1

0

Bank NO. in use

0807H is stored

Considerations when using bank function(1) If the number of the bank and bank No. are changed, all the data of the Data carrier will be deleted.
(2) Mixing the Data carrier with different number of bank, due to differences of capacity, it may not able tohave proper reading and writing.

- 54 -

５.

Communication with Data carrier

Processor Z4-Q002

5.11.2 Life extension bank switching instruction(BK)（ !!This instruction is available only when the bank function is valid）
		
		
		

Life extension bank switching instruction(BK) set the number of the bank of Data carrier and the bank No.
to be used.

				

Instruction code
Instruction：BK

		
		
		
		
		
		
		

(1) Programming Example
The programming example of the next condition is shown as follows
ID Processor first I/O output number .  00
Channel used. . . . . . . . . . . . . . . . . . . . . . CH.1
Bank No. to be set. . . . . . . . . . . . . . . . .  6
Bank No, to be used. . . . . . . . . . . . . . . .  3
Error code storage location. . . . . . . . . .  R0

Code：4B42H

External
External
signal interlock signal

Start
Set the instruction code "BK"toD0
Set the instruction code
Set bank No. : 6 to the memory
type and used bank No. : 3

Start insturcion execution

Complete instruction execution

Clear M1 and complete
When normal completion, store
the error code to R0(2) Operation timing		
Operation timing is shown below
ON
External signal

OFF

ON
M1

OFF

ON
Sequence program

Instruction execution request
Y15

OFF

Writing parameter
MOVP

ON
OFF

ON
Instruction completion X04

OFFON

ID-BUSY X03

OFFCommunication between DataON

carrier and Read/Write head

OFFON
Error detection X05

OFF- 55 -

5.

Communication with Data carrier

Processor Z4-Q002

Point(1) Setting the memory type same as the memory type of before setting, it will notinitialize the number of writing.
(2)If write protect is set when change the number of bank, it become write protect
error and memory type cannot be set(3)When write protect is set, the bank No. to be used is only changed, the setting of
write protect also will be transfered.

5.12 Writing lifetime management and Life extension
Describe how to do the writing lifetime management and Life extension of Data carrier by using Writing
lifetime management instruction(IDMW,IDLW,IDMD) and Life extension bank switching instruction(BK)
5.12.1 About the lifetime of Data carrier
The memory, which is used for Z series Data carrier has the characteristics of deterioration by the
number of writing The lifetime of the Data carrier "Z1-xxxx-128" is up to 100,000 per bank and if keep
writing more than this value, it may have inappropriate performance such as garbled data by thedeterioration of memory. If normal writing instruction (IDWD □ ,IDAWD □ ,IDFILL □ ) is used insuch case, it will be a successful completion with wrong data is written.
5.12.2 Prevention instruction for troubles caused by data-carrier lifetime of writing(1) Using comparison writing instruction
Use comparison writing instruction(IDCWD □ ,IDSWD □ ) instead of normal writing instruction(IDCWD □ ,IDSWD □ )After the normal writing is executed, comparison writing instruction will read and compare the written
data and if wrong data is written, it will become error.
(2) Writing lifetime management（refer to 5.12）
With the writing lifetime management instruction(IDMW,IDLW,IDMD), it will control the number of writingof the Data carrier and prevents the number of writing for not exceeding the guaranteed value.
Specifically it is used as follows.
(a) Count writing instruction(IDMW)，Continuous count writing instruction(IDLW)
The same usage with the normal writing instruction, replace the writing instruction(IDWD □ ) and thecontinuous writing instruction(IDAWD □ ) with "IDMW, IDLW", and by using it, updating of writing andnumber of writing can be performed at once.
After IDMW,IDLW instruction is executed, current number of writing of Data carrier is stored to the buffer
memory number of writing storage area automatically.
(b) Batch update of the number of writing instruction(IDMD)
When IDMW，IDLW instruction cannot be used, by updating the number of writing communication ofentire line at the same time, it controls the number of writing After IDMD instruction is executed, current
number of writing of Data carrier is stored to the Buffer memory number of writing storage area
automatically.
When set the number of writing setting value as "0", the number of writing will not be updated and it only
confirms the number of writing upto that time.

- 56 -

５.

Communication with Data carrier

Processor Z4-Q002

5.12.3 Life extention of wrting lifetime by bank switching
With the number of writing control of Data carrier and by using the life extension bank switching
instruction(BK), it can be used for high frequency of writing
For the details of the life extension bank switching instruction(BK), please refer to 5.11.2(1) Features of the bank function
		 (a) By deviding Data carrier memory and by using bank switching, it is possible to write maximum
		 1,200,000times.
		 (b) Data carrier memory type information(Number of bank and Bank No. in use) will be retaind as
		 specific information by each Data carrier, it will be controlled by the Processor to access only the		 specified bank No. ,therefore, it is no problem if Data carrier with different bank No. exist mixed in the same		 assembly line.

BankNo.1 Used bank
Bank No.2
Bank No.3
Bank No.4

		
		
		
		
		

Bank No.1
Bank No.2 Used bank
Bank No.3
Bank No.4

Bank No.1
Bank No.2
Bank No.3 Used bank
Bank No.4

Mixing the Data carrier
with different numberof bank is OK(c) in the same number of bank, if only changing the Bank No. ，it will copy the bank data before
switching to bank data after switching automatically, it is not need to change the access address of
Data carrier or perform the data writing newly.
Write protect setting will also be copped autmatically.
［Example of switching bank No. of bank 4（80word spec.)］
Bank switching
Bank switching
Bank switching

Address
0
：
10
11
12
13
14
：
79

No.01

A
B
C
D
E

Address
0
：
10
11
12
13
14
：
79

Address
0
：
10
11
12
13
14
：
79

No.02

A
B
C
D
E

No.03

A
B
C
D
E

Address
0
：
10
11
12
13
14
：
79

No.04

A
B
C
D
E

In the bank switching, it is
not required for changing
address to be accessed- 57 -

5.

Communication with Data carrier

Processor Z4-Q002(2) Bank switching using flow
		 Show the flow when using Data carrier with bank switching

Prepare the Data carrier

Determine the memory type to be usedconsidering the number of writing andmemory capacity

With the bank switching, set theData carrier memory type from initial
setting(0101H) to specified memory type(**01H)

Refer to ・・・5.12.4(1)Perform the number of writing
management and if it exceeds the value
for determination, add one used bank No.
(**02H) with the bank switching

Refer to ・・・5.12.4(2),(3)Is the number ofwriting of the last bank No. of
the Data carrier exceeds its
lifetime??

Data carrier writing instruction
Exchange to the Data carrier, which is set
to the specified memory type

Point
When the life extension bank switching instruction(BK) is executed，communication will belimited to a specified bank, therefore the data capacity also will be limited amount of thespecified bank
Select the using memory type considering the data volume to be used and the number ofwritingMemory type setting(from the inical 344word spec. to change the number of bank) of Datacarrier, it is performed only once to one Data carrier when start using it.
After memory type setting, if the number of bank change is performed, the total number ofwriting up to that time will be "0" cleard.

- 58 -

５.

Communication with Data carrier

Processor Z4-Q002(3) Data carrier memory map at the bank switching
Show the Data carrier memory map when bank switching is performed with using Data carrier of memory
type 80word (160byte)＜ Procedure ＞
No.
①

②

③

④

⑤

⑥
⑦
⑧

Set the Data carrier memory type to the 0401H（80word spec./Bank No.1）in prior to using
Determine the lifetime of writing（100,000times）by the manage instruction (IDMD/IDMW/
IDLW) of writing lifetime
Up date the memory type to 0402H(80word spec./Bank No.2) with the life extension bankswitching instruction(BK). Memory data value will be area copied from Bank No.1to No.2.
Determine the lifetime of writing（100,000times）by ②（Total 200,000times）
Up date the memory type to 0403H(80word spec./Bank No.3 with the life extension bankswitching instruction(BK). Memory data value will be area copied from Bank No.2 to No.3.
Determine the lifetime of writing（100,000times）by ②（Total 300,000times）
Up date the memory type to 0404H(80word spec./Bank No.4) with the life extension bankswitching instruction(BK) Memory data value will be area copied from Bank No.3 to No.4.
Determine the lifetime of writing（100,000times）by ② （Total 400,000times）①,②
Up to 100,000 times,
Use Bank No. 1④
Up to 100,000 ～
200,000times, use
Bank No.2⑥
Up to 200,000 ～
300,000times, use
Bank No.3⑧
Up to 300,000 ～
400,000times, use
Bank No.4

Bank No.1(In use)Bank No.1(Used)

80
word

Bank No.1(Used)

80
word

Bank No.1(Used)

80
word

Bank No.2(In use)80
word

Bank No.2(Used)

80
word

Bank No.2(Used)

80
word

Bank No.3(In use)80
word

Bank No.3(Used)

80
word

Bank No.4(In use)

80
word

80
word
③

Bank No.2(Unused)

80
word

⑤

Bank No.3(Unused)

80
word

Bank No.3(Unused)

80
word

⑦

Bank No.4(Unused)

80
word

Bank No.4(Unused)Bank No.4(Unused)

80
word

80
word

Point
Bank No. Change is recommended to be done by numerical order from N0.1 to No.2, andfrom No. 2 to No.3 as described above. This makes it easier to memory management andprogramming.（For program example, refer to 5.12.4）- 59 -

5.

Communication with Data carrier

5.12.4

Processor Z4-Q002

Programming Example(1) Initial setting of memory type
		 The example of program for initial setting of Data carrier with momory type 0401H（number of bank 4，
		 bank No.1）is shown below. Also, following program is specified to be performed only once to the unused
		 Data carrier when start using it. At the start-up the assembly line, if following program is performed multiply
		 to the same Data carrier or if perform the following program after the number of wiriting up date		 instruction(IDMW,IDLW,IDMD) is executed, it will become error and F0 or F1 will be set, so please put this		 inconsideration.
		 Please also set the memory type for the Data carrier for maintenance in advance.
＜ Procedure ＞
No.
①

②

Contents
Execute the batch update of the number of writing instruction(IDMD) with the numberof writing addion value 0 times and acquire the memory type and total numberof writing of Data carrier. When Data carrier is unused status, start up the bankswitching(M10) turns ON. Also when memory type is not initial value set F0, whenvalue of the number of writing is not 0, set F1
Set the momory type with the life extension bank switching instruction(BK)

External
External
signal interlock signal

Start
Execute the IDMD instruction
with number of writing at 0times（Store the value of
number of writing to D22 andmemory type value to D26）①

Set F0 when memory type
is not initial value
Set F1 when value of thenumber of writing is not 0
Set bank switching start up
contact M10 when memory
type is initial value and thevalue of number of writing is 0.

IDMD instruction completed
When abnomal completion,
store error code to R0②

Set instruction code BK to
D0
Set the instruction code

Set memory typeH0401 to
K40
Start bank switching

Set F2 if the momory type
is not setting value.
Complete bank switchin
Reset the bank switching
start-up contact M10.
When abnomal completion,
store error code to R0

Point(1)Memory type setting(from the inical 344word spec. to change the number of bank) of Datacarrier, it is performed only once to one Data carrier when start using it, and once the Datacarrier is set the number of bank, please do not change the number of bank until Data carrier
is exchanged.
After memory type setting, if the number of bank change is performed, it will delete the dataat that time as well as the number of writing and will not perform the normal lifetime controle.
(2)In order to execute the life extension bank switching instruction(BK), communicate itremains stopped.

- 60 -

５.

Communication with Data carrier

Processor Z4-Q002(2) Life extention by using the lifetime control instruction (IDMW/IDLW)
The example of program that using the bank switching extend the Data carrier writing lifetime up to400,000times is shown below. After executing count wrting instruction(IDMW)，if the number of writing
exceed the determination value, it executes the bank switching.
In order to execute the life extension bank switching instruction(BK), communicate it remains stopped.
＜ preparation ＞
By the life extension bank switching instruction(BK)，initialize(set) the Data carrier meomory type tonumber of bank 4 / Bank No. 1(0401H) (For the details of program, refer to (1)Set the writing detemination value to K10(100,000times)（It is the default value, therefore it doesn't
need to be set）

＜ Procedure ＞
No.

Contents
With the lifetime control instruction(IDMW), it will do the writing①

If it exceeds writing lifetime, execute ② . However，if at Bank No.4，it will be thelifetime end of data carrer and completed (Set F10).

②

Update the bank No. with the life extension bank switching instruction(BK)＜ Programming Example ＞
External
External
signalinterlock signal

Start
Execite the IDMW instruction
with writing lifetime determination
value : 100,000times(default
value)(Store the result of writing
lifetime determination to D25,
memory type to D26②

Reset M30 and complete
Set F10 when exceeds
the writing lifetime(Total
400,000times）
Set bank setting start-up contact
M40
Reset M30
When abnomal completion, store
error code to R0③

Set instruction code BK to D0

Up date the bank No.

Set the instruction code
Set the Memory type D26 to
K40

Start bank switching
Set F11 if the momory type is
not setting value.
Complete bank switchin
Reset the bank switching startup contact M40.
When abnomal completion, store
error code to R0- 61 -

5.

Communication with Data carrier

Processor Z4-Q002(3) Life extention by using the batch update of the number of writing instruction(IDMD)
The example of program that using the bank switching extend the Data carrier writing lifetime up to400,000times is shown below. The Read/Write head 1 ～ 10 uses continuous writing instruction(IDAWD □ ).
＜ preparation ＞
By the life extension bank switching instruction(BK)，initialize(set) the Data carrier meomory type tonumber of bank 4 / Bank No. 1(0401H) (For the details of program, refer to (1)＜ Procedure ＞
No.
Contents① By the continuous writing instruction(IDAWD)，do the writing(Refer to 5.5.1)
Set the writing lifetime determination value to 10(100,000times) and the writing②

additional value 10(Total writing number 10times) and execute the batch update of thenumber of writing instruction(IDMD). If it exceeds writing lifetime, execute ③ . However，
if at Bank No.4，it will be the lifetime end of data carrer and completed (Set F10）.

③

Up date the bank NO. with life extension bank switching instruction(BK)＜ Programming Example ＞
External
signalExternal
interlock signal

Start

②

Execute the IDMD instruction
with No. of writing 100,000times
at writing lifetime determination
value 100,000times(default
value)(Store memory type toD26）

Reset M50 and complete
Set F10 when exceeds
the writing lifetime(Total
400,000times）
Set bank setting start-up
contact M60
Reset M50
When abnomal completion,
store error code to R0.

③

Set instruction code BK to D0

Up date the bank No.

Set the instruction code
Set the Memory type D26 to
K40

Start bank switching
Set F11 if the momory type is
not setting value.
Complete bank switching
Reset the bank switching
start-up contact M40.
When abnomal completion,
store error code to R0- 62 -

５.

Communication with Data carrier

Processor Z4-Q002(4) How to read the total times value of writings
The exaple of program to read out the total number of writing value by using the batch update of thenumber of writing instruction(IDMD) and store it to the device D100，101（D100：lower16 bit，
D101：upper16 bit）is shown below
The writing lifetime determination value remain as default (100,000times）
By running the communication regularly, total number of writing value of the Data carrier can bemonitored.

External
signalExternal
interlock signal

Start
Execute IDMD instruction at the numberof writing "0" Read out to the number ofwriting value D100，D101
Reset M1 and complete
Set M2 when exceeds the value of writing
lifetime determination
Reset M1
When abnomal completion, store error code
to R0

5.13 Error cancel Instruction
Error cancel Instruction cancel the error.
It will be executed by making error cancel request contact (Y(n+1)1/Y(n+1)9) to ON.
When the Instruction is complted, error(Xn5/XnD) become OFF.
【Example program】
The following is a sample program for the next criteria.
(An example program to cancel the errors that occurred when using the instructions that are described inthis chapter.)Processor first I/O output number. . . . . . . . . . . 00
Used channel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . CH.1
Error cancel target instrucion execution contact M1External
signalExternal
interlock signal

Start

Error cancel request

ID instruction finished

Clear the error cancel request contactquit- 63 -

6.

Error information

Processor Z4-Q002

6.1 List of Error code
Error codes, error contents and actions of the errors that occur when using Processor are shown below
The latest error code is stored in the Buffer memory K14(CH.1)/K4014(CH.2)
Error code [**], the following values ​​are stored by an instruction.
		 ・All instruction. . . . . 00H ・IDCLR,IDFILL. . . . . . 06H ・WP. . . . . . . . . . . . . .  14H		 ・IDRD. . . . . . . . . . . . . 01H ・IDCOPY. . . . . . . . . . 0AH ・RP . . . . . . . . . . . . . .  15H		 ・IDWD. . . . . . . . . . . . 02H ・IDCRD. . . . . . . . . . . . 0BH ・BK . . . . . . . . . . . . . .  18H		 ・IDARD . . . . . . . . . . . 03H ・IDCWD . . . . . . . . . . . 0CH ・IDMD. . . . . . . . . . . .  19H		 ・IDAWD. . . . . . . . . . . 04H ・IDSRD. . . . . . . . . . . . 0DH ・IDMW. . . . . . . . . . . .  1AH		 ・IDCM . . . . . . . . . . . . 05H ・IDSWD . . . . . . . . . . . 0EH ・IDLW . . . . . . . . . . . .  1BH

Error codeHex.
decimalName of error

Eerror contents
In the communication with Datacarrier, there is a mistake with
no. of execution word.

LED

ActionERR.

Check the the value of " No. of word +address" of the sequence program will not
exceed the Data carrier end address (confirm
the memory type)

ERR.

Check the "address" of sequence program(Atthe WP instrucion, the value of page address)
will not exceed the Data carrier address range(confirm the memory type)

ERR.

Check the "address" of sequence program (Atthe WP instrucion, the value of page address)
will not exceed the valid value of the setting
address .

ERR.

Confirm that the Sequence program "No. of
ommunication word" (at the WPinstrucion,setting value / cancel value) does not exceed
the valid value of the setting address.

**01H

No. of execution
word error**02H

Execution
address error**11H

Setting address
error

**12H

No, of setting
word error**13H

Data carrier is out ofAbsense of date communication rage. Datacarrier error
carrier/Read write head are not
Z series.

ERR.

**14H

Data carrier
communication
error

Error duing Data carrierommunication (Such as varity
error)An area that exceeds the ID tag
memory capacity was read or
written.

ERR.

**16H

Write protect
error

Try to write into write protect
setting area.

ERR.

1821H

Memory typespecify error

Specified memory type is not
valid value

ERR.

**22H

Instruction codeerror

Setting the instrucion code thatis not defined. ID instruction
execution request contact isdifferent.

ERR.

**24H

0A26H
**28H
0031H

In the communication with Datacarrier, there's mistake withexecution address.
(When WP instruction, it is pageaddress value)
Setting address exceeds
the valied value (When WP
instruction, it is page address
value)
No. of setting word exceeds
the valid value (When WP
instruction, it is page address
value) (At the WP instruction,
value of set/cancel)

Place Data carrier in the communication
range.
Check the read write head wiring. Check Datacarrier and read write head if they are Zseries
or not.
Review the communication distance andmovement speed Data carrier. Review
the ground of the interface unit and theSequencer CPU. Review the sequence
program and Check that the tag does not reador write outside the memory capacity range.
Confirm that "address" and "address" +"number of communication words" of sequence
program are not within the write protection
setting range.
Review the specified memory type.
Or, review the setting of switch 1 (bankpresence / absence).
Review the instruction code
Revie the Instruction execution request
contact is correct

Continuous
Setting value of the continuous
instruction
Review the setting value of the continuous
instruction execution interval
execution interval
ERR. instruction execution interval timer Sequencer
time exceeds the valid setting
timer setting
programvalue
error
Copy direction
Copy direction specify setting
Review the setting value of the copy direction
specify setting
ERR.
value is not valid value(12,21).
specify of Sequencer programerror
The number of writing addition
Review the number of writing addition value
No. of writing
setting value is not valid value(0 ERR. and lifetime determination value of Sequencer
error～ 32767)（IDMD instruction)
program.
Read write head External power supply (24VDC)
Supply DC24V
disconnecttion
is not supplied
DC24V
Connect read write head
DC24V error
Read write head disconnected- 64 -

５.

Error information

Processor Z4-Q002

Appendix
Appendix 1 - Diversion of sequence program for A/QnA
When diverts the sequence program for A/QnA, please pay attention to following points.
		
		
		

(1) Diversion of sequence program for A series
Contacts (Xn0, Xn6) which indicate the status of Processor specification is different for the Qseries
and A series.
Therefore, if interlock are used as a contact, please modify the program as follows.

AD35ID1/AD35ID2

Z4-Q002

Xn0

A1SD35ID1/A1SD35ID2
WDT error

UNIT READY

Xn6(ON : Error,
OFF : Normal)
UNIT READY(ON : Normal, OFF : Error)
Unused(ON : Normal, OFF : Error)(Always OFF)

Using A series
Xn0

Xn6

WDT Error unit
READY

Using Z4-Q002 series
Xn0

UNIT
READY

(2) Diversion of sequence program for QnA series		
Dedicated instruction for QnA series can be used as it is, however following instruction needs to be		replaced its name of instructions.
		Compare instruction(IDCMP □ )→ Compare instruction(IDCM □ )		Continuous higha speed reading(IDFRD □ ) → Continuous reading(IDARD □ )		Continuous higha speed writing(IDFWD □ ) → Continuous writing(IDAWD □ )- 65 -

Processor Z4-Q002- 66 -

Processor Z4-Q002- 67 -

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