PRMD16

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors(RET)
14 September 2018

Product data sheet

1. General description
NPN/PNP Resistor-Equipped double Transistors (RET) in an ultra small DFN1412-6 (SOT1268)
leadless Surface-Mounted Device (SMD) plastic package.

2. Features and benefits
•
•
•
•
•
•
•

100 mA output current capability
Built-in bias resistors
Simplifies circuit design
Reduces component count
Reduces pick and place costs
Low package height of 0.5 mm
AEC-Q101 qualified

3. Applications••••

Digital applications
Cost-saving alternative to BC847/BC857 series in digital applications
Control of IC inputs
Switching loads

4. Quick reference data
Table 1. Quick reference data
SymbolParameter

Conditions

Min

Typ

Max

Unit

-

-

50

V

-

-

100

mA

80

-

-

[1]

15.4

22

28.6

[1]

1.7

2.13

2.6

Per transistor, for the PNP transistor with negative polarity
VCEO

collector-emitter
voltage

IO

output currenthFE

DC current gain

VCE = 5 V; IC = 5 mA; Tamb = 25 °C

R1bias resistor 1

Tamb = 25 °C

R2/R1

bias resistor ratio[1]

open baseSee section "Test information" for resistor calculation and test conditions.

kΩPRMD16

Nexperia

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)5. Pinning information
Table 2. Pinning information
Pin
Symbol Description
1

GND1

Simplified outline

Graphic symbol

GND (emitter) TR1

O1

1

2

I1

input (base) TR1

3

O2

output (collector) TR2

4

GND2

GND (emitter) TR2

5

I2

input (base) TR2

6

O1

output (collector) TR1

7

O1

output (collector) TR1

8

O2

output (collector) TR2

7

2

R1

5
8

3

I2

GND2

6

4

R2
TR2

TR1
R2

R1

Transparent top view

DFN1412-6(SOT1268)

GND1

I1

O2

aaa-007379

6. Ordering information
Table 3. Ordering information
Type number
Package
PRMD16

Name

Description

Version

DFN1412-6

plastic thermal enhanced ultra thin small outline package; noleads; 6 terminals; body: 1.4 mm x 1.2 mm x 0.47 mm

SOT1268

7. Marking
Table 4. Marking codes
Type number

Marking code

PRMD16B7

PRMD16

Product data sheet

All information provided in this document is subject to legal disclaimers.

14 September 2018

© Nexperia B.V. 2018. All rights reserved

2 / 14

PRMD16

Nexperia

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)

8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
SymbolParameter

Conditions

Min

Max

Unit

Per transistor, for the PNP transistor with negative polarity
VCBO

collector-base voltage

open emitter

-

50

V

VCEO

collector-emitter voltage

open base

-

50

V

VEBO

emitter-base voltage

open collector

-

7

V

VI

input voltage

positive-

40

V

negative

-

-7

V

-

100

mA

IO

output current

Ptot

total power dissipation

Tamb ≤ 25 °C

[1]

-

325

mW

Ptot

total power dissipation

Tamb ≤ 25 °C

[1]

-

480

mW

Tj

junction temperature

-

150

°C

Tamb

ambient temperature

-55

150

°C

Tstg

storage temperature

-65

150

°C

Per device[1]

Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.
aaa-024487

500
Ptot
(mW)
400

300

200

100

0
-75

-25

25

75

125
175
Tamb (°C)

FR4 PCB, standard footprint
Fig. 1.

Per device: Power derating curve

PRMD16

Product data sheet

All information provided in this document is subject to legal disclaimers.

14 September 2018

© Nexperia B.V. 2018. All rights reserved

3 / 14

PRMD16

Nexperia

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)9. Thermal characteristics
Table 6. Thermal characteristics
SymbolParameter

Conditions

Min

Typ

Max

Unit

Per transistor
Rth(j-a)thermal resistance from in free air
junction to ambient

[1]

-

-

385

K/W

thermal resistance from in free air
junction to ambient

[1]

-

-

261

K/W

Per device
Rth(j-a)[1]

Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.
aaa-024488

103
duty cycle = 1

Zth(j-a)
(K/W)

0.75

102

0.33

0.5
0.2

0.1
0.05
10

0.02

0.01

0

1
10-5

10-4

10-3

10-2

10-1

1

10

102

tp (s)

103

FR4 PCB, standard footprint
Fig. 2.

Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values

PRMD16

Product data sheet

All information provided in this document is subject to legal disclaimers.

14 September 2018

© Nexperia B.V. 2018. All rights reserved

4 / 14

PRMD16

Nexperia

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)10. Characteristics
Table 7. Characteristics
SymbolParameter

Conditions

Min

Typ

Max

Unit

collector-emitter cut-off VCE = 30 V; IB = 0 A; Tamb = 25 °C
current
VCE = 30 V; IB = 0 A; Tj = 150 °C

-

-

1

µA

-

-

50

µA

ICBO

collector-base cut-off
current

VCB = 50 V; IE = 0 A; Tamb = 25 °C

-

-

100

nA

IEBO

emitter-base cut-off
current

VEB = 5 V; IC = 0 A; Tamb = 25 °C

-

-

120

µA

hFE

DC current gain

VCE = 5 V; IC = 5 mA; Tamb = 25 °C

80

-

-

VCEsatcollector-emittersaturation voltage

IC = 10 mA; IB = 0.5 mA; Tamb = 25 °C

-

-

150

mV

VI(off)off-state input voltage

VCE = 5 V; IC = 100 µA; Tamb = 25 °C

-

0.8

0.5

V

VI(on)

on-state input voltage

VCE = 0.3 V; IC = 2 mA; Tamb = 25 °C

R1bias resistor 1

Tamb = 25 °C

R2/R1

bias resistor ratioCC

collector capacitance

Per transistor, for the PNP transistor with negative polarity
ICEO

fT

[1]
[2]

transition frequency

2

1.1

-

V

[1]

15.4

22

28.6

kΩ

[1]

1.7

2.13

2.6

VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz;
Tamb = 25 °C

-

-

2.5

pF

VCB = -10 V; IE = 0 A; ie = 0 A;
f = 1 MHz; Tamb = 25 °C

-

-

3

pF

[2]

-

230

-

MHz

[2]

-

180

-

MHz

VCE = 5 V; IC = 10 mA; f = 100 MHz;
Tamb = 25 °C

See section "Test information" for resistor calculation and test conditions.
Characteristics of built-in transistor.
aaa-021293

103
hFE

aaa-021294

0.1

(1)

IC
(A)

(2)

0.08

0.60 mA
0.54 mA

0.48 mA
0.42 mA
0.36 mA(3)

102

0.30 mA
0.06

0.24 mA
0.18 mA

0.04

0.12 mA

10
0.02

1
10-1

1

10

IC (mA)

0102

VCE = 5 V
(1) Tamb = 100 °C(2) Tamb = 25 °C(3) Tamb = -40 °C
Fig. 3.

IB = 0.06 mA

0

1

2

3

4

VCE (V)

5

Tamb = 25 °C
Fig. 4.

NPN transistor: Collector current as a functionof collector-emitter voltage; typical values

NPN transistor: DC current gain as a function ofcollector current; typical values

PRMD16

Product data sheet

All information provided in this document is subject to legal disclaimers.

14 September 2018

© Nexperia B.V. 2018. All rights reserved

5 / 14

PRMD16

Nexperia

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)
aaa-021336

1

aaa-021295

102
VI(on)(V)

VCEsat
(V)

10
10-1
(1)

(1)

1

(2)

(2)
(3)

(3)

10-2
10-1

1

10

IC (mA)

10-1
10-1

102

IC/IB = 10
(1) Tamb = 100 °C(2) Tamb = 25 °C(3) Tamb = -40 °C
Fig. 5.

1

10

IC (mA)102

VCE = 0.3 V(1) Tamb = -40 °C(2) Tamb = 25 °C(3) Tamb = 100 °C

NPN transistor: Collector-emitter saturation
voltage as a function of collector current;
typical values

Fig. 6.

aaa-021296

10

NPN transistor: On-state input voltage as afunction of collector current; typical values
aaa-021337

3
Cc
(pF)

VI(off)
(V)

2
(1)

1

(2)
(3)

1

10-1
10-1

1

IC (mA)

0

10

VCE = 5 V
(1) Tamb = -40 °C(2) Tamb = 25 °C(3) Tamb = 100 °C
Fig. 7.

Product data sheet

10

20

30

40
50
VCB (V)f = 1 MHz; Tamb = 25 °C
Fig. 8.

NPN transistor: Off-state input voltage as afunction of collector current; typical values

PRMD160

NPN transistor: Collector capacitance as afunction of collector-base voltage; typicalvaluesAll information provided in this document is subject to legal disclaimers.

14 September 2018

© Nexperia B.V. 2018. All rights reserved

6 / 14

PRMD16

Nexperia

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)006aac757

103

aaa-021338

103
hFE

fT
(MHz)

(1)
(2)

102

(3)

102
10

10
10-1

1

10

IC (mA)

1
-10-1

102

VCE = 5 V; Tamb = 25 °C
Fig. 9.

NPN transistor: Transition frequency as afunction of collector current; typical values ofbuilt-in transistor

aaa-021339-0.1-0.90 mA

IC
(A)

-0.72 mA

-0.08

-10

IC (mA)-102

VCE = -5 V
(1) Tamb = 100 °C(2) Tamb = 25 °C(3) Tamb = -40 °C
Fig. 10. PNP transistor: DC current gain as a function ofcollector current; typical values
aaa-021342-1-0.81 mA
-0.63 mA

VCEsat(V)-0.54 mA
-0.45 mA

-0.06
-0.36 mA

-10-1

-0.27 mA

-0.04

(1)

-0.18 mA

(2)
(3)

IB = -0.09 mA

-0.02

0

-1

0

-1

-2

-3

-4

VCE (V)

-10-2
-10-1

-5

Tamb = 25 °C

-1

-10

IC (mA)-102

IC/IB = 10
(1) Tamb = 100 °C(2) Tamb = 25 °C(3) Tamb = -40 °C

Fig. 11. PNP transistor: Collector current as a functionof collector-emitter voltage; typical values

Fig. 12. PNP transistor: Collector-emitter saturation
voltage as a function of collector current;
typical values

PRMD16

Product data sheet

All information provided in this document is subject to legal disclaimers.

14 September 2018

© Nexperia B.V. 2018. All rights reserved

7 / 14

PRMD16

Nexperia

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)
aaa-021340-102
VI(on)(V)

VI(off)
(V)

(1)

-10

aaa-021341

-10

(1)

(2)

(2)

-1
(3)

(3)

-1

-10-1
-10-1

-1

-10

IC (mA)

-10-1
-10-1

-102

VCE = -0.3 V(1) Tamb = -40 °C(2) Tamb = 25 °C(3) Tamb = 100 °C-1

IC (mA)-10

VCE = -5 V
(1) Tamb = -40 °C(2) Tamb = 25 °C(3) Tamb = 100 °C

Fig. 13. PNP transistor: On-state input voltage as afunction of collector current; typical values
aaa-021343

4

Fig. 14. PNP transistor: Off-state input voltage as afunction of collector current; typical values
006aac763

103

Cc
(pF)
3

fT
(MHz)

2

102

1

0

0

-10

-20

-30

10
-10-1

-40
-50
VCB (V)f = 1 MHz; Tamb = 25 °C

Product data sheet-10

IC (mA)-102

VCE = -5 V; Tamb = 25 °C

Fig. 15. PNP transistor: Collector capacitance as afunction of collector-base voltage; typicalvalues

PRMD16-1

Fig. 16. PNP transistor: Transition frequency as afunction of collector current; typical values ofbuilt-in transistor

All information provided in this document is subject to legal disclaimers.

14 September 2018

© Nexperia B.V. 2018. All rights reserved

8 / 14

PRMD16

Nexperia

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)11. Test information
Quality information
This product has been qualified in accordance with the Automotive Electronics Council (AEC)
standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use inautomotive applications.

Resistor calculation•

Calculation of bias resistor 1 (R1)•

Calculation of bias resistor ratio (R2/R1)n.c.

II1; II2

R1

II3; II4
R2

GND
aaa-020082

Fig. 17. NPN transistor: Resistor test circuitn.c.

II1; II2

R1

II3; II4
R2

GND
aaa-020083

Fig. 18. PNP transistor: Resistor test circuit

Resistor test conditions
Table 8. Resistor test conditions
Per transistor; for the PNP transistor with negative polarity
R1 (kΩ)22

PRMD16

Product data sheet

R2 (kΩ)47

Test conditions
II1

II2

II3

II4

90 μA

140 μA-55 μA-105 μA

All information provided in this document is subject to legal disclaimers.

14 September 2018

© Nexperia B.V. 2018. All rights reserved

9 / 14

PRMD16

Nexperia

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)12. Package outline
DFN1412-6: plastic thermal enhanced ultra thin small outline package; no leads;
6 terminals; body: 1.4 x 1.2 x 0.47 mm

SOT1268

(2×)

E

B

A

pin 1
index area
A
D

A1

T
(6×)
detail X

C
E1
(2×)

Y1 C

L
(6×)
4

3

e

e1
2

5
b
(6×)

e1
D1
(2×)
1

e

6
V C A Bpin 1
index area

0

mm

A

A1

b

D

D1

X

1 mm
scale

Dimensions (mm are the original dimensions)
Unit(1)

Y

E

E1

e

e1

L

T

V

Y

Y1

min 0.44 0.00 0.15 1.35 0.43 1.15 0.32
nom 0.47
0.20 1.40 0.48 1.20 0.37
max 0.50 0.04 0.25 1.45 0.53 1.25 0.42

0.5

0.35

0.145
0.195
0.245

0.10
0.16
0.22

0.1

0.05 0.05

Note
1. Dimension A is including plating thickness.
Outlineversion
SOT1268

sot1268_po

References
IEC

JEDEC

JEITA

Europeanprojection

Issue date
18-08-23
18-09-11---

Fig. 19. Package outline DFN1412-6 (SOT1268)

PRMD16

Product data sheet

All information provided in this document is subject to legal disclaimers.

14 September 2018

© Nexperia B.V. 2018. All rights reserved

10 / 14

PRMD16

Nexperia

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)

13. Soldering
Footprint information for reflow soldering of DFN1412-6 package

SOT1268

1.6
1.4
1.3
0.3

0.2

0.25

0.5

0.3

0.35

0.27 0.37

1.71 1.51 1.41 0.71

0.17

0.43
0.17
1.23
occupied area

solder resist

solder lands

solder paste

Dimensions in mm
Issue date

16-04-18
16-09-02

sot1268_fr

Fig. 20. Reflow soldering footprint for DFN1412-6 (SOT1268)

PRMD16

Product data sheet

All information provided in this document is subject to legal disclaimers.

14 September 2018

© Nexperia B.V. 2018. All rights reserved

11 / 14

PRMD16

Nexperia

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)

14. Revision history
Table 9. Revision history
Data sheet ID
Release date

Data sheet status

Change notice

Supersedes

PRMD16 v.2

20180914

Product data sheet-

PRMD16 v.1

Modifications:•

PRMD16 v.1

20170729

PRMD16

Product data sheet

Package outline drawing updated: Unit T added
Product data sheet-

All information provided in this document is subject to legal disclaimers.

14 September 2018-

© Nexperia B.V. 2018. All rights reserved

12 / 14

PRMD16

Nexperia

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death orsevere property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment orapplications and therefore such inclusion and/or use is at the customer's own
risk.

15. Legal information
Data sheet status
Document status[1][2]

Product
status [3]Definition

Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of thisdocument, and as such is not complete, exhaustive or legally binding.

Objective [short]data sheet

Development

This document contains data fromthe objective specification for
product development.

Preliminary [short]data sheet

Qualification

This document contains data fromthe preliminary specification.

Applications — Applications that are described herein for any of theseproducts are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.

Product [short]data sheet

Production

This document contains the productspecification.

[1]
[2]
[3]

Please consult the most recently issued document before initiating orcompleting a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may havechanged since this document was published and may differ in case ofmultiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.

Definitions
Draft — The document is a draft version only. The content is still underinternal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included hereinand shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheetwith the same product type number(s) and title. A short data sheet isintended for quick reference only and should not be relied upon to containdetailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, thefull data sheet shall prevail.
Product specification — The information and data provided in a Productdata sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement bevalid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.

Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for theconsequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outsideof Nexperia.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removalor replacement of any products or rework charges) whether or not suchdamages are based on tort (including negligence), warranty, breach ofcontract or any other legal theory.

Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability forany assistance with applications or customer product design. It is customer’ssole responsibility to determine whether the Nexperia product is suitableand fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards tominimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for thecustomer’s applications and products using Nexperia products in order toavoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above thosegiven in the Recommended operating conditions section (if present) or theCharacteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement isconcluded only the terms and conditions of the respective agreement shallapply. Nexperia hereby expressly objects to applying the customer’s generalterms and conditions with regard to the purchase of Nexperia products bycustomer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a priorauthorization from competent authorities.
Translations — A non-English (translated) version of a document is forreference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.

Trademarks
Notice: All referenced brands, product names, service names andtrademarks are the property of their respective owners.

Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with theTerms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use in automotive applications — This Nexperia producthas been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted tobe suitable for use in life support, life-critical or safety-critical systems or

PRMD16

Product data sheet

All information provided in this document is subject to legal disclaimers.

14 September 2018

© Nexperia B.V. 2018. All rights reserved

13 / 14

PRMD16

Nexperia

50 V, 100 mA NPN/PNP Resistor-Equipped double Transistors (RET)

Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking.......................................................................... 2
8. Limiting values............................................................. 3
9. Thermal characteristics............................................... 4
10. Characteristics............................................................ 5
11. Test information.......................................................... 9
12. Package outline........................................................ 10
13. Soldering................................................................... 11
14. Revision history........................................................12
15. Legal information......................................................13© Nexperia B.V. 2018. All rights reserved

For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 14 September 2018

PRMD16

Product data sheet

All information provided in this document is subject to legal disclaimers.

14 September 2018

© Nexperia B.V. 2018. All rights reserved

14 / 14