Application Note

Designing Microwave PCBs for
Successful Manufacture —Getting it Right the First TimeJohn Priday, John Leafe
Teledyne Labtech

A Teledyne Defense Electronics Company

TDE Application Note

Designing Microwave PCBs for Successful
Manufacture – Getting it Right the First TimeJohn Priday, John Leafe
Teledyne Labtech

Contents
Introduction...............................................................................................................................................................................................31) Base Laminates...................................................................................................................................................................................52) Copper Foils........................................................................................................................................................................................73) Bond Films...........................................................................................................................................................................................74) Multilayer Build-Up...........................................................................................................................................................................85) Via Types and Spans..........................................................................................................................................................................86) Embedded Resistors.........................................................................................................................................................................97) Surface Finishes.................................................................................................................................................................................12
Summary.....................................................................................................................................................................................................13
About Teledyne Labtech.........................................................................................................................................................................14
About the Authors....................................................................................................................................................................................14
Appendix 1: Common Microwave Materials......................................................................................................................................15

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TDE Application Note

Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Time

Introduction
With improvements in processor speed and model accuracy, it is more and more common for microwave circuit simulations
to bear close approximation to their eventual real world performance. However, not all pitfalls present in the successful
manufacture of a complex microwave circuit are captured in simulations. This paper looks at some common mistakes we see
every day, and how to adjust your design to avoid them, as well as covering some other useful points.

Figure 1: Some common issues on a stylized microwave PCB that we’ll look at in more detail in following sections

In stylized and exaggerated form, Figure 1 shows some common issues we’ll cover in the following sections. These include:a.

Misalignment through choice of material with insufficient dimensional stability for the applicationb.

Pad liftc.

Peeling tracesd.

Thermoplastic movement of featurese.

Extreme bowing because of coefficient of thermal expansion mismatch between materialsf.

Impossible to produce blind viasg.

Accidental stub antennash.

Printed embedded resistors with too little area to maintain value accuracyi.

Poor solder joint due to gold embrittlement

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TDE Application Note

Designing Microwave PCBs for Successful Manufacture – Getting it Right the First TimeAs a reminder, modern microwave printed circuit boards (PCBs) are made fromlayers of material pressed and bonded together. Typical layers (‘base laminates’)start off completely covered top and bottom with copper (‘copper foils’), themajority of which are selectively removed during processing steps, leaving only
the desired traces, ground planes etc. Plated-through holes (PTH) are constructedto connect traces on different layers together, and commonly components suchas resistors can be embedded inside the layer stack, or created from the selective
laying down of resistive material. Typically top and bottom layers will have themajority of the desired electrical components mounted on them, with connections
made between component and trace achieved with soldering or wire bonding. The
composition of the underlying layers greatly affects the microwave performance, as
well as the physical behavior in the expected environment.
With this in mind we will walk through the different stages, as shown in Figure 2:
1. Base laminate material, which greatly affects performance at frequency
through factors such as dielectric coefficient (Dk) and loss tangent (Df)
2. Choice of copper foils supplied with the base laminate
3. Bond films that glue the stack together
4. Buildup of the multi-layer stack
5. Via types and spans
6. Embedded resistors
7. Surface finish
3.6 W/°C
This paper considers the primary factors consideredfor Design for Manufacture(DFM) for RF/ Microwave PCBs and does not attempt to be an exhaustive guide for
all RF PCBs.

3.6 W/°C

One question frequently asked is what the primary cost drivers are, and what can bedone to reduce the cost. This is never a straightforward question because invariably
there are good reasons for the multiple via stacks or tight tolerances specified, but
we will look at some trade-offs.

Figure 2: Order of discussion

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TDE Application Note

Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Time

1) Base Laminates
Choice of base laminate materials is one of the earliest design decisions, affecting performance and cost. A table of common
materials we work with is given in Appendix 1, with salient performance characteristics listed.
There are many different materials available; from the RF / microwave designer’s point of view Dk and Df will be paramount.
The type of copper foil will also factor into the losses within the circuit with low profile coppers often being selected where
losses need to be minimized. Below is a list of considerations from a manufacturing point of view:a) Dimensional stabilityb) Metal backed (pre-bonded) – type of backing: copper, brass or aluminiumc) Coefficient of Thermal Expansion (CTE) is especially important for multilayer circuitsd) Glass Transition Temperature (Tg) or melt point for thermoplasticse) Type and percentage of filler within substrate
Dimensional stability can be a major issue, especially for larger circuits, and although dimensional changes during processing(usually shrinkage) can be allowed for by scaling, consistency is key to successful production with high yields. Generallymaterials with some type of reinforcement (e.g. woven glass) give more consistent results (see Comments column in Appendix
1). So where can this bite you? For a material with poor and unpredictable dimensional stability, scaling does not solve the issue
as the dimensional change varies from piece to piece. It is common for us to make very large phased array antennas, with sizes
up to 1.2m by 1.2m, where alignment relies upon accurate distances from physical mounting holes. If you imagine radiating
elements on the board matching up to precise apertures in a machined metal piece as shown in Figure 3, as the placement of
the elements wanders off relative to the metal (from correct placement at ‘(i)’, to significantly offset in ‘(ii)’), loss and efficiency of
the antennas will suffer.

Figure 3: Accumulating positional errors due to poor dimensional stability of the laminate material

A different but common issue is designers using dimensionally stable materials, but specifying extremely tight tolerances in the
belief that this will insulate them from issues resulting from process tolerances. While this may be necessary in some designs, itpushes up cost and increases scrap. Often, using expanding tolerances in modeling tools shows that some aspects of the design
are less sensitive than might be assumed, and relaxation will greatly aid manufacturability.
Metal backed circuits can present challenges in terms of overall thickness for processing. The applications are usually for highpower RF so backings of >6mm are commonplace. The maximum total thickness for our standard processes is 8mm and we
can plate aluminium for through holes, blind vias and final finishing of exposed aluminium.
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TDE Application Note

Designing Microwave PCBs for Successful Manufacture – Getting it Right the First TimeThe CTE of a material is an important consideration for both the end use and throughout manufacture of the PCBs. Mismatches
can lead to stresses within the structure that can result in bowing; they can also lead to stresses in solder joints where the CTEof components is significantly different to the overall CTE of the PCB, sowing the seeds for poor reliability for later. It is safest
to use the same materials throughout the stack whenever possible. Frequently designs will combine microwave circuits withdigital logic control circuits, using lower cost FR4 for the latter to save cost; this sets up likely CTE issues unless designs are
symmetrical, with distribution of CTEs balanced across the board.
Another consideration is the Tg. For FR4 this is typically between 120 and 140°C. For high quality microwave materials Tg
is typically >170°C, and most high reliability applications call for high Tg materials. It is an important consideration as CTE
generally makes a step change when the Tg is exceeded, sometimes changing by a factor of 3 or 4. Given that lead-freesoldering calls for temperatures of the order of 230°C, increased CTE above Tg can mean increased stresses on features such as
PTH vias, pads etc., particularly in the z-direction, leading to pad-lift after cooling. Conceptually this is shown in Figure 4 (i) fromour conceptual sketch of Figure 1. (ii) and magnified in (iii) show a cross sectional photo of a real example of pad-lift.

Figure 4: Example of pad lift that can occur after thermal stress (288°C solder float for 10 seconds). Note in (ii) the via hole is filled with solder as a result of
the solder float test. Pad lift/ land lift (magnified in (iii)) occurs due the Z axis CTE of the substrate being much higher than the copper of the hole wall and
the PCB is taken through an elevated temperature cycle, especially if the Tg of the substrate is exceeded.

Materials with higher Dks usually have high filler contents that can be very abrasive to drills and cutters. While in itself this is not
an issue, processing costs will be increased because of use of a greater number of drills and cutters for each circuit.

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TDE Application Note

Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Time

2) Copper Foils
Laminate layers are available with a variety of copper foils. The most common is Electro Deposited. The type of copper foil usedwill have an impact on the RF performance especially at higher frequencies. Typically the types of copper foil available andassociated backside surface roughness are:•

Electro Deposited (ED) – 1.5μm RMS but can be as high as 3.0μm RMS•

Reverse Treated (RT) – 0.7μm RMS•

Rolled Annealed (RA) – 0.3μm RMS

How does this impact? As examples:•

For 0.020” RO3003 with 0.5oz RA copper versus the same substrate with 0.5oz ED copper at 25GHz the loss is about
0.1dB/in greater for ED compared with RA copper.

•

For 0.005” RO3003 with 0.5oz RA copper versus the same substrate with 0.5oz ED copper at 25GHz the loss is about
0.35dB/in greater for ED compared with RA copper.

Clearly increased surface roughness will lead to increased transmission losses (dB/mm). The losses will increase with higher
frequencies and increase with a reduction in substrate thickness. These become particularly important for long trace runs onlarge substrates. However, this is a trade-off on two fronts:
1.

Smoother surfaces take more steps to process, as it is harder to bond subsequent layers, increasing cost.

2.

Similarly, the peel strength of the copper will be lower, making scrap more likely and rework harder or impossible;
indeed, some materials like Rogers 4000 are not available with RA copper.

Figure 5: Peeling of traces is more likely after rework if the back side of the copper was smoother initially –the trade-off between lower loss, and lower adhesion

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TDE Application Note

Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Time

3) Bond Films
With so many different prepreg’s[1] and bond films available there is a lot to consider. For
manufacture we need to consider the following criteria to assist selecting different categories ofbond films as well as ensuring the electrical properties are appropriate:a) Thermoset or thermoplastic?
b) Bonding temperature. Will all the materials within the build withstand the bonding 		temperature? E.g. base laminates, plugging paste, embedded components, solder,silver epoxy etc.

Figure 6: Illustration of PTH via
having moved relative to top
level artwork due to flow ofthermoplastic material in laterstage at too high temperaturec) Will the bond film withstand any subsequent assembly stages? SMT assembly or
hand assembly?
d) Are there multiple bond stages? If there are, thermoset bond films/ prepregs tend to make life easier but it is not always
essential. Thermoplastics can still be an option if bond films are used with different melt points and the bond film withthe lowest melt point used last.
e) Are there filled vias? Within a sequential build there is often the requirement to fill buried via holes. Depending on
the number and size of vias and the prepreg used, one option is to fill these with resin flow from the prepreg during
bonding. However if the volume to be filled is too great then holes must be filled using a high solids content plug paste.
f)

If there are internal cut outs where resin flow needs to be controlled, no or low flow prepregs must be used.

Thermoset materials don’t re-melt, whereas thermoplastics will soften; thus circuits composed with thermoplastic materials willtend to move or come apart if you go above a set temperature. This can be ok if you sequential bond, but it is important to start
off with the highest temperature thermoplastic materials first, then work down with lower temperature ones in subsequent steps
so the earlier ones do not re-melt. For example, if a board were to have PTH vias running through it, and were to be heatedsuch that thermoplastic films softened, they could ‘swim’ and melt in subsequent bonding steps; unless everything were to be
perfectly flat, features would wander off in a direction.
4) Multilayer Build-Up
Applying simple basic rules where possible can go a long way to help aid manufacturing and these can be applied right from theoutset. When considering the initial build-up, we recommend applying these 3 rules to help maintain flatness.
a) The minimum risk is to use the same material and bond film throughout the build.
b) Where different materials must be used we recommend keeping the build-up of laminates and bond films symmetrical.
c) Where neither of the above options are possible we would recommend using a 1: >2.5 rule if an asymmetric design
is required so that there is a significant difference between materials used within the build. This will help to minimize
the effects of mismatched CTEs between the materials by making one material dominant.
[1]Pre-preg is a fibreglass cloth impregnated with a “B” staged resin ( dried but not cured). When heated under pressure it flows and bonds the layers together, hardening
when fully cured to form a laminate.

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TDE Application Note

Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Time

When a circuit is constructed as sub-boards i.e. multiple bonding stages it is obviously important that scaling of the sub-boards
match, and in this case asymmetry within a sub-board stack can cause issues in manufacture. For example, if sub-boards are
significantly bowed due to CTE mismatch of materials it can be extremely difficult to process even if ultimately the final build issymmetrical once all the parts are brought together.
An example of extreme bowing is shown in Figure 8. Here board layers were removed from apress on a leader board; upon release of pressure, the two bowed layers rolled up like scrolls, as
can be seen in the left hand photo. Subsequent unrolling shows evidence of distortions arising
Figure 7: Illustration of layer bowing
from CTE mismatch stresses.

Figure 8: Example of extreme bowing5) Via Types and Spans
Traditionally connections are made via plated through holes running through the complete stack. As complexity has increased
it has become necessary to have multiple different via spans, with a real example shown in Figure 9 (i). Figure 9 (ii) shows aconceptual example where we have via spans and 4 bond stages (B1 to B4). The order and sequence must be considered
carefully.
a) L1 to L4 is drilled through sub-board with plated and filled vias[2] (B3)b) L12 to L13 Laser drilled blind holes may be copper filled (B1).
c) L11 to L15 drilled through sub-board with plated and filled vias (B2)[2]
When vias are to be filled with a higher solids content plug paste the minimum substrate thickness is 0.254mm and must have a woven glass reinforcement to avoid
dimensional stability issues.

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TDE Application Note

Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Timed) L1 to L10 drilled through entire stack, plated and back drilled from L15 (B4)e) L1 to L12 drilled through entire stack, plated and back drilled from L15 (B4)f) L1 to L15 drilled (B4)Sub-boards allow
through-drilling
before complete
assembly, minimizing
the need for blindvias.
The aspect ratioof hole length todiameter must be
considered in eachcase. Holes drilled
as blind shouldhave a maximum
aspect ratio of 1:1
and through holes
not greater than 12:1
aspect ratio. So why
Figure 9: (i) A board with complex via spans. (ii) A hypothetical example stack build-up
the issue with aspectratios? Particularly withsmall geometries, aspect ratio can be a big issue, as the plating process involves getting a solution into a small hole, getting air
out of it, and getting solution movement within it, with physics and chemistry working against achieving an even and unbroken
coating.
While through holes are most desirable, sometimes in complex structures blind vias cannot be
avoided. These can be constructed as through-hole vias and then back-drilled. The accuracy ofback-drilling is important, as drilling too deeply will cut through the pad, severing the intended
electrical connection; drilling too shallow leaves the connections safely intact, but also excess
conductor which can act as a stub antenna, radiating unintended microwave energy (Figure 10).
Where holes are back drilled the stub that remains before reaching the target layer will nominallybe 100μm in length +/-25μm. We recommend that holes to be back drilled are prefilled witha high solids content paste and cured prior to back drilling. This is especially important if PTFE
based substrates are being used.
Figure 10: Insufficient back-drilling
depth leaving a stub antenna

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TDE Application Note

Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Time

Note that in some cases blind vias between certain layers, or in certain locations,
may not be possible. An example is shown in Figure 11. In (i), placement of logic
lines on the top layer deny access for back-drilling to layers below. The caseshown in (ii) has layer connections that cannot be built up as through vias fromtwo sub-boards, as the spans overlap.
6) Embedded Resistors
It is increasingly common to embed discrete components such as resistors
inside boards. A typical application will be the formation of a Wilkinson divider
in a phased array system, where often two separate layers will support a divider
network each. Embedding reduces the overall size of the assembly. Traditionallydiscrete chip resistors were used, and this still makes sense if the power dissipationof each resistor is greater than 200mW, or the value tolerance must be withintight limits. Otherwise it is more cost-effective to use printed resistors, which aredeposited as part of a layer and are particularly beneficial where tens or hundreds ofcomponents are required.

Figure 11: Shows a case where blind vias are
not possible as sequential build through vias.
Either (i) or (ii) will have to be processed as blindvias with aspect ratio 1:1 or less

Teledyne Labtech can offer the following options:a)Discrete chip resistors soldered in placeb)

Discrete chip resistors attached using conductive (Ag epoxy) adhesivec)Ohmega-Ply® or Ticer® foil printed resistorsd)Discrete resistors using Ohmega-Ply or Ticer foil

Figure 12: Discrete embedded chip resistor(left) and printed resistor with too little surface
area (right)

When discrete embedded chip resistors are to be fitted using solder it is essential thatthe liquidus temperature of the solder is > 40°C higher than the bonding temperatureof the bond film/prepreg. Discrete chip resistors are usually only required when tighter than +/-10% tolerance of resistancevalues is required and power dissipation is >0.2W although this is dependent upon the area of the resistor element. For 50Ω per
square Ohmega-Ply the power versus resistor patch area[3] (with A in mm2) is (mW = 173 x A0.35). There is a trend towards using
printed resistors using Ohmega-Ply or Ticer foil where typically tolerances of +/-10% can be reliably achieved when using 50Ω/square material. Financially there is a clear benefit using printed resistors when there are many resistor elements per circuit.
There is however a need to avoid very small geometries, i.e. not less than 0.2 x 0.2mm for 50Ω/ square, so that manufacturing
tolerances do not impact significantly to the final resistor values. To minimise RF losses it is preferred to utilise Ohmega-Ply or
Ticer foil as “discrete” resistors that avoid the presence of the resistive layer under the conductors carrying the RF signals. An
example of an embedded chip resistor is shown in Figure 13 (i), and a printed embedded resistor formed using Ohmega-Ply isshown in (ii).

[3]

Source: Ohmega Technologies. Inc.

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TDE Application Note

Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Time

Figure 13: Embedded chip resistor (i), and printed resistor (ii)7) Surface Finishes
Surface finish of the conductors is important on an RF circuit and can directly impact upon the performance. This does depend
on what signal traces are on the outer surfaces of the PCBs. Stripline designs may only have small interface pads on the surface
so industry standard Electroless Nickel Immersion Gold (ENiG) finish is acceptable. However, where signal traces are on thesurface ENiG is generally accepted to be too lossy, especially if the path lengths are extended beyond a few millimeters.
Most of the available plated finishes are less conductive than copper so will increase theconductor losses. Immersion silver, however, does not have any detrimental impact on
performance although it is very sensitive to handling and cannot be readily reworked. The losses
due to ENiG rise with increasing frequency and with reduction in substrate thickness. Solder
mask should not be applied over RF signal traces as this will increase losses and where necessary
be limited to small dams to control solder flow.
Electroless Nickel Electroless Palladium Immersion Gold (ENEPiG) is slightly less lossy thanENiG and is favoured for Ka-Band and higher frequencies especially where both SMT assemblyand gold wire bonding are required. In all three cases ENiG, Immersion Silver and ENEPiG areelectroless/immersion (ion exchange) processes that coat all surfaces of exposed conductors
including tracks edges so are relatively straight forward to apply and give a uniform thickness.
In terms of cost, immersion silver is the lowest with ENEPiG being the highest, mainly driven by
the palladium content.

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Figure 14: Solder joint on layer ofgold which is too thick can lead tosolder embrittlement

TDE Application Note

Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Time

Pure soft gold 3 to 5μm thick is often
called for when wire bonding is tobe performed and is usually over anickel layer 1 to 3μm. If soldering is
also required then the gold is plated
selectively with wire bonding sites
being 3 to 5μm and the rest of traces
being kept below 1μm to avoid gold
embrittlement issues with solder joints.
Generally this type of finish has tobe applied prior to etching the track
features as it is a galvanic process andrequires all features to be connected so
the edges of tracks will have exposed
copper on finished circuits. Figure 15
shows a typical cross-section of gold Figure 15: Typical cross-section of gold over nickel over copper of a track on a high Dk substrate.
over nickel over copper of a track
Note the substrate is typical of high Dk materials, where the base material such as PTFE has particles
on a high Dk substrate. This finish isof materials such as alumina trapped within it to raise the overall dielectric coefficient
more expensive than the electroless/immersion processes.
Where contact pads are required for edge connectors or spring-loaded contacts, hard gold can be selective plated with a nickel
under layer to provide a more durable surface.

Summary
Many traps wait to ensnare the microwave board designer, and we’ve toured a selection of them in this paper. While circuit
modeling tools have improved greatly in recent years, they generally do not account for all of the practicalities involved with thesuccessful execution of a board from concept to physical reality. We examined each stage of board production starting with thebase laminate and building from there. Many issues relate to choice of materials, and how they react during processing steps –the chemistry and physics – which will impact the performance of the final product, the cost of producing it, or its subsequentreliability. Many issues become tradeoffs rather than black and white, right or wrong answers, and a strong partnership between
designer and manufacturer can help find the right balance.

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TDE Application Note

Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Time

About Teledyne Labtech
Teledyne Labtech specializes in the more challenging projects, with extensive experience in large and complex microwave
circuits with applications ranging from commercial in-flight entertainment antennas to ultra-high performance military T/Rmodules. We are experts where size/weight and power are critical parameters, including where thermal management is key.
With over 30 years of experience, we offer practical advice to get your project into production with the minimum of bumps
along the way. For more information visit: https://www.teledynedefenseelectronics.com/labtech/

About the Authors

John Priday, Chief Technical
Officer of Teledyne Labtech,developed Labtech’s
microelectronic assembly (chipand wire) facility and oversees all
microwave testing services. He
started his career with Marconi
Radar before moving the Marconi
Research Centre in Great Baddow.

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John Leafe is Labtech’s CAM
Manager and leads the New
Product Introduction team; in his
spare time he likes to participate
in sporting activities, and his latest
craze is mountain running.

TDE Application Note

Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Time

Appendix 1: Common Microwave Materials
The table shows some common example microwave PCB materials, ordered in increasing value of the dielectric
constant, Dk.

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Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Time

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Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Time

[1]
[6]

Varies with thickness [2] Thicknesses over copper [3] Thicknesses over dielectric [4] Requires solvent based processing [5] Tested at 3 GHz
Values shown measured at 10GHz [7] Values shown measured at 1MHz [8] Tested at 1.90GHz

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Designing Microwave PCBs for Successful Manufacture – Getting it Right the First Time

Teledyne Labtech
A division of Teledyne UK Limited
Unit 1 Broadaxe Business Park
Presteigne, Powys LD8 2UH UK
Tel: +44 (0) 1544 260093
Fax: +44 (0) 1544 260310
www.teledynelabtech.com
labtechsales@teledyne.com
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