IEICE TRANS. ELECTRON., VOL.E88–C, NO.7 JULY 2005

1368

PAPER

Special Section on Recent Technologies of Microwave and Millimeter-Wave Devices

Electrically Small Antennas with Miniaturized ImpedanceMatching Circuits for Semiconductor Amplifiers
Keiji YOSHIDA†a) , Member, Yukako TSUTSUMI† , Student Member, and Haruichi KANAYA† , Member

SUMMARY
In order to reduce the size of a wireless system, we propose a design theory for the broadband impedance matching circuit whichconnects an electrically small antenna (ESA) to a semiconductor amplifier.
We confirmed its validity for the case of connection between a small slot
loop antenna with a small radiation resistance of Ra = 0.776 Ω and a semiconductor amplifier with high input impedance of ZL = 321 − j871 Ω withthe aid of the simulations by the electrical circuits using transmission lines
as well as the electromagnetic field (EM field) simulator. We also madeexperiments on this antenna with matching circuits using high temperature
superconductor YBCO thin films on MgO substrates.
key words: RF front-end, miniaturized matching circuit, electrically small
antenna, semiconductor amplifier, coplanar waveguide1.

Introduction

In recent years, the miniaturization of antennas is essential in radio communication devices such as wireless LAN,
RF-ID and MIMO since the size of the antenna often determines the whole size of the wireless system [1]–[3]. Studies
are also made of an electrically small antenna (ESA), i.e.,
the antenna whose dimension is much smaller than a wavelength, towards further reduction of the antenna size [4]. It
is widely known, however, that in order to realize the miniaturized antenna we must simultaneously realize a broadband
impedance matching circuit which compensates the narrow
bandwidth peculiar to the small antenna with low radiation resistance [5]–[8], and that we must also attain large
impedance-matching ratios to connect with semiconductor
amplifiers with high internal impedances.
In this paper we propose a general design theory forthe broadband impedance matching circuit which connects asmall antenna to a semiconductor amplifier. It is shown thatthe proposed matching circuits have performances similar to
those of the n-pole bandpass filter (BPF) [9]. By using thequarter wavelength transmission line and L-type J-inverter,
we can reduce the total antenna size more than the previous
works. Theoretical performances of the slot loop antenna
with the impedance matching circuit which is designed by
the present theory are studied by the electrical circuits using transmission lines (Transmission Line Model) as wellas the EM field simulator. In order to demonstrate the theory, we also carried out experiments on the rectangular slot
Manuscript received October 29, 2004.
Manuscript revised January 12, 2005.
†
The authors are with the Department of Electronics, Graduate
School of Information Science and Electrical Engineering, Kyushu
University, Fukuoka-shi, 812-8581 Japan.
a) E-mail: yoshida@ed.kyushu-u.ac.jp
DOI: 10.1093/ietele/e88–c.7.1368

loop antenna, which has the area of 4 mm × 4 mm, with theprototype matching circuits with pole numbers of n = 1 andn = 2 using high temperature superconductors YBCO on
15 mm × 15 mm MgO substrates in the 2.4 GHz band.
2.

Design Formulas for Impedance Matching Circuits
between ESA and Semiconductor Amplifiers

Figure 1 shows the block diagram of the RF front-end ofa typical wireless system, which consists of an antenna, adiode switch, semiconductor amplifiers, i.e., a low noise amplifier (LNA) and a power amplifier (PA), and bandpass filters (BPF) between them, where impedance matching mustbe attained between the antenna and amplifiers via BPF.
The present design formulas for the impedance matching are derived from the conventional design theory for npole Chebyshev BPF consisting of parallel resonators andJ-inverters [9], and it acts as impedance matching circuit aswell as BPF.
In Figs. 2(a) and 2(b), we show equivalent circuits ofthe proposed matching circuits, corresponding to the casesof n = 1 and n  2, respectively. In order to miniaturize the matching circuit we connect the quarter-wavelength
impedance transformer with ESA which has low internal
impedance Za , and we directly connect L-type J-inverter to
LNA or PA with high input or output impedance. In thepresent design theory, we employed only J-inverters, instead of using K-inverters, to avoid the degradation of performances resulting from losses in inverters.
2.1 Matching Circuit with n = 1
Figure 2(a) shows the equivalent circuit for the smallest
matching circuit, corresponding to BPF with n = 1. In thisfigure, Za denotes the internal impedance of ESA and YL

Fig. 1

Block diagram of RF front-end of a typical wireless system.

c 2005 The Institute of Electronics, Information and Communication Engineers
Copyright YOSHIDA et al.: ELECTRICALLY SMALL ANTENNAS WITH MATCHING CIRCUITS FOR AMPLIFIERS

1369

Fig. 2 Impedance matching circuits between ESA and LNA or PA, which have characteristics of BPF
in the cases of n = 1 (a) and n  2 (b).

represents the input admittance of LNA or the output admittance of PA, which are assumed to be given by,
Za = Ra + jXa ,YL = G L + jBL ,

(1)
(2)

where Ra represents radiation resistance and Xa is the reactance of the antenna, which is assumed to be in series resonance in the vicinity of the resonant frequency ω0 , i.e.,ωω0Xa = xa
−
,
(3)
ω0
ω
with,


ω0 ∂Xa ,
xa =2 ∂ω ω=ω0

to a design value:b1 + xa /Z12

= Qe1 ,Ra /Z12
g0 g1
,
Qe1 =
w

where xa is the reactance slope parameter. In Fig. 2(a), Z1 isthe characteristic impedance of the quarter-wavelength resonator, Cm is the coupling capacitor and −C  denotes thevirtual capacitor with negative value of capacitance, which
can be approximately realized by contraction of the lengthof an open-ended resonator [5], [9]. The two capacitors Cmand −C  act as L-type J-inverter.
In the case that the antenna impedance is suﬃciently
low, i.e., |Za |  Z0 (= 50 Ω), which is often the case of
ESA, it is shown that the input admittance Y1 seen from theright side of the port A-A is represented near ω = ω0 by,


ω
Za
ω0

,
(5)
−
Y1 = 2 + jb1
ω0
ω
Z1
π 1
,
4 Z1

4
Ra (Qe1 − Qa ) ,
π

(9)

xa
,
Ra

(10)

with,
Qa =

where Qa represents the unloaded Q of the antenna.
The input admittance Y2 seen from the left side of theport A-A is given by,
Y2 = − jωC  +

1
.
1
1
+
jωCm YL(11)

The values for capacitors Cm and −C  can be determinedfrom another condition for the external Q at the output port
at ω = ω0 :

with,
b1 =

(8)

where Qe1 is the design value of the external Q of the input
port, g0 and g1 are the normalized filter elements, w is thenormalized bandwidth [9].
Equations (6) and (7) give the expression for the design
value of Z1 :
Z1 =

(4)

(7)

b1 + xa /Z12

= Qe2 ,Y  

(12)

g1 g2
,
w

(13)

2 ω=ω0(6)

where b1 is the susceptance slope parameter of the quarterwavelength resonator [5], [9]. The characteristic impedanceZ1 must be determined to set the external quality factor (Q)

with,
Qe2 =

where Qe2 is the design value for the external Q of the output

IEICE TRANS. ELECTRON., VOL.E88–C, NO.7 JULY 2005

1370

Fig. 3 Frequency dependence of the output impedance Zout (a) and input
impedance Zin (b).

Fig. 4 Frequency dependences of the eﬀective reflection coeﬃcients Γe1(a) and Γe2 (b).

end.
Equations (11) and (12) give the expressions for Cmand −C  as,





GL
ω0 C m =βγ1 + γ1 1 + β2 − γ1 ,(14)
1 − γ1

Cm G2L + B2L + ω0Cm BL,(15)−C = −
G2L + (BL + ω0Cm )2
with,
BL
,
GL
b1
γ1 =
,
G L Qe2xab1.
b1 = b1 + 2 =1 − Qa /Qe1
Z1
β=

(16)
(17)
(18)

It is noted that the capacitor with negative value −C  [F]can be realized by the contraction of the length of the open
ended portion of the quarter-wavelength resonator by∆l = −

C
[m],
C

(19)

where C [F/m] is the capacitance of the transmission line
per unit length. It must be mentioned that from Eqs. (18)and (25) the applicable range of the present theory is limited
to the case of Qa < Qe1 , γ < 1, and also that Q of thetransmission line resonator must be larger than Qe1 in order
to avoid performance degradation.
In Figs. 3(a) and 3(b), we compare the theoretical values of output impedance Zout seen at port B-B and input impedance seen at port C-C , which were calculated
by using the obtained design formulas (Transmission Line
Model) and EM field simulator (Agilent: Momentum). In
the calculations with transmission line model, we assumed
the following values: f0 = ω0 /2π = 2.45 GHz, w = 3%, Z1 =50.6 Ω, Ra = 0.776 Ω, xa = 13.9 Ω, YL = 0.373 + j1.01 mS,
corresponding to ZL = 1/YL = 321 − j871 Ω [7]. A good
agreement was obtained between the two results.
Figures 4(a) and 4(b) show the eﬀective reflection coefficients Γe1 and Γe2 seen at port C-C and port B-B , respectively, where Γe1 and Γe2 express the degree of impedance
matching between a signal source and a load. They are defined by [9],

YOSHIDA et al.: ELECTRICALLY SMALL ANTENNAS WITH MATCHING CIRCUITS FOR AMPLIFIERS

1371

Zin − Za∗,
Zin + Za
Zout − ZL∗Γe2 =.
Zout + ZL

Γe1 =

(20)
(21)

In the figures, both the results by EM simulation and thoseby transmission line model are plotted. The good agreement between the two indicates the validity of the proposed
design formulas.
2.2 Matching Circuits with n  2
The equivalent circuit for the n-pole matching circuit (n  2)
is shown in Fig. 2. The design formulas can be similarly
obtained as,
Z1 =4
Ra (Qe1 − Qa ) ,π(22)b1 b2
,
g1 g2

(23)


J1,2
=w

bi bi+1(i = 2, 3, 4, . . . , n − 1),gi gi+1





GL
2
ω0 C m =βγn + γn 1 + β − γn ,1 − γn
Cm G2L + B2L + ω0Cm BL,−C  = −G2L + (BL + ω0Cm )2
Ji,i+1 = w

Fig. 5

Layout of slot loop antenna.

(24)
(25)
(26)
Fig. 6Loop size dependence of Ra and xa .

with,π(i = 2, 3, 4, . . . , n),
2Zi
bn
γn =
,
G L Qe2gn gn+1
Qe2 =
,
w
bi =

(27)
(28)
(29)

where Zi (i = 1, 2, 3, . . . , n) is a characteristic impedance ofthe transmission line, and b1 is given by Eq. (18).
The obtained formulas for the impedance matching circuit are shown to simulate the frequency characteristics ofthe n-pole BPF [9], where the normalized bandwidth w canbe designed for a given pass-band insertion loss ripple, i.e.,the minimum return loss in the pass-band. This means thatthe bandwidth of ESA can be increased by using devices
with n  2.
3.

Design of ESA

3.1 Slot Loop Antenna
The structure of the proposed electrically small slot loop antenna is shown Fig. 5. The total length of the slot loop including feed line is half-wavelength. However, by expanding the length of the feed line we can considerably reduce
the area of the antenna, leading to ESA. The backend of theloop is the voltage short-end, thereby the whole operates as

an in-series resonator.
As shown in Fig. 6, the radiation resistance (Ra ) and thereactance slope parameter (xa ) of the slot loop antenna aredependent on both the area of the loop and the slot width.
In order to realize ESA, the value of L (= W) is set to be
4.0 mm. Since a wavelength is about λ = 59 mm in this case,the total length of the portion of the antenna, that contributes
radiation, is reduced to 0.32λ. The frequency dependence of
the input impedance of the slot loop antenna (Za ) is shown in
Fig. 7. Thereby, Ra = 0.776 Ω and xa = 13.9 Ω are obtained
for the gap spacing s = 15.5 µm.
3.2 Slot Loop Antenna with Matching Circuits
Figures 8(a) and 8(b) show the EM field simulation layoutsof the slot loop antennas and matching circuits with pole
numbers of n = 1 and n = 2, respectively. Their design values are f0 = ω0 /2π = 2.45 GHz, Ra = 0.776 Ω, xa = 13.9 Ω
and ZL = Z0 = 50 Ω. In the case of n = 1, the designed
return loss (RL) and bandwidth (w) are −3 dB and 4%, respectively. On the other hand, in the case of n = 2, RL
and w are −10 dB and 3%, respectively. The 1-pole matching circuit has a quarter-wavelength transmission line anda J-inverter, and the 2-pole matching circuit has a quarterwavelength, a half-wavelength transmission line resonatorand two J-inverters. J-inverters consist of interdigital gaps,

IEICE TRANS. ELECTRON., VOL.E88–C, NO.7 JULY 2005

1372

Fig. 7 Antenna impedance of the slot loop antenna (parameters: L = W= 4.0 mm, s = 15.5 µm).

Fig. 9 Simulation results of the frequency dependences of return loss inthe cases of n = 1 (a) and n = 2 (b).

Fig. 8 Layouts and design values of the slot loop antenna with matchingcircuits in the cases of n = 1, return loss (RL) = −3 dB, w = 4% (a) and n =2, RL = −10 dB, w = 3% (b).

and in-series resonators consist of meandering CPW. Dueto meandering CPW the total size is kept small even if thenumber of poles increases.
Figures 9(a) and 9(b) show the frequency dependencesof return loss which were calculated by EM field simulator
in the cases of n = 1 and n = 2, respectively. These results of simulation are in full agreement with transmission
line model results. The desirable bandwidths are obtained,
and good impedance matches with feed line are attained in
the pass-bands. It is noted that we attained large impedance
matching ratio of Z0 /Ra = 64 in this case.
In Fig. 10, the normalized radiation pattern at 2.45 GHz

Fig. 10

Directivity pattern of the slot loop antenna.

YOSHIDA et al.: ELECTRICALLY SMALL ANTENNAS WITH MATCHING CIRCUITS FOR AMPLIFIERS

1373

Fig. 11

Magnetic current of the slot loop antenna.

in the case of n = 2 is shown. This directivity pattern looks
like that of a dipole antenna, since the maximum magnetic
current at the backend of a loop portion mainly radiates (seeFig. 11). The same result was also obtained in the case of n
= 1.
4.

Experimental Results

In order to demonstrate the validity of the present theory,
we fabricated the slot loop antennas with matching circuits
shown in Figs. 8(a) and 8(b) using high temperature superconductor YBCO thin films on MgO substrates whose size
is 15 mm × 15 mm. The patterning of the device structure
was made by wet etching process and experiments were carried out in a vacuum chamber with refrigerator cooling system.
Figures 12(a) and 12(b) show the experimental resultsof S -parameter that were measured with vector network analyzer (HP-8722C) by using CPW probes. In the figures,the results of the transmission line model are also plottedfor discussion. It must be mentioned that the calculated results were obtained by Eqs. (14) and (15) with G L = 1/50 S,
BL = 0 S, corresponding to ZL = 50 Ω, and also that we neglected the conductor loss in the simulations. In the caseof n = 1 (Fig. 12(a)) return loss is reduced to −28.9 dB at
2.37 GHz and impedance matching is achieved. Where, inthe case of n = 2 (Fig. 12(b)) desirable fractional bandwidth
and two peaks that are characteristic of 2-pole filter are observed. The experimental results are not fully in agreementwith the simulation result due to the over-etching and theresidual loss from the connection of the probe. As shownin Figs. 12(a) and 12(b), the observed center frequencies are
shifted to the lower frequency. Their cause seems to be theinfluence of the kinetic inductance of superconductors [6],[7]. In Figs. 12(a) and 12(b), we added theoretical curves
taking account of the apparent increase of the transmission

Fig. 12 Experimental results of the frequency dependences of return loss
in the cases of n = 1 (a) and n = 2 (b).

line inductance L due to the kinetic inductance of superconductors.
5.

Conclusion

We proposed a design theory for the broadband impedance
matching circuit that directly connects a small antenna toa semiconductor amplifier and demonstrated its validity byboth simulation and experiment. The impedance of the electrically small slot loop antenna of Ra = 0.776 Ω was matchedto that of a semiconductor amplifier of ZL = 321 − j871 Ω
by using proposed design formulas. We also fabricated andtested the YBCO slot loop antennas connected to matchingcircuits with pole number of both n = 1 and n = 2.
The implementation of the proposed miniaturized antenna onto Si substrate aiming at LSI applications is inprogress.
Acknowledgments
This work was partly supported by a Grant-in-Aid for Sci-

IEICE TRANS. ELECTRON., VOL.E88–C, NO.7 JULY 2005

1374

entific Research (B) from the Japan Society for the Promotion of Science (JSPS). This work was partly supported
by a grant of Fukuoka project in the Cooperative Link of
Unique Science and Technology for Economy Revitalization (CLUSTER) of Ministry of Education, Culture, Sports,
Science and Technology (MEXT).

Yukako Tsutsumi
was born in Nagasaki,
Japan, in 1980. She received the B.E. (Electronics) degree from Kyushu University in 2003.
Currently she is an M.E. student of the Department of Electronics, Graduate School of Information Science and Electrical Engineering,
Kyushu University. She is engaged in the EM
simulation study of microwave planar devices.

References[1] K. Li, C.H. Cheng, K.F. Tong, T. Matsui, and M. Izutsu, “Millimeterwave coplanar patch and array antennas,” Proc. APMC 2002,
pp.833–836, Nov. 2002.
[2] S.C. Gao, L.W. Li, M.S. Leong, and T.S. Yeo, “Dual-polarized slotcoupled planar antenna with wide bandwidth,” IEEE Trans. Antennas Propag., vol.51, no.3, pp.421–429, March 2003.
[3] M.S.A. Salameh, Y.M.M. Antar, and G. Seguin, “Coplanarwaveguide-fed slot-coupled rectangular dielectric resonator antenna,” IEEE Trans. Antennas Propag., vol.50, no.10, pp.1415–
1419, Oct. 2002.
[4] R. Azadegan and K. Sarabandi, “A novel approach for miniaturization of slot antennas,” IEEE Trans. Antennas Propag., vol.51, no.3,
pp.421–429, March 2003.
[5] K. Yoshida, T. Takahashi, H. Kanaya, T. Uchiyama, and Z. Wang,“Superconducting slot antenna with broadband impedance matchingcircuit,” IEEE Trans. Appl. Supercond., vol.11, no.1, pp.103–106,
March 2001.
[6] H. Kanaya, Y. Koga, J. Fujiyama, G. Urakawa, and K. Yoshida, “Design and performance of high T c superconducting coplanar waveguide matching circuit for RF-CMOS LNA,” IEICE Trans. Electron., vol.E86-C, no.1, pp.37–41, Jan. 2003.
[7] H. Kanaya, Y. Koga, G. Urakawa, and K. Yoshida, “Design of HTS
coplanar waveguide matching circuit for low noise CMOS-HTS receiver,” IEEE Trans. Appl. Supercond., vol.13, no.2, pp.1031–1034,
June 2003.
[8] H. Kanaya, G. Urakawa, Y. Tsutsumi, T. Nakamura, and K. Yoshida,“High temperature superconducting slot array antenna connectedwith low noise amplifier,” Proc. Eucas 2003, pp.2782–2787, 2003.
[9] G.L. Matthaei, L. Young, and E.M.T. Jones, Microwave Filters,
Impedance-Matching Networks, and Coupling Structures, Artech
House, Norwood, MA, 1980.

Keiji Yoshida
was born in Fukuoka, Japan,
in 1948. He received the B.E., M.E. and
Dr. Eng. Degrees from Kyushu University in
1971, 1973 and 1978, respectively. He is currently engaged in the study of applications of superconducting thin films to microwave and optical devices and design of RF-LSI chips for
SoC, as a Professor in the Department of Electronics, Graduate School of Information Scienceand Electrical Engineering, Kyushu University.
Dr. Yoshida is a member of the Japan Society ofApplied Physics.

Haruichi Kanaya
was born in Yamaguchi,
Japan, in 1967. He received the B.S. (Physics)
degree from Yamaguchi University in 1990, andthe M.E. (Applied Physics) and Dr. Eng. degrees
from Kyushu University in 1992 and 1994, respectively. In 1994, he became a Research Fellow (PD) of the Japan Society for the Promotion of Science. He is currently engaged in the
study and design of RF CMOS System LSI and
superconducting microwave devices, as an Associate Professor in the Department of Electronics, Graduate School of Information Science and Electrical Engineering,
and also System LSI Research center, Kyushu University. Dr. Kanaya is amember of the Institute of Electrical and Electronics Engineers (IEEE).