AN-1458
APPLICATION NOTEOne Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com

Isolated RS-485 Repeater with Automatic Direction Control
by Richard Anslow and Jie ChenINTRODUCTION
TIA/EIA-485, also known as RS-485, is the most widely usedbalanced transmission standard. Its differential signals and wide
common-mode voltage range establish a robust approach forlong distance communication. However, when the RS-485 systemruns for over 1200 meters, signal attenuation and ground potential
differences make the data transmission unreliable. Figure 1 shows asignal and power isolated RS-485 repeater circuit, which addresses
the problems of signal attenuation, electrical noise, and ground
potential differences on a long cable network. The RS-485 repeater
circuit in Figure 1 includes an Analog Devices, Inc., iCoupler®
signal and power isolated ADM2587E RS-485 transceiver. The
ADM2587E is certified by UL 1577 with a 2.5 kVrms withstandvoltage, offering high voltage transient protection for the RS-485
network. The circuit shown in Figure 1 solves the problem of RS485 signal attenuation by boosting the signal at the output of therepeater circuit.

An RS-485 repeater requires flow control, which is essential forcontrolling the direction of communication on the RS-485 bus.
Using the ADCMP600 high speed, complementary metal oxide
semiconductor (CMOS) comparator allows high speed flow
control and directionality, which results in a reliable communication system. A half-duplex RS-485 network allows datatransmission in both directions on only two wires. This applicationnote discusses two ways to implement an automatic direction
control RS-485 repeater, as well as the advantages anddisadvantages of each method.
Galvanic isolation is ignored for simplicity when describing theflow of operation in the Automatic Direction Control section.
Galvanic isolation is both required and essential for operationof the RS-485 repeater circuit shown in Figure 1. Non-isolated
RS-485 repeaters are vulnerable to large ground potential
differences. It is necessary to isolate at each repeater to reduce
the failure risk of the whole system. By using a fully integrated
signal and power isolated RS-485 transceiver, the ADM2587E, asimple design of a dual isolated RS-485 repeater is described inthis application note.

ISOLATIONISOLATIONBARRIERBARRIER
ADM2587E SIGNAL AND POWER
ISOLATED RS-485 TRANSCEIVER

D

A

A

A

DE
DI

RO

R

R

RE

RT

RT

B

B

FLOW CONTROLLOGIC CIRCUITUSING ADCMP600

A
RT

B

B

GND

B
A

B

A

D

RO RE DE DI

GND

R

DI

GND

A

D

GND2
GND2

GND2

D

R

DI DE RE RO

RO RE DE DI

1200m CABLE LENGTH WITH
256 RS-485 TRANSCEIVERS

B

A

D

B
GND2

R

RE
DE

RT

SIGNAL AND POWER ISOLATED
RS-485 REPEATER EXTENDSCABLE LENGTH AND PROVIDESROBUSTNESS FOR FIELD BUS
APPLICATIONS

GND

D

R

DI DE RE RO

1200m CABLE LENGTH WITH
256 RS-485 TRANSCEIVERS

Figure 1. Signal and Power Isolated RS-485 Repeater Extends Cable Length and Provides Robustness for Field Bus Applications

Rev. 0 | Page 1 of 8

15726-001

ROAN-1458

Application Note

TABLE OF CONTENTS
Introduction ...................................................................................... 1

Circuits Implementation ..................................................................6

Revision History ............................................................................... 2

RS-485 Transceiver........................................................................6

Typical Application........................................................................... 3

Schmitt Trigger ..............................................................................6

Automatic Direction Control .......................................................... 4

Delay Circuit ..................................................................................7

Byte-Timing Direction Control .................................................. 4

Experiment Result .........................................................................7

Bit-Timing Direction Control .................................................... 5

References.......................................................................................8

Fail-Safe Receiver.......................................................................... 5

REVISION HISTORY
9/2017—Revision 0: Initial Version

Rev. 0 | Page 2 of 8

Application Note

AN-1458

TYPICAL APPLICATION
RS-485 transceivers are designed for operation over long distances,
but they can only operate over long distances at low data rates. A
low data rate for RS-485 applications is 10 kbps. To operate at
higher data rates over longer distances (for example, 50 Mbps over
100 meters), or at lower data rates over much longer distances (forexample, 10 kbps over 1200 meters), the isolated RS-485 repeater is
an ideal solution for industrial automation networks, including
programmable logic controllers (PLCs) and robots.
RS-485 networks are commonly used for communication
between the elevator host controller (EHC) and individual
elevator control modules (ECMs) in building technologies.
With cables in motion, and large motors and inductors inproximity, rugged communication systems are required. The
isolated RS-485 repeater provides improved communication
reliability in these harsh environments.

For existing installations of solar inverters, which do notinclude iCoupler isolation robustness on the communications
port, the isolated RS-485 repeater is a powerful drop-in
solution. The compact, isolated RS-485 repeater delivers robust
isolation protection against electrical noise in electromagnetic
capability (EMC), harsh solar environments.
For energy metering (E-metering) applications, the isolated
RS-485 repeater can be used for reinforced isolation protection
at the communications interface, providing user safety
protection from the high voltages and currents measured fromthe single-phase or 3-phase E-metering system

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AN-1458

Application Note

AUTOMATIC DIRECTION CONTROL
Consider a typical, half-duplex RS-485 bus as shown in Figure 1.
The 2-wire multipoint network allows data transmission in both
directions, but only in one direction at a time. The repeater
must be able to sense on which side the signal is coming in andmust be able to send it out on the other side. Two physical layer
direction control methods are described in the Byte Timing
Direction Control section and the Bit Timing Direction Control
section; software control, which takes more design effort andcan be customized to a certain PLC system, is beyond the scopeof this application note. Galvanic isolation is ignored forsimplicity when describing the flow of operation in the Byte
Timing Direction Control section and the Bit Timing Direction
Control section.

BYTE TIMING DIRECTION CONTROLIn byte timing direction control, when data arrives on one sideof the repeater, the receiver output (RO) triggers a one-shot
pulse, which in turn enables the driver on the other side, as
shown in Figure 2. The pulse must sustain long enough to allow
the driver to transmit the entire data packet.
This straightforward solution can be implemented simply bychoosing a configurable one-shot pulse generator, such as
LTC6993-3 from Analog Devices. In bus idle status, bothtransceivers are held in receive mode by a fail-safe highcondition. When data is present on the RS-485 A and B bus
pins, the first corresponding falling edge on the receiver output(RO) pin triggers a one shot pulse. The pulse width must be set inadvance by connecting the proper value of resistors to LT6993-3. In
this manner, the repeater is not expected to function if the data ratechanges during communications. The data rate is fixed for byte
timing direction control.

HALF-DUPLEX RS-485 TRANSCEIVER,
OR FULL DUPLEX RS-485 TRANSCEIVER
WITH EXTERNAL A TO Y PIN AND
B TO Z PIN CONNECTIONS.

D

DI

DE

A

RE

B

RO

RE

TRIG
OUT

R

OUT

B

DE
B

TRIG

R

DI

RO

D

Figure 2. Simplified Half-Duplex Byte Timing Direction Control Block Diagram

Rev. 0 | Page 4 of 8

15726-002

HALF-DUPLEX RS-485 TRANSCEIVER,
OR FULL DUPLEX RS-485 TRANSCEIVER
WITH EXTERNAL A TO Y PIN AND
B TO Z PIN CONNECTIONS.

Application Note

AN-1458
HALF-DUPLEX RS-485 TRANSCEIVER,
OR FULL DUPLEX RS-485 TRANSCEIVER
WITH EXTERNAL A TO Y PIN AND
B TO Z PIN CONNECTIONS.

HALF-DUPLEX RS-485 TRANSCEIVER,
OR FULL DUPLEX RS-485 TRANSCEIVER
WITH EXTERNAL A TO Y PIN AND
B TO Z PIN CONNECTIONS.

B
B

R

DI

RO

DE

RE

RE

DE

RO

DI

R

A
B

D

15726-003

D

Figure 3. Simplified Half-Duplex Bit Timing Direction Control Block Diagram

BIT TIMING DIRECTION CONTROLFAIL-SAFE RECEIVER

By replacing the one-shot generators with Schmitt triggers, amore flexible direction control is presented in Figure 3. Insteadof enabling the driver when the data packet transmits, theSchmitt trigger enables or disables the driver on a bit basis. The
bit timing direction control method is independent of the bit
speed on the RS-485 bus.

The fail-safe function is critical to both direction control
methods (see Figure 4), whereas Figure 1 shows a RS-485
network without any fail-safe biasing resistors. Modern RS-485
transceivers have a true fail-safe feature, offering a logic highreceiver output feature for bus idle conditions.

0.4

STANDARD
RS-485 RECEIVEROUTPUT LOGIC

FAIL-SAFE
RS-485 RECEIVEROUTPUT LOGIC

LOGIC 1LOGIC 1

0.2
UNDEFINED
0–0.03
UNDEFINEDUNDEFINEDLOGIC 0LOGIC 0

–0.2

–0.4

Figure 4. Fail-Safe ReceiverRev. 0 | Page 5 of 8

15726-004

RECEIVER DIFFERENTIAL INPUT VOLTAGE, VID (V)Similar to byte timing direction control, with bit timing
direction control, both RS-485 transceivers are held in receive
mode when the RS-485 bus is in idle state. On the very first
logic low bit when data is present on the RS-485 A and B bus
pins on one side of the repeater, the RO changes from high to
low and the output of the Schmitt trigger changes from low tohigh. The ADCMP600 is used as a Schmitt trigger in Figure 3.
Subsequently, a logic high bit is present on the RO pin, therising edge of the high bit switches the trigger output of the
ADCMP600 again, and the driver is disabled. A logic highstatus transmits on the other side of the repeater as theequivalent of bus idle status, which is realized by the RS-485
transceiver fail-safe function. A data rate independent RS-485
repeater design may have interlocking errors, which can happen
during low to high data transitions. Because some RS-485
drivers have longer propagation delays than the receiver, aninterlocking occurs when both drivers are enabled, which
requires a built in delay mechanism to avoid this situation.

As shown in Figure 4, the standard RS-485 receiver output isundefined when the differential voltage on the bus is within the±200 mV range. One way to implement a fail-safe highcondition is to use biasing resistors, which set the receiver
output high as long as they keep the differential bus voltage
higher than 200 mV during the bus idle condition. However,the biasing resistors are also common-mode loads to the bus,
thereby reducing the bus nodes significantly. On the other
hand, the true fail-safe receiver shifts the positive thresholdfrom +200 mV to −30 mV, resulting in the receiver output being
high even if the differential voltage on the bus equals zero.

AN-1458

Application Note

CIRCUIT IMPLEMENTATION
To build a bit timing direction control RS-485 repeater, consider
three separate subfunction blocks: the RS-485 transceiver, a Schmitt
trigger, and a delay circuit.

The hysteresis voltage is essentially the difference between VTH and
VTL, which ensures the noise transient does not result in false
triggering.

RS-485 TRANSCEIVERIn Figure 1, the RS-485 repeater operates with 5 V single supply(VCC). The hysteresis voltage is set to 1.2 V (VTH = 2.4 V, VTL =1.2 V). More information on the VOH and VOL voltages can be foundin the ADCMP600 data sheet. Under the given conditions, theresistor values can be calculated through the following equations:

The ADM2587E, shown in Figure 6, is a fully integrated signal andpower isolated data transceiver. The RS-485 transceiver includes anintegrated, isolated dc-to-dc power supply, which makes it a perfectchoice for an isolated RS-485 repeater. Its receiver inputs haveopen- and short-circuit fail-safe features that ensure the receiver
output is high when the inputs are open or shorted. During bus idle
conditions, when no driver on the bus is enabled, the voltage acrossa terminating resistance at the receiver input decays to 0 V and thereceiver output is guaranteed to be high. The ADM2587E
eliminates the need for an external dc-to-dc isolation block andsupports up to 256 nodes on one bus with the true fail-safe
function.

VTL = (R1||R3) × VCC ÷ ((R1||R3) + R2) + (R1||R2) × VOL ÷((R1||R2) + R3)(1)
VTH = (R1||R3) × VCC ÷ ((R1||R3) + R2) + (R1||R2) × VOH ÷((R1||R2) + R3)(2)
HYSTERESIS = VTH − VTL(3)

HYSTERESIS = (R1||R2) × (VOH − VOL) ÷ ((R1||R2 + R3)

(4)

VCC

SCHMITT TRIGGER
R2

Figure 5 shows an inverting Schmitt trigger in single-supply
operation. A Schmitt trigger can be implemented by using a very
fast comparator (ADCMP600) and positive feedback networks.
The resistor divider (R2 and R1) creates a positive reference voltagethat is compared with the input.

R3

VPULL-UP
VOUT
RPULL-UP

R1
+
V+

VOL

–
VIN

Figure 5. Inverting Schmitt Trigger

VCC

VISOOUT
isoPower DC-TO-DC CONVERTERRECTIFIERVISOINREGULATORDIGITAL ISOLATION iCoupler

TRANSCEIVERY

TxD

ENCODEDECODEDZ

DE

ENCODEDECODERxD

DECODEENCODE

A
R
B

GND1

ISOLATIONBARRIER

GND 2

Figure 6. ADM2587E Functional Block Diagram
Rev. 0 | Page 6 of 8

15726-005

ADM2587E

RE

VIN
VTL

VTH

15726-006

V–

VTL is the low threshold voltage for the receiver outputs—output
low voltage (VOL)—output high voltage (VOH)—to change from low
to high. VTH is the high threshold voltage for the receiver output tochange from high to low.

OSCILLATOR

VOHApplication Note

AN-1458
Figure 9 shows the numbers, 1 through 4, that correspond to
the similarly numbered waveforms shown in Figure 7 andFigure 8. For example, in Figure 8, Waveform 3 is the Schmitt
trigger output, and Figure 9 shows the corresponding locationin the circuit with the number 3 circled in black.

DELAY CIRCUIT
The maximum propagation delay of the ADM2587E driver is
700 ns while the delay of the receiver is around 90 ns, typically.
This timing difference can cause an unwanted logic low on thereceiver output (RO). To avoid an unwanted logic low, a low tohigh delay circuit implements before the Schmitt trigger, as
shown in Figure 9.

1

When RO1 becomes high, C1 through RD1 slowly charges from0 to VTH. Ensure the delay time is longer than the low to highpropagation delay, tPLH, of the driver. For a given C1, the value ofRD1 can be calculated by the following:2  t PLH V 
C1  ln 1  TH  VCC 3

EXPERIMENT RESULTCH1 2.0V BW CH2 5.0V BW
CH3 5.0V BW CH4 5.0V BW

The ADM2587E bus pins, A, B, Y, and Z, are connected
together for half-duplex mode. For half-duplex operation, Aconnects to Y and B connects to Z. Figure 7 shows test resultsfrom the RS-485 repeater discussed throughout this applicationnote. The data rate runs at 40 kbps, Channel 1 represents thedifferential input signal, and Channel 2 measures thedifferential output signal. The delay circuit causes the pulse at
the rising edge of the output signal, then the differential voltage(VOD) returns to 0 V. For the fail-safe receiver on the bus, thereceiver can interpret the pulse and 0 V VOD as logic high;otherwise biasing resistors are required.

2

3

4

CH1 2.0V BW CH2 5.0V BW
CH3 5.0V BW CH4 5.0V BW

VCC

RO2

DI1

B
R1

RO1

R2

DD2
RE2

VCC

RD2

RD1

3

2

A
4

DE2
B

DD1

C1

DI2

Figure 9. Half-Duplex Bit-Timing Direction Control with Delay Circuit

Rev. 0 | Page 7 of 8

D215726-007

RE1

A CH1

HALF-DUPLEX RS-485 TRANSCEIVER,
OR FULL DUPLEX RS-485 TRANSCEIVER
WITH EXTERNAL A TO Y PIN AND
B TO Z PIN CONNECTIONS.

DE1

A

M20.0µs

0.0V

Figure 8. Isolated RS-485 Repeater Low to High Waveform

HALF-DUPLEX RS-485 TRANSCEIVER,
OR FULL DUPLEX RS-485 TRANSCEIVER
WITH EXTERNAL A TO Y PIN AND
B TO Z PIN CONNECTIONS.

1

0.0V

1

Figure 9 shows a half-duplex bit timing direction control withdelay circuit. A full duplex, isolated RS-485 transceiver can also
be used with the A pin connected to the Y pin, and the Z pin
connected to the B pin, creating a half-duplex external bus
connection. The ADM2587E is the recommended RS-485
transceiver.

C2

A CH1

Figure 7. Isolated RS-485 Repeater Running at 40 kbps Data Rate

Figure 8 shows the charging slope of the delay circuit, which
determines when the Schmitt trigger changes its output fromhigh to low. In an opposite transition status, a fast recover diodedischarges C1 rapidly, resulting in no delay. This design is tested
to support an up to 500 kbps data rate.

D1

M20.0µs

15726-008

415726-009

RD 1 

2

AN-1458

Application Note

REFERENCES
Marais, Hein. AN-960 Application Note, RS-485/RS-422 Circuit
Implementation Guide, Analog Devices. 2008.
Moghimi, Reza. Curing Comparator Instability with Hysteresis,
Analog Devices. 2000.

©2017 Analog Devices, Inc. All rights reserved. Trademarks andregistered trademarks are the property of their respective owners.
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