SUCCESS STORY

Synopsys and XConn

XConn Achieves First-Pass Silicon Success for CXL Switch SoC withSynopsys CXL and PCI Express IP Products“ After evaluating other IP, we selected Synopsys’ CXL 2.0 Controller and PCIe 5.0 PHY
IP because of the maturity and better performance, latency and power. Synopsys IP
gave us the best chance to minimize our overall design risk.

”~Gerry Fan, CEO, XConn

Business
XConn’s mission is to accelerate AI computing in data centers and high-performance computing (HPC) with their highperformance, power efficient, scalable, and cost-effective interconnect solutions. XConn’s XC50256 CXL 2.0 switch SoC is theworld’s first CXL switching technology for data center and memory pooling applications.

Challenges• Build world’s first CXL switch SoC with highest throughput, lowest latency, and lowest power• Achieve silicon success for switch SoC on FinFET processes while meeting timing at 1GHz)

Synopsys Solution• CXL 2.0 Controller IP• PCI Express 5.0 PHY IPBenefits• Achieved first-pass silicon success with silicon-proven CXL and PCIe IP• Delivered world’s first CXL 2.0 switch SoC with highest capacity in the market• Met critical 1GHz timing closure, latency, power and performance requirements

Overview
XConn is a leader in HPC and data center switching technologies. According to the company’s website, “AI computing and data
center architectures are undergoing a fundamental transformation of disaggregation and composability, driven by the enablementof Compute Express Link (CXL).”
XConn’s XC50256 is the world’s first CXL 2.0 switch SoC with configurable number of ports – one x16 or two x8 – and sizes
supporting up to 256 lanes, the largest capacity switching technology. The extremely low-latency, low-power SoC also supports
full PCI Express (PCIe) switch capabilities.

synopsys.com

“ As a result of this successful project and to extend our leadership, we areengaging with Synopsys on our future technology needs, including CXL 3.0 IP,
for our next CXL switch SoC.

”

~Gerry Fan, CEO, XConn
To build such high-capacity SoC, while achieving timing closure at 1GHz, XConn needed the technology and expertise of an IP
provider that offered available, feature-rich IP on their target FinFET process node. After evaluating other IP products, XConn selected
Synopsys’ CXL 2.0 Controller and PCIe 5.0 PHY IP.
“Our aim was to provide the world’s first CXL 2.0 switch SoC with the largest capacity in the market,” said Fan, CEO. “To achieve
such big task, we acquired Synopsys’ high-quality CXL and PCIe IP after evaluating other products. We felt more comfortablewith Synopsys IP because of the wide adoption, overall better performance, better latency and power, all of which led to muchless design risk.”High-Quality Synopsys IPSynopsys has been delivering high-quality IP for decades, actively participating in standards organizations to define and developinterface protocols such as PCIe and CXL. The IP supports all required features of the PCIe (1.0 to 6.0) and CXL (1.0 to 3.o)
specifications. Synopsys introduced the world’s first CXL controller, PHY and verification IP solutions, and has been the leading
provider of PCIe IP across all the generations. Due to these reasons and many more, XConn was able to achieve first-pass silicon
success and deliver their CXL 2.0 switch SoC to the market before anyone else.
XConn enjoyed valuable contributions that Synopsys IP brought to their projects, such as availability, the fact that the IP wasproven and offered advanced features such as low-latency, low-power and high-throughput. The PHY offers x1, x2, x4, x8, x16 lane
configurations supporting bifurcation, and lane margining at the receiver.
“We specifically liked the Synopsys CXL controller’s Reliability, Availability and Serviceability (RAS) feature. It gave us the assurance
we needed to maintain a high level of quality and reliability,” said Fan. The RAS data protection provides error correction code (ECC)
and/or parity protection for internal busses and memories.
“The Synopsys CXL 2.0 Controller IP supporting the PCIe 5.0 specification gave us assurance that the controller worked as intended
while successfully interoperating with the PCIe 5.0 PHY IP,” said Fan.

Expert Technical Support
XConn leveraged Synopsys’ dedicated team of engineering experts to get the required to help with the 1GHz timing closure. “We
received regular support from the Synopsys engineering team, helping us achieve our target timing closure and silicon success,” said
Fan. “Synopsys’ expert technical support helped to integrate the IP in a timely manner.”

Future Product Development
As a result of this successful project, XConn is engaging with Synopsys and discussing future technology needs, including CXL 3.0 IP,
for their next generation switch SoCs.

“ The dedicated assistance of Synopsys’ expert technical support helped us closetiming and achieve silicon success in the intended short timeframe.”~Gerry Fan, CEO, XConn©2023 Synopsys, Inc. All rights reserved. Synopsys is a trademark of Synopsys, Inc. in the United States and other countries. A list of Synopsys trademarks isavailable at http://www.synopsys.com/copyright.html . All other names mentioned herein are trademarks or registered trademarks of their respective owners.
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