DEVELOPMENT OF MicroTCA-BASED LOW-LEVEL RADIOFREQUENCY CONTROL SYSTEMS FOR CERL AND STF
F. Qiu, T. Matsumoto, S. Michizono, T. Miura
Accelerator Laboratory, KEK, Tsukuba, 305-0801 Ibaraki, Japan
Abstract
Low-level radio frequency (LLRF) control systems
based on µTCA standard have been developed forfacilities such as compact energy recovery linac (cERL)and superconducting test facility (STF) at the HighEnergy Accelerator Research Organization (KEK), Japan.
Three different types of boards were developed according
to their different applications. Experimental physics andindustrial control system (EPICS) was selected as the data
communication system for all of these µTCA boards. TheLLRF systems showed good performance during thebeam commissioning. This paper presents the current
status of the µTCA-based LLRF systems in the cERL andSTF.

baseband in the phase and quadrature components (I/Q)
are extracted from the IF signal by digital IQ detection
algorithm. The I/Q signals are fed to a rotation matrix tocompensate the loop phase. The vector-sum signal is thenobtained by calculating the superposition of all the cavitypick-up signals. After being filtered by digital low-passfilters, the I/Q components are compared with the setvalues and the I/Q errors are calculated. Then, the I/Qerrors are regulated by a proportional and integral (PI) FBcontroller. The regulated I/Q signals are added to thefeedforward (FF) models. The combined signals are fed tothe I/Q modulator by a digital to analog converter (DAC)
to modulate the RF signal from the master oscillator.
Finally, the LLRF FB loop is closed by means of a highpower source, which drives the cavities.

INTRODUCTION
The compact energy recovery linac (cERL) and thesuperconducting test facility (STF) are test facilities forthe 3-GeV ERL and international linear collider (ILC),
respectively, constructed at the High Energy Accelerator
Research Organization (KEK), Japan [1, 2]. The cERL isa 1.3-GHz superconducting radio frequency (SCRF)
machine that is operated in the continuous-wave mode.
The STF (and ILC) is also a 1.3-GHz SCRF facility but it
is operated in the pulse mode. In order to fulfil the desired
beam quality requirements, the radio frequency (RF) fieldin the RF cavity of each accelerator needs to be controlled
precisely. For cERL, the amplitude fluctuation of the RFfield should be maintained at less than 0.1% (rms) and thephase fluctuation at 0.1° (rms). The STF (or the ILC)
requires RF stabilities of 0.07% (RMS) and 0.35° (RMS)
with regard to the amplitude and phase, respectively.
Field-programmable gate array (FPGA)-based digital low
level radio frequency (LLRF) feedback (FB) systems
have been applied to stabilize the RF field [3]. The digitalplatform for the LLRF systems was realized based on themicro telecom computing architecture (µTCA) standard.
We have developed three types of µTCA board according
to their applications.
In this paper, we first introduce the digital LLRF
system, and then we present the various µTCA boards
applied in the cERL and STF. Finally, we present theperformance of the µTCA-based digital LLRF systems
during beam commissioning.

LLRF SYSTEM
Figure 1 shows the block diagram of a typical LLRF
system [3]. The RF pick-up signals from all the cavities
are down-converted to intermediate frequency (IF)signals. The IF signals are sampled in the next stage andfed to a µTCA FPGA to execute the DSP algorithms. The

Master Oscillator
I/Q Modulator

RFDACsFPGA

Baseband IQ

Pre-amplifier

FF I/QPI Control

Epics
IOC

Set I/QIIR Filter

Clock

Vector-sum ( Σ )RFSourceRotation

Gate

I
I/Q Detection

LLRF
SystemRFQ

Ethernet

ADCs

Clock
Distribution

Pf (IF) Pr (IF)Local Oscillator(LO)

Pick-up n (IF)Pick-up 2 (IF)Intermediate Frequency (IF)Pf (RF)Pr (RF)
WaveguidePick-up 2Pick-up n

Pick-up 1 (RF)
Crymodule...

Cavity #1

Cavity #2

Beam...

Figure 1: Block diagram of the LLRF system.

µTCA FPGA BOARD
The µTCA FPGA board is the key component of theLLRF system. As shown in Fig. 2, the board integrates
ADCs, DACs, an FPGA embedded with power PC (PPC),a digital I/O, and an external trigger. The cavity pick-up
signal, forward signal (Pf), reflected signal (Pr), and thereference signal are sampled by the ADCs and fed to theFPGA. The DSP algorithms for the LLRF FB control (seeFig. 1) are implemented in the FPGA. A Linux operation
system is installed in the PPC (or ARM). Experimental
physics and industrial control system (EPICS) is adopted
as the communication protocol. The detailed information
about this µTCA board can be found in [4].

were measured by the I/Q detector on the FPGA at thefirst stage. The achieved field stabilities should be further
confirmed by measuring the beam energy fluctuations..

µTCA boardµTCA FPGA board
DACs

FPGACavity

DSP algorithms

Pf

PPC(ARM)

PrRef

Linux
EPICSIOC

cERL

I
DAC
Q

Dig.
I/O

Dig.
I/OADCsFPGA(PPC)

Ethernet

ADC

Figure 2: µTCA digital board (type I).
Three types of µTCA boards were developed for thecERL and STF [5]. The µTCA.0 standard type I board
and µTCA.4 standard type II boards are mainly used for
the LLRF control systems in the cERL and STF,respectively. The main difference between the type I andtype II boards is the number of ADCs. We adopted
individual cavity control in the cERL (except for thesecond and third cavities in the injector); therefore, four
ADC channels were adequate for our LLRF system. In theSTF, we adopted vector-sum control (the vector-sum
voltages of the eight cavities were controlled by onecontroller, see Fig. 1), and accordingly more ADCs wererequired in the board. The type III board was mainly used
for the RF monitor (thus, the DAC is not necessary). The
RF signals were directly detected on the board by directsampling algorithm without down-conversion (see Fig. 7).
The board was equipped with two fast ADCs withsampling frequency up to 400 MSPS [2]. The detailed
specifications of these three types of µTCA boards arelisted in Table 1 [5].
Table 1: Specifications of the µTCA Boards
TYPE
Facilities
FunctionStandard
ADC

FPGADACCPUOS

TYPE IcERL
LLRFµTCA.0
4×16 bits(LTC2208,130MSPS)
Virtex-5
FX
4×16 bits(AD9783,500
MSPS)
PPC 440
Wind
River
Linux

TYPE IISTF-IILLRFµTCA.414×16 bits
(AD9650,105MSPS)
Virtex-5
FX
2×16 bits(AD9783,500
MSPS)
ARM
XilinxLinuxTYPE III
ERL & STF
MonitorµTCA.02×14 bits(ADS5474,400 MSPS)
Zynq-700
N/A

In the cERL, three two-cell SC cavities were installedin the injector, and two nine-cell SC cavities wereinstalled in the main linac [3]. The beam was accelerated
on the crest (i.e., the beam phase φb was 0). The measured
RF field for the amplitude (left) and phase (right) of theinjector and the main linac are illustrated in Fig. 3.
Table 2 shows the measured RF stabilities in terms of thedifferent cavities. It should be mentioned that 100-kHz
bandwidth digital filters were applied to remove the highfrequency clock jitters.

Figure 3: Field stabilities of SC cavities in the injector(top) and main linac (bottom) measured by the µTCA.0board (type I).
Table 2: RF Stabilities of cERL
ΔA/A [rms] Δθ [rms]CavityφbInjector 1
0°0.02%0.02°
Injectors 2&3 0°0.02%
0.015°
Main linac 1
0°
0.01%
0.01°
Main linac 2
0°
0.01%
0.01°
To measure the stability of the beam energy, a screen
monitor was installed downstream of the bending magnet
with a 2.2-m dispersion and a 62.6-μm/pixel resolution.
The beam momentum jitter was then calculated byextracting the information of the beam projection on thescreen monitor. As shown in Fig. 4, the calibrated beamstability during the measured period of 20 min wasapproximately 0.0065%.

PPC 440Wind River
LinuxPERFORMANCETo evaluate the performance of the µTCA LLRF
systems of the cERL and STF, the RF field fluctuations

Figure 4: Beam momentum jitter (20 min).

Pf

Fs

Cav
Pf

ADC

ADC

Cavity #1

Type III
Amplitude

6000

6000
Backward Power
Cavity Field

Pf

5000

Cav

4000

4000

Amp
litu
de[A.U.]The injector of the STF consists of a photo-cathode RFgun and two SC nine-cell cavities in a capture
cryomodule. In the main linac, 12 SC nine-cell cavities
were installed within two cryomodules driven by a 10MW multi-beam klystron; however, four cavities sufferedfrom degradation because of heavy field emission.
Therefore, only eight cavities were operated in the current
status [2]. The beam commissioning of the STF will beperformed in the year 2019.
The cavities in the STF (and ILC) were operated in thepulse mode with 1.65-ms pulse duration and 5-Hz
repetition rate. Figure 5 illustrates the cavity signalsmeasured by the µTCA.4 board (type II) on the firstcryomodule of the main linac. Our target was to maintaina stable vector-sum cavity voltage during the flat-top
period. Figure 6 shows the vector-sum of the eightcavities. Stability of 0.006% (rms) and 0.024° wereachieved in the amplitude and phase, respectively. A
digital filter with 250-kHz bandwidth was applied toreject the 8π/9 mode in this measurement [2].

pick-up signal and forward signal was sampled by the fast
ADC directly in the absence of down-convertors. By
applying the direct sampling algorithm, the amplitude andphase of the RF signals were detected successfully by thetype III board. Because the frequency of the ADC input
signal was up to 1.3 GHz, the signal-to-noise ratio washigher than in traditional LLRF systems employing downconvertors. The stabilities of the amplitude and phasewere approximately 0.1% and 0.1°, respectively. In theSTF (and cERL), the system was also used to monitor thelong-term drifts of the master oscillator and local
oscillator because it is not affected by the characteristicsof the down-converters [2].

Amp. [counts]

STF

3000

2000

2000

1000

000500

1000

11500

2000
Time step

2
Time [ms]

2500

3000

33500

4000

4

Figure 7: RF monitor system based on the µTCA.0 board(type III).
Figure 5: Cavity pick-up signals in the first cryomodule
measured by µTCA.4 board (type II).

CONCLUSION
Three types of µTCA boards were developed andapplied in the LLRF systems of the cERL and STF. The
numbers and types of the digital chips (ADC, DAC, andFPGA) were selected according to the applications of theboards. The EPICS protocol was embedded in the boardsfor data communication. The performance of the LLRF
systems fulfilled the requirements of cERL and STF(ILC).

REFERENCES

Figure 6: Amplitude and phase of vector-sum for eightcavities during the flat-top period.
An RF monitoring system based on direct samplingtechnique was installed on the µTCA.0 board (type III), as
shown in Fig. 7. The main objective of this system was toevaluate the performance of the fast ADC. The cavity[1] M. Akemoto et al., “Construction and commissioning ofcompact energy-recovery linac at KEK”, Nucl. Instrum.
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