Features• Supply Voltage: 5 V• Low Power Consumption: 15 mA/5 V• Output Level and Spurious Products Adjustable (Optional)• Excellent Sideband Suppression by Means of Duty Cycle Regenerationof the LO Input Signal• Phase-control Loop for Precise 90° Phase Shifting• Power-down Mode
• Low LO Input Level: -15 dBm• 50-Ω Single-ended LO and RF Port
• LO Frequency Range of 30 MHz to 300 MHz

300-MHz
Quadrature
Modulator

Benefits• Low Current Consumption• Few External Components Result in Cost and Board Space Saving• Adjustment Free Hence Saves TimeU2793B

Electrostatic sensitive device.
Observe precautions for handling.

Description
The IC U2793B is a 300-MHz quadrature modulator that uses Atmel‘s advanced UHFprocess. It features low current consumption, single-ended RF ports and adjustmentfree application, which makes the device suitable for all digital radio systems, e.g.,
GSM, PCN, JDC and WLAN. As an option, output level and spurious products areadjustable at pins 19 and 20. In conjunction with Atmel’s U2795B mixer, an up-converter up to 2 GHz can be realized.
Figure 0-1.

Block DiagramSPDBBAi
BBAi

LOi
LOi

BBBi
BBBi

810914Duty cycle
15 regenerator

Frequency
doubler

0°90°90° controlloop

ΣPU
1Power 6,7 VS
up
VRef
1319
LP2LP120RFo
411123,16,17,182

ACGND

5ACGND

GND
Rev. 4651D–CELL–03/05

1. Pin Configuration
Figure 1-1.

Pinning SSO20PU

120

LP1

ACGND

219

LP2GND

318

GND

RFO

417GND

ACGND

516

GND

VS

615LOI

VS

714

LOI

SPU

813

VREF

BBAI

912BBBIBBAI

1011BBBI

U2793B

2U2793B
4651D–CELL–03/05

U2793B
Table 1-1.

Pin Description

PinSymbol

Function

1PU

2

ACGND

AC ground

3GNDGround

4RFO

RF output

5ACGND

AC ground

6VS

Supply voltage

7VS

Supply voltage

8

SPU

Settling time power-up

9BBAI

Baseband input A

10BBAI

Baseband input A inverse

11

BBBI

Baseband input B

12

BBBI

Baseband input B inverse

13

VREF

Reference voltage (2.5 V)

14

LOI

Input LO

15

LOI

Input LO inverse, typically grounded

16

GND

Ground17

GND

Ground18

GND

Ground19

LP2Output low pass and power control

20

LP1Output low pass and power control

Power-up input

34651D–CELL–03/05

2. Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of thisspecification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameters

Symbol

Value

Unit

Supply voltage

VS6VInput voltage

Vi0 to VSVJunction temperature

Tj125°C

Storage temperature range

TStg-40 to +125°C

Symbol

Value

Unit

RthJA

140K/W

Symbol

Value

Unit

3. Thermal ResistanceParameters
Junction ambient SSO20

4. Operating Range
Parameters
Supply voltage

VS4.5 to 5.5

V

Ambient temperature range

Tamb-40 to +85°C

5. Electrical Characteristics
Test conditions (unless otherwise specified); VS = 5 V, Tamb = 25°C, referred to test circuit.
System impedance Zo = 50 Ω, fLO =150 MHz, PLO = -15 dBm, VBBi = 1.0 Vpp, differential
No.

Parameters

Test Conditions

PinSymbol

Min.

Typ.

Max.

Unit

Type*4.555.5VAmAA

mVpp

DkΩDMHzD

1.1

Supply voltage range

6, 7VS

1.2

Supply current

6, 7IS

15

2

Baseband Inputs, Pin 9-10, 11-12

2.1

Input-voltage range (differential)

VBBi

1000

2.2

Input impedance

ZBBi

30

2.3

Input-frequency range

fBBi

2.4

Input voltage, common mode3

LO Input, Pins 14 and 15

3.1

Frequency range
(1)

050
2.5

fLOi

30

3.2

Input level

PLOi

-15

3.3

Input impedance

ZiLO

(2)

3.4

Voltage standing wave ratio

VSWRLO

3.5

3.5 Duty-cycle range
Notes: 1. Required LO level is a function of the LO frequency.

1500

DCRLO

0.4

V300

MHzD-5dBm

DΩ

DD

0.6

D

2. The LO input impedance is consisting of a 50 Ω resistor in series with a 15 pF capacitor.
3. With the pins 19 and 20 spurious performance especially for low frequency application can be improved by adding a chipcapacitor between LP1 and LP2. In conjunction with a parallel resistor the output level can be adjusted to the following
mixer stage without degration of LO suppression and noise performance which would decrease if the I/Q input level isreduced.
4. For Tamb = -40°C to +85°C and VS = 4.5 V to 5.5 V

4U2793B
4651D–CELL–03/05

U2793B
5. Electrical Characteristics (Continued)
Test conditions (unless otherwise specified); VS = 5 V, Tamb = 25°C, referred to test circuit.
System impedance Zo = 50 Ω, fLO =150 MHz, PLO = -15 dBm, VBBi = 1.0 Vpp, differential (Continued)
No.
4Parameters

Test Conditions

Symbol

Min.

Typ.

Max.

-3-1+2Unit

Type*dBm

A/BdBA

RF Output, Pin 44.1Output level

fLO = 150 MHz,VBBi = 1 Vpp, differential
fLO = 50 MHz,VBBi = 0.3 Vpp, differential

4.2

LO suppression

PLO = -20 dBM

4.3

Voltage standing wave ratio

4.4PinSideband suppression

PRFo
LORFO

03245
1.4

VSWRRF(3)

SBSRFo

(4)

352

D45dB

A

4.5

Phase error

Pe<1degD

4.6

Amplitude errorAe< ±0.25dB

D

4.7

Noise floor

VBBi = 2 V, VBBi = 3 V
VBBi = VBBi = 2.5 V

NFL-137-143dBm/Hz

D5Power-up Mode

5.1

Supply current

VPU ≤0.5 V, pins 6, 7
VPU = 1 V

IPU

10µA

D

5.2

Settling time

Pins 1 to 4, CSPU = 100 pF
CLO = 100 pF, CRFo = 1 nF

tSPU

10µs

D6Switching Voltage, Pin 1

6.1

Power onVD

7Reference Voltage, Pin 13

7.1

Voltage range

7.2 Output impedanceNotes: 1. Required LO level is a function of the LO frequency.

VPUON

4VRef

2.375

ZoRef

2.530

1

2.625

VA

Ω

D2. The LO input impedance is consisting of a 50 Ω resistor in series with a 15 pF capacitor.
3. With the pins 19 and 20 spurious performance especially for low frequency application can be improved by adding a chipcapacitor between LP1 and LP2. In conjunction with a parallel resistor the output level can be adjusted to the following
mixer stage without degration of LO suppression and noise performance which would decrease if the I/Q input level isreduced.
4. For Tamb = -40°C to +85°C and VS = 4.5 V to 5.5 V

54651D–CELL–03/05

6. Diagrams
Figure 6-1.

Reference Voltage versus Tamb
2.57
2.56

VRef (V)

2.55
2.54
2.532.522.512.5-4004080120

Temperature (°C)

Figure 6-2.

OIP3 versus Tamb, LO = 150 MHz, Level -10 dBm

8IP3 (dBm)

6420-4004080

12080120

Temperature (°C)

Figure 6-3.

Supply Current versus Tamb20

Supply Current (mA)

1612840-40

040
Temperature (°C)

6U2793B
4651D–CELL–03/05

U2793B
Figure 6-4.

Recommended LO Power Range versus LO Frequency at Tamb = 25° C

0

PLO (dBm)-10-20-30-40050100

150200250300fLO (MHz)Figure 6-5.

Output Power versus Tamb0Output Power (dBm)-0.4-0.8-1.2-1.6-2-40

04012080Temperature (°C)

Figure 6-6.

Typical Output Power versus LO Frequency at Tamb = 25° C,VBBi = 250 mV (Differential)
51.2 Vpp
01.0 Vpp
800 mVpp-5Pout (dBm)-10-15-20100 mVpp
200 mVpp-25400 mVpp

-30600 mVpp
-35
050

100

150200250300

FLO (MHz)74651D–CELL–03/05

Figure 6-7.

Typical Required VBBi Input Signal (Differential) versus LO Frequency
for PO = 1 dBm and PO = -3 dBm2000
1800-3 dBm

-1 dBm1600-5 dBmPout (dBm)

1400
1200
1000
800
600
400
200
0050

100

150

200

250

300

FLO (MHz)

8U2793B
4651D–CELL–03/05

U2793B
7. Evaluation Board Drawings
Figure 7-1.

Evaluation Board Circuitry
C1L1PU

20

1C2C9R1

219

318

417C3OUT
C4165U2793B
L2VSC5C7

6

15

714

LO
C8

813

9

12

10

11C6Ainv

AGND

B

VRef

Binv

Part List
C1, C2, C3, C4, C6=

1 nF

C7, C8=100 pF

C5=100 nF

C9, R1=

1 pF to 10 pF=50-Ω Microstrip=optional

The above listed components result in a PD settling time of <20 µs. The use of other component
values will require consideration for time requirements in burst-mode applications.

94651D–CELL–03/05

Figure 7-2.

10

PCB Layout Evaluation Board

U2793B
4651D–CELL–03/05

U2793B
8. Application Circuits
Bias network for AC-coupled baseband inputs (VBA, VBB).
R1 = 2.5 kΩ, R2 ≤10 kΩ for ≥ 35 dB LO suppression which is in reference to < 2 mV input offset.
Figure 8-1.

Application Circuit with AC-coupled Baseband Inputs
R11nVRef

R21310BBAi

PU
1Powerup

9BBAi

6,7 VS

15

Duty cycle
regenerator

Frequency
doubler

0°90°90° controlloop

20Σ100n8 SPU
19LOi 14LOi

Power down

4LP2LP1RFo
ACGND

BBBi

11BBBi1225 ACGND

3,16,17,18
GND

Figure 8-2.

Application Circuit with DC-coupled Baseband Inputs

VRef
100n

131nPU
11010kBBAi

Powerup

9BBAi

Basebandprocessing

10k100p
LOi 14LO
LOi 15

Power down
6,7 VS
8 SPU
19Duty cycle
regenerator

Frequency
doubler

0°90°90° controlloop

20Σ

100n

LP2
LP11n
OUT

4 RFo1n

ACGND
1n10k
10k100n2

BBBI 11BBBI 121n53,16,17,18

ACGND

GND

114651D–CELL–03/05

9. Ordering Information
Extended Type Number

Package

Remarks

U2793B-NFSH

SSO20

Tube, lead free

U2793B-NFSG3H

SSO20

Taped and reeled, lead free

10. Package Information

12U2793B
4651D–CELL–03/05

Atmel Corporation
2325 Orchard Parkway
San Jose, CA 95131, USA
Tel: 1(408) 441-0311
Fax: 1(408) 487-2600

Regional Headquarters
EuropeAtmel Sarl
Route des Arsenaux 41
Case Postale 80
CH-1705 Fribourg
Switzerland
Tel: (41) 26-426-5555
Fax: (41) 26-426-5500

Asia
Room 1219
Chinachem Golden Plaza
77 Mody Road Tsimshatsui
East Kowloon
Hong Kong
Tel: (852) 2721-9778
Fax: (852) 2722-1369

Japan
9F, Tonetsu Shinkawa Bldg.
1-24-8 Shinkawa
Chuo-ku, Tokyo 104-0033
Japan
Tel: (81) 3-3523-3551
Fax: (81) 3-3523-7581

Atmel Operations
Memory2325 Orchard Parkway
San Jose, CA 95131, USA
Tel: 1(408) 441-0311
Fax: 1(408) 436-4314

RF/Automotive
Theresienstrasse 2
Postfach 3535
74025 Heilbronn, Germany
Tel: (49) 71-31-67-0
Fax: (49) 71-31-67-2340

Microcontrollers
2325 Orchard Parkway
San Jose, CA 95131, USA
Tel: 1(408) 441-0311
Fax: 1(408) 436-4314
La Chantrerie
BP 70602
44306 Nantes Cedex 3, France
Tel: (33) 2-40-18-18-18
Fax: (33) 2-40-18-19-60

ASIC/ASSP/Smart Cards

1150 East Cheyenne Mtn. Blvd.
Colorado Springs, CO 80906, USA
Tel: 1(719) 576-3300
Fax: 1(719) 540-1759

Biometrics/Imaging/Hi-Rel MPU/High Speed Converters/RF Datacom
Avenue de Rochepleine
BP 12338521 Saint-Egreve Cedex, FranceTel: (33) 4-76-58-30-00
Fax: (33) 4-76-58-34-80

Zone Industrielle
13106 Rousset Cedex, France
Tel: (33) 4-42-53-60-00
Fax: (33) 4-42-53-60-01
1150 East Cheyenne Mtn. Blvd.
Colorado Springs, CO 80906, USA
Tel: 1(719) 576-3300
Fax: 1(719) 540-1759
Scottish Enterprise Technology Park
Maxwell Building
East Kilbride G75 0QR, Scotland
Tel: (44) 1355-803-000
Fax: (44) 1355-242-743

Literature Requests
www.atmel.com/literature

Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to anyintellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORYWARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULARPURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT
OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes norepresentations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specificationsand product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Atmel’s products are notintended, authorized, or warranted for use as components in applications intended to support or sustain life.

© Atmel Corporation 2005. All rights reserved. Atmel ®, logo and combinations thereof, and other, are registered trademarks, and Everywhere
You Are SM and others are the trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others.

Printed on recycled paper.
4651D–CELL–03/05