S-1009 Series
www.ablic.com
www.ablicinc.com

0.27 A CURRENT CONSUMPTIONVOLTAGE DETECTOR
WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03© ABLIC Inc., 2009-2017

The S-1009 Series is a super high-accuracy voltage detector developed using CMOS technology. The detection voltage isfixed internally with an accuracy of 0.5%. It operates with super low current consumption of 270 nA typ.
The release signal can be delayed by setting a capacitor externally. Delay time accuracy is 15%. Two output forms Nch
open-drain and CMOS output are available.
Compared with conventional CMOS voltage detectors, the S-1009 Series is the most suitable for the portable devices dueto the super-low current consumption, super high-accuracy and small packages.

 Features Detection voltage: Detection voltage accuracy:






Current consumption:
Operation voltage range:
Hysteresis width:
Delay time accuracy:
Output form: Operation temperature range: Lead-free (Sn 100%), halogen-free

0.8 V to 4.6 V (0.1 V step)
0.5% (2.4 V  VDET  4.6 V)
12 mV (0.8 V  VDET  2.4 V)
270 nA typ. (1.2 V  VDET  2.3 V)
0.6 V to 10.0 V (CMOS output product)
5% 1%
15% (CD = 4.7 nF)
Nch open-drain output (active "L")CMOS output (active "L")Ta = 40°C to 85°C

 Applications
 Power monitor and reset for CPU and microcomputer Constant voltage power monitor for TV, DVD recorder and home appliance Power supply monitor for portable device such as notebook PC, digital still camera and mobile phone Packages
 SOT-23-5
 SC-82AB
 SNT-4A

1

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series
 Block Diagrams1.

Nch open-drain output product

VDD



*1

Delay
circuit

OUT
*1

VREF
*1

VSS
CD

*1.

Parasitic diodeFigure 1

2.

CMOS output product

VDD
*1




*1

Delay
circuit

OUT
*1

VREF
*1

VSS
CD

*1.

Parasitic diodeFigure 22

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

 Product Name Structure
Users can select the output form, detection voltage value, and package type for the S-1009 Series. Refer to "1.
Product name" regarding the contents of product name, "2. Packages" regarding the package drawings and "3.
Product name list" regarding details of product name.

1.

Product nameS-1009

x

xx

I

-

xxxx

U

Environmental codeU:
Lead-free (Sn 100%), halogen-free
Package abbreviation and IC packing specifications*1
M5T1: SOT-23-5, Tape
N4T1: SC-82AB, Tape
I4T1: SNT-4A, Tape
Operation temperatureI:
Ta = 40C to 85C
Detection voltage value
08 to 46
(e.g., when the detection voltage is 1.5 V, it is expressed as 15.)
Output formN:
Nch open-drain output (active "L")C:
CMOS output (active "L")*1.

2.

Refer to the tape drawings.

Packages
Table 1
Package Name

Package Drawing Codes

Dimension

Tape

Reel

Land

SOT-23-5MP005-A-P-SD

MP005-A-R-SD



SC-82AB

NP004-A-P-SD

NP004-A-R-SD



SNT-4A

PF004-A-P-SD

MP005-A-C-SD
NP004-A-C-SD
NP004-A-C-S1
PF004-A-C-SD

PF004-A-R-SD

PF004-A-L-SD

3

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

3.

Product name list
3. 1

Nch open-drain output product
Table 2Detection Voltage
0.8 V  12 mV
0.9 V  12 mV
1.0 V  12 mV
1.1 V  12 mV
1.2 V  12 mV
1.3 V  12 mV
1.4 V  12 mV
1.5 V  12 mV
1.6 V  12 mV
1.7 V  12 mV
1.8 V  12 mV
1.9 V  12 mV
2.0 V  12 mV
2.1 V  12 mV
2.2 V  12 mV
2.3 V  12 mV
2.4 V  0.5%
2.5 V  0.5%
2.6 V  0.5%
2.7 V  0.5%
2.8 V  0.5%
2.9 V  0.5%
3.0 V  0.5%
3.1 V  0.5%
3.2 V  0.5%
3.3 V  0.5%
3.4 V  0.5%
3.5 V  0.5%
3.6 V  0.5%
3.7 V  0.5%
3.8 V  0.5%
3.9 V  0.5%
4.0 V  0.5%
4.1 V  0.5%
4.2 V  0.5%
4.3 V  0.5%
4.4 V  0.5%
4.5 V  0.5%
4.6 V  0.5%

4

SOT-23-5
S-1009N08I-M5T1U
S-1009N09I-M5T1U
S-1009N10I-M5T1U
S-1009N11I-M5T1U
S-1009N12I-M5T1U
S-1009N13I-M5T1U
S-1009N14I-M5T1U
S-1009N15I-M5T1U
S-1009N16I-M5T1U
S-1009N17I-M5T1U
S-1009N18I-M5T1U
S-1009N19I-M5T1U
S-1009N20I-M5T1U
S-1009N21I-M5T1U
S-1009N22I-M5T1U
S-1009N23I-M5T1U
S-1009N24I-M5T1U
S-1009N25I-M5T1U
S-1009N26I-M5T1U
S-1009N27I-M5T1U
S-1009N28I-M5T1U
S-1009N29I-M5T1U
S-1009N30I-M5T1U
S-1009N31I-M5T1U
S-1009N32I-M5T1U
S-1009N33I-M5T1U
S-1009N34I-M5T1U
S-1009N35I-M5T1U
S-1009N36I-M5T1U
S-1009N37I-M5T1U
S-1009N38I-M5T1U
S-1009N39I-M5T1U
S-1009N40I-M5T1U
S-1009N41I-M5T1U
S-1009N42I-M5T1U
S-1009N43I-M5T1U
S-1009N44I-M5T1U
S-1009N45I-M5T1U
S-1009N46I-M5T1U

SC-82AB
S-1009N08I-N4T1U
S-1009N09I-N4T1U
S-1009N10I-N4T1U
S-1009N11I-N4T1U
S-1009N12I-N4T1U
S-1009N13I-N4T1U
S-1009N14I-N4T1U
S-1009N15I-N4T1U
S-1009N16I-N4T1U
S-1009N17I-N4T1U
S-1009N18I-N4T1U
S-1009N19I-N4T1U
S-1009N20I-N4T1U
S-1009N21I-N4T1U
S-1009N22I-N4T1U
S-1009N23I-N4T1U
S-1009N24I-N4T1U
S-1009N25I-N4T1U
S-1009N26I-N4T1U
S-1009N27I-N4T1U
S-1009N28I-N4T1U
S-1009N29I-N4T1U
S-1009N30I-N4T1U
S-1009N31I-N4T1U
S-1009N32I-N4T1U
S-1009N33I-N4T1U
S-1009N34I-N4T1U
S-1009N35I-N4T1U
S-1009N36I-N4T1U
S-1009N37I-N4T1U
S-1009N38I-N4T1U
S-1009N39I-N4T1U
S-1009N40I-N4T1U
S-1009N41I-N4T1U
S-1009N42I-N4T1U
S-1009N43I-N4T1U
S-1009N44I-N4T1U
S-1009N45I-N4T1U
S-1009N46I-N4T1U

SNT-4A
S-1009N08I-I4T1U
S-1009N09I-I4T1U
S-1009N10I-I4T1U
S-1009N11I-I4T1U
S-1009N12I-I4T1U
S-1009N13I-I4T1U
S-1009N14I-I4T1U
S-1009N15I-I4T1U
S-1009N16I-I4T1U
S-1009N17I-I4T1U
S-1009N18I-I4T1U
S-1009N19I-I4T1U
S-1009N20I-I4T1U
S-1009N21I-I4T1U
S-1009N22I-I4T1U
S-1009N23I-I4T1U
S-1009N24I-I4T1U
S-1009N25I-I4T1U
S-1009N26I-I4T1U
S-1009N27I-I4T1U
S-1009N28I-I4T1U
S-1009N29I-I4T1U
S-1009N30I-I4T1U
S-1009N31I-I4T1U
S-1009N32I-I4T1U
S-1009N33I-I4T1U
S-1009N34I-I4T1U
S-1009N35I-I4T1U
S-1009N36I-I4T1U
S-1009N37I-I4T1U
S-1009N38I-I4T1U
S-1009N39I-I4T1U
S-1009N40I-I4T1U
S-1009N41I-I4T1U
S-1009N42I-I4T1U
S-1009N43I-I4T1U
S-1009N44I-I4T1U
S-1009N45I-I4T1U
S-1009N46I-I4T1U

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

3. 2

CMOS output product
Table 3Detection Voltage
0.8 V  12 mV
0.9 V  12 mV
1.0 V  12 mV
1.1 V  12 mV
1.2 V  12 mV
1.3 V  12 mV
1.4 V  12 mV
1.5 V  12 mV
1.6 V  12 mV
1.7 V  12 mV
1.8 V  12 mV
1.9 V  12 mV
2.0 V  12 mV
2.1 V  12 mV
2.2 V  12 mV
2.3 V  12 mV
2.4 V  0.5%
2.5 V  0.5%
2.6 V  0.5%
2.7 V  0.5%
2.8 V  0.5%
2.9 V  0.5%
3.0 V  0.5%
3.1 V  0.5%
3.2 V  0.5%
3.3 V  0.5%
3.4 V  0.5%
3.5 V  0.5%
3.6 V  0.5%
3.7 V  0.5%
3.8 V  0.5%
3.9 V  0.5%
4.0 V  0.5%
4.1 V  0.5%
4.2 V  0.5%
4.3 V  0.5%
4.4 V  0.5%
4.5 V  0.5%
4.6 V  0.5%

SOT-23-5
S-1009C08I-M5T1U
S-1009C09I-M5T1U
S-1009C10I-M5T1U
S-1009C11I-M5T1U
S-1009C12I-M5T1U
S-1009C13I-M5T1U
S-1009C14I-M5T1U
S-1009C15I-M5T1U
S-1009C16I-M5T1U
S-1009C17I-M5T1U
S-1009C18I-M5T1U
S-1009C19I-M5T1U
S-1009C20I-M5T1U
S-1009C21I-M5T1U
S-1009C22I-M5T1U
S-1009C23I-M5T1U
S-1009C24I-M5T1U
S-1009C25I-M5T1U
S-1009C26I-M5T1U
S-1009C27I-M5T1U
S-1009C28I-M5T1U
S-1009C29I-M5T1U
S-1009C30I-M5T1U
S-1009C31I-M5T1U
S-1009C32I-M5T1U
S-1009C33I-M5T1U
S-1009C34I-M5T1U
S-1009C35I-M5T1U
S-1009C36I-M5T1U
S-1009C37I-M5T1U
S-1009C38I-M5T1U
S-1009C39I-M5T1U
S-1009C40I-M5T1U
S-1009C41I-M5T1U
S-1009C42I-M5T1U
S-1009C43I-M5T1U
S-1009C44I-M5T1U
S-1009C45I-M5T1U
S-1009C46I-M5T1U

SC-82AB
S-1009C08I-N4T1U
S-1009C09I-N4T1U
S-1009C10I-N4T1U
S-1009C11I-N4T1U
S-1009C12I-N4T1U
S-1009C13I-N4T1U
S-1009C14I-N4T1U
S-1009C15I-N4T1U
S-1009C16I-N4T1U
S-1009C17I-N4T1U
S-1009C18I-N4T1U
S-1009C19I-N4T1U
S-1009C20I-N4T1U
S-1009C21I-N4T1U
S-1009C22I-N4T1U
S-1009C23I-N4T1U
S-1009C24I-N4T1U
S-1009C25I-N4T1U
S-1009C26I-N4T1U
S-1009C27I-N4T1U
S-1009C28I-N4T1U
S-1009C29I-N4T1U
S-1009C30I-N4T1U
S-1009C31I-N4T1U
S-1009C32I-N4T1U
S-1009C33I-N4T1U
S-1009C34I-N4T1U
S-1009C35I-N4T1U
S-1009C36I-N4T1U
S-1009C37I-N4T1U
S-1009C38I-N4T1U
S-1009C39I-N4T1U
S-1009C40I-N4T1U
S-1009C41I-N4T1U
S-1009C42I-N4T1U
S-1009C43I-N4T1U
S-1009C44I-N4T1U
S-1009C45I-N4T1U
S-1009C46I-N4T1U

SNT-4A
S-1009C08I-I4T1U
S-1009C09I-I4T1U
S-1009C10I-I4T1U
S-1009C11I-I4T1U
S-1009C12I-I4T1U
S-1009C13I-I4T1U
S-1009C14I-I4T1U
S-1009C15I-I4T1U
S-1009C16I-I4T1U
S-1009C17I-I4T1U
S-1009C18I-I4T1U
S-1009C19I-I4T1U
S-1009C20I-I4T1U
S-1009C21I-I4T1U
S-1009C22I-I4T1U
S-1009C23I-I4T1U
S-1009C24I-I4T1U
S-1009C25I-I4T1U
S-1009C26I-I4T1U
S-1009C27I-I4T1U
S-1009C28I-I4T1U
S-1009C29I-I4T1U
S-1009C30I-I4T1U
S-1009C31I-I4T1U
S-1009C32I-I4T1U
S-1009C33I-I4T1U
S-1009C34I-I4T1U
S-1009C35I-I4T1U
S-1009C36I-I4T1U
S-1009C37I-I4T1U
S-1009C38I-I4T1U
S-1009C39I-I4T1U
S-1009C40I-I4T1U
S-1009C41I-I4T1U
S-1009C42I-I4T1U
S-1009C43I-I4T1U
S-1009C44I-I4T1U
S-1009C45I-I4T1U
S-1009C46I-I4T1U

5

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series
 Pin Configurations
1.

SOT-23-5
Table 4Top view
5

Pin No.

4

1 2 3
*1.
Figure 3

2.

SymbolDescription

1
OUT
Voltage detection output pin
2
VDD
Input voltage pin
3
VSS
GND pin
NC*1
4
No connection
5
CD
Connection pin for delay capacitor
The NC pin is electrically open.
The NC pin can be connected to the VDD pin or the VSS pin.

SC-82AB
Table 5Top view
4

3

1

2

Pin No.
12
34

Symbol
VSS
VDD
CD
OUT

Description
GND pin
Input voltage pin
Connection pin for delay capacitor
Voltage detection output pin

Figure 4

3.

SNT-4A
Table 6Top view
12

43

Figure 5

6

Pin No.
12
34

Symbol
VSS
OUT
CD
VDD

Description
GND pin
Voltage detection output pin
Connection pin for delay capacitor
Input voltage pin

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

 Absolute Maximum Ratings
Table 7
(Ta = 25°C unless otherwise specified)
Item

SymbolPower supply voltage
VDDVSS
CD pin input voltage
VCD
Nch open-drain output productOutput voltage
VOUT
CMOS output productOutput current
IOUT
SOT-23-5
Power dissipation
SC-82ABPD
SNT-4A
Operation ambient temperature
Topr
Storage temperature
Tstg*1. When mounted on board[Mounted board](1) Board size: 114.3 mm  76.2 mm  t1.6 mm(2) Name:
JEDEC STANDARD51-7

Unit

12
VSS0.3 to VDD  0.3
VSS0.3 to 12.0
VSS0.3 to VDD  0.3
50
600*1
350*1
300*1
40 to 85
40 to 125

V
V
V
V
mA
mW
mW
mW
°C
°C

The absolute maximum ratings are rated values exceeding which the product could suffer
physical damage. These values must therefore not be exceeded under any conditions.
700
Power Dissipation (PD) [mW]

CautionAbsolute Maximum Rating

600
500

SC-82AB

300
200
SNT-4A

100
0

Figure 6

SOT-23-5

400

0

150
100
50
Ambient Temperature (Ta) [C]Power Dissipation of Package (When Mounted on Board)70.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series Electrical Characteristics
1.

Nch open-drain output product
Table 8(Ta = 25°C unless otherwise specified)
Test
Item
SymbolCondition
Min.
Typ.
Max.
Unit
CircuitVDET(S)VDET(S)V
1
VDET(S)0.8 V  VDET  2.4 V
 0.012
 0.012*1
Detection voltage
VDET
VDET(S)VDET(S)VDET(S)V
1
2.4 V  VDET  4.6 V
 0.995
 1.005
VDET
VDET
VDET
V
1
Hysteresis width
VHYS 0.04  0.05  0.06
0.8 V  VDET  1.2 V

0.30
0.90
A
2
1.2 V  VDET  2.3 V

0.27
0.90
A
2
Current
ISS
VDD = VDET  0.6 V
consumption
2.3 V  VDET  3.6 V

0.42
0.90
A
2
3.6 V  VDET  4.6 V

0.39
0.90
A
2
Operation voltage
VDD

0.7

10.0
V
1
VDD = 0.7 V
0.14
0.40

mA
3
S-1009N08 to 14
Output transistor
VDD = 1.2 V
0.73
1.33

mA
3
Output current
IOUT
Nch
S-1009N15 to 46*2
VDS = 0.5 V
VDD = 2.4 V
1.47
2.39

mA
3
S-1009N27 to 46
Output transistor
Leakage current
ILEAK
Nch


0.08
A
3
VDD = 10.0 V, VOUT = 10.0 V
Delay timetD
CD = 4.7 nF
22.1
26.0
29.9
ms
4
0.8
V

V

0.9
V

180
430
ppm/°C1
Detection voltage
DET
VDET
temperature
Ta = 40°C to 85°C 0.9 V  VDET  1.2 V
120
370 ppm/°C
1
Ta  VDET*3
coefficient
1.2 V  VDET  4.6 V

100
350 ppm/°C
1*1. VDET: Actual detection voltage value, VDET(S): Set detection voltage value (the center value of the detection voltage
range in Table 2.)*2. VDS: Drain-to-source voltage of the output transistor*3. The temperature change of the detection voltage [mV/°C] is calculated by using the following equation.
  VDET
  VDET[mV/°C]*1 = VDET(S) (typ.)[V]*2  Ta  V
[ppm/°C]*3  1000
Ta
DET
*1. Temperature change of the detection voltage*2. Set detection voltage*3. Detection voltage temperature coefficient80.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

2.

CMOS output product
Table 9(Ta = 25°C unless otherwise specified)
Test
Item
SymbolCondition
Min.
Typ.
Max.
Unit
CircuitVDET(S)VDET(S)V
1
VDET(S)0.8 V  VDET  2.4 V
 0.012
 0.012*1
Detection voltage
VDET
VDET(S)VDET(S)VDET(S)V
1
2.4 V  VDET  4.6 V
 0.995
 1.005
VDET
VDET
VDET
V
1
Hysteresis width
VHYS 0.04  0.05  0.06
0.8 V  VDET  1.2 V

0.30
0.90
A
2
1.2 V  VDET  2.3 V

0.27
0.90
A
2
Current
ISS
VDD = VDET  0.6 V
consumption
2.3 V  VDET  3.6 V

0.42
0.90
A
2
3.6 V  VDET  4.6 V

0.39
0.90
A
2
Operation voltage
VDD

0.6

10.0
V
1
VDD = 0.7 V
0.14
0.40

mA
3
S-1009C08 to 14
Output transistor
VDD = 1.2 V
0.73
1.33

mA
3
Nch
S-1009C15
to 46
VDS*2 = 0.5 V
VDD = 2.4 V
1.47
2.39

mA
3
Output current
IOUT
S-1009C27 to 46
VDD = 4.8 V
1.62
2.60

mA
5
Output transistor
S-1009C08 to 39
Pch
VDD = 6.0 V
VDS*2 = 0.5 V
1.78
2.86

mA
5
S-1009C40 to 46
Delay timetD
CD = 4.7 nF
22.1
26.0
29.9
ms
4

180
430 ppm/°C
1
0.8 V  VDET  0.9 V
Detection voltage
VDET
temperature
120
370 ppm/°C
1
Ta = 40°C to 85°C 0.9 V  VDET  1.2 V
Ta  VDET
coefficient*3
1.2 V  VDET  4.6 V

100
350 ppm/°C
1*1. VDET: Actual detection voltage value, VDET(S): Set detection voltage value (the center value of the detection voltage
range in Table 3.)*2. VDS: Drain-to-source voltage of the output transistor*3. The temperature change of the detection voltage [mV/°C] is calculated by using the following equation.
  VDET
  VDET[mV/°C]*1 = VDET(S) (typ.)[V]*2  Ta  V
[ppm/°C]*3  1000
Ta
DET
*1. Temperature change of the detection voltage*2. Set detection voltage*3. Detection voltage temperature coefficient90.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series
 Test Circuits


VDD
V



OUT
VSS

*1.

R*1
100 k

VDD

VDD

VDD
OUT



CD

V

VSS

CD

R is unnecessary for CMOS output product.
Figure 7

Test Circuit 1

Figure 8

VDD

VDD

OUT
VSS

CD

A


VDS

VSS

V

*1.
Figure 9

Test Circuit 3

VDS

V
VDD

OUT

V
VSS

Figure 11

CD

Test Circuit 5A

OscilloscopeCD

R is unnecessary for CMOS output product.
Figure 10


VDD

OUT

P.G.

Test Circuit 2

R*1
100 k

VDD



V

10

A

Test Circuit 4

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series Timing Charts
1.

Nch open-drain output product
VDD
Release voltage (VDET)Hysteresis width(VHYS)

Detection voltage (VDET)
Minimum operation voltage
VSS

R
100 kVDD
CD OUT
VSS

VDD

V



Output from OUT pin
VSStD
Figure 12

2.

CMOS output product
VDD
Release voltage (VDET)Hysteresis width(VHYS)

Detection voltage (VDET)
Minimum operation voltage
VSS

VDD
CD OUT
VSS

V



VDD
Output from OUT pin
VSStD
RemarkWhen VDD is the minimum operation voltage or less, the output voltage from the OUT pin is indefinite
in the shaded area.
Figure 13110.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series
 Operation
1.

Basic operation: CMOS output (active "L") product
(1)

(2)

(3)
(4)
(5)

When the power supply voltage (VDD) is the release voltage (VDET) or more, the Nch transistor is OFF and
the Pch transistor is ON to output VDD ("H"). Since the Nch transistor N1 in Figure 14 is OFF, the comparator(RB  RC )  VDD.
input voltage isRA  RB  RC
Although VDD decreases to VDET or less, VDD is output when VDD is the detection voltage (VDET) or more.
When VDD decreases to VDET or less (point A in Figure 15), the Nch transistor is ON and the Pch transistor
is OFF so that VSS is output. At this time, the Nch transistor N1 in Figure 14 is turned on, and the input
RB  VDD.
voltage to the comparator isRA  RB
The output is indefinite by decreasing VDD to the IC’s minimum operation voltage or less. If the output ispulled up, it will be VDD.
VSS is output by increasing VDD to the minimum operation voltage or more. Although VDD exceeds VDET and
VDD is less than VDET, the output is VSS.
When increasing VDD to VDET or more (point B in Figure 15), the Nch transistor is OFF and the Pchtransistor is ON so that VDD is output. At this time, VDD is output from the OUT pin after the passage of thedelay time (tD).
VDD
RA

*1



Delay
circuit



*1

Pch
OUT

RB

*1

VREF

Nch

*1

RC

N1

VSS

CD
CD

*1.

Parasiteic diode(1)

Figure 14

Operation 1

(2)

(4)

(3)

(5)
VDD

B

Release voltage (VDET)A

Hysteresis width

Detection voltage (VDET)(VHYS)

Minimum operation voltage
VSS
VDD
Output from OUT pin
VSStD

Figure 15

12

Operation 2

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

2.

Delay circuit
The delay circuit delays the output signal to the OUT pin from the time at which the power supply voltage (VDD)
exceeds the release voltage (VDET) when VDD is turned on. The output signal is not delayed when VDD decreases
to the detection voltage (VDET) or less (refer to "Figure 15 Operation 2").
The delay time (tD) is determined by the time constant of the built-in constant current (approx. 100 nA) and theattached delay capacitor (CD), or the delay time (tD0) when the CD pin is open, and calculated from the following
equation. When the CD value is sufficiently large, the tD0 value can be disregarded.
tD [ms] = Delay coefficient  CD [nF]  tD0 [ms]Operation
Temperature
Ta = 85°C
Ta = 25°C
Ta = 40°C

Operation Temperature
Ta = 40°C to 85°C
Caution 1.

Table 10

Delay Coefficient

Min.
2.82
4.70
5.64

Delay Coefficient
Typ.
4.20
5.47
8.40

Table 11

Delay TimeMin.
0.01 ms

Delay Time (tD0)Typ.
0.10 ms

Max.
5.72
6.24
12.01

Max.
0.24 ms

When the CD pin is open, a double pulse shown in Figure 16 may appear at release.
To avoid the double pulse, attach 100 pF or larger capacitor to the CD pin. Do not apply
voltage to the CD pin from the exterior.

VOUT

Time
Figure 16
2.

3.

Mounted board layout should be made in such a way that no current flows into or flows fromthe CD pin since the impedance of the CD pin is high, otherwise correct delay time cannot beprovided.
There is no limit for the capacitance of CD as long as the leakage current of the capacitor canbe ignored against the built-in constant current value. Leakage current causes deviation indelay time. When the leakage current is larger than the built-in constant current, no releasetakes place.

13

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

3.

Other characteristics
3. 1

Temperature characteristics of detection voltage

The shaded area in Figure 17 shows the temperature characteristics of detection voltage in the operation
temperature range.
VDET [V]
0.945 mV/°C

VDET25*1

0.945 mV/°C
40*1.
Figure 17
3. 2

25

85

Ta [°C]

VDET25 is an actual detection voltage value at Ta = 25°C.

Temperature Characteristics of Detection Voltage (Example for VDET = 2.7 V)

Temperature characteristics of release voltage

The temperature change  VDETof the release voltage is calculated by using the temperature changeTa  VDETof the detection voltage as follows:Ta  VDET
VDET  VDET
=

Ta
VDET
Ta
The temperature change of the release voltage and the detection voltage has the same sign consequently.
3. 3

Temperature characteristics of hysteresis voltage

The temperature change of the hysteresis voltage is expressed asfollows:
  VDET
  VDET
VHYS
  VDET

=

Ta
Ta
VDET
Ta

14

  VDET
  VDET
and is calculated as
TaTa0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

 Standard Circuit

R*1
100 k

VDD
OUT

CD

CD

*1.
*2.

*2

VSS

R is unnecessary for CMOS output product.
The delay capacitor (CD) should be connected directly to the CD pin and the VSS pin.
Figure 18

Caution

The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.

15

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series Explanation of Terms
1.

Detection voltage (VDET)The detection voltage is a voltage at which the output in Figure 21 turns to "L". The detection voltage varies slightly
among products of the same specification. The variation of detection voltage between the specified minimum(VDET min.) and the maximum (VDET max.) is called the detection voltage range (refer to Figure 19).
Example:2.

In the S-1009C15, the detection voltage is either one in the range of 1.488 V  VDET  1.512 V.
This means that some S-1009C15 have VDET = 1.488 V and some have VDET = 1.512 V.

Release voltage (VDET)The release voltage is a voltage at which the output in Figure 21 turns to "H". The release voltage varies slightly
among products of the same specification. The variation of release voltages between the specified minimum (VDETmin.) and the maximum (VDET max.) is called the release voltage range (refer to Figure 20). The range iscalculated from the actual detection voltage (VDET) of a product and is in the range of VDET  1.04  VDET  VDET
 1.06.
Example:For the S-1009C15, the release voltage is either one in the range of 1.548 V  VDET  1.602 V.
This means that some S-1009C15 have VDET = 1.548 V and some have VDET = 1.602 V.

VDD

VDD

Release voltage

Detection voltage
VDET max.

VDET max.

Detection voltage
range

VDET min.

Release voltage
range

VDET min.

OUT

OUT
Delay time

Figure 19

Detection Voltage

Figure 20

Release Voltage

R*1
VDD

 VDD
V
VSS

OUT
CD
CD

*1.
Figure 21

16

100 kV

R is unnecessary for CMOS output product.

Test Circuit of Detection Voltage and Release Voltage

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

3.

Hysteresis width (VHYS)
The hysteresis width is the voltage difference between the detection voltage and the release voltage (the voltage atpoint B  the voltage at point A = VHYS in "Figure 15 Operation 2"). Setting the hysteresis width between thedetection voltage and the release voltage, prevents malfunction caused by noise on the input voltage.

4.

Delay time (tD)
The delay time in the S-1009 Series is a period from the input voltage to the VDD pin exceeding the release voltage(VDET) until the output from the OUT pin inverts. The delay time changes according to the delay capacitor (CD).
VDD

VDET
OUT

tD

Figure 22

5.

Delay Time

Feed-through current
Feed-through current is a current that flows instantaneously at the time of detection and release of a voltage
detector. The feed-through current is large in CMOS output product, small in Nch open-drain output product.

6.

Oscillation
In applications where a resistor is connected to the voltage detector input (Figure 23), taking a CMOS active "L"
product for example, the feed-through current which is generated when the output goes from "L" to "H" (release)causes a voltage drop equal to [feed-through current]  [input resistance] across the resistor. When the input
voltage drops below the detection voltage (VDET) as a result, the output voltage goes to low level. In this state, thefeed-through current stops and its resultant voltage drop disappears, and the output goes from "L" to "H". The
feed-through current is then generated again, a voltage drop appears, and repeating the process finally induces
oscillation.
VDD
RA
VIN
S-1009C

OUT

RB
VSS

Figure 23

Example for Bad Implementation Due to Detection Voltage Change170.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series
 Precautions
 Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
 In CMOS output product of the S-1009 Series, the feed-through current flows at the detection and the release. If the
input impedance is high, oscillation may occur due to the voltage drop by the feed-through current during releasing.
 In CMOS output product oscillation may occur when a pull-down resistor is used, and falling speed of the power
supply voltage (VDD) is slow near the detection voltage.
 When designing for mass production using an application circuit described herein, the product deviation andtemperature characteristics of the external parts should be taken into consideration. ABLIC Inc. shall not bear any
responsibility for patent infringements related to products using the circuits described herein.
 ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement byproducts including this IC of patents owned by a third party.

18

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

 Characteristics (Typical Data)1.

Detection voltage (VDET) vs. Temperature (Ta)S-1009N08
0.90

S-1009N11
1.20
+VDET

0.80
−VDET

0.75
0.70

−40 −2525
Ta [°C]

50

75 85

VDET [V]VDET [V]

1.20

−VDET

25
Ta [°C]

50

75 85

+VDET

4.60

−VDET

4.40
−40 −254.20
025Ta [°C]50

75 85−40 −25025Ta [°C]

50

75 85

0

25
Ta [°C]

50

75 85

0

25
Ta [°C]50

75 85

Hysteresis width (VHYS) vs. Temperature (Ta)S-1009N08
8S-1009N11
8
7
VHYS [%]

7
VHYS [%]

0

4.80

+VDET

1.10

6
5
4
3

−40 −2553025Ta [°C]50

75 85−40 −25

S-1009N46
8
7
VHYS [%]

7
6
5
4
3

6

4

S-1009N128VHYS [%]−40 −25

S-1009N46
5.00

1.30

2.

−VDET

1.05

S-1009N12
1.40

1.00

1.10

1.00
0

+VDET

1.15
VDET [V]VDET [V]

0.85

6
5
4

−40 −253025Ta [°C]50

75 85−40 −2519

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

3.

Current consumption (ISS) vs. Input voltage (VDD)
Ta = 25°C

S-1009C08
1.50

0.75

1.00

ISS [μA]

ISS [μA]

1.25
0.75
0.50
0

0
0

2

4
6
VDD [V]

S-1009C12
1.0

8

10

0

Ta = 25°C

S-1009C46
1.0

0.50
0.25

8

10

Ta = 25°C

0.50

0
0

2

8

4
6
VDD [V]

0

10

2

8

4
6
VDD [V]

10

Current consumption (ISS) vs. Temperature (Ta)VDD = VDET  0.6 V

S-1009N08
1.00

ISS [μA]

0.75

0.50
0.25
0

0.50
0.25

−40 −250025Ta [°C]

50

75 85

VDD = VDET  0.6 V

S-1009N12
1.00−40 −25025Ta [°C]

50

75 85

VDD = VDET  0.6 V

S-1009N46
1.00
0.75
ISS [μA]

0.75
0.50
0.25
0

VDD = VDET  0.6 V

S-1009N11
1.00

0.75
ISS [μA]

4
6
VDD [V]

0.25

0ISS [μA]20.75
ISS [μA]

ISS [μA]

0.75

20

0.50
0.25

0.25

4.

Ta = 25°C

S-1009C11
1.00

0.50
0.25

−40 −250025Ta [°C]50

75 85−40 −25025Ta [°C]50

75 85

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

Nch transistor output current (IOUT) vs. VDS
Ta = 25°C

S-1009N46
15.0

VDD = 3.6 V

10.0
2.4 V

7.5
5.0
1.2 V
1.0 V

2.5
0
0

7.

IOUT [mA]

Ta = −40°C

3.0
+25°C
+85°C

1.0
0
0

1.0

2.0

VDD = 8.4 V

30.0

7.2 V
6.0 V

20.0

4.8 V
3.6 V
2.4 V
1.2 V

10.0

3.0
4.0
VDD [V]0

8.

VDS = 0.5 V

2.0

Ta = 25°C

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
VDS [V]Nch transistor output current (IOUT) vs.
Input voltage (VDD)

S-1009N46
4.0

Pch transistor output current (IOUT) vs. VDS

S-1009C08
40.0
IOUT [mA]

IOUT [mA]

12.5

6.

2.0

5.0

6.0

4.0
6.0
VDS [V]

8.0

10.0

Pch transistor output current (IOUT) vs.
Input voltage (VDD)

S-1009C08
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0

VDS = 0.5 V
Ta = −40°C

IOUT [mA]

5.

+25°C
+85°C
2

4
6
VDD [V]

8

10

Remark VDS: Drain-to-source voltage of the output transistor

21

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

9.

Minimum operation voltage (VOUT) vs. Input voltage (VDD)

S-1009N08

Pull-up to VDD
Pull-up resistance: 100 k

S-1009N11

1.2
0.8
0.6

VOUT [V]

VOUT [V]1.0

Ta = −40°C

0.4

+25°C

0.2

+85°C

0
0

0.2

0.4
0.6
VDD [V]

S-1009N12

0.8

0.4

0.6 0.8
VDD [V]

1.0

1.2

Pull-up to VDD
Pull-up resistance: 100 k

5.0

0.8

Ta = −40°C

0.4

+25°C

VOUT [V]

VOUT [V]

0.2

6.0

0

0.2

0.4

S-1009N08

4.0
3.0

Ta = −40°C

2.0

+25°C

1.0

+85°C

0

+85°C

0

0.6 0.8
VDD [V]

1.0

1.2

1.4

Pull-up to 10 V
Pull-up resistance: 100 k

0

1.0

S-1009N11

12.0

2.0
3.0
VDD [V]

4.0

5.0

Pull-up to 10 V
Pull-up resistance: 100 k

12.0

10.0

Ta = −40°C

10.0

8.0

+25°C

8.0

6.0

+85°C

VOUT [V]

VOUT [V]

+25°C
+85°C

S-1009N46

1.2

4.0
2.0

Ta = −40°C
+25°C

6.0

+85°C

4.0
2.0

0

0
0

0.2

0.4
0.6
VDD [V]

S-1009N12

0.8

1.0

Pull-up to 10 V
Pull-up resistance: 100 k

00.2

S-1009N46

12.0

6.0

+25°C

4.0

+85°C

VOUT [V]8.0

2.0

0.6 0.8
VDD [V]

1.0

1.2

Ta = −40°C

10.0

Ta = −40°C

0.4

Pull-up to 10 V
Pull-up resistance: 100 k

12.0

10.0

VOUT [V]Ta = −40°C

0

1.6

+25°C

8.0

+85°C

6.0
4.0
2.0

0

0
0

22

1.4
1.2
1.0
0.8
0.6
0.4
0.2
0

1.0

Pull-up to VDD
Pull-up resistance: 100 k

Pull-up to VDD
Pull-up resistance: 100 k

0.2

0.4

0.6 0.8
VDD [V]

1.0

1.2

1.4

0

1.0

2.0
3.0
VDD [V]

4.0

5.0

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

10. Dynamic response vs. Output pin capacitance (COUT) (CD pin; open)
S-1009N08
10
Response time [ms]Response time [ms]S-1009C08
1
tPLH
0.1
tPHL
0.01
0.001
0.00001

0.001
0.01
0.0001
Output pin capacitance [μF]

0.1

tPLH
0.1
tPHL
0.01
0.001
0.00001

0.001
0.01
0.0001
Output pin capacitance [μF]0.1Response time [ms]Response time [ms]

tPLH
0.1
tPHL
0.01

0.001
0.01
0.0001
Output pin capacitance [μF]0.1Response time [ms]Response time [ms]

tPLH
0.1

0.001
0.00001

0.001
0.00001

0.001
0.01
0.0001
Output pin capacitance [μF]

0.1

tPLH
1
0.1

tPHL

0.01
0.001
0.00001

0.001
0.01
0.0001
Output pin capacitance [μF]

0.1

1

tPLH

0.1
tPHL
0.01
0.001
0.00001

0.001
0.01
0.0001
Output pin capacitance [μF]0.1S-1009N46
10S-1009C46
1

0.01

tPHL
0.01

S-1009N12
10

S-1009C1210.001
0.00001

0.1

S-1009N11
10
Response time [ms]Response time [ms]S-1009C11
1

tPLH
1

tPHL

0.001
0.01
0.0001
Output pin capacitance [μF]

0.1

1

tPLH

0.1
0.01
0.001
0.00001

tPHL

0.001
0.01
0.0001
Output pin capacitance [μF]

0.1

23

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

1 s

1 s

VIH*1
Input voltage
VIL*2

R
tPHL

VDD

tPLH

V

*3

VDD  90%

*3

VDD

VDD



VSS

OUT
CD

*1

100 k
COUT

Output voltage

V



VDD1

*1

*3

VDD  10%

*1.
*1.
*2.
*3.

VIH = 10 V
VIL = 0.7 V
CMOS output product: VDD
Nch open-drain product: VDD1
Figure 24

CautionTest Condition of Response TimeR and VDD1 are unnecessary for CMOS output
product.

Figure 25

Test Circuit of Response Time1.

The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
2. When the CD pin is open, a double pulse may appear at release.
To avoid the double pulse, attach 100 pF or more capacitor to the CD pin.
Response time when detecting (tPHL) is not affected by CD pin capacitance. Besides, responsetime when releasing (tPLH) can be set the delay time by attaching the CD pin.
Refer to "11. Delay time (tD) vs. CD pin capacitance (CD) (without output pin capacitance)" fordetails.

11. Delay time (tD) vs. CD pin capacitance (CD) (without output pin capacitance)
Ta = 25°C

1000

1000

100

100

10
1

0.1
0.1

1

10
CD [nF]

100

0.1

1000

Ta = 25°C

S-1009N12
10000
1000

1000

100

100

10
1

1

10
CD [nF]

100

1000

Ta = 25°C

S-1009N46
10000

tD [ms]tD [ms]

10
1

0.1

10
1

0.1

0.1
0.1

24

Ta = 25°C

S-1009N11
10000

tD [ms]tD [ms]

S-1009N08
10000

1

10
CD [nF]

100

1000

0.1

1

10
CD [nF]100

1000

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

12. Delay time (tD) vs. Temperature (Ta)CD = 4.7 nF

S-1009N11
50

40

40

30

30

tD [ms]tD [ms]

S-1009N08
50

20
10
0

−40 −250025Ta [°C]50

75 85

CD = 4.7 nF

40

40

30

30

20
10

−40 −25025Ta [°C]

S-1009N46
50

tD [ms]tD [ms]20
10S-1009N1250

0CD = 4.7 nF

50

75 85

CD = 4.7 nF

20
10−40 −250025Ta [°C]50

75 85−40 −25025Ta [°C]

50

75 85

1 s
VIH

*1

R*1
VDD

Input voltage
VIL*2

tD

 VDD
V
VSS

OUT
CD
CD

VDD  90%

100 k

V



Output voltage
*1.

VSS
*1.
*2.

R is unnecessary for CMOS output product.

VIH = 10 V
VIL = 0.7 V
Figure 26

CautionTest Condition for Delay Time

Figure 27

Test Circuit for Delay TimeThe above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.

25

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series
 Application Circuit Examples
1.

Microcomputer reset circuits
In microcomputers, when the power supply voltage is lower than the guaranteed operation voltage, an unspecified
operation may be performed or the contents of the memory register may be lost. When power supply voltage
returns to the normal level, the microcomputer needs to be initialized. Otherwise, the microcomputer may
malfunction after that. Reset circuits to protect microcomputer in the event of current being momentarily switched
off or lowered.
Using the S-1009 Series which has the low operation voltage, a high accuracy detection voltage and hysteresis,
reset circuits can be easily constructed as seen in Figure 28 and Figure 29.
VDD1

VDD2

VDD

S-1009C

S-1009N

Microcomputer

Microcomputer

VSS

VSS

Figure 28 Example of Reset Circuit(CMOS Output Product)
Caution26

Figure 29 Example of Reset Circuit(Nch Open-drain Output Product)

The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

2.

Power-on reset circuit (Nch open-drain output product only)
A power-on reset circuit can be constructed using the S-1009N Series.
VDD
RA

*1

(RA  100 k)

R

*2

Di

100 k
VIN

S-1009N

OUT(Nch open-drain output product)

C

VSS

*1.
*2.

RA should be 100 k or less to prevent oscillation.
Diode (Di) instantaneously discharges the charge stored in the capacitor (C) at the power falling. Di can beremoved when the delay of the falling time is not important.
Figure 30

VDD
[V]

OUT
[V]

t [s]

t [s]

Figure 31
RemarkWhen the power rises sharply, the output may instantaneously be set to the "H" level due to the IC’s
indefinite area (the output voltage is indefinite when it is the IC’s minimum operation voltage or less),
as seen in Figure 32.

VDD
[V]

OUT
[V]

t [s]

t [s]

Figure 32
Caution

1.
2.

The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
Note that the hysteresis width may be larger as the following equation shows when using theabove connection. Perform thorough evaluation using the actual application to set theconstant.
Maximum hysteresis width = VHYS RA  20 A27

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

3.

Change of detection voltage (Nch open-drain output product only)
If there is not a product with a specified detection voltage value in the S-1009N Series, the detection voltage can bechanged by using a resistance divider or a diode, as seen in Figure 33 and Figure 34.
In Figure 33, hysteresis width also changes.
VDD

VDD
RA

(RA  100 k)

VIN

VIN

OUT

S-1009N

S-1009N

OUT(Nch open-drain
output product)(Nch open-drain
ouput product)

VSS

VSS

RA  RB
 VDETRBRA  RB
Hysteresis width = VHYSRB

Detection voltage =Detection voltage = Vf1  (VDET)RA should be 100 k or less to prevent oscillation.

CautionIf RA and RB are large, the hysteresis width
may also be larger than the value given by
the above equation due to the feed-throughcurrent.
Figure 33

Caution1.
2.

Figure 34

The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
Note that the hysteresis width may be larger as the following equation shows when using theabove connections. Perform thorough evaluation using the actual application to set theconstant.
Maximum hysteresis width =28

100 k

100 k

RB

*1.

R

Vf1

R

*1

R A  RB
 VHYSRA  20 ARB

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series Marking Specifications
1.

SOT-23-5
Top view
54(1) to (3):(4):

Product code (refer to Product name vs. Product code)
Lot number(1) (2) (3) (4)

1

2

3

Product name vs. Product code
1. 1

Nch open-drain output productProduct Code
Product Name
(1)
(2)
(3)
S-1009N08I-M5T1U
T
8A
S-1009N09I-M5T1U
T
8
B
S-1009N10I-M5T1U
T
8C
S-1009N11I-M5T1U
T
8
D
S-1009N12I-M5T1U
T
8
E
S-1009N13I-M5T1U
T
8F
S-1009N14I-M5T1U
T
8
G
S-1009N15I-M5T1U
T
8
H
S-1009N16I-M5T1U
T
8I
S-1009N17I-M5T1U
T
8J
S-1009N18I-M5T1U
T
8K
S-1009N19I-M5T1U
T
8
L
S-1009N20I-M5T1U
T
8
M
S-1009N21I-M5T1U
T
8N
S-1009N22I-M5T1U
T
8O
S-1009N23I-M5T1U
T
8
P
S-1009N24I-M5T1U
T
8Q
S-1009N25I-M5T1U
T
8
R
S-1009N26I-M5T1U
T
8S
S-1009N27I-M5T1U
T
8
T
S-1009N28I-M5T1U
T
8U
S-1009N29I-M5T1U
T
8V
S-1009N30I-M5T1U
T
8W
S-1009N31I-M5T1U
T
8X
S-1009N32I-M5T1U
T
8
Y
S-1009N33I-M5T1U
T
8Z
S-1009N34I-M5T1U
T
9A
S-1009N35I-M5T1U
T
9
B
S-1009N36I-M5T1U
T
9C
S-1009N37I-M5T1U
T
9
D
S-1009N38I-M5T1U
T
9E
S-1009N39I-M5T1U
T
9F
S-1009N40I-M5T1U
T
9G
S-1009N41I-M5T1U
T
9H
S-1009N42I-M5T1U
T
9I
S-1009N43I-M5T1U
T
9J
S-1009N44I-M5T1U
T
9K
S-1009N45I-M5T1U
T
9
L
S-1009N46I-M5T1U
T
9
M

1. 2

CMOS output productProduct Name
S-1009C08I-M5T1U
S-1009C09I-M5T1U
S-1009C10I-M5T1U
S-1009C11I-M5T1U
S-1009C12I-M5T1U
S-1009C13I-M5T1U
S-1009C14I-M5T1U
S-1009C15I-M5T1U
S-1009C16I-M5T1U
S-1009C17I-M5T1U
S-1009C18I-M5T1U
S-1009C19I-M5T1U
S-1009C20I-M5T1U
S-1009C21I-M5T1U
S-1009C22I-M5T1U
S-1009C23I-M5T1U
S-1009C24I-M5T1U
S-1009C25I-M5T1U
S-1009C26I-M5T1U
S-1009C27I-M5T1U
S-1009C28I-M5T1U
S-1009C29I-M5T1U
S-1009C30I-M5T1U
S-1009C31I-M5T1U
S-1009C32I-M5T1U
S-1009C33I-M5T1U
S-1009C34I-M5T1U
S-1009C35I-M5T1U
S-1009C36I-M5T1U
S-1009C37I-M5T1U
S-1009C38I-M5T1U
S-1009C39I-M5T1U
S-1009C40I-M5T1U
S-1009C41I-M5T1U
S-1009C42I-M5T1U
S-1009C43I-M5T1U
S-1009C44I-M5T1U
S-1009C45I-M5T1U
S-1009C46I-M5T1U

Product Code
(1)
(2)
(3)
T
6
A
T
6
B
T
6
C
T
6
D
T
6
E
T
6
F
T
6
G
T
6
H
T
6
I
T
6
J
T
6
K
T
6
L
T
6
M
T
6
N
T
6
O
T
6
P
T
6
Q
T
6
R
T
6
S
T
6
T
T
6
U
T
6
V
T
6
W
T
6
X
T
6
Y
T
6
Z
T
7
A
T
7
B
T
7
C
T
7
D
T
7
E
T
7
F
T
7
G
T
7
H
T
7
I
T
7
J
T
7
K
T
7
L
T
7
M

29

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series

2.

SC-82ABTop view
43(1) to (3):Product code (refer to Product name vs. Product code)(1) (2) (3)12

Product name vs. Product code
2. 1

Nch open-drain output productProduct Code
Product Name
(1)
(2)
(3)
S-1009N08I-N4T1U
T
8A
S-1009N09I-N4T1U
T
8
B
S-1009N10I-N4T1U
T
8C
S-1009N11I-N4T1U
T
8
D
S-1009N12I-N4T1U
T
8
E
S-1009N13I-N4T1U
T
8F
S-1009N14I-N4T1U
T
8
G
S-1009N15I-N4T1U
T
8
H
S-1009N16I-N4T1U
T
8I
S-1009N17I-N4T1U
T
8J
S-1009N18I-N4T1U
T
8K
S-1009N19I-N4T1U
T
8
L
S-1009N20I-N4T1U
T
8
M
S-1009N21I-N4T1U
T
8N
S-1009N22I-N4T1U
T
8O
S-1009N23I-N4T1U
T
8
P
S-1009N24I-N4T1U
T
8Q
S-1009N25I-N4T1U
T
8
R
S-1009N26I-N4T1U
T
8S
S-1009N27I-N4T1U
T
8
T
S-1009N28I-N4T1U
T
8U
S-1009N29I-N4T1U
T
8V
S-1009N30I-N4T1U
T
8W
S-1009N31I-N4T1U
T
8X
S-1009N32I-N4T1U
T
8Y
S-1009N33I-N4T1U
T
8Z
S-1009N34I-N4T1U
T
9A
S-1009N35I-N4T1U
T
9B
S-1009N36I-N4T1U
T
9C
S-1009N37I-N4T1U
T
9
D
S-1009N38I-N4T1U
T
9E
S-1009N39I-N4T1U
T
9F
S-1009N40I-N4T1U
T
9G
S-1009N41I-N4T1U
T
9H
S-1009N42I-N4T1U
T
9I
S-1009N43I-N4T1U
T
9J
S-1009N44I-N4T1U
T
9K
S-1009N45I-N4T1U
T
9
L
S-1009N46I-N4T1U
T
9
M

30

2. 2

CMOS output productProduct Name
S-1009C08I-N4T1U
S-1009C09I-N4T1U
S-1009C10I-N4T1U
S-1009C11I-N4T1U
S-1009C12I-N4T1U
S-1009C13I-N4T1U
S-1009C14I-N4T1U
S-1009C15I-N4T1U
S-1009C16I-N4T1U
S-1009C17I-N4T1U
S-1009C18I-N4T1U
S-1009C19I-N4T1U
S-1009C20I-N4T1U
S-1009C21I-N4T1U
S-1009C22I-N4T1U
S-1009C23I-N4T1U
S-1009C24I-N4T1U
S-1009C25I-N4T1U
S-1009C26I-N4T1U
S-1009C27I-N4T1U
S-1009C28I-N4T1U
S-1009C29I-N4T1U
S-1009C30I-N4T1U
S-1009C31I-N4T1U
S-1009C32I-N4T1U
S-1009C33I-N4T1U
S-1009C34I-N4T1U
S-1009C35I-N4T1U
S-1009C36I-N4T1U
S-1009C37I-N4T1U
S-1009C38I-N4T1U
S-1009C39I-N4T1U
S-1009C40I-N4T1U
S-1009C41I-N4T1U
S-1009C42I-N4T1U
S-1009C43I-N4T1U
S-1009C44I-N4T1U
S-1009C45I-N4T1U
S-1009C46I-N4T1U

Product Code
(1)
(2)
(3)
T
6
A
T
6
B
T
6
C
T
6
D
T
6
E
T
6
F
T
6
G
T
6
H
T
6
I
T
6
J
T
6
K
T
6
L
T
6
M
T
6
N
T
6
O
T
6
P
T
6
Q
T
6
R
T
6
S
T
6
T
T
6
U
T
6
V
T
6
W
T
6
X
T
6
Y
T
6
Z
T
7
A
T
7
B
T
7
C
T
7
D
T
7
E
T
7
F
T
7
G
T
7
H
T
7
I
T
7
J
T
7
K
T
7
L
T
7
M

0.27 A CURRENT CONSUMPTION VOLTAGE DETECTOR WITH DELAY FUNCTION (EXTERNAL DELAY TIME SETTING)
Rev.5.1_03
S-1009 Series3.

SNT-4ATop view
1(1) to (3):Product code (refer to Product name vs. Product code)

4(1) (2) (3)23

Product name vs. Product code
3. 1

Nch open-drain output productProduct Code
Product Name
(1)
(2)
(3)
S-1009N08I-I4T1U
T
8
A
S-1009N09I-I4T1U
T
8
B
S-1009N10I-I4T1U
T
8C
S-1009N11I-I4T1U
T
8
D
S-1009N12I-I4T1U
T
8E
S-1009N13I-I4T1U
T
8F
S-1009N14I-I4T1U
T
8
G
S-1009N15I-I4T1U
T
8
H
S-1009N16I-I4T1U
T
8I
S-1009N17I-I4T1U
T
8J
S-1009N18I-I4T1U
T
8K
S-1009N19I-I4T1U
T
8
L
S-1009N20I-I4T1U
T
8
M
S-1009N21I-I4T1U
T
8N
S-1009N22I-I4T1U
T
8O
S-1009N23I-I4T1U
T
8
P
S-1009N24I-I4T1U
T
8Q
S-1009N25I-I4T1U
T
8
R
S-1009N26I-I4T1U
T
8S
S-1009N27I-I4T1U
T
8
T
S-1009N28I-I4T1U
T
8U
S-1009N29I-I4T1U
T
8V
S-1009N30I-I4T1U
T
8W
S-1009N31I-I4T1U
T
8X
S-1009N32I-I4T1U
T
8Y
S-1009N33I-I4T1U
T
8Z
S-1009N34I-I4T1U
T
9A
S-1009N35I-I4T1U
T
9B
S-1009N36I-I4T1U
T
9C
S-1009N37I-I4T1U
T
9
D
S-1009N38I-I4T1U
T
9E
S-1009N39I-I4T1U
T
9F
S-1009N40I-I4T1U
T
9G
S-1009N41I-I4T1U
T
9H
S-1009N42I-I4T1U
T
9I
S-1009N43I-I4T1U
T
9J
S-1009N44I-I4T1U
T
9K
S-1009N45I-I4T1U
T
9
L
S-1009N46I-I4T1U
T
9
M

3. 2

CMOS output productProduct Name
S-1009C08I-I4T1U
S-1009C09I-I4T1U
S-1009C10I-I4T1U
S-1009C11I-I4T1U
S-1009C12I-I4T1U
S-1009C13I-I4T1U
S-1009C14I-I4T1U
S-1009C15I-I4T1U
S-1009C16I-I4T1U
S-1009C17I-I4T1U
S-1009C18I-I4T1U
S-1009C19I-I4T1U
S-1009C20I-I4T1U
S-1009C21I-I4T1U
S-1009C22I-I4T1U
S-1009C23I-I4T1U
S-1009C24I-I4T1U
S-1009C25I-I4T1U
S-1009C26I-I4T1U
S-1009C27I-I4T1U
S-1009C28I-I4T1U
S-1009C29I-I4T1U
S-1009C30I-I4T1U
S-1009C31I-I4T1U
S-1009C32I-I4T1U
S-1009C33I-I4T1U
S-1009C34I-I4T1U
S-1009C35I-I4T1U
S-1009C36I-I4T1U
S-1009C37I-I4T1U
S-1009C38I-I4T1U
S-1009C39I-I4T1U
S-1009C40I-I4T1U
S-1009C41I-I4T1U
S-1009C42I-I4T1U
S-1009C43I-I4T1U
S-1009C44I-I4T1U
S-1009C45I-I4T1U
S-1009C46I-I4T1U

Product Code
(1)
(2)
(3)
T
6
A
T
6
B
T
6
C
T
6
D
T
6
E
T
6
F
T
6
G
T
6
H
T
6
I
T
6
J
T
6
K
T
6
L
T
6
M
T
6
N
T
6
O
T
6
P
T
6
Q
T
6
R
T
6
S
T
6
T
T
6
U
T
6
V
T
6
W
T
6
X
T
6
Y
T
6
Z
T
7
A
T
7
B
T
7
C
T
7
D
T
7
E
T
7
F
T
7
G
T
7
H
T
7
I
T
7
J
T
7
K
T
7
L
T
7
M

31

2.9±0.2
1.9±0.2
4

5

1

2

+0.1

0.16 -0.06

30.95±0.1
0.4±0.1

No. MP005-A-P-SD-1.3

TITLE

SOT235-A-PKG Dimensions

No.

MP005-A-P-SD-1.3

ANGLE
UNIT

mm

ABLIC Inc.

4.0±0.1(10 pitches:40.0±0.2)+0.1

ø1.5 -0+0.2

ø1.0 -0

2.0±0.05

0.25±0.1

4.0±0.1

1.4±0.2

3.2±0.2

3 2 1

4

5

Feed direction

No. MP005-A-C-SD-2.1

TITLE

SOT235-A-Carrier Tape

No.

MP005-A-C-SD-2.1

ANGLE
UNIT

mm

ABLIC Inc.

12.5max.

9.0±0.3

Enlarged drawing in the central part
ø13±0.2

(60°)

(60°)

No. MP005-A-R-SD-1.1

TITLE

SOT235-A-Reel

No.

MP005-A-R-SD-1.1

ANGLE

QTY.

UNIT

mm

ABLIC Inc.

3,000

2.0±0.2
1.3±0.2

4

3

0.05

+0.1
0.3 -0.05+0.1

0.16 -0.06

2

1

+0.1

0.4 -0.05

No. NP004-A-P-SD-2.0

TITLE

SC82AB-A-PKG Dimensions

No.

NP004-A-P-SD-2.0

ANGLE
UNIT

mm

ABLIC Inc.

+0.1

ø1.5 -0

4.0±0.1

2.0±0.05

1.1±0.1

4.0±0.1

0.2±0.05

ø1.05±0.1(0.7)

2.2±0.2

2

1

3

4

Feed direction

No. NP004-A-C-SD-3.0

TITLE

SC82AB-A-Carrier Tape

No.

NP004-A-C-SD-3.0

ANGLE
UNIT

mm

ABLIC Inc.

4.0±0.1

2.0±0.1

1.1±0.1+0.1
ø1.5 -0

4.0±0.1

0.2±0.05

ø1.05±0.1

2.3±0.15

2

1

3

4

Feed direction

No. NP004-A-C-S1-2.0

TITLE

SC82AB-A-Carrier Tape

No.

NP004-A-C-S1-2.0

ANGLE
UNIT

mm

ABLIC Inc.

12.5max.

9.0±0.3
Enlarged drawing in the central part

ø13±0.2

(60°)

(60°)

No. NP004-A-R-SD-1.1

TITLE

SC82AB-A-ReelNo.

NP004-A-R-SD-1.1
QTY.

ANGLE
UNIT

mm

ABLIC Inc.

3,000

1.2±0.04
3

4

+0.05
0.08 -0.02

2

1

0.65
0.48±0.02

0.2±0.05

No. PF004-A-P-SD-6.0

TITLE

SNT-4A-A-PKG Dimensions

No.

PF004-A-P-SD-6.0

ANGLE
UNIT

mm

ABLIC Inc.

+0.1

ø1.5 -0

4.0±0.1

2.0±0.05

0.25±0.05+0.1

1.45±0.1

2

1

3

4

ø0.5 -0

4.0±0.1

0.65±0.05

Feed direction

No. PF004-A-C-SD-2.0

TITLE

SNT-4A-A-Carrier TapeNo.

PF004-A-C-SD-2.0

ANGLE
UNIT

mm

ABLIC Inc.

12.5max.

9.0±0.3

Enlarged drawing in the central part
ø13±0.2

(60°)

(60°)

No. PF004-A-R-SD-1.0

TITLE

SNT-4A-A-Reel

No.

PF004-A-R-SD-1.0
QTY.

ANGLE
UNIT

mm

ABLIC Inc.

5,000

0.52

1.16

2

0.52

0.35

1.
2.

0.3

1

(0.25 mm min. / 0.30 mm typ.)(1.10 mm ~ 1.20 mm)
0.03 mm

1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package (1.10 mm to 1.20 mm).
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
1.
2.

(0.25 mm min. / 0.30 mm typ.)(1.10 mm ~ 1.20 mm)

No. PF004-A-L-SD-4.1

TITLE

SNT-4A-A-Land Recommendation

No.

PF004-A-L-SD-4.1

ANGLE
UNIT

mm

ABLIC Inc.

Disclaimers (Handling Precautions)1.

All the information described herein (product data, specifications, figures, tables, programs, algorithms andapplication circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.

2.

The circuit examples and the usages described herein are for reference only, and do not guarantee the success ofany specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any otherright due to the use of the information described herein.

3.

ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information describedherein.

4.

Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due tothe use of the products outside their specified ranges.

5.

Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.

6.

When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-relatedlaws, and follow the required procedures.

7.

The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,biological or chemical weapons or missiles, or use any other military purposes.

8.

The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.

9.

In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products areallowed to apply for the system on customer's own responsibility.

10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of thisdocument described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07

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