PTN36221A
Single-channel SuperSpeed USB 3.0 redriverRev. 2.1 — 25 August 2015

Product data sheet

1. General description
The PTN36221A is a small, low power, high performance SuperSpeed USB 3.0 redriverthat enhances signal quality by performing receive equalization on the deteriorated input
signal followed by transmit de-emphasis maximizing system link performance. With its
superior differential signal conditioning and enhancement capability, the device delivers
significant flexibility and performance scaling for various systems with different PCB trace
and cable channel conditions and still benefit from optimum power consumption.
PTN36221A is a single-channel device that supports data signaling rate of 5 Gbit/s.
The PTN36221A has built-in advanced power management capability that enables
significant power saving under various different USB 3.0 Low-power modes (U2/U3). The
device performs these actions without host software intervention and conserves power.
The PTN36221A is powered by a 1.8 V supply. It is available in X2QFN12
1.6 mm  1.6 mm  0.35 mm package with 0.4 mm pitch.

2. Features and benefits














Supports single-channel USB 3.0 redriver at 5 Gbit/s
Compliant to SuperSpeed USB 3.0 standard
Supports Low Frequency Periodic Signaling (LFPS) and is USB3.0 compatible
Adjustable receive equalization, transmit de-emphasis and output swing functions
 Selectable receive equalization to recover from InterSymbol Interference (ISI) andhigh-frequency losses Selectable transmit de-emphasis and output swing delivers pre-compensation
suited to channel conditions
 Selectable output swing adjustment
Integrated termination resistors provide impedance matching on both transmit andreceive paths
Automatic receiver termination detection
Low power management scheme (When VDD = 1.8 V, Vos = 1000 mV)
 97 mW active power 5 mW in U2/U3 state 1 mW with no connection
 18 W in Deep power saving state
Support hot plug with automatic receiver detect
Power supply: 1.8 V  5 %
ESD 8 kV HBM, 1 kV CDM for data path
Operating temperature range: 40 C to +85 C

PTN36221A

NXP Semiconductors

Single-channel SuperSpeed USB 3.0 redriver Package offered: X2QFN12 package 1.6 mm  1.6 mm  0.35 mm, 0.4 mm pitch

3. Applications








Smart phones, tablets
Active cables
Notebook/netbook/nettop platforms
Docking stations
Desktop and AIO platforms
Server and storage platforms
USB 3.0 peripherals such as consumer/storage devices, printers, or USB 3.0 capablehubs/repeaters

4. System context diagrams
The system context diagrams in Figure 1 illustrate PTN36221A usage.

Rx

TXP

PTN36221A
RXN

TXN

TXP

RXP

PTN36221A
TXN

RXN

RXP

TXP

NOTEBOOK/DESKTOP

USB sync
cable plug

CONNECTOR

Tx

USB cable/
dongleCONNECTORRXP
APPLICATIONPROCESSOR/
USB HOSTCONTROLLERCONNECTORMOBILE DEVICEUSB
PERIPHERAL/
AV DISPLAY
WITH HUBAPPLICATIONPROCESSOR/
USB HOSTCONTROLLER

Tx

Rx

PTN36221A
RXN

TXN

TXP

RXP

PTN36221A
TXN

RXN

CONNECTORMOBILE HOST

002aah762

Fig 1.

PTN36221A context diagrams

PTN36221A

Product data sheet

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Rev. 2.1 — 25 August 2015

© NXP Semiconductors N.V. 2015. All rights reserved.

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PTN36221A

NXP Semiconductors

Single-channel SuperSpeed USB 3.0 redriver

5. Ordering information
Table 1.

Ordering information

Type number

Topsidemark

Package
Name

Description

Version

PTN36221AHX

1A*[1]X2QFN12plastic, super thin quad flat package; no leads;
12 terminals; body 1.6  1.6  0.35 mm[2]SOT1355-1[1]

Where * = week of the month.

[2]

Maximum package height = 0.4 mm.

5.1 Ordering options
Table 2.

Ordering options

Type number

Orderable
part number

Package

Packing method

Minimum
order
quantity

Temperature

PTN36221AHX

PTN36221AHXHP

X2QFN12Reel 13” Q2/T3*Standard mark SMD

10000

Tamb = 40 C to +85 C

PTN36221AHXZ

X2QFN12Reel 7” Q2/T3*Standard mark

5000

Tamb = 40 C to +85 C

6. Block diagram
VSS

VDD
VDD

PTN36221A
VDD

line
driverequalizer

RXP
RXN

TXP
TXN

EMPHASISFILTER
SIGNAL
DETECTION
DEVICE CONTROL AND MANAGEMENTRXTERMINATION
DETECTION

002aah759

EN

Fig 2.

PTN36221A

Product data sheet

EQ

OS

DE

Block diagram of PTN36221A

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Rev. 2.1 — 25 August 2015

© NXP Semiconductors N.V. 2015. All rights reserved.

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PTN36221A

NXP Semiconductors

Single-channel SuperSpeed USB 3.0 redriver

7. Pinning information

8

DE

VSS

OS

NCT2
5

6
EQ

8

DE

10

9
EN

12
TXN

NCT1

6
OS

Transparent top view

11

5

1

NCT2

VDD

4

EQ

RXP

7

3

7

PTN36221AHX

2

RXN

RXP

2

PTN36221AHX
VSS

4

RXN
3

EN

NCT1
10

9

TXP

1

TXP

VDD

11

12

TXN

7.1 Pinning

Bottom view002aah760

Refer to Section 12 for package-related information.

Fig 3.

Pin configuration for X2QFN12

7.2 Pin description
Table 3.

Pin description

SymbolPin

Type

Description

High-speed differential signals
RXP

4

self-biasing
differential
input

Differential signal from SuperSpeed USB 3.0 transmitter.
RXP makes a differential pair with RXN. The input to this pin
must be AC-coupled externally.

RXN

3

self-biasing
differential
input

Differential signal from SuperSpeed USB 3.0 transmitter.
RXN makes a differential pair with RXP. The input to this pin
must be AC-coupled externally.

TXP

11

self-biasing
differential
outputDifferential signal to SuperSpeed USB 3.0 receiver.
TXP makes a differential pair with TXN. The output of this pin
must be AC-coupled externally.

TXN

12

self-biasing
differential
outputDifferential signal to SuperSpeed USB 3.0 receiver.
TXN makes a differential pair with TXP. The output of this pin
must be AC-coupled externally.

Control and configuration signals

PTN36221A

Product data sheet

NCT1

10

CMOS input

Test pin 1. Leave open or connect to ground for functional
mode.

NCT2

5

analog input

Test pin 2. Leave open or connect to ground for functional
mode.

EN

9

CMOS input

Chip enable input (active HIGH); internal 260 k pull-up
resistor.

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Rev. 2.1 — 25 August 2015

© NXP Semiconductors N.V. 2015. All rights reserved.

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PTN36221A

NXP Semiconductors

Single-channel SuperSpeed USB 3.0 redriver

Table 3.

Pin description …continued

SymbolPin

Type

Description

DE

8Trinary input

Programmable output de-emphasis level setting for the output
channel.
[DE] =
LOW: 0 dB
open: 3.5 dB (default)
HIGH: 6 dB

EQ

7Trinary input

Equalizer control for the input channel.
[EQ] =
LOW: 3 dB
open: 6 dB (default)
HIGH: 9 dBOS

6Trinary input

Differential output swing control.
[OS] =
LOW: 900 mV
open: 1000 mV (default)
HIGH: 1100 mV

Supply voltage
VDD

1

Power

1.8 V supply.

Ground connection
VSS

2

GroundGround supply (0 V).

8. Functional description
Refer to Figure 2 “Block diagram of PTN36221A”.
PTN36221A is a single-channel SuperSpeed USB 3.0 redriver meant to be used for signal
integrity enhancement on various platforms — smart phone, tablet, active cable,
notebooks, docking station, desktop, AIO, peripheral devices, etc. With its high fidelity
differential signal conditioning capability and wide configurability, this chip is flexible
enough for use under a variety of system environments.
The following sections describe the individual block functions and capabilities of thedevice in more detail.

8.1 Receive equalization
On the high-speed signal path, the device performs receive equalization providing
frequency selective gain to configuration pin EQ setting. Table 4 lists the configuration
options available in this device.
Table 4.

PTN36221A

Product data sheet

EQ configuration options

EQ

SuperSpeed USB 3.0 signal equalization gain at 2.5 GHz

LOW (0 V)

3 dB

Open

6 dB (default)

HIGH (1.8 V)

9 dB

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Rev. 2.1 — 25 August 2015

© NXP Semiconductors N.V. 2015. All rights reserved.

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PTN36221A

NXP Semiconductors

Single-channel SuperSpeed USB 3.0 redriver

8.2 Transmit de-emphasis
The PTN36221A device enhances High Frequency (HF) signal content further byperforming de-emphasis on the high-speed signals. In addition, the device provides flat
frequency gain by boosting output signal. Both flat and frequency selective gains prepare
the system to cover up for losses further down the link. Table 5 lists de-emphasis
configuration options of PTN36221A.
Table 5.

DE configuration options

DE

SuperSpeed USB 3.0 signal de-emphasis gain

LOW (0 V)

0 dB

Open

3.5 dB (default)

HIGH (1.8 V0

6 dB

Figure 4 illustrates de-emphasis as a function of time.

1 bit

1 to N bits

1 bit

1 to N bits

VTX_DIFF_DEp-p
VTX_CM_DC
VTX_DIFFp-p

002aag010

Fig 4.

Differential output with de-emphasis

8.3 Device states and power management
PTN36221A has implemented an advanced power management scheme that operates intune with USB 3.0 bus electrical condition. Though the device does not decode USB
power management commands (related to USB 3.0 U1/U2/U3 transitions) exchanged
between USB 3.0 host and peripheral/device, it relies on bus electrical conditions to
decide to be in one of the following states:• Active state wherein device is fully operational, USB data is transported. In this state,
USB connection exists, but there is no need for Receive Termination detection.

• Power-saving states:– U2/U3 state– No connection state• Deep power-saving state: When EN is LOW, this chip is in shut-down state.
The Receive Termination Detection circuitry is implemented as part of a transmitter anddetect whether a load device with equivalent DC impedance ZRX_DC is present.
PTN36221A

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2.1 — 25 August 2015

© NXP Semiconductors N.V. 2015. All rights reserved.

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PTN36221A

NXP Semiconductors

Single-channel SuperSpeed USB 3.0 redriver

9. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol

Min

Max

Unit

supply voltage

[1]

0.3

+2.5

V

VI

input voltage

[1]

0.3

VDD + 0.5V

Tstg

storage temperature

65

+150

C

HBM for high-speed pins

[2]

-

8000

V

HBM for control pins

[2]

-

4000

V

CDM for high-speed pins

[3]

-

1000

V

CDM for control pins

[3]

-

500

V

VDD

VESD

Parameter

Conditions

electrostatic discharge voltage[1]

All voltage values (except differential voltages) are with respect to network ground terminal.

[2]

Human Body Model: ANSI/ESDA/JEDEC JDS-001-2012 (Revision of ANSI/ESDA/JEDEC JS-001-2011), ESDA/JEDEC Joint standard
for ESD sensitivity testing, Human Body Model - Component level; Electrostatic Discharge Association, Rome, NY, USA; JEDEC Solid
State Technology Association, Arlington, VA, USA.

[3]

Charged Device Model; JESD22-C101E December 2009 (Revision of JESD220C101D, October 2008), standard for ESD sensitivity
testing, Charged Device Model - Component level; JEDEC Solid State Technology Association, Arlington, VA, USA.

10. Recommended operating conditions
Table 7.

Operating conditions

SymbolParameter

Conditions

Min

Typ

Max

Unit

VDD

supply voltage

1.8 V supply option

1.71

1.8

1.89

V

VI

input voltage

control and configuration pins(for example, EQ, DE, OS and EN)

0.3

VDD

VDD + 0.3V

Tambambient temperature

operating in free air

40

-

+85

C

PTN36221A

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2.1 — 25 August 2015

© NXP Semiconductors N.V. 2015. All rights reserved.

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PTN36221A

NXP Semiconductors

Single-channel SuperSpeed USB 3.0 redriver

11. Characteristics
11.1 Device characteristics
Table 8.
Device characteristics
VDD = 1.8 V  5 %; Tamb = 40 C to +85 C, unless otherwise specified.
SymbolParameter

Conditions

Min

Typ

Max

Unit

tstartup

start-up time

between supply voltage within operating range to
specified operating characteristics (90 % of VDD)
until first automatic receiver termination detection

-

-

6

ms

ts(HL)HIGH to LOW
settling timeenable to disable; power-down time;
EN HIGH  LOW change to deep power-saving
state; device is supplied with valid supply voltage

-

-

1

ms

ts(LH)

LOW to HIGH
settling time

disable to enable; start-up time;
EN LOW  HIGH change to specified operating
characteristics; device is supplied with valid supply
voltage

-

-

6

ms

trcfg

reconfiguration time

any configuration pin change (from one setting toanother setting) to specified operating characteristics;
device is supplied with valid supply voltage

-

-

115

ms

tPD(dif)differential
propagation delay

between 50 % level at input and output; see Figure 5

-

-

0.5

ns

tidle

idle timedefault wait time to wait before getting into
Power-saving state

-

300

400

ms

time for exiting from Power-saving state and get into
Active state; see Figure 7-

0.1

115[1] std(pwrsave-act) delay time frompower-save to activetd(act-idle)

delay time from active reaction time for squelch detection circuit andto idletransmitter output buffer; see Figure 6

-

9

14

ns

td(idle-act)delay time from idle
to active

reaction time for squelch detection circuit andtransmitter output buffer; see Figure 6

-

9

14

ns

IDD

supply current

Active state; Tx de-emphasis = 3.5 dB;
Rx equalization gain = 6 dB;
Tx output signal swing (peak-to-peak) = 1000 mV

-

57

-

mA

U2/U3 Power-saving state

-

2.8

mA

no USB connection state

-

0.4

mA

Deep power-saving state; EN = LOW

-

10

A

JEDEC still air test environment-

138.5 -C/W

Rth(j-a)[1]

thermal resistancefrom junction toambient

When special U2/U3 Power-saving mode is ON.

PTN36221A

Product data sheet

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Rev. 2.1 — 25 August 2015

© NXP Semiconductors N.V. 2015. All rights reserved.

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PTN36221A

NXP Semiconductors

Single-channel SuperSpeed USB 3.0 redriver

IN+
in

VHSSQ

VDC_CMIN−tPD(dif)tPD(dif)td(idle-act)

td(act-idle)

OUT+
out

VDC_CM
OUT−

002aag025

Fig 5.

Propagation delayFig 6.

aaa-011397

Electrical idle transitions in U0/U1 modes

Ux exit LFPS signaling

input

VHSSQ

td(pwrsave-act)
outputaaa-011398

Fig 7.

Power-save exit time

11.2 Receiver AC/DC characteristics
Table 9.
Receiver AC/DC characteristics
VDD = 1.8 V  5 %; Tamb = 40 C to +85 C, unless otherwise specified.
SymbolParameter

ZRX_DC

receiver DC common-mode impedance

Conditions

Min

Typ

Max

Unit

18

-

30



ZRX_DIFF_DC

DC differential impedance

RX pair

72

-

120



ZIH

HIGH-level input impedance

DC input; common-mode

25

-

-

k

VRX_DIFFp-p

differential input peak-to-peak voltage

receiver

VRX_DC_CM

RX DC common mode voltage

VRX_CM_AC_P

RX AC common-mode voltage

Vth(i)
VHSSQ

100

-

1200

mV

-

1.8

-

V

peak

-

-

150

mV

input threshold voltage

differential peak-to-peak
value

100

-

-

mV

high-speed squelch detection thresholdvoltage (differential signal amplitude)differential peak-to-peak
value

-

100

-

mV

PTN36221A

Product data sheet

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Rev. 2.1 — 25 August 2015

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PTN36221A

NXP Semiconductors

Single-channel SuperSpeed USB 3.0 redriver

11.3 Transmitter AC/DC characteristics
Table 10. Transmitter AC/DC characteristics
VDD = 1.8 V  5 %; Tamb = 40 C to +85 C, unless otherwise specified.
SymbolParameter

Conditions

ZTX_DCtransmitter DC common-mode
impedance

ZTX_DIFF_DC

DC differential impedance

TX pair

VTX_DIFFp-p

differential peak-to-peak
output voltage

RL = 100 
OS = open

Min

Typ

Max

Unit

18

-

30



72

-

120



900

1000

1100

mV

OS = HIGH

1000

1100

1200

mV

OS = LOW

800

900

1000

mV

-

1.3

VDD

V

VTX_DC_CM

transmitter DC common-mode
voltage

VTX_CM_ACpp_ACTIVTX AC common-mode
peak-to-peak output voltage(active state)device input fed withdifferential signal

-

-

100

mV

VTX_IDL_DIFF_ACppelectrical idle differential
peak-to-peak output voltage

when link is in electrical idle

-

-

10

mV

VTX_RCV_DETECT

voltage change allowed during
receiver detection

positive voltage swing tosense the receivertermination detection

-

-

600

mV

tr(tx)

transmit rise timemeasured using 20 % and
80 % levels; see Figure 8

40

55

75

ps

tf(tx)

transmit fall timemeasured using 80 % and
20 % levels; see Figure 8

40

55

75

ps

t(r-f)tx

difference between transmit
rise and fall timemeasured using 20 % and
80 % levels

-

-

15

ps

80 %
20 %
tr(tx)

tf(tx)
002aag027

Fig 8.

PTN36221A

Product data sheet

Output rise and fall times

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PTN36221A

NXP Semiconductors

Single-channel SuperSpeed USB 3.0 redriver

11.4 Jitter performance
Table 11 provides jitter performance of PTN36221A under a specific set of conditions thatis illustrated by Figure 9.
Table 11. Jitter performance characteristics
Unit Interval (UI) = 200 ps.
SymbolParameter

Conditions

tjit(o)(p-p)

peak-to-peak output jitter time

total jitter at test point C

tjit(dtrm)(p-p)

peak-to-peak deterministic jitter timetjit(rndm)(p-p)

peak-to-peak random jitter time

Min

Typ

Max

Unit

[1]

-

0.19

-

UI

[1]

-

0.11

-

UI

[1][2]

-

0.08

-

UI

[1]

Measured at test point C with K28.5 pattern, VID = 1000 mV (peak-to-peak), 5 Gbit/s; 3.5 dB de-emphasis from source.

[2]

Random jitter calculated as 14.069 times the RMS random jitter for 1012 bit error rate.

less than 76.2 cm (30-inch) FR4 trace

AWG
SIGNAL
SOURCE

test point A

test point C

test point B

PTN36221A
SMA
connector

SMA
connector
002aah761

Source jitter measurements:
total peak-to-peak jitter = 21 pspeak-to-peak deterministic jitter = 8 ps
random jitter = 0.95 ps (RMS value)Fig 9.

Jitter measurement setup

11.5 Control inputs
Table 12. Control input characteristics for EN pin
VDD = 1.8 V  5 %; Tamb = 40 C to +85 C, unless otherwise specified.
SymbolParameter

VIH

Min

Typ

Max

Unit

HIGH-level input voltage

0.65  VDD

-

-

V

VIL

LOW-level input voltage--

0.35  VDD

V

ILI

input leakage current

-

7

20

A

Rpu(int)

internal pull-up resistance

-

230

-

k

PTN36221A

Product data sheet

Conditions

measured with input at VIH(max)and VIL(min)All information provided in this document is subject to legal disclaimers.

Rev. 2.1 — 25 August 2015

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PTN36221A

NXP Semiconductors

Single-channel SuperSpeed USB 3.0 redriver

Table 13. Trinary control input characteristics for DE, EQ, and OS pins
VDD = 1.8 V  5 %; Tamb = 40 C to +85 C, unless otherwise specified.
SymbolParameter

Conditions

Min

Typ

Max

Unit

VIH

HIGH-level input voltage

0.75  VDD

VDD

VDD + 0.3

V

VIL

LOW-level input voltage

0.3

0

0.25  VDD

V

IIH

HIGH-level input current

-

-

45

A

IIL

LOW-level input current

45

-

-

A

Zext(open)

external impedancefor detection of open condition

250

-

-

k

IL

leakage currentof external GPIO; for detectionof open condition

6

-

+6

A

CL

load capacitancefor reliable detection of open
condition

-

-

35

pF

ILI

input leakage current

EN = LOW; measured with
input at VIH(max) and VIL(min)

-

-

1

A

Rpu(int)

internal pull-up resistancefor detection of trinary setting

-

50

-

k

Rpd(int)

internal pull-down resistancefor detection of trinary setting

-

50

-

k

PTN36221A

Product data sheet

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Rev. 2.1 — 25 August 2015

© NXP Semiconductors N.V. 2015. All rights reserved.

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PTN36221A

NXP Semiconductors

Single-channel SuperSpeed USB 3.0 redriver

12. Package outline
X2QFN12: plastic, super thin quad flat package; no leads; 12 terminals; body 1.6 x 1.6 x 0.35 mm

D

B

SOT1355-1

Aterminal 1
index area
A
A1

E

c

detail X

e1
1/2 e
e

C

b

3

C A B
C

v
w

6

y1 C

y

L
1/2 e
2

7

1

8

e2

terminal 1
index area

12

e

X

9

L1

0

2 mm
scale

Dimensions (mm are the original dimensions)
Unit
mm

A

A1

b

c

D

E

e

max 0.40 0.05 0.25
1.65 1.65
nom 0.35
0.20 0.127 1.60 1.60
min 0.30 0.00 0.15
1.55 1.55

e1

0.4

1.2

e2

L

L1

0.4

0.4
0.3
0.2

0.6
0.5
0.4

v

w

y

y1

0.07 0.05 0.05 0.05

Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
References

Outlineversion

IEC

JEDEC

JEITA

SOT1355-1---

MO-255---

sot1355-1_po

Europeanprojection

Issue date
13-12-23
14-01-13

Fig 10. Package outline SOT1355-1 (X2QFN12)

PTN36221A

Product data sheet

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Rev. 2.1 — 25 August 2015

© NXP Semiconductors N.V. 2015. All rights reserved.

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5HF\FOHV\PERO<HDUFRGH

7  PLQ

6FDOH

%  PLQ&  
'  PLQ

1RWH$OOGLPHQVLRQVDUHLQPPDDD

Fig 11. 13” reel dimensions (13-inch diameter; 4-inch hub; 8 mm carrier tape)

PTN36221A

14 of 24

© NXP Semiconductors N.V. 2015. All rights reserved.

'HWDLO$

1RWHV
:KLWH>0LON@
6XUIDFHUHVLVWLYLW\VKRXOGEHHH2KPVT$OOGLPHQVLRQVLQPLOOLPHWHUVXQOHVVRWKHUZLVHVWDWHG
8QVSHFLILHGGLPHQVLRQWROHUDQFHVKRXOGEHPP
0RQWK<HDUFRGHRQIODQJHVKRXOGEHVDPHPDQXIDFWRU\PRQWK:LGWKFRGHRQIODQJHVKRXOGEHVDPHKXEZLGWK0XVWFRQIRUPWR(,$VWDQGDUG

Single-channel SuperSpeed USB 3.0 redriverRev. 2.1 — 25 August 2015

All information provided in this document is subject to legal disclaimers.



(6'V\PERONXP Semiconductors

13. Packing information

PTN36221A

Product data sheet:
LQQHUZLGWKDW
RXWHUHGJHRIUHHO PLQ PD[xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx
xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx
xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x

NXP Semiconductors

PTN36221A

Product data sheet

DAY MAKING
A

A

90

°

.2
24

15.8 +0.1−0AA
Back view

Front view

20.7 +0.3−023.7 +0.3−0CB
Hub detailA

1.75 +0.05
−0.05

C

54.5 +0.5−0.5

13 +0.25−0.25

3. Width
Carrier Tape

Inside W1

Outside W2

Outside W38

8.4 +1.5−0

11.4 +1.0
−1.0

+2.7
8.4 −
0

+0.1
T2 1.1 −0.1

1.4 × 45°

Fig 12. 7” reel dimensions (7-inch diameter; 2-inch hub; 8 mm carrier tape)

Section A - A

aaa-010094

PTN36221A

15 of 24

© NXP Semiconductors N.V. 2015. All rights reserved.

180 +1−0NW1

1.4 × 45°

Reel Diameter A Reel Diameter B

N
53.5

W3

+0.1
T1 1.15 −0.1

W2

NOTE:
1. Material: PS (Polystyrene)
2. Reel dimension unit = mm.

Single-channel SuperSpeed USB 3.0 redriverRev. 2.1 — 25 August 2015

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Ø 157

PTN36221A

NXP Semiconductors

Single-channel SuperSpeed USB 3.0 redriver

carrier tapecover tapetrailer tape
50 pockets (min.)components

leader tape
100 pockets (min.)direction of feedaaa-008945

Fig 13. Tape leader and trailer configurationT
0.25 ± 0.05

D0Ø 1.55 ± 0.05

P2
2.0 ± 0.05

P1
4.0 ± 0.1P0
4.0 ± 0.1F
3.5 ± 0.05

B0
1.8 ± 0.05

K0
0.69 ± 0.05

8.0 ± 0.05

D1Ø 0.55 ± 0.05
All dimensions in mm.

A0
1.8 ± 0.05

aaa-008946

Fig 14. Carrier tape

1 2
3 4

Quadrant designations
1 = upper left
2 = upper right3 = lower left
4 = lower rightround
sprocketholes

way into
the reelpin 1 = Q2 (upper right)

aaa-008947

Fig 15. Pin 1 orientation

PTN36221A

Product data sheet

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14. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth accountof soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.

14.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached toPrinted Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides boththe mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole andSurface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is notsuitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and highdensities that come with increased miniaturization.

14.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming froma standing wave of liquid solder. The wave soldering process is suitable for the following:• Through-hole components• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadlesspackages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed bycomponent placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:• Board specifications, including the board finish, solder masks and vias
• Package footprints, including solder thieves and orientation• The moisture sensitivity level of the packages• Package placement• Inspection and repair• Lead-free soldering versus SnPb soldering
14.3 Wave soldering
Key characteristics in wave soldering are:

• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave

• Solder bath specifications, including temperature and impurities
PTN36221A

Product data sheet

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14.4 Reflow soldering
Key characteristics in reflow soldering are:• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads tohigher minimum peak temperatures (see Figure 16) than a SnPb process, thus
reducing the process window• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board• Reflow temperature profile; this profile includes preheat, reflow (in which the board isheated to the peak temperature) and cooling down. It is imperative that the peaktemperature is high enough for the solder to make reliable solder joints (a solder pastecharacteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 14 and 15
Table 14.

SnPb eutectic process (from J-STD-020D)

Package thickness (mm)Package reflow temperature (C)
Volume (mm3)
< 350

 350

< 2.5

235

220

 2.5

220

220

Table 15.

Lead-free process (from J-STD-020D)

Package thickness (mm)Package reflow temperature (C)
Volume (mm3)< 350

350 to 2000

> 2000

< 1.6

260

260

260

1.6 to 2.5

260

250

245

> 2.5

250

245

245

Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 16.

PTN36221A

Product data sheet

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PTN36221A

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Single-channel SuperSpeed USB 3.0 redrivertemperature

maximum peak temperature= MSL limit, damage level

minimum peak temperature= minimum soldering temperaturepeak
temperaturetime
001aac844

MSL: Moisture Sensitivity Level

Fig 16. Temperature profiles for large and small components

For further information on temperature profiles, refer to Application Note AN10365“Surface mount reflow soldering description”.

PTN36221A

Product data sheet

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15. Soldering: PCB footprints
Footprint information for reflow soldering of X2QFN12 package

SOT1355-1

2.2
1.52
1.42
0.05

0.4

0.02

0.18

0.4
0.08

0.22
(12×)

0.05 0.02

0.45
(8×)

0.4 1.9

2.2 0.72 0.62 0.18

0.7 (4×)0.4

2

0.66 (4×)

0.5
1.9
2

occupied area

solder resist

solder lands

solder paste

Dimensions in mm
Issue date

14-01-24
14-03-10

sot1355-1_fr

Fig 17. PCB footprint for SOT1355-1 (X2QFN12); reflow soldering
PTN36221A

Product data sheet

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16. Abbreviations
Table 16.

Abbreviations

AcronymDescription

AIO

All In One computer platform

CDM

Charged-Device Model

HBM

Human Body Model

IC

Integrated Circuit

LFPS

Low Frequency Periodic Sampling

PCB

Printed-Circuit Board

Rx

Receive

SI

Signal Integrity

Tx

Transmit

UI

Unit Interval

USB

Universal Serial Bus

17. Revision history
Table 17.

Revision history

Document ID

Release date

Data sheet status

Change notice

Supersedes

PTN36221A v.2.1

20150825

Product data sheet-

PTN36221A v.2

Modifications:• Table 13 “Trinary control input characteristics for DE, EQ, and OS pins”: Added VIH, VIL, IIH,
IIL, Zext(open), Il, and CL.

PTN36221A v.2
Modifications:
PTN36221A v.1

PTN36221A

Product data sheet

20140909

Product data sheet-

PTN36221A v.1• Added Section 15 “Soldering: PCB footprints”
20140120

Product data sheet-

All information provided in this document is subject to legal disclaimers.

Rev. 2.1 — 25 August 2015-

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18. Legal information
18.1 Data sheet status
Document status[1][2]Product status[3]Definition

Objective [short] data sheet

Development

This document contains data from the objective specification for product development.

Preliminary [short] data sheet

Qualification

This document contains data from the preliminary specification.

Product [short] data sheet

Production

This document contains the product specification.

[1]

Please consult the most recently issued document before initiating or completing a design.

[2]

The term ‘short data sheet’ is explained in section “Definitions”.

[3]

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.

18.2 Definitions
Draft — The document is a draft version only. The content is still underinternal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences ofuse of such information.
Short data sheet — A short data sheet is an extract from a full data sheetwith the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed andfull information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, thefull data sheet shall prevail.
Product specification — The information and data provided in a Productdata sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors andcustomer have explicitly agreed otherwise in writing. In no event however,shall an agreement be valid in which the NXP Semiconductors product isdeemed to offer functions and qualities beyond those described in the
Product data sheet.

18.3 Disclaimers
Limited warranty and liability — Information in this document is believed tobe accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy orcompleteness of such information and shall have no liability for theconsequences of use of such information. NXP Semiconductors takes noresponsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not suchdamages are based on tort (including negligence), warranty, breach ofcontract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordancewith the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to makechanges to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.

PTN36221A

Product data sheet

Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical orsafety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability forinclusion and/or use of NXP Semiconductors products in such equipment orapplications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of theseproducts are for illustrative purposes only. NXP Semiconductors makes norepresentation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer productdesign. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications andproducts planned, as well as for the planned application and use ofcustomer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with theirapplications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in thecustomer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications andthe products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or theCharacteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects toapplying the customer’s general terms and conditions with regard to thepurchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted orconstrued as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents orother industrial or intellectual property rights.

All information provided in this document is subject to legal disclaimers.

Rev. 2.1 — 25 August 2015

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Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a priorauthorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use inautomotive applications to automotive specifications and standards, customer(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design anduse of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is forreference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.

18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.

19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com

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20. Contents
1
2
3
4
5
5.1
6
7
7.1
7.2
8
8.1
8.2
8.3
9
10
11
11.1
11.2
11.3
11.4
11.5
12
13
14
14.1
14.2
14.3
14.4
15
16
17
18
18.1
18.2
18.3
18.4
19
20

General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
System context diagrams . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 5
Receive equalization . . . . . . . . . . . . . . . . . . . . 5
Transmit de-emphasis . . . . . . . . . . . . . . . . . . . 6
Device states and power management . . . . . . 6
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7
Recommended operating conditions. . . . . . . . 7
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Device characteristics. . . . . . . . . . . . . . . . . . . . 8
Receiver AC/DC characteristics . . . . . . . . . . . . 9
Transmitter AC/DC characteristics . . . . . . . . . 10
Jitter performance. . . . . . . . . . . . . . . . . . . . . . 11
Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . 11
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
Packing information . . . . . . . . . . . . . . . . . . . . 14
Soldering of SMD packages . . . . . . . . . . . . . . 17
Introduction to soldering . . . . . . . . . . . . . . . . . 17
Wave and reflow soldering . . . . . . . . . . . . . . . 17
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 17
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 18
Soldering: PCB footprints. . . . . . . . . . . . . . . . 20
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 21
Legal information. . . . . . . . . . . . . . . . . . . . . . . 22
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Contact information. . . . . . . . . . . . . . . . . . . . . 23
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Please be aware that important notices concerning this document and the product(s)described herein, have been included in section ‘Legal information’.

© NXP Semiconductors N.V. 2015.

All rights reserved.

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 25 August 2015
Document identifier: PTN36221A