PS SERIESPSVD3USU48P800-X
VPX DC/DC POWER SUPPLY- EMI: Compliant to MIL-STD-461G- Environmental: MIL-STD-810- Input Options:- MIL-STD-704- MIL-STD-1275- DEF-STAN 61-5
- Cyber secure- VITA 62 compliant- Sosatm aligned- 3U form factor- 18 to 48VDC Standard Version Input- Up to 800 W- Operating temp: –55°C to +85°C

Special features- VITA 62 Compliant- Aligned with the SOSATM Technical Standard- Wide input range- Up to 800W output power¹- Remote sense- Fixed switching frequency (220 kHz)- External synchronization capability- Indefinite short circuit Protection- Over-voltage shutdown with auto-recovery- Reverse battery protection- Over temperature shutdown with auto-recovery- EMI filters included- System Management: protocol per VITA 46.11 Tier II- Output voltages and currents- Input voltage- Card temperature- Card system status
Note:
1.

Operation under 22V input at full load may exceed connector pins maximum current rating.

Markets & Applications
Military : airborne, ground-fix, shipboard

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Ruggedized, Telecom, Industrial Power Supply

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PS SERIES: PSVD3USU48P800-X

Electrical Specifications
DC Input
18 to 48VDC standard
Max Non-Operation 100Vdc
Options:
1)
MIL-STD-704 (A-F) Normal and
Abnormal Steady State
2) MIL-STD-704(A-F) transients Up to
50V, 80V.
3) MIL-STD-704(A-F) Transients Under
18V and Starting transients
4) MIL-STD-1275 Surges

DC Output
PO1 & PO3 (VS1): 12V up to 64A
PO2 (3.3VAux): 3.3V up to 15A

Current Sharing
12V A.C.S
Efficiency
3.3Vaux
P.C.S (A.C.S optional)
Up to 91.5 % (see Para.4)

Line/Load
regulation
Ripple and Noise
Typically, less than 50mVp-p (max.
1%p). Measured across a 0.1μF
capacitor and 10μF capacitor on
load at Input Voltage of 18V-36V,
all Temperature Range.

Normal Quiescent Current:
Inhibited Output: 193mA(3.3VAux Only)
Disabled Input: 112mA(All Outputs Off)

Load Transient Overshoot andUndershoot
Output dynamic response ofless than 5% at load Step of
30%-60%.
Output returns to regulation inless than 1mSec

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Isolation
Over 20 MΩ at test voltage:
200V between Input and Output
200V between Input and Case
100V between Output and Case
EMC
Qualified to:
MIL-STD-461G1
CE101, CE102, CS101,

CS114, CS115, CS116

Notes:
1. Compliance achieved with
5µH LISN and static
resistive load.
System management options:
1) I2C
2) Custom IPMI
3) VITA 46.11 Tier II IPMC
Data available:
•
•
•
•

2

Output voltages and currents
Input voltage
Card temperature
Card status

PS SERIES: PSVD3USU48P800-X

Environmental ¹

Design to Meet MIL-STD-810G
Temperature
Operating: –55°C to +85°C at unit
edge
Storage: –55°C to +125°C
Designed to meet 600 thermal cycles
durability test

AltitudeMethod 500.5, Procedure I &II Storage/Air Transport: 40 kft
Operation/Air carriage: 70 kft

Salt Fog:
Method 509.5

Designed to meet 600 thermal cycles
Fungusdurability test
Shock
Humidity
Does not support fungus growth, in
Method 516.6
Method 507.5, Up to 95%
accordance with the guidelines of
40g, 11msec saw-tooth (all directions)
MIL- STD-454, Requirement 4.
Vibration
Vibration: Figure 514.6E-1. General minimum integrity exposure. (1 hour per axis.)

Reliability: 481,000 Hours, calculated IAW MIL-HDBK-217F Notice 2 at +65 ℃, GF.
Note 1: Environmental Stress Screening (ESS) Including random vibration andthermal cycles is also available. Please consult factory for details.

Protections ¹

Input• Inrush Current Limiter
Peak value of 5 x IIN for initialinrush currents lasting morethan 50µSec.
• Under Voltage
Unit shuts down when input
steady state voltage drops below
17± 0.5VDC.
Automatic restart when input
voltage returns to nominal
range.
Low Line Transient TBD time
protection is optional.
• Input Overvoltage Protection
Unit shuts down when input
steady state voltage rise above
55/85 ± 2VDC.
Automatic restart when input
voltage returns to nominal
range.

Output• Passive over voltage
protection on 3.3VAux
3.9V Zener.
• Active over voltage
protection on 12V output
20% ± 5% above nominal
voltage.
Automatic recovery when
output voltage drops below
threshold.
• Overload / Short-Circuit
protection
Continuous protection (10-30%
above maximum current) for
unlimited time (Hiccup).
Automatic recovery whenoverload/short circuit removed.

General• Over Temperature Protection
Automatic shutdown
at internal temperature of 95 ± 5°C.
Automatic recovery whentemperature drops below 90 ± 5°C.

Note 1: Thresholds and protections can be modified / removed (please consult factory)

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PS SERIES: PSVD3USU48P800-X

Functions and Signals - According to VITA 62

Signal NameType

Description

FAIL*

OutputIndicates to other modules in the system that a failure has occurred in oneof the outputs. Please refer to Figure 2 ¹

SYSRESET*

OutputIndicates to other modules in the system that all outputs are within theirworking level. Please refer to Figure 2 ¹

INHIBIT*Input

ENABLE*

Input

GA0*, GA1*, GA2*

Input

Used for geographical addressing.
GA2 is the most significant bit and GA0 is the least significant bit. ¹

SCL_A, SDA_A

Bidirectional

I2C bus Clock and Data respectively.
Through this bus the voltage and temperature readouts can be shared. ¹

SCL_B, SDA_B

Bidirectional

Redundant I2C bus Clock and Data respectively.
Through this bus the voltage and temperature readouts can be shared. ¹

Sync_InInput

The Sync_In signal is used to allow the power supply frequency tosync with the system frequency. ¹ Optional.

VOUT SENSE

Input

The SENSE is used to achieve accurate load regulations at load terminals(this is done by connecting the pins directly to the load’s terminals).

3.3Vaux A.C.S

Bidirectional

Support 3.3Vaux Active current share between Outputs. See Current
Share para. ¹ ² ³ (Optional, non-SOSA configuration)

PO#_SHARE

Bidirectional

Support current share between Outputs¹

Controls power supply outputs.
This signal in conjunction with ENABLE controls theoutputs. Please refer to Table 1 and Figure 1 ¹Controls power supply outputs.
This signal in conjunction with INHIBIT controls theoutputs. Please refer to Table 1 and Figure 1 ¹

Notes:
1. Signal referenced to SIGNAL RTN.
2. When not used leave open
3 for 3.3Vaux In Passive or Non-Current Share configuration, this pin is Internally Disconnected.

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PS SERIES: PSVD3USU48P800-X

Table 1 – Inhibit and Enable Functionality
INHIBIT*

Low

Low

High

High

ENABLE*

Low

High

Low

High

VS1

OFF

OFF

ON

OFF

3.3V

ON

OFF

ON

OFF

Figure 1 – Inhibit and Enable Input stage

Figure 2 – SysRst and Fail bit Output Stage

Figure 3 – GAx and Sync_In Stage

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PS SERIES: PSVD3USU48P800-X

Simplified Block Diagram

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PS SERIES: PSVD3USU48P800-X

Detailed Information
1. PSVD3USU48P800-X Input Voltage Operation.

The PSVD3USU48P800-X steady state operation voltage is 18V to 48V and will continuously work up to 50V/80V Input line.
When configured to support MIL-STD 704/1275 transients or surges, the unit will shut down when input voltage rises
above 60V or Under 16V for more than 2Sec and immediate shut down under 12V or above 100V Input. Power supply
automatically recover when Input goes back to normal steady state line.
Please Note: Working at steady state low line under 22V may exceed connector 40A current limitation.
Unit can be calibrated to work steady state or to be limited by 10 Sec to support Input transients during low line.
If 10 Sec timer expired unit will turn off till input voltage goes back to 21V
Note: 1275E configuration is optional, contact Factory.

1.1 Steady state Low Line Turn-on and Turn-off Limits

To avoid Turn-on and Turn-off glitch the unit have about 3V Hysteresis. The Turn-on threshold is under 21V and turn- offunder 18V.
Those limits can be adjusted, contact Factory for more information.

2.

Outputs Voltage Regulation

The PSVD3USU48P800-X contains accurate internal sense lines to keep output voltage at less than 4% regulation for all
Line/ Load and temperature range (see Table 2).
Output Voltage Range

12V/64A

3.3V/15A

Active Current Share

11.85V - 12.15V

3.28V - 3.42V

Passive Current Share

N/A

3.25V - 3.45V

Table 2: Outputs voltage regulation. VIN 18V to 48V, Temperature -55 to 85 C

2.1 Sense Lines

Sense Lines are provided for VS1, VS2 and VS3 output to compensate line voltage drop. Sense Lines proper
connection is shown in Figure 3.
Each VSx output has its own Sense Lines, additional common Sense RTN Line is provided for all VSx Outputs (VITA 62
Standard).
Contact Factory for Sense configuration different than the VITA 62 standard

Figure 4: PSVD3USU48P800-X Sense
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PS SERIES: PSVD3USU48P800-X

3. Current Share (C.S)

Current Share of two or more units is optional (Contact Factory)
12V output and 3.3VAux will current share with about 2-4A load balance.

3.1

Active current sharing (A.C.S)

Current sharing done in a closed loop. All paralleled outputs are compared and feedback is used to balance
their load current. The result is a more stable, less sensitive output voltage without voltage drop. Typical
Load Balance of about 2-4A for all Load range is expected.
ACS is supported by the 12V output. Optional for 3.3Vaux¹ ².

3.2

3.3Vaux Passive Current Sharing (P.C.S).

Current sharing is done in open loop, output voltage drops as a function of output load.
Load Balance of about 5-10% is expected.

3.3 Vaux ACS is optional¹ ²

3.3 Current share connection between two Units.
For a required output to current share please connect the following Pins between the two units••

PO#_Sense & PO#_Sense_RTN (for best performance, Pins from paralleled units should be connected to a single point
and as close as possible to the load point)
VS1_SHARE (A7)
VS1_ ACS (C7)••

3.3Vaux_SHARE (B7)
3.3Vaux_ACS (D1) Optional¹ ²•

Typical ACS Dynamic Load of Two 12V Paralleled Outputs (PO1 & PO2 refer to two different units)

Notes 1. When Not used, 3.3Vaux A.C.S can be left open.
When ordering 3.3Vaux P.C.S or 3.3Vaux Non-Current Share unit, this pin is Internally disconnected
2. 3.3Vaux ACS (Pin D1) is not required by SOSA and is optional. (Pin was previously on Pin B4)

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PS SERIES: PSVD3USU48P800-X

4.

Efficiency

5. EMI CE102 Tests
CE102 28VLine at Full Load 10KHz – 1MHz

CE102 28VLine at Full Load 1MHz – 10Hz

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PS SERIES: PSVD3USU48P800-X

6.

Communication Protocol     Vita 46.11 Tier 2 IPMC CustomIPMI 
 Ǥ  Ǥ͸Ǥͳ͸Ǥʹ

6.1 Custom IPMI Protocol
Electrical Parameters
Vcc:
3.3VDC
Pull-up:
20kOhmInput capacitance: 100pf
Slave Device Addressing-

256 address spaces
Baud rate: 200kHz maximum
7 Bit Protocol
Support Slot Addressing per VITA 62
MSB
A6
0
0
0
0

Slot Number
Slot0
Slot1
Slot2
Slot3

A5
1
1
1
1

A4
0
0
0
0

A3
0
0
0
0

A2/GA2* A1/GA1* A0/GA0*
0
0
0
0
0
1
0
1
0
0
1
1

* Slot location is determined by GAx per VITA 62.

LSB
R/W

Communications Supported
Read Command – 21Hex, deliver 64Bytes of Data. (More commands are available by request) The
communication starts when the master sends a start followed by the unit slave address,
command, checksum and a stop. A second start followed by the slave address and a read will befollowed by a 64 Bites response.
S

S

Slave Address

R/W

A

CommandA

Check sum

A

A6:A0

0

0

21 Hex0

DF Hex0

Slave Address

W
R/

A

DATA

A

DATA

A

DATA

A

A6:A0

1

0

D7:D0

0

D7:D0

0

D7:D0

0

Command – 21Hex read all 64 Bytes
S -StartP- Stop
Master Transmit

Unit Transmit

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10

P

•••

DATA

A

Check sum

N/A

D7:D0

0

D7:D0

1

P

PS SERIES: PSVD3USU48P800-X

Memory Space
Data Type

Meaning0

U Integer, MSB First

Echo of Command

1
2-3

S Integer, MSB First

Response
Byte #

ReadingRange
21 Hex
00 Hex-55°C to 125°C

Interpretation

N/A

3

T(Cᵒ)=+/- 7bit Dec

Temperature-55C to 120C

00 Hex20.48V
20.48V
N/A
N/A
N/A
N/A
80A
20A
N/A
N/A
N/A
N/A

N/A

4-5

U Integer, MSB First

12V VS1 Voltage

V(out) = Dataˑ m2

6-7
8-9

U Integer, MSB FirstU Integer, MSB First

3.3V VS2 Voltage
N/A

V(out) = Dataˑ m2

10-11

U Integer, MSB First

N/A

12-13

U Integer, MSB First

N/A

14-15
16-17

U Integer, MSB FirstU Integer, MSB First

N/A
12V VS1 Current

18-19

U Integer, MSB First

3.3V VS2 Current

20-21

U Integer, MSB First

22-23

U Integer, MSB First

24-35

U Integer, MSB First

26-27

U Integer, MSB First

N/A
N/A
N/A
N/A

V(out) = Dataˑ m3

28-29

U Integer, MSB First

Reserved

00Hex

30-31

U Integer, MSB First

Reserved

00Hex

32-51

Character String (ASCII)

Part Number

M4054-xxx*(Note1)

52-53

Decimal, MSB First

Serial Number, 2MSB Dig

X,X Dec(Note2)

54-55

Decimal, MSB First

Serial Number, 2LSB Dig

X,X Dec(Note2)

56-57

Decimal, MSB First

Date CodeWeek, Year

(Note3)58-59

Character String (ASCII)

Hardware Rev

B01 & B02 Boards (Note4)

60-61

Decimal, MSB First

Firmware Rev

X,X,X,X Dec

62
63

U Integer, MSB FirstU Integer, MSB First

Reserved
Zero Checksum

V(out) = Dataˑ m3

N/A
N/A
N/A
N/A

(Note5)20 Characters
Optional
Optional
Optional
2 Characters
4 digits
AA HexValue required to make the sum of bytes 0 to 62
added to a multiple of 256

Note:
M2 = 20.48/65535
M3 = 80/65535
M4 = 20/65535*Matching unit part number

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N/A
N/A
N/A
N/A

11

PS SERIES: PSVD3USU48P800-X

Notes 1 to 5
Note 1: Part Number Example: PSVD3USU48P800-X
Byte No’32

Character
Hex

33

34

M
4D

35

4
34

36

4
34

6
36

37
5
35

38
(-)
2D

39-51
4
34

0
00

Note 2: Serial Number Example: 25
Byte No’Dec Number
Binary52
0“0000”

53
0“0000”

0“0000”

54
0“0000”

Note 3: Date Code Example: week 35 of 2018
Byte No’Dec Number
Binary56
3“0011”

57
5“0101”

1“0001”

8“1000”

Note 4: Hardware Rev Example: B01 Rev (-), B01 Rev A
Byte No’

58

59

Character
Hex

(-)
2D

A
41

Note 5: Firmware Rev Example: 2.1.0.0
Byte No’Dec Number
Binary60
2“0010”

61
1“0001”

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0“0000”

0“0000”

12

0“0000”

55
0“0000”

2“0010”

5“0101”PS SERIES: PSVD3USU48P800-X

6.2

46.11 Tier 2

Please see 46.11 User Manual for detailed information of operation.
Sensors included are seen in the table below.
Units are designed to be upgradable to 46.11 Tier 3 compliance upon release of that specification
Record ID
0000
0001
0002
0003
0004
0005
0006
0100
0101
0106
0107
010C
9090
9999

7.

Sensor ID
00
01
02
03
04
05
06
07
08
0D
0E
13
N/A
N/A

Sensor Type
F0h
F1h
F2h
02h
F3h
F4h
F5h
02h
02h
03h
03h
01h
N/A
N/A

Name
FRU State Sensor
System IPMB Link Sensor
FRU Health Sensor
FRU Voltage Sensor
FRU Temperature Sensor
Payload Test Results Sensor
Payload Test Status Sensor
VS1 Voltage
VS2 Voltage
VS1 Current
VS2 Current
Analog Temperature
Device Locator Record
Device Management

Sync In and Switching Frequency

Standard switching frequency with no Sync In signal applied is 220kHz ±5%.
When optionally configured to have Sync In functionality the unit will sync to a signal between 200kHz and 300kHz ±5%. The
square wave must be at 3.3V CMOS standard logic levels with a duty cycle between 20% and 80%.
The PSVD3USU48P800-X will sync after 32 cycles of within tolerance external clock cycles. The unit will revert to its internal
clock frequency upon any out of specification clock cycles and will need 32 good cycles to resync to the external clock.
Contact factory to add Sync_in functionality and to customize its configuration values.

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PS SERIES: PSVD3USU48P800-X

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PS SERIES: PSVD3USU48P800-X

Pin Assignments
Pin Number

Notes:
Pin assigned as Function/N.C is optional and can be
configured as not connected

Pin Name

P1-DC_INP2+DC_INLP1CHASSIS

P3

VS1

P4

POWER_RETURN

P5POWER_RETURN

LP2

3.3Vaux

P6

VS1

A8

VS1_SENSE

B8

3.3Vaux _SENSE

C8N.C (VS1_SENSE)

D8SENSE_RETURN

A7

VS1_SHARE

B7

3.3Vaux _ SHARE

C7

VS1_ACS

D7

Sig_RTN

A6

SCL_B

B6

SDA_B

C6

N.C.

D6

SYSRESET*

A5

GA0*

B5

GA1*

C5

SCL_A

D5

SDA_A

A4

N.C.

B4

N.C.

C4

N.C

D4

N.C

A3

Sync_In / N.C.

B3

N.C.

C3

N.C (NED)

D3

N.C (NED RETURN)

A2

N.C.

B2

FAIL*

C2

INHIBIT*D2

ENABLE*

A1

N.C.

B1

N.C

C1

GA2*

D1

3.3Vaux_ACS / N.C.

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Previous configurations had 3.3Vaux_ACS on Pin B4 and
Sync_In (labeled as Ref Clk(+)) on Pin A1.
Pin D1 was previously labeled as Alert/N.C. and wasunused.
Pin A3 was previously labeled as Ref_Clk (-) / N.C. andwas unused.

15

PS SERIES: PSVD3USU48P800-X

Outline Drawing

Notes
1.
2.
3.
4.

Dimensions are in Inches[mm]Tolerance is:.XX  0.02 IN.XXX  0.008 IN
Weight: Approx. 830g (29.28) oz
3D model available* Specifications are subject to change without prior notice by the manufacturer.

Amphenol Socapex
948, promenade de l’Arve BP29
74311 Thyez Cedex - France
Phone: +33 (0)4 50 89 28 00
contact@amphenol-socapex.fr
We reserve the right to modify our products in any way we deem necessary.
Any duplication is prohibited, unless approved in writing.

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