Mitsubishi Heavy Industries Technical Review Vol. 49 No. 3 (September 2012)
44

Room-temperature Wafer Bonder Compatible with
300-mm Wafers for Three-dimensionally Stacked LSIs

Sales Department
M a c h i n e To o l

The limits of miniaturization in the semiconductor manufacturing process have become anissue in recent years. Semiconductor manufacturers have thus far coped with the need forfunctional enhancement and capacity expansion by miniaturizing devices and wires, but the limitsof two-dimensional miniaturization have gradually become obvious. Three-dimensional stacking ofsemiconductor devices has been promoted as one of the methods to conquer these limitations. This
article outlines a 300-mm wafer-compatible room-temperature bonder developed by Mitsubishi
Heavy Industries, Ltd. (MHI), which is used to manufacture three-dimensionally stacked
large-scale integrated circuits (LSIs).

|1. Necessity of three-dimensional stacking technique insemiconductor manufacturing
In the field of LSIs such as microprocessors and memory, functional enhancement andcapacity expansion have been achieved through the reduction of the size of devices (transistors)
and the miniaturization of wiring. According to Moore's law, the number of transistors that are
mounted on an integrated circuit doubles approximately every 18 months.
However, there is a limit in transistor size reduction and wiring miniaturization, and thisovershadows the capability to promote device development at the same pace as before. This is dueto the fact that devices and wires are arranged in two dimensions in an LSI structure. As one of themethods to overcome this limit, it has been suggested to stack wafers provided with devices inthree dimensions so that functional and capacity expansion can be achieved while maintaining thesame area. The concept of three-dimensional wafer stacking is illustrated in Figure 1.

Figure 1 Schematic diagram of three-dimensional
wafer stacking

The following two new techniques are required to stack wafers:(1) Formation technique of TSV (Through Silicon Vias) for signal transmission and reception
between wafers; and(2) Technique to bond wafers while connecting the TSV.
Figure 2 shows an example of TSV. The 300-mm compatible room-temperature wafer
bonder outlined in this article is an apparatus to provide bonding between wafers, as mentioned initem (2) above.

Mitsubishi Heavy Industries Technical Review Vol. 49 No. 3 (September 2012)
45Figure 2

Example of through silicon vias
(Courtesy of Yole Development)|2. Characteristics of 300-mm wafer-compatible room-temperaturebonderRoom-temperature bonding is a technique to remove the oxide film and absorbed substances
on wafer surfaces by irradiating the wafers with ions or neutral atoms of an inert element in a highvacuum so that the activated surfaces can be bonded. The process has the following characteristics:(1) Since the process requires no heating, the wafers are free from thermal strain. The process
can also increase yield because it causes no thermal stress on the devices on the wafers.
(2) Since the process requires no heating, it enables highly precise alignment (±2 μm) between
bonded wafers, even when bonding wafers with different thermal expansion coefficients.
(3) The process is applicable to bond a wide range of materials including silicon-based materials
and metals. It is also capable of bonding the TSV of various materials.
(4) Since the process requires no heating or cooling, it has high throughput.
For the efficient removal of oxide films on the TSV to be bonded, the bonder uses highenergy fast atom beams (FAB) to activate the wafer surfaces. By determining the optimum
arrangement of multiple FAB guns through digital simulations, the bonder has achieved highproductivity.

|3. Specifications
Specifications for the bonder are listed in Table 1. The bonder is fully automated. By simply
placing five sets (10 pieces) of wafers in a wafer cassette, wafer transfer, alignment (positioning ofwafers to be bonded) and other tasks are all carried out without manual operation. In addition, thebonder is capable of pressing the wafers with a high pressing load (200 kN) to provide stablebonding. Although the running cost usually poses a problem in device mass production, the bonder
allows for an extremely low running cost because it only requires inexpensive, safe utilities such asargon gas, nitrogen gas, cooling water, and compressed air. The bonder is also designed with due
consideration for maintainability, thus allowing easy maintenance work.
Table 1Unit of operation
Wafer size
Operation mode
Alignment accuracy
Surface activation
Press unit
Alignment
Degree of vacuum inchamber
Utilities

Main specifications
5 sets (max.)
300 mm/200 mm
Fully automatic±2 µm (measurement by MHI)
Argon fast atom beam
Max. load: 200 kN
IR transparent image
1.0×10-5 Pa

Argon gas, nitrogen gas, compressed air, cooling water, power supply(200/100 V)

Mitsubishi Heavy Industries Technical Review Vol. 49 No. 3 (September 2012)
46|4. Field of application
With the rapid spread of smartphones and mobile terminals, the need for smaller devices isincreasing and demand for shorter product development cycles is also intensifying. To meet suchneeds, the three-dimensional stacking technique is expected to be applied to the following devices:(1) Memory
Capacity can be increased by more than 10 times while maintaining the equivalent device
footprint.
(2) Microprocessors
Microprocessors are devices for which functional integration is being maximized.
However, by allocating functions thus far integrated in a single device and stacking them inthree dimensions on the basis of function, functional expansion can be achieved while keeping
the area unchanged.
Existing microprocessors require overall circuit modification when part of thefunctionality is changed. With the use of the three-dimensional stacking technique, it is only
necessary to modify the devices on the layer relevant to the change, thus shortening thedevelopment cycle.
(3) Micro electro mechanical systems (MEMS)
With the three-dimensional integration of mechanical elements, such as acceleration andpressure sensors and signal and information processing elements, devices can become moresophisticated and at the same time, further reduction in size and improvement in reliability canbe anticipated.
We intend not only to further improve the bonder as a manufacturing apparatus to meet suchneeds, but also to focus on the rapid spread of three-dimensionally stacked LSIs by supporting thebonding process in customer device development.