Overview

About Arm Flexible Access
Arm Flexible Access provides up-front, zero or low cost access to a wide range of Arm IP, tools, and training.
Experiment and design with the entire portfolio—license fees are only due at the point of manufacture andcalculated only on the IP included in the final SoC design.
The Standard and Entry Tiers of Flexible Access include an extensive range of Arm IP and dedicated support,
training, and development tools.
The DesignStart Tier offers $0 access to physical IP and a select mix of Arm IP, forum support, access to online
training materials and development tools.
Flexible Access includes free use of thousands of Arm Artisan Physical IP libraries for implementing silicon for
manufacture across the broadest range of foundries and process technology nodes.
For more information, visit https://www.arm.com/products/flexible-access.
Early-stage startups can benefit from the Arm Flexible Access for Startups program, giving free access to the
Entry Tier of Flexible Access. For more information visit https://www.arm.com/products/flexible-access/startup.

How does Arm Flexible Access work?

AccessDesignManufacture• Widest range of Arm IP, tools
and services• Freedom to start, change orstop projects as needed• Licensing payment only for IP
used at tape out, not before• Annual access fee covers
design rights• Model your workload acrossincluded IP for best-ﬁt design• Transparent and simple
business terms• Any or all of the IP package isdownloadable at any time

• World-wide access to Armtraining and support

1How much does Arm Flexible Access cost?
Tiers

DesignStart

Entry

Standard$0$80k per annum$0 for startups*$212k per annum

Access fees

Calculated per design based on IP used. **License fees (due on project manufacture)

Calculated per project and paid per unit shipped **Royalty*Qualifying startups with <$20M funding, <$1M annual revenue, privately held**Thousands of Arm Artisan Physical IP libraries are free of charge

What is included in Arm Flexible Access?
Tier

DesignStart

Entry

Ideal for smaller semiconductor design teams
doing no more than 1 tape out per year

Standard
Ideal for larger semiconductor
development teams withmultiple concurrent projects

IP portfolio

DesignStart CPU Package:
Cortex-M0, Cortex-M23,
Cortex-M3 and related Corstone
example systems

DesignStart Physical IP(Free Library Program)

√

√

√

Support from Arm expert engineers

Forum support√√

Number of tape-outs per year

1
(Unlimited for Physical IP)

1+ *(Unlimited for Physical IP)

Unlimited

Online training

2 Seats

Tools and models

1 Hardware Success Kit
User License

3 Hardware Success Kit
User License
6 Software Success Kit
User Licenses

6 Hardware Success Kit
User Licenses
12 Software Success Kit
User Licenses

Membership Fee$0$0 for qualifying startups
or $80k per annum$212k per annum

Mainstream Package:
Broad portfolio of Cortex CPUs, Mali GPUs, Corstone IP,
CoreLink and CoreSight System IP

Unlimited on-demand training seats* Entry Tier: Up to 3 tape outs where any of Cortex-M0/M0+/M23/M3/M4 is the main processor, or 1 tape out per year2

Standard and Entry Tiers
Product

Description

Learn more about this product

Cortex-A55 Processor

Built on DynamIQ technology, designed for extreme scalability inconstrained environments and featured with the latest Armv8-A
architecture extensions that introduce new NEON instructions
for machine learning, advanced safety features and more support
for Reliability, Accessibility and Serviceability (RAS).

https://www.arm.com/products/silicon-ip-cpu/
cortex-a/cortex-a55

Cortex-A53 Processor

Low-power processor with 32-bit and 64-bit capabilities,
applicable in a range of devices requiring high performance inpower-constrained environments. Reference design & supporting
system IP available in Corstone-1000. Subsystem requires minor
modifications to integrate this processor.

https://www.arm.com/products/silicon-ip-cpu/
cortex-a/cortex-a53

Cortex-A35 Processor

Ultra-high efficiency smart device processor, the smallest andmost power-efficient 32-bit and 64-bit Arm application processor.
Reference design & supporting system IP available in Corstone-1000.
Subsystem requires minor modifications to integrate this processor.

https://www.arm.com/products/silicon-ip-cpu/
cortex-a/cortex-a35

Cortex-A34 Processor

Low-power 64-bit only processor with ultra-high efficiency.
Reference design & supporting system IP available in Corstone-1000.
Subsystem requires minor modifications to integrate this processor.

https://www.arm.com/products/silicon-ip-cpu/
cortex-a/cortex-a34

Cortex-A32 Processor

Low-power 32-bit only processor with ultra-high efficiency.
Reference design & supporting system IP available in Corstone-700.

https://www.arm.com/products/silicon-ip-cpu/
cortex-a/cortex-a32

Cortex-A7 Processor

Power-efficient processor, designed for a wide range of devices
with differing requirements demanding balance between power andperformance.

https://www.arm.com/products/silicon-ip-cpu/
cortex-a/cortex-a7

Cortex-R82 Processor

Highest-performance Cortex-R processor with memory
management unit (MMU), enabling real-time and rich operating
systems (OS), such as Linux, on the same core or cluster. As thefirst Arm 64-bit Cortex-R processor, the Cortex-R82 can address
up to 1TB of dynamic random-access memory (DRAM) for
efficient, high-performance compute. Ideal for solid-state drives(SSDs), hard-disk drives (HDDs) and built-in storage solutions, aswell as computational storage applications.

https://www.arm.com/products/silicon-ip-cpu/
cortex-r/cortex-r82

Cortex-R52 Processor

Designed for advanced silicon processes requiringhigh-performance and cost-effective processing.
Delivers real-time performance for functional safety.

https://www.arm.com/products/silicon-ip-cpu/
cortex-r/cortex-r52

Cortex-R52+ Processor

Builds on its predecessor, the Arm Cortex-R52, to assist
integration and virtualization for functional safety applications,while maintaining software compatibility.

https://www.arm.com/products/silicon-ip-cpu/
cortex-r/cortex-r52-plus

Cortex-R8 Processor

Designed for products with high performance requirements
where timing deadlines must always be met.

https://www.arm.com/products/silicon-ip-cpu/
cortex-r/cortex-r8

Cortex-R5 Processor

Offers high-performance computing solutions for embedded
systems that require reliability, high availability, fault tolerance,and real-time responses.

https://www.arm.com/products/silicon-ip-cpu/
cortex-r/cortex-r5

Cortex-M85 Processor

Highest performing Cortex-M that integrates Helium vector
processing. Delivers highest scalar and vector processing "ontime" for the most demanding use-cases.

https://www.arm.com/products/silicon-ip-cpu/
cortex-m/cortex-m85

Cortex-M55 Processor

First Cortex-M processor to integrate Helium vector processing
technology. It brings a significant uplift in DSP and ML
performance, while meeting the efficiency requirements ofconstrained endpoint use-cases.

https://www.arm.com/products/silicon-ip-cpu/
cortex-m/cortex-m55

Cortex-M7 Processor

The highest performance CPU in the energy-efficient Cortex-M
processor family and includes digital signal processing (DSP) instructions.

https://www.arm.com/products/silicon-ip-cpu/
cortex-m/cortex-m7

Cortex-M33 Processor

Optimized for cost and power-sensitive microcontroller andmixed- signal applications. Designed for applications requiring
efficient security or digital signal control. New Arm Custom
Instructions allow optimization for specific workloads.
Reference design & supporting system IP available in Corstone-201.

https://www.arm.com/products/silicon-ip-cpu/
cortex-m/cortex-m33

Cortex Processors3

Cortex-M4 Processor

Designed to address applications requiring digital signal
processing, with a blend of efficient, easy-to-use control andsignal processing capabilities. Supporting system IP available in
Corstone-101.

https://www.arm.com/products/silicon-ip-cpu/
cortex-m/cortex-m4

Cortex-M3 Processor

Designed for cost-sensitive and power-constrained solutions in a broad
range of devices. Balanced between area, performance, and power.
Reference design & supporting system IP available in Corstone-101.

https://www.arm.com/products/silicon-ip-cpu/
cortex-m/cortex-m3

Cortex-M23 Processor

Smallest and lowest-power microcontroller with Arm TrustZone security,
ideal for applications requiring software isolation and security.
Reference design & supporting system IP available in Corstone-102.

https://www.arm.com/products/silicon-ip-cpu/
cortex-m/cortex-m23

Cortex-M0+ Processor

The smallest footprint and lowest power requirements of all
Cortex-M processors, suitable for a wide variety of applications,
including sensors and wearables.
Reference design & supporting system IP available in Corstone-101.

https://www.arm.com/products/silicon-ip-cpu/
cortex-m/cortex-m0-plus

Cortex-M0 Processor

Small footprint and high efficiency, ideal for simple,
cost-sensitive devices.
Reference design & supporting system IP available in Corstone-101.

https://www.arm.com/products/silicon-ip-cpu/
cortex-m/cortex-m0

Ethos Machine Learning Processors

Ethos-U65

Ethos-U65 enables new AI capabilities into edge and endpoint
devices in applications including high resolution smart cameras,
smart home solutions, voice assistants, drones, and wearables
with 2x the performance over Ethos-U55, and achieving 1TOPs
using our microNPU architecture. Ethos-U65 is designed for use
with DRAM based systems, which leads to higher bandwidthavailability. This allows Ethos-U65 to be used with all classes of
embedded systems: higher performance Cortex-A based SoCs
or low power Cortex-M based SoCs for battery powered devices(with or without DRAM)

https://www.arm.com/products/silicon-ip-cpu/
ethos/ethos-u65

Ethos-U55

Ethos-U55 is a first generation uNPU for accelerating neuralnetworks. It is targeted at the embedded market and works
alongside Cortex-M processors. Ethos-U55 hits multiple
performance points with 4 different possible configurations andhence can target a wide variety of applications like smart home
appliances, DTV, smart speakers etc.

https://www.arm.com/products/silicon-ip-cpu/
ethos/ethos-u55

Corstone IP
Cortex processor reference packages and supporting system IP. Simplifies silicon design and reduces time to market.

Corstone-1000

Corstone-1000 is a reference package that integrates Cortex-A
and Cortex-M processors. It is meant to help efficiently build asecure and efficient 64-bit Linux-capable IoT System-on-Chip(SoC), targeting applications such as endpoints, gateways,
embedded applications. Its system architecture combines achoice of the Cortex-A53, Cortex-A35 or Cortex-A32 processor
with up to two Cortex-M based systems. It includes a verified
subsystem with advanced power management, authenticateddebug, a stand-alone Secure Enclave for PSA hardware rootof trust, and a dedicated firewall IP for enhanced security.
All required system IP and a reference software stack are included,
enabling rendering and further modifications of the design.

https://www.arm.com/products/silicon-ipsubsystems/corstone-1000

4

Corstone-315

A package to help SoC designers build Cortex-M85/Ethos-U65
based systems faster. Corstone-315 combines an example
subsystem, System IP, software, and tools to streamline IoT device
development. Corstone-315 integrates Cortex-M85 along with an
optional Ethos-U65 NPU and Mali-C55 ISP to build low-power, lowcost, high-performance endpoint AI devices that support CNNs.

https://www.arm.com/products/silicon-ipsubsystems/corstone-315

Corstone-310

An example system designed around Cortex-M85 with systemwide TrustZone for Arm v8-M over AXI and power management
capability. The memory system is also optimized to support
Ethos-U55.

https://www.arm.com/products/silicon-ipsubsystems/corstone-310

Corstone-300

Arm Corstone-300 is a reference package and system IP package
providing a starting point for signal processing and machinelearning applications. It is designed around the Arm Cortex-M55
processor, and demonstrates system-wide TrustZone over AMBA
AXI and integrated power management. The IP, along with FPGA
and FVP platforms, and open-source software such as TF-M,
gives a both a head start and reduces risk in SoC development.

https://www.arm.com/products/iot/soc/
corstone-300

Corstone-201

Reference package and system IP for building a secure system onchip with the Cortex-M33 processor. The Corstone-201 contains
various system IP components and a reference design subsystem
integrating the processor, memory, debug, security and power
control. It is designed for the mainstream market targeting
performance balanced with power efficiency.

https://www.arm.com/products/iot/soc/
corstone-201

Corstone-102

The Arm Corstone-102 provides a flexible reference package
and system IP for small, low cost and energy efficient SoC
development. Based on the Arm Cortex-M23 processor, theCorstone-102 is targeted at the constrained market segment for
secure IoT applications.

https://www.arm.com/products/iot/soc/
corstone-102

Corstone-101

The Arm Corstone-101 contains a reference package based on
the Cortex-M3, as well as various other system IP components.
It provides all of the fundamental system elements to design a
SoC around Arm Cortex-M0/Cortex-M0+/Cortex-M3/Cortex-M4
processors.

https://www.arm.com/products/iot/soc/
corstone-101

Mali Multimedia Processing

Mali-G310 Graphics Processor

G310 is the latest ultra-efficient Mali GPU, offering a highdegree of scalability with 5 shader core configurations (V1-V5).
G310 can be scaled in both area and performance to createcompetitive products, ranging from low-perfomance IoT andwearable solutions, all the way up to premium 4K DTV solutions,and more. In addition, G310 introduces key features such as lossy
compression and HDR format support.

https://www.arm.com/products/silicon-ipmultimedia/gpu/mali-g310

Mali-G52 Graphics Processor

Designed to bring premium visual experiences to mainstream
markets with heightened machine learning capabilities.

https://www.arm.com/products/silicon-ipmultimedia/gpu/mali-g52

Mali-G31 Graphics Processor

The first ultra-efficient GPU based on the Bifrost architecture
targeting smaller applications such as IoT.

https://www.arm.com/products/silicon-ipmultimedia/gpu/mali-g31

Mali-C55 Image Signal Processor

Mali-C55 is a highly configurable, energy-efficient Image Signal
Processor (ISP) for IoT markets. It provides outstanding precisionand dynamic range with excellent image quality in a small siliconfootprint. It’s easy to integrate between Mali-C55 and ML
accelerators. Ideal for various use scenarios, from Smart Vision,
Smart Home hub, and consumer/commercial security camera to
Smart Display products.

https://www.arm.com/products/silicon-ipmultimedia/image-signal-processor/mali-c55

Mali-C52 Image Signal Processor

State-of-the-art image signal processing with class-leading highdynamic range image quality in real-time. Can be optimized for
performance or area.

https://www.arm.com/products/silicon-ipmultimedia/image-signal-processor/mali-c52

Mali-C32 Image Signal Processor

High precision and high dynamic range image signal processor.
Optimized for area. Ideal for low-power, cost-sensitiveembedded vision devices.

https://www.arm.com/products/silicon-ipmultimedia/image-signal-processor/mali-c32
5

Mali-C10 Image Signal Processor

Mali-C10 is a highly configurable Geometrical Distortion
Correction engine, capable of performing up to four simultaneousgeometric warp functions, each displayed in a sub-window, atvideo resolutions up to 4K UHD. The Mali-C10 GDC engine issuitable for video surveillance, fisheye correction, automotive
reversing cameras, and panoramic correction and dome cameras.

AFBC Codec Cores

AFBC is a lossless image compression format that provides
random access to pixel data to a 4x4 pixel block granularity. It is
employed to reduce memory bandwidth both internally within
the GPU and externally throughout the SoC

AFBC Standalone System IP

Ready to be integrated with non-Arm multimedia IP blocks tobring the advantages of Arm Frame Buffer Compression (AFBC)
across the SoC. AFBC minimizes multimedia system bandwidth
requirements, significantly reducing SoC power consumption.

AFRC Codec Hardware

AFRC is a lossy image compression format. AFRC can beused for compressing external texture inputs and framebuffer
outputs from the GPU. Configurable compression ratio provides
guaranteed bandwidth reduction for such surfaces and memory
footprint saving.

https://www.arm.com/technologies/graphicstechnologies/arm-frame-buffer-compression

CoreLink Interconnect
CoreLink CCI-550 Cache
Coherent Interconnect

Full coherency with up to six clusters including big.LITTLE andcoherent accelerators. High performance and power efficiency
with integrated snoop filter.

https://www.arm.com/products/silicon-ip-system/
corelink-interconnect/cci-550

CoreLink CCI-500 Cache
Coherent Interconnect

Full coherency with up to four clusters including big.LITTLE andcoherent accelerators. High performance and power efficiency
with integrated snoop filter.

https://www.arm.com/products/silicon-ip-system/
corelink-interconnect/cci-500

CoreLink CCI-400 Cache
Coherent Interconnect
with CPE-425

Provides full cache coherency between two clusters of multi-coreCPUs. Enables big.LITTLE processing and I/O coherency
for devices.

https://www.arm.com/products/silicon-ip-system/
corelink-interconnect/cci-400

CoreLink NI-700 Network
Interconnect

Corelink NI-700 is a Configurable and Scalable Networkon-Chip(NoC) for High Bandwidth accelerators,rest-of-SoC
connectivity and peripherals.

https://developer.arm.com/Processors/
CoreLink%20NI-700

CoreLink NIC-450
Network Interconnect

Highly configurable topology with network-on-chip properties
for building high-performance, optimized, AMBA-compliant SoC
connectivity, including QoS and Thin links.

https://www.arm.com/products/silicon-ip-system/
corelink-interconnect/nic

CoreLink NIC-400
Network Interconnect

Highly configurable topology with network-on-chip properties
for building high-performance, optimized, AMBA-compliant
SoC connectivity.

https://www.arm.com/products/silicon-ip-system/
corelink-interconnect/nic

CoreLink DPE-400
Data Parity Extn

Licensable extension of CoreLink NIC-400 Network
Interconnect, DPE-400 provides transportation of read andwrite data payload parity information, using the AXI WUSER
and RUSER, and AHB HWUSER and HRUSER, signals.

https://developer.arm.com/
documentation/100591/0100/dpe-400-overview

CoreLink ADB-400 AMBA
Domain Bridge

An asynchronous bridge between two components or systems
that can be in a different power, clock, or voltage domains.

https://developer.arm.com/ip-products/systemip/corelink-interconnect/corelink-networkinterconnect-family

CoreLink PCK-600
Power Control Kit

Power Control Kit with a suite of system IP to ease system
power and clock management infrastructure integration.

https://www.arm.com/products/silicon-ip-system/
system-controllers/pck-600

CoreLink XHB-400
AXI4-AHB Bridge

Converts AXI4 protocol to AHB-Lite protocol via an AXI4 slaveinterface and an AHB-Lite master interface.

https://developer.arm.com/ip-products/systemip/corelink-interconnect/corelink-networkinterconnect-family

CoreLink XHB-500

XHB-500 provides an AMBA AXI5 to AHB5 bridge and an AHB5
to AXI5 bridge.

https://developer.arm.com/docs/101375/latest/
introduction/about-the-xhb-500-bridges

6CoreLink SIE-300

Provides a set of configurable AXI5 security-aware componentsthat can protect peripherals and memories that are unaware of
security, so that a peripheral or memory is only accessible totrusted software. The SIE-300 also provides clock synchronizing
bridges and an access control gate.

https://developer.arm.com/ip-products/systemip/corelink-interconnect/corelink-sie-300

CoreLink System Controllers

CoreLink AHB CacheAHB Cache can be implemented as a processor cache (data or
generic), or a system cache. It can be used for both code anddata. The cache provides AHB5 data interfaces and an APB
configuration interface, both with TrustZone for Armv8-M
support.

https://developer.arm.com/ip-products/system-ip/
system-controllers/cache-controllers

CoreLink SIE-200 AHB System IP

The CoreLink SIE-200 system IP includes a collection ofinterconnect, peripheral, and TrustZone controller components
to help build secure AHB systems more easily.

https://developer.arm.com/ip-products/system-ip/
corelink-interconnect/corelink-sie-200

Corelink DMA-350

CoreLink DMA-350 is an AXI DMA controller targeted at
endpoint AI systems, particularly those based on the Cortex-M55
processor. It has been designed to enable efficient data
movement, thereby reducing system power consumption andimproving performance.

https://developer.arm.com/Processors/
CoreLink%20DMA-350

CoreLink DMA-330 AXIDMA Controller

A high-performance DMA controller that can boost the performanceand reduce the power consumption in AXI-based systems.

https://www.arm.com/products/silicon-ip-system/
embedded-system-design/dma-330

CoreLink DMA-230 AHB
Micro DMA Controller

Low gate count (3-10k gates) micro-DMA engine targeting
AHB-based Cortex-M systems.

https://www.arm.com/products/silicon-ip-system/
embedded-system-design/dma-230

CoreLink GIC-625
Generic Interrupt Controller

The GIC-625 is a generic interrupt controller that handles
interrupts from peripherals to the cores, and interrupts between
cores. The GIC supports up to 8 clusters and supports the GICv3
and GICv3.1 architecture.

https://developer.arm.com/
documentation/102143/0100

CoreLink GIC-600
Generic Interrupt Controller

Detects, manages, virtualizes, and distributes interrupts forArmv8.0-A processors. Configurable - up to 512 processor
threads per chip, up to 16 chips, and 960 shared interrupts.

https://www.arm.com/products/silicon-ip-system/
system-controllers/gic

CoreLink GIC-500
Generic Interrupt Controller

Detects, manages, virtualizes, and distributes interrupts forArmv8.0-A processors. Configurable up to 128 single-threaded
cores and 960 shared interrupts.

https://www.arm.com/products/silicon-ip-system/
system-controllers/gic

CoreLink GIC-400
Generic Interrupt Controller

Detects, manages, and virtualizes interrupts for Armv7 processors.
Configurable up to 8 cores and 480 shared interrupts.

https://www.arm.com/products/silicon-ip-system/
system-controllers/gic

PL192 Vectored
Interrupt Controller

An advanced vectored interrupt controller supporting up to 32
vectored interrupts with programmable priority level and masking.

https://developer.arm.com/ip-products/system-ip/
system-controllers/peripheral-controllers

CoreLink TZC-400 TrustZone
Address Space Controller

Performs security checks on transactions to memory or
peripherals, configurable up to 8 regions.

https://www.arm.com/products/silicon-ipsecurity/address-space-controllers

CoreLink L2C-310 AXI Level 2
Cache Controller

High-performance, AXI level 2 cache controller designed andoptimized to address Arm AXI processors, normally used with
Cortex-A5.

https://www.arm.com/products/silicon-ip-system/
embedded-system-design/l2c-310

CoreLink MMU-600 System
Memory Management Unit

Highly scalable with support for millions of translation contexts.
Designs can be scaled from small to large-scale systems while
maintaining a common driver framework. TrustZone Media
Protection protects high-value 4K premium content.

https://www.arm.com/products/silicon-ip-system/
system-controllers/mmu

CoreLink MMU-500 System
Memory Management Unit

System memory management unit that includes caching andmemory virtualization. Enforces memory protection and access
control, and is designed for use in a virtualized system wheremultiple guest operating systems are managed by a hypervisor.
Supports Armv8-A and Armv7-A.

https://www.arm.com/products/silicon-ip-system/
system-controllers/mmu

7

BP140 AXI Internal
Memory Interface

AXI to on-chip SRAM interface.

https://developer.arm.com/docs/dto0009/a

BP141 TrustZone AXI
Memory Interface

AXI to on-chip SRAM interface with support for Arm TrustZone
protection for secure memory regions.

https://developer.arm.com/products/system-ip/
system-controllers/other-system-controllers

Peripheral Controllers
https://developer.arm.com/ip-products/system-ip/
system-controllers

PL011 UART Universal
Asynchrounous Receiver/Transmitter

PL022 SPI Synchronous
Serial Port

Peripheral controllers for UART, SPI and real-time clock.

https://developer.arm.com/ip-products/system-ip/
system-controllers
https://developer.arm.com/ip-products/system-ip/
system-controllers

PL031 RTC Real Time Clock

CoreSight Debug & Trace
CoreSight SoC-600
Debug and Trace

For high-bandwidth debug and trace solutions. Includes remoteand local debug access, trace routing and termination, crosstriggering and time stamping.

https://www.arm.com/products/silicon-ip-system/
coresight-debug-trace/soc-600

CoreSight SoC-600M
Debug and Trace

Debug and trace components for multi-core Cortex-M based
SocS. Includes remote and local debug access, trace routing andtermination, cross-triggering and time stamping.

https://www.arm.com/products/silicon-ip-system/
coresight-debug-trace/soc-600M

CoreSight SoC-400
Debug and Trace

Configurable components, including debug access trace
generation manipulation and output, cross triggering,and time stamping.

https://www.arm.com/products/silicon-ip-system/
coresight-debug-trace/soc-400

CoreSight SDC-600
Secure Debug Channel

Addresses device security needs by allowing silicon and tool
vendors to enforce protection and police debug access, andby working closely with cryptographic elements and debug
certificate authentication.

https://www.arm.com/products/silicon-ip-system/
coresight-debug-trace/sdc-600

CoreSight ELA-600
Emb Logic Analyzer

Embedded Logic Analyzer with highest data tracing efficiency
and capacity. Improves system efficiency with run-time signal
monitoring and control.

https://www.arm.com/products/silicon-ip-system/
coresight-debug-trace/coresight-ela-600

CoreSight ELA-500
Emb Logic Analyzer

Embedded Logic Analyzer providing an effective way to observe
low-level signals in an SoC, offering a way to zoom into the root
cause of data corruption.

https://www.arm.com/products/silicon-ip-system/
coresight-debug-trace/coresight-ela-500

CoreSight STM-500
System Trace Macrocell

Trace source for real-time software instrumentation with no
impact on system behavior or performance. Extends the low-cost,real-time visibility of software and hardware execution to allsoftware developers. Supports 64-bit memory interfaces.

https://www.arm.com/products/silicon-ip-system/
coresight-debug-trace/coresight-stm-500

CoreSight System Trace Macrocell

System Trace Macrocell supporting 32-bit memory interfaces.

https://developer.arm.com/ip-products/
system-ip/coresight-debug-and-trace/coresightcomponents/system-trace-macrocell

CoreSight Trace Memory
Controller

A configurable trace component to terminate trace buses into
buffers, FIFOs, or alternatively, to route trace data over AXI to
memory or off-chip to interface controllers.

https://www.arm.com/products/silicon-ip-system/
coresight-debug-trace/coresight-tmc

8

Certified Libraries and FuSa RTS
FuSa RTS

With FuSa RTS, developers receive a robust real-time operating
system (RTOS), independent processor abstraction
layer (CMSIS-Core) and verified C library that are highly optimized
for Cortex-M processors by Arm architecture experts.

https://developer.arm.com/tools-and-software/
embedded/fusa-run-time-system

Subset of the standard C library comprising of approximately 200
functions that have been specifically implemented and optimized
for use in safety development.

Certified C Library

Qualified for IEC 61508 (Industrial) – SIL 3
ISO 26262 (Automotive) – ASIL D, EN 50128 (Railways) – SIL 4
IEC 62304 (Medical) – Class C. Comes with its own Qualification
Kit which comprises of the Safety Manual andDefect Report.

https://developer.arm.com/tools-and-software/
embedded/arm-compiler/safety

Artisan Physical IP
Cortex-M85 PIK for TSMC 22ULL

Reference flow offering a low-risk path to implementation of theCortex-M85 with Artisan Physical IP on TSMC 22ULL process node.

Cortex-M55 PIK for TSMC 22ULL

Reference flow offering a low-risk path to implementation of theCortex-M55 with Artisan Physical IP on TSMC 22ULL process node.

Cortex-M33 PIK for TSMC 22ULL

Reference flow offering a low-risk path to implementation of theCortex-M33 with Artisan Physical IP on TSMC 22ULL process node.

Ethos-U55 PIK for TSMC 22ULL

Reference flow offering a low-risk path to implementation of theEthos-U55 with Artisan Physical IP on TSMC 22ULL process node.

https://www.arm.com/products/silicon-ip-physical9Artisan Physical IP – Free Library Program
For details of the thousands of Physical IP libraries included in the Artisan Physical IP - Free Library Program see
https://www.arm.com/products/silicon-ip-physical

5
nm

TSMC
SamsungGlobalFoundries/
IBM

•

7
nm

12
nm

•

•

•
•

14
nm

22
nm

28
nm

40
nm

•

•

•

•

•

•

•

•

•

•

•

•

55
nm

65
nm

80
nm

90
nm

110
nm

130
nm

150
nm

152
nm

160
nm

180
nm

250
nm

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•
•

•
•

•
•

•

•

•

•

•

•

•

•

•

•

Silterra

•

•

•

•

HHGrace•••

DB HiTek•••

Vanguard

•

UMC
SMIC

•

45
nm

XMC
SK hynix

•

•

•
•

•
•

•

MagnaChip

•

CSMC

•

TowerJazz•

HeJian

•

•

•
•

•

1st Silicon

•

HHNEC

•

•

For each geometry in this table, multiple process flavours may exist. Not all Arm Artisan Physical IP for each process flavour within the listed geometries
and marked with a dot are available as part of the Free Library Program included in the DesignStart Tier of AFA. Additional fee-based IP may be available
for technologies not marked in this table.
Please contact your Arm Account Manager for further information.

10

Safety Packages
Cortex-A55 Safety Package
Cortex-A53 Safety Package
Cortex-A35 Safety Package
Cortex-A32 Safety Package
Cortex-A34 Safety Package
Cortex-R52+ Safety Package
Cortex-R52 Safety Package
Cortex-R5 Safety Package
Cortex-M85 Safety Package
Cortex-M55 Safety Package

Safety Packages provide information used by chip developers
when creating SoCs for functional safety applications and foreasing the process of obtaining safety certification. They containdocumentation specific for an individual processor.
Cortex-A55, Cortex-A53, Cortex-R52+, Cortex-R52, Cortex-R5,
Cortex-M33, Cortex-M4, Cortex-M3, and Cortex-M0+ Safety
Packages also provide access to their respective Software Test
Library (STLs) to enable integration of the library.

https://www.arm.com/why-arm/technologies/
safetyCortex-M33 Safety Package
Cortex-M23 Safety Package
Cortex-M7 Safety Package
Cortex-M4 Safety Package
Cortex-M3 Safety Package
Cortex-M0+ Safety Package

Training

Arm On-Demand
Online Training

Arm on-demand training provides access to a wealth of training
content, speeding up silicon development and providing theknowledge you need, when and where you need it. Topics including
Arm CPU Architectures, Cortex-M hardware, AMBA bus protocols,
Arm tools and models are delivered via over 1000 pieces of content
and accompanying knowledge checks.

https://developer.arm.com/Training/Arm%20Ondemand%20Training%20-%20Flexible%20AccessTranscripts for online training are available in Korean, Simplified andTraditional Chinese and Japanese. Contact your account manager
for access.

11

DesignStart Tier
Product

Description

Learn more about this product

Cortex-M3 Processor

Designed for cost-sensitive and power-constrained solutions ina broad range of devices. Balanced between area, performance,and power.
Reference design & supporting system IP available in Corstone-101.

https://www.arm.com/products/silicon-ip-cpu/
cortex-m/cortex-m3

Cortex-M23 Processor

Smallest and lowest-power microcontroller with Arm TrustZone
security, ideal for applications requiring software isolation andsecurity.
Reference design & supporting system IP available in Corstone-102.

https://www.arm.com/products/silicon-ip-cpu/
cortex-m/cortex-m23

Cortex-M0 Processor

Small footprint and high efficiency, ideal for simple, cost-sensitive
devices.
Reference design & supporting system IP available in Corstone-101.

https://www.arm.com/products/silicon-ip-cpu/
cortex-m/cortex-m0

Cortex Processors

Corstone IP
Cortex processor reference packages and supporting system IP. Simplifies silicon design and reduces time to market.

Corstone-102

The Arm Corstone-102 provides a flexible reference package
and system IP for small, low cost and energy efficient SoC
development. Based on the Arm Cortex-M23 processor, theCorstone-102 is targeted at the constrained market segment for
secure IoT applications.

https://www.arm.com/products/iot/soc/
corstone-102

Corstone-101

The Arm Corstone-101 contains a reference package based on
the Cortex-M3, as well as various other system IP components.
It provides all of the fundamental system elements to design a
SoC around Arm Cortex-M0/Cortex-M0+/Cortex-M3/Cortex-M4
processors.

https://www.arm.com/products/iot/soc/
corstone-101

12Artisan Physical IP – Free Library Programfor details of the thousands of Physical IP libraries included in the Artisan Physical IP - Free Library Program see
https://www.arm.com/products/silicon-ip-physical

5
nm

TSMC
Samsung

•

7
nm

12
nm

•

•

•

GlobalFoundries/
IBM

•

14
nm

22
nm

28
nm

40
nm

•

•

•

•

•

•

•

•

•

•

•

•

•

45
nm

55
nm

65
nm

80
nm

90
nm

110
nm

130
nm

150
nm

152
nm

160
nm

180
nm

250
nm

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•

•
•

•
•

•
•

•

•

•

•

•

•

•

•

•

•

Silterra

•

•

•

•

HHGrace•••

DB HiTek•••

Vanguard

•

UMC
SMIC

•

•

•
•

•

XMC

•

SK hynix•

MagnaChip

•

CSMC

•

TowerJazz

•

•

•
•

HeJian••

1st Silicon

•

HHNEC

•

•

DesignStart Training
Arm on-demand training provides access to a wealth of training content, speeding up silicon development and providing the knowledge you need, when andwhere you need it. Topics including Arm CPU Architectures, Cortex-M hardware, AMBA bus protocols, Arm tools and models are delivered via over 1000 piecesof content and accompanying knowledge checks.
Transcripts for online training are available in Korean, Simplified and Traditional Chinese and Japanese. Contact your account manager for access.

The Arm trademarks featured in this presentation are registered trademarks or trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere.
All rights reserved. All other marks featured may be trademarks of their respective owners.

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