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Differential Coder
VWA-28-DIFF-SD
10 – 28 Gb/sDescription
The VWA 500023 AA chip is a NRZ differential coder
for high data rate application, typically 10 to 28 (tbc)
Gb/s. The chip is designed in 0.18µm SiGe BiCMOS 150
GHz process.
The device has two high frequency differential inputs(NRZ_in and Clock) and one differential high frequency
output (DIff_Out). The chip is 50Ω single ended and100Ω differential in and out. The chip can be usedsingle in and out.
The input data stream is synchronized by the clock andelectrically coded to a differential format. If a logicalzero is present to the input, the output remains
unchanged: Qn+1=Qn. If a logical one is present to thedata input, the output value is changed at every risingedge of the clock: a constant one to the input gives acontinuous series of 01010 to the output.
The different parts of the chip are internally biasedusing a voltage and currents reference circuit(Bandgap), in order to have the overall RF
characteristics of the chip, insensitive to the voltage
supply, the temperature and the process spread. Anenable input control pin is used to switch the chip ONor OFF.

Ordering information
Part Number: VWA 500023 AA
Demoboard (QFN): VWA 00078 AB
Main Features






SiGe BiCMOS - Ft = 150GHz
Data rate up to 28Gb/s
3 V / 480 mW typical bias @ 27°C
Single or differential input / output
Input amplitude (data and clock): 300mV pp
Output amplitude: 800mV pp diff (400mV on each50Ωoutput)
 Temperature compensated ON and OFF state through an enable pin control

Functional Block Diagram

Three separate pins are used to bias the chip: one
dedicated to the reference circuit, the second for thecoder core (input buffers and coder core) and the lastfor the 50Ω output driver. The 3 bias inputs can beseparately filtered / decoupled in order to optimize theoverall chip performances.

Applications

 NRZ to RZ DPSK data coding Fiber transmission

Head Office : rue de la Croix Blanche - Immeuble LOGI – 78350 France
http://www.vectrawave.com
 + 33 (0)619 870 560
+33 (0)139 564 012
mail : info@vectrawave.com
VWA 50023AAA DS Rev 0.21 VectraWave Proprietary information subject to change without notice September 2009

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Chip pin out

NameType

Gnd1*

Bias in/out

CLKin

RF input

Description
Ground for clock signal access. To be used with Gnd2 as ground plane for coplanar access.
Clock signal input. Internally DC decoupled (no external series decoupling capacitor required). Is
100Ω differential with CLKinx

CLKinxRF inputComplementary clock signal input. Internally DC decoupled (no external series decoupling capacitor
required). Is 100Ω differential with CLKin.

Gnd2*

Bias in/out

Ground for clock signal access. To be used with Gnd1 as ground plane for coplanar access.

GndCoderBias in/out

Coder core ground access. Is in series with an integrated inductor used to filter the common mode signal
due to switching. Can be grounded with an additional external inductor if needed.

Gnd3*

Bias in/out

DriverOut

RF output

Ground for signal driver output. To be used with Gnd4 as ground plane for coplanar access.
RF signal out. The driver uses a 50Ωresistor load in order to be consistent with 50Ω: has to be loaded ifnot used.

Head Office : rue de la Croix Blanche - Immeuble LOGI – 78350 France
http://www.vectrawave.com
 + 33 (0)619 870 560
+33 (0)139 564 012
mail : info@vectrawave.com
VWA 50023AAA DS Rev 0.21 VectraWave Proprietary information subject to change without notice September 2009

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VCCDriver

Bias in/outVVWWA
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Positive bias for the driver output stage. The DC common output level to the output is directly dependent
to this value.

DriverOutx

RF output

Complementary RF signal out. The driver uses a 50Ωresistor load in order to be consistent with 50Ω:
has to be loaded if not used.

Gnd4*

Bias in/out

Ground for signal driver output. To be used with Gnd3 as ground plane for coplanar access.

VCC_Coder

Bias in/out

Main chip bias: biases the chip drivers, the coder core and the first driver stages.

VCC_bgBias in/out

Chip reference voltage and current bias. Is separated from the main bias to ensure a proper DC filtering

Gnd_bgBias in/out

Chip reference voltage and current ground. Is not physically connected to the RF grounds.

Gnd5*

Bias in/out

Ground for input signal access. To be used with Gnd6 as ground plane for coplanar access.

Nrz_inRF input

Digital signal input. DC is present on the access. Has to be DC decoupled from the external sourceby an external capacitor. Is 100Ω differential referenced to Nrz_inx.

Nrz_inx

RF inputComplementary digital signal input. DC is present on the access. Has to be DC decoupled from theexternal source by an external capacitor. Is 100Ωdifferential refernced to Nrz_in.

Gnd6*

Bias in/out

Ground for input signal access. To be used with Gnd5 as ground plane for coplanar access.

enableDigital input

Chip enable: switches the chip ON or OFF.

 All pads are octogonal (w / l µm²) = 66 / 105; except VCC_Coder = 75 / 105
 Die thickness = 0.28 mm (11 mils)
 No metallization on back side

Head Office : rue de la Croix Blanche - Immeuble LOGI – 78350 France
http://www.vectrawave.com
 + 33 (0)619 870 560
+33 (0)139 564 012
mail : info@vectrawave.com
VWA 50023AAA DS Rev 0.21 VectraWave Proprietary information subject to change without notice September 2009

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Electrical specifications
Electricalparameters

Conditions

Symbol

Min.

Typ.

Max.

Unit

Chip bias
Supply voltage

VccCoder – VccBG

Vcc

VccDriver
Current
consumption

V32.5

34V

VccCoder; enable=0;
T=27°C

VccCoder0

VccBG; enable=0; T=27°C

VccBG0VccDriver; enable=0;
T=27°C

VccDriver0

27pA

Currentconsumption

VccCoder; enable=1

VccCoder1

20mAON mode*

VccBG; enable=1

VccBG1

VccDriver; enable=1

VccDriver1

OFF mode*nA3(100°C) 0.01

15(- 40°C) 2(-40°C) 28(100°C) 2.5uAmA

150

mA

100

Ω

300

mVpp

100

Ω

300mVpp

Data input (Nrz_in and Nrz_inx)
Input impedance

Single and differential
modes

Amplitude range**

Single or differential input

Zin

2

Clock input (Clkin and Clkinx)
Input impedance

Single and differential
modes

Amplitude range** Single or differential input

1Frequency range***25

Phase margin

GHzTbit/4
Driver Output

Output impedance

Single / Differential

50 / 100Ω

Head Office : rue de la Croix Blanche - Immeuble LOGI – 78350 France
http://www.vectrawave.com
 + 33 (0)619 870 560
+33 (0)139 564 012
mail : info@vectrawave.com
VWA 50023AAA DS Rev 0.21 VectraWave Proprietary information subject to change without notice September 2009

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Common mode
voltage

Referred to VCCDriver

VCCDriver0.350

VAmplitudeSingle

400mVpp* OFF  enable =“0”, ON  enable=“1”** The Min value corresponds to the sensitivity.
*** The frequency range is given in GHz for the clock signal. It corresponds to the data rate.

Head Office : rue de la Croix Blanche - Immeuble LOGI – 78350 France
http://www.vectrawave.com
 + 33 (0)619 870 560
+33 (0)139 564 012
mail : info@vectrawave.com
VWA 50023AAA DS Rev 0.21 VectraWave Proprietary information subject to change without notice September 2009

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Absolute rating
Parameters

Conditions

SymbolMin.

Supply voltage

VccCoder – VccBG VccDriver

Vcc

Digital input

enable

Typ.

Max.

Unit

-0.5

4.6

V-0.5

4.6

VTBC°CMax.

Unit

Storage temperature

ESD protection
Parameters

Conditions

SymbolMin.

Typ.

HBM* rating RF in/out

Clk, NRZin DriverOut

0.9

kV

HBM* rating analog

enable2.3kV

HBM* rating bias

VCC gnd

5.7

kV*Human Body Model

Head Office : rue de la Croix Blanche - Immeuble LOGI – 78350 France
http://www.vectrawave.com
 + 33 (0)619 870 560
+33 (0)139 564 012
mail : info@vectrawave.com
VWA 50023AAA DS Rev 0.21 VectraWave Proprietary information subject to change without notice September 2009

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Application schematic
Differential IN and OUT

Single-ended IN and OUT

Head Office : rue de la Croix Blanche - Immeuble LOGI – 78350 France
http://www.vectrawave.com
 + 33 (0)619 870 560
+33 (0)139 564 012
mail : info@vectrawave.com
VWA 50023AAA DS Rev 0.21 VectraWave Proprietary information subject to change without notice September 2009

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Output characteristics – simulated

Typical coder response: for -40 (_1), 27 (_2) and 100 (_3)°C – RC parasitics
Signal:Data rate = 20 Gb/s NRZ
Amplitude = 300 mVpp

Clock:
Frequency = 20 GHz
Amplitude = 300 mVpp

Driver0ut: 50Ωloaded

Driver0utx: 50Ωloaded

Handling

These products are sensitive to electrostatic discharge and should not be handled except at a static free workstation.
Take precautions to prevent ESD; use wrist straps, grounded work surfaces and recognized anti-static techniques whenhandling the IC.

Head Office : rue de la Croix Blanche - Immeuble LOGI – 78350 France
http://www.vectrawave.com
 + 33 (0)619 870 560
+33 (0)139 564 012
mail : info@vectrawave.com
VWA 50023AAA DS Rev 0.21 VectraWave Proprietary information subject to change without notice September 2009

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