Three-phase AC-DC Converter for EV Rapid
Charging with Wireless Communication for
Decentralized Controller
Keita Ohata1, Masakazu Adachi1, Keisuke Kusaka1 and Jun-ichi Itoh1
1

Nagaoka University of Technology, Japan

Abstract-- This paper proposes a multi-modular AC-DC
converter system using wireless communication for a rapid
charger of electric vehicles (EVs). The multi-modular
topology, which consists of multiple modules, has anadvantage on the expandability regarding voltage and power.
In the proposed system, the input current and output voltage
are controlled by each decentralized controller, which
wirelessly communicates to the main controller, on each
module. Thus, high-speed communication between the mainand modules is not required. As the results in a reduced
number of signal lines. The fundamental effectiveness of the
proposed system is verified with a 3-kW prototype. In theexperimented results, the input current imbalance rate is
reduced from 49.4% to 0.1%, where total harmonic
distortion is less than 3%.
Index Terms- - AC-DC converter, decentralized controller,
wireless communication, droop control

I. INTRODUCTION
The multi-modular topology, which consists of multiple
modules, has an advantage on the expandability regarding
voltage and power [1-12]. Thus, the multi-modular
topology is suitable for high-voltage, and high-power
converters. Considering a rated voltage of IGBTs or SiC
MOSFETs, the several dozen modules is required for 6.6kV input.
However, an increase in the number of modules causes
complexity of wired communication between the main
controller and each module because a current and voltage
information for feedback control, thermal information forsafety, gate signals must be transmitted to the main
controller. In addition, the communication of the input
current information must be fast because the centralized
controller directly control the input current [13-18].
Generally, a band width for the input current control mustbe higher than several thousand radian per seconds
considering the grid frequency. Thus, the communicationmust be wired communication .
In this paper, the control method with wirelesscommunication by the droop control and the current
balancing control using wireless communication between
the main controller and the controller with wirelesscommunication on each module is proposed. In the
proposed control, the input current and the output voltage
are independently controlled by each module. Owing to thedroop control and the current balancing control, low-speed
communication between the main and module controller
can be accepted because the input current and output

voltage is independently controller by each controller on
the modules.
This paper is organized as follows. In section II, thewireless modules on the market is tested because alimitation of the frequency band of the wirelesscommunication must be clear. Next, the proposed control
with wireless communication by the droop control and thecurrent balance control which used wirelesscommunication module are explained in section III. Thenthe proposed method is confirmed by the experiments.
II. EVALUATION OF WIRELESS COMMUNICATION SYSTEM
In this chapter, a Bluetooth module for the wirelesscommunication of the DC voltage command, which isused for the proposed control for an AC-DC converter, isevaluated. The DC voltage command is transmitted via theBluetooth modules. In this evaluation, the limitation of thefrequency band of the DC voltage control isexperimentally tested. Note that, a buck chopper is used
for the evaluation for simplicity.
A. Experimental condition
Table I lists the specification of the wireless module
used in this test. The module of Bluetooth 4.1 is used inorder to save power consumption. Besides, microchip lowenergy data profile is used as a Bluetooth profile. The
profile performs as communication of UART (universal
asynchronous receiver transmitter).
Table II lists the specification of the controller in theexperiment for evaluation of a wireless communication
system.
Figure 1 shows the outline of the test environment for
the wireless communication with a buck chopper. The
output voltage command is wirelessly transmitted. The
controller on the buck chopper controls the output voltage
according to the output command. In this experiment, theoutput voltage command value Vo* is sinusoidal with anamplitude of 30 V, and a DC bias of 100 V. The
microprocessor #1 converts analog to digital in order togenerate the command value. The analog command value
is sampled with a sampling frequency of command value
fsamp-c. The converted digital command value is sent to themicroprocessor #2 via the Bluetooth modules #1. In the
microprocessor #2, the inductor current control and theoutput voltage control are performed in order to follow theoutput voltage command value Vo* and drive the step-down
chopper. Besides, current control and voltage control are
performed by microprocessor #2. Fig. 2 shows a circuit
configuration of the buck chopper.

TABLE I. SPECIFICATION OF WIRELESS MODULE.
Manufacture

Microchip

Communication standard

Bluetooth ver. 4.1

Product name

RN4020Module size

13.4 mm × 25.8 mm × 2 mm

Maximum speed

240 kbps

Low

Allowable transmission distance

20 m

High

TABLE II. SPECIFICATION OF CONTROLLER AND MAIN CIRCUIT IN
EXPERIMENT FOR EVALUATION OF WIRELESS COMMUNICATIONSYSTEM
Quantity

SymbolRated output power
Range of output voltage
Rated output current
Back-boost reactor
Input capacitor
Output capacitor
Switching frequency
ACR cutoff frequency
AVR cutoff frequency
Sampling frequency ofcommand value

Pn
Vo

15 ms

Low

10 [ms/div](a) Outline.

1.0 kW

In (output)
L
Ci
Co
fsw
fACR
fAVR

283(200√2) ~ 150 V
6.67 A (@150 V)
2.93 mH
650 F650 F
10 kHz23.9 Hz239 Hzfsamp-c

10 kHz100 sSending data Ds

High

Low
High

20 byteReceiving data Dr

Low
1 byteIL
Co

Vo
RL  30 Fig. 2. Circuit configuration of the buck chopper

fACR = 239 Hz

0
-3 dB

-10

Buck chopper+ Wireless communication

-20
-30

fAVR = 23.9 Hz

L = 2.93mH

200 [s/div](b) Enlarge of Fig. 4. (a).
Fig. 3. Waveforms of sending data and receiving data. Fig. 7 (a) showsa waveform capturing sending and receiving data for a long time. As
a result, even if data is continuously input to the module, it is actuallysended intermittently and it can be seen that there is an interval of 15
ms. Fig. 7 (b) is an enlargement of (a).

Reference output voltage Vo*
Reference output voltage Vo*- Output voltage Vo phase difference f [°] - Output voltage Vo gain Gv [dB]Fig.1 Outline of the buck chopper control system. The output voltage
Vo is wirelessly provided.

Vi = 250 V

Receiving data Dr

Value

IL - ACR
Receiving output
Vo - AVR
voltage command
Generation of gate signal*
Micro
Micro Vo*V
Vo* ProcessoroBluetoothBluetooth
Gate
Processor#2#1Module #1
Module #2
Driver
Vo*
Vo*
Buck
130 V
Vo, IL Chopper
100 V
70 V
: Wireless communicationt

fsw=10kHzSending data Ds

High

Gain
characteristics

-40
0.1
0

1

10

Buck chopper

100

10000

-60

-120
-180
Buck chopper-240 Buck chopper+ Wireless communication-300

B. Signal transmission
Figure 3 shows the send data of the Bluetooth moduleand the received data by another Bluetooth module. Notethat the transmission data configuration has no parity andthe transmission speed is 115.2 kbps. The data is constantat (FF)16, and data is transmitted every 100 s. From theabove transmission data condition, the signal becomes
high-level only when it represents the stop bit. Therefore,
the number of bytes can be counted by counting thenumber of pulses that becomes High-level. Figure 3 (a)shows waveforms of send and received data. As a result,processing of the header and footer data which are addedat the time of wireless communication causes about 15 ms
of waiting time every 20 bytes. Figure 3(b) shows an

1000

Frequency of reference output voltage fVo* [Hz]

-360
0.1

Phase

characteristics

1

10

100

1000

10000

Frequency of reference output voltage fVo* [Hz]Fig. 4. Frequency characteristic of the output voltage Vo on the buckchopper.

enlargement of (a). In the figure, the sending and received
data at once are 20 bytes. From the results, it is clear thatthe throughput is 11 kbit/s when the selected module is
used.
C. Frequency characteristics with wireless communication
Figure 4 shows the frequency characteristic of output
voltage Vo for the control system, which is obtained withvarying the frequency of the output voltage command

within 0.1 Hz to 10 kHz. The red dots are the response of
the buck chopper without a wireless communication, andthe green dots are the response of step-down chopper withthe output voltage command provided by wirelesscommunication. Figure 4 (a) shows the gain characteristics.
Regardless of whether wireless communication is used, thegain decreases monotonously from around 10 Hz. After
that, the gain continuously decreases in the buck chopper
without wireless communication. On the other hand, in thebuck chopper given by wireless communication, the gain
decreases with a variability due to the transmission time.
Fig. 4 (b) shows the phase characteristics. The change rateof the phase difference rapidly decreases from around 1 Hz,
and the phase difference crosses 180 degrees at 4 Hz. Then,the phase difference monotonically decreases, especiallythe phase delay reaches 360 degrees at 9 Hz. As the results,
the maximum frequency band of the output voltage
command of the AC-DC converter should be less than 1
Hz.
As the result, it has been confirmed that wirelesscommunication cannot be applied to the control requiringa wide frequency bands. Thus a new control method,which does not need wide frequency band communication,is required to employing the wireless communication.

primary side and connected in parallel on the secondaryside. Each module has a PFC stage and isolation stage by
the series-resonant DC-DC converter. The proposedsystem has the main controller, which transmits the output
voltage reference using wireless communication, andcontrollers on each module. Each module independently
controls the input current for PFC and output voltage
without wired communication. The resonant DC-DC
converter is operated in an open-loop.
The duty of the DC-DC converter is controlled as 50%
used open-loop.
B. Decentralized Control with Wireless Communication
Figure 6 shows the proposed control block diagram.
The main controller and module controllers operate the
AC-DC converter. Each module controller assumes theoutput DC voltage control and the input current control asa minor loop of the output voltage control.
The output voltage Vo, input current Iu, Iv, and Iw arecontrolled by each phase module. Thus, high-performance
controller is not necessary as the main controller because
the output voltage is DC.
The input current commands iLu*, iLv*, iLw* arecalculated from the amplitude of the current Iamp and thephase information u, v, w as shown in (1).

III. PROPOSED MULTI-MODULAR CONVERTER SYSTEM

iLu *  I amp sin u

A. Circuit Topology
Figure 5 shows the multi-modular AC-DC converter
for the EV rapid charging. Each phase consists of multiple
modules. The modules are connected in series on theiLv*  I amp sin  v
*
Lw

i

(1)

 I amp sin  w

Resonant DC-DC converter

PFC converter
iL_u
Lu
Vdc_u

C s Ls+vin_u

U phase conv.
ModuleCout +

Vout_u

Cconv
Lm

Rout

V phase conv.

Vout

W phase conv.

Fig. 5. Multi-modular AC-DC converter for EV Rapid Charging.

Vout*
Vout* +

Vout*
Iu
Iv +

+
+

1
3

Iw

I0

Iu, Iv, Iw

Main controller：Wirelesscommunication++
Vd_comp

+
Vc_u
PI

0

+

I0 +
Iu
Current balance
control

Iu

+

+

Vd_u
ZK

PI

-

abs

Vout

sin

Vin
Vout
* Droop
Iu control

PLL

Conv.

+

×

PI

iLu

Mod._uMod._v

vin_u

Modular controller(U phase)
Modular controller(V phase)
Modular controller(W phase)

Fig. 6. Proposed decentralized control with wireless communication.

Mod._w

Note that u, v, w are introduced using the PLL, and thephase current iLu, iLv, iLw in the inductors Lu, Lv, Lw arecontrolled as the absolute value of sine wave. It ischaracterized that the common output DC voltage isindependently controlled by the module controllers tofollow the output voltage command, which is wirelesslytransmitted from the main controller.
The main controller is only used for generating theoutput DC voltage reference Vo* and calculate the average
current reference Io. Two commands date are wirelessly
sent to each phase module.
B.1. Droop control
In the proposed control scheme, the common output
DC voltage is controlled by the multiple controllers. Whenthe output voltage detection has an error in thisconfiguration, it results in current unbalance between thephases and an increase in power loss. Thus, the droop
control is employed in order to avoid the divergence fromthe output voltage even when a detection gain of the output
voltage has an error.
Figure 7 shows the equivalent circuit of the output DC
side with or without the droop control. The voltage Vout_u,
Vout_v, and Vout_w are the output voltages of respective cells,
and Vout is an output voltage applied to a load. Each module
has an automatic voltage regulator to obtain the constant
output voltage, the output voltage of each module can be
represented as the ideal DC source as shown in Fig. 7.
However, the temperature drift or settling error may occur
detection value error. When the detected value has an error,
one or two modules connected in parallel on the secondaryside may stop the operation owing to a circulating current
among modules.
Therefore, in the droop control, virtual resistance inseries with the voltage source of each phase is introduced.
The droop control is operated by dropping the dc voltage
command value according to the droop gain K in order tomake the voltage gain within the range of the droop gain
K. The divergence of the output voltage control issuppressed by settling the droop gain K higher than apredicted detection error.
Droop control is applied to the voltage command valueof the AVR. The droop voltages Vd_u, Vd_v and Vd_w which
are output by the droop control are expressed by therespective phase currents and the virtual resistance ZK by
the following (2).

Vd _ w 

Iu

Vout_v(2)

Vin
ZK  Iw
Vout *

where The virtual resistance ZK is determined bymultiplying the droop gain Kp.u..
The droop voltage is multiplied by the equivalent
resistance gain in consideration of the voltage ratio on the
primary side and the secondary side. On the other hand, theIv
Vout_w

Iw

Vout

Rout

Iw Vout

Rout(a) without droop control

ZK
Vout_uIu

ZK

ZK

Vout_v

Iv
Vout_w(b) with droop control
Fig. 7. Equivalent circuit of the output DC side with or without the
droop control.

current flowing through the virtual resistor ZK is expressedby (3).













Iu 


 Rout Vout _ u  Vout _ v  Vout _ w 
1 
1


Vout _ u  Vout _ u  Vout
 
ZK 
3
R

Z
Z
out
K
K




Iv 


 Rout Vout _ u  Vout _ v  Vout _ w 
1 
1


Vout _ v  
Vout _ v  Vout
 
ZK 
3Rout  Z K
ZK






Iw 


 Rout Vout _ u  Vout _ v  Vout _ w 
1 
1


Vout _ w  
Vout _ w  Vout
 
ZK 
3Rout  Z K
ZK













 (3)


where Vout is output DC voltage, and Vout_u is an output
voltage of each phase including an error. According to (3),the output current of each cell is determined by thedifference of the potential between Vout_x and Vout and thevirtual resistance. At this time, (4) must be satisfied.
Vout _ u  Vout
Vout _ v  Vout

(4)

Vout _ w  Vout

If the Vout_u, Vout_v, Vout_w are less than Vout, the output
current will be negative. Therefore, the current flows fromthe output side to input side; then, the PFC will stop theoperation. Note that, each phase currents should bepositive to let PFC work in each module. Vout is given from
(3) as (5)Vout 

V
Vd _ u  in Z K  I u
Vout *
V
Vd _ v  in Z K  I v
Vout *

Vout_uVout _ u  Vout _ v  Vout _ w
3  K p.u .

(5)

Next, the case where the voltage detector contains a
detection error is considered to determine the droop gain.
Assuming that the U phase includes detection error, theerror is defined as Err_u[p.u.]. From equation (5), theoutput DC voltage including the detection error is given by(6).
Vout 

Vout _ u (1  Err_ u )  Vout _ v  Vout _ w
3  K p.u .

(6)

TABLE III. EXPERIMENTAL CONDITIONS.
Symbolvin

Value

Input voltage

Quantity
Rated powerP

Conveter capcitance

Cconv
Cout
L

3 kW
48 F
680 F
3 mH

Output capcitance
Input inductance

Therefore, minimum droop gain Kp.u is given by (7).
Err_ u  K p.u.

(7)

Load resistance

Rout

40 

Voltage reference

Vdc*
fsw

350 V
20 kHzfo

50 kHzwACR
wAVR

6000 rad/s
50 rad/s

K _c

2.0

Switching frequency (PFC)
Resonant frequency

In addition, output DC voltage Vo is decreased by droop
gain Kp.u. In this time, voltage controller compensates thedecreased Vo using feed-forward control. As understoodfrom (5), imbalanced input current occur only with the
droop control. Therefore, current balance control isapplied.
B.2. Current balancing control
The droop control avoids the output voltage from thedivergence. However, the droop control does not balance
the input current. Thus, the current balancing control is
employed.
In this control, phase currents are averaged using (8) bymain controller. Secondary, the main controller calculates
the averaged output DC current command value Io*. DC
current command values Iu*, Iv*, Iw* of each phase in themodule controller generate the deviation, which iscompensated by the voltage controller. In this control,
firstly, phase currents are averaged using (8) by the main
controller.
I *  I v*  I w*
I  u
3
*
0

(8)

200 V

(Resonant DC-DC converter)
Angular frequency of ACR
Angular frequency of AVR
Proposal gain of current
balance control

U-phase current iu [5 A/div]
V-phase iv [5 A/div]
W-phase iw [5 A/div][4 ms/div](a) Without proposed control.
U-phase current iu [5 A/div]
V-phase iv [5 A/div]
W-phase iw [5 A/div]

Secondly, the averaged output DC current command
value I0* and DC current command values Iu*, Iv*, Iw* ofeach phase are calculated. In addition, the deviation
between I0* and Iu*, Iv*, Iw* is calculated. Thirdly, themodule controller adjusts the deviation to zero using feedforward control.
IV. EXPERIMENTAL RESULTS
This chapter describes that the result of the experimental
results with a 3-kW prototype. Table III lists theexperimental conditions.
A. Steady state response
Figure 8 shows the comparison between the input
current without or the droop and balance control. In order
to emulate the voltage detection error, the output voltage
detection value on u-phase is decreased by 10% on purpose.
The input current is not sinusoidal and it is unbalanced
when the droop and balance control are not employed asshown in Fig. 8 (a). By contrast, the input current issinusoidal when the proposed control is employed asshown in Fig. 8 (b).
Figure 9 shows the operating waveforms of the input
voltage, input current, and the output voltage. The input[4 ms/div](b) With proposed control.
Fig. 8. Comparison of input current. The input current is balanced
using the droop control and the current balance control.

U-phase voltage
vin_u [500 V/div]
U-phase current
iin [5 A/div]

Output voltage
Vout [250 V/div][4 ms/div]

Fig. 9. Operating waveforms of input voltage, input current andoutput voltage.

current is sinusoidal and output voltage ripple is slightfrom Fig. 8. In this condition, input current THD is 3%.
Imbalance rate of the input current is 1%. Note that theimbalance rate of input current defined by(9)where Iavg is the average of phase currents. The output
voltage is following to the reference value with anuncertainty of 1%. In addition, output voltage ripple isslight. Ripple rate of the output voltage is 0.3%. Note that
this rate defined by the following
 voltage _ ripple [%] Vo ( p p )Vo ( avg )

 100

(10)

B. Effect of communication delay
B.1. imbalanced input current
The average command value of input current may
fluctuate when communication delay is imbalanced
between the main controller and phase module. In order tosimplify the communication among them, U-phase current
signal is assumed to have a communication delay. The
command value of the output current with the effect ofcommunication delay is given by
I 0* 

( I u *  D_ err )  I v*  I w*
3

(11)

where Derr is U-phase signal error rate by communication
delay. The balance control of the phase currents uses thecommand value of the average of output DC current I0 andcommand value of each modules. The feed-forward
voltage is given by
Vc _ u  ( I 0  I u )  K _ c
Vc _ v  ( I 0  I v )  K _ c

Output voltage [V] I  I
I I
I  I  current _ err [%]  max  u avg , v avg , w avg  100
I avg
I avg  I avg

400

375

350

325

Allowable range

300-50 -40 -30 -20 -10

0

10

20

30

40

50

Error rate [%]Fig. 10. Output voltage when U-phase current signal is assumed tohave communication delay.

C. Effect of calculation cycle
Figure 11 shows the variation rate of output voltage
when calculation cycle is changed from 100 ms to 1s. This
experimental condition is listed in Table III. Output
voltage variation rate is increased by the increase of theoperation cycle. On the other hand, it was confirmed thatthe voltage fluctuation rate falls within 5% if one operation
cycle requires less than the one second. Therefore it was
confirmed that the main controller does not require highperformance.
D. Step response
Figure 12 shows step response waveform of phasecurrent. In this case, output power changes 1 kW to 2 kW.
The current was not largely unbalanced when the stepreference of output voltage. The current waveform isslightly unbalanced because the update timing of thecurrent command value Io differs among the modules dueto the communication delay.
V. CONCLUSION(12)

Vc _ w  ( I 0  I w )  K _ c

where Kc is the proportional gain of the current balance
controller.
In this case, Vc_u, Vc_v, Vc_w is proportional to the Kc.
Thus, output voltage is changed by the error which isincluded in the command value of current. Therefore, theallowable range of error rate of phase current should be
revealed in the real system. As an example, consider
command value of phase current using the specificationsof CHAdeMO standard. The standard is allowed output
voltage error ±5%. Thus, if output voltage is decided as
350 V, the converter must be controlled between 332.5V
to 367.5V.
Figure 10 shows the output voltage when U-phasecurrent signal is assumed to have the communication delay.
Fig. 10 confirms that the range of the current signal error
rate satisfies the CHAdeMO standard. From this figure, thecurrent signal value error allow about ±30%.

This paper proposes the decentralized control withwireless communication of multi-modular AC-DC
converter for EV rapid charging. First, Bluetooth (Ver.
4.1) was taken as an example of wireless communication,and the requirements for introducing wirelesscommunication into control were confirmed. Moreover,the configuration of the assumed three-phase AC-DC
converter and the droop and balance control method aredescribed. It is demonstrated that the proposed control
achieves the input current balancing and the output voltage
control without wired communication between the main
controller and phase module. As the experimental results,
the imbalance rate of the input current was 1% or less, andthe input current THD was 3% or less. In addition, theoutput voltage follows the voltage command value at 1%
or less, and the output voltage ripple rate achieves 0.3% orless.
It was also confirmed that the output voltage error iswithin ± 5% (350 ± 17.5V). It will satisfyming to the
CHAdeMO standard if there is an detection error of ±30% or less in the command value of input current when
the output voltage command value is 350V. In addition, weconfirmed that even if there was a communication delay of
1 s, the input current balance was well controlled without
breaking. This control with wireless communication is
expected to be a versatile technology applicable to thecontrol of any multi-modular converter as well as thethree-phase AC-DC converter, and its future application is
expected.
Output voltage variation rate [%]

6
5
4
3
2
1
0
0

0.5

0.5

1.5

1

Calculation cycle [sec]Fig. 11. Variation rate of output voltage when calculation cycle ischanged.

U-phase current iu [5 A/div]
V-phase iv [5 A/div]
W-phase iw [5 A/div][100 ms/div](a) Outline.

U-phase current iu [5 A/div]
V-phase iv [5 A/div]
W-phase iw [5 A/div][20 ms/div](b) Enlarge of Fig. 11. (a).
Fig. 12. Step response waveform of phase current.

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