REFERENCE DESIGN
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25 W Peak Power, Pulsed NIR LED Driver for DMS /OMS Applications
TND6416/D
INTRODUCTION
The Driver Monitoring System (DMS) is one of the key
systems helping to improve both driver and passenger safety
through detection of a driver’s distraction, fatigue, or
unresponsiveness. In recent years the demand for DMS hassignificantly increased because of new legislations,
including both the European Union General Safety
Regulations and the Safety Technology Roadmap publishedby the European New Car Assessment Program (Euro
NCAP), for achieving a five−star safety rating. In areal−world there are a number of factors which need to beconsidered to make the driver monitoring system reliable.
Common requirements are that the DMS needs to befunctional considering factors such as: Lighting: 1 Lux during night−time to 100k Lux during
daytime Eyewear: Clear glasses and sunglasses with >70%transmittance Facial Occlusion: Facemask, hats, long head hair fringe
obscuring eyes

as NCV7694 can significantly ease the design and bring
benefits in terms of solution cost and PCB space comparedto other less integrated NIR LED drivers without a dedicatedeye−safety protection features.
There are various driver topologies used to power the NIR
LEDs in DMS applications. Selection of the most suitable
topology depends on particular Original Equipment
Manufacturer (OEM) system requirements. A common
approach is to power the LEDs from a pre−regulated voltage
source such as Buck, Buck−Boost or Single−Ended Primary
Inductance Converter (SEPIC) regulator and use alow−dropout current regulator as a second stage to keep the
LED current constant across changing environmental
conditions and LED manufacturing tolerances. Such a
topology has been considered in this reference design. In
terms of location of NIR illumination in the system, again,
the location depends on the specific OEM requirements, but
it is common to have it either embedded in the DMS Camera
unit or implemented as a standalone unit separate from thecamera unit.
A common method of driving the NIR LEDs in DMS
systems is to produce short duration, high current pulses
with high near−infrared light energy content. Such method
helps to overcome the challenges associated with theexternal lighting environment, use of eyewear etc.
The timing chart in Figure 1 demonstrates the typicaltiming relationships between the NIR illumination andglobal shutter image sensor in the DMS system. For optimal
performance NIR LEDs are synchronized with the image
sensor frame exposure time. This is done with the help of a
dedicated FLASH strobe control signal from the image
sensor SoC. LEDs are being activated only for a fraction of
the entire frame time to save power. In the example shown
on Figure 1 the LED turn−on duty cycle is 3%. NIR
illumination in such system needs to be able to deliver shortbursts with large optical power but the average output power
is relatively low. The reference design example described inthis paper is based on 2x SFH 4725AS Power LEDs driven
with 4 A, 500 s bursts at 60 fps. As a result, the design candeliver 25 W power bursts with 0.74 W average power.

To assure a robust operation in different driving scenariosDMS systems incorporate a Near−Infrared (NIR)
illumination. Operation at a narrow spectral band of around
940 nm is nowadays the most common design choice. There
are several advantages of operation at 940 nm over otherwavelengths such as 850 nm. 940 nm offers less interference
from ambient sunlight and helps to significantly reduce the‘red glow effect’, which is apparent at 850 nm. The main
challenge when operating at 940 nm is the fact that thequantum efficiency of the image sensors drops whenincreasing the wavelength i.e. from 850 nm to 940 nm.
Power LEDs are still the most common design choice for
NIR illumination due to their good performance to priceratio, compared to other emerging technologies such asvertical−cavity surface−emitting laser (VCSEL). What is
important to note is that 940 nm light is invisible to thehuman eye but can be harmful at higher power. Conformity
with IEC 62471 for eye safety is vital for DMS operation. An
LED driver with embedded eye−safety and diagnostics such

 Semiconductor Components Industries, LLC, 2023

July, 2023 − Rev. 1

1

Publication Order Number:
TND6416/D

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Frame #1

Frame #2

T_frame = 16.7 ms
Row 0
Row 1

Row n
T_flash = 500 s

Time (s)Reset Time

Exposure Time

Readout TimeBlanking TimePower LED turn−on time

Figure 1. Timing Relationship between the NIR Illumination and Image Sensor in DMS

used within the data path. With the POC approach the
maximum current that can be delivered to the Camera fromthe ECU is limited. Typically, the coaxial cables used in
POC have a loop resistance of ~2.3  per meter that is whylarger currents would incur large losses in the cable.
Additionally, the current ratings of the POC inductors areusually limited to less than 1 A − i.e. larger currents would
cause their magnetic saturation.

Figure 2 shows a block diagram of a DMS application
with NIR illumination and DMS camera integrated into one
unit and powered through Power−Over−Coax (POC). With
POC, the image data captured by the image sensor, I2C data,
diagnostic data and power are transferred together using asingle coaxial cable. This method helps to reduce cabling
cost and weight. Separation of power and data on the ECU
and Camera side is done by passive filter networks usedwithin the power path and decoupling capacitor network

DMS PoC Camera withNIR Illumination

DMS ECU with PoC Interface

PoC Cable
CON

Deserializer

Loop Resistance:
0.29 /m

0.35 

SoC

0.35 

CON

Serializer

0.35 
0.35 

Ferrite Beads

12 V @
80 mA

Safety MCU

CAN/EthPoC
Power
Supply0.3 4.02 k

100 nF

Image
SensorFerrite Beads

0.3 

10 H
0.6 A

10 H
0.6 A

20 F

20 F

Power
SupplyEEPROM

4.02k
12 V @
300 mA
100 nF

NIR
Illumination

Figure 2. PoC DMS Camera with an Integrated NIR LED Driver

To protect the coaxial cable and POC filter components
from an excessive current drawn, during the NIR LED
current pulses, the POC powered NIR illumination shallincorporate a current limit circuit which limits the POC

current to a safe level, as well as a local energy buffer able
to support large LED current pulses. This reference design
will demonstrate how to design such system in more detail.

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NCV7694 REFERENCE DESIGN OVERVIEW
Figure 3 shows a 3D rendered picture of the reference
design PCB. It also highlights the main components used in
the design as well as describes the external connections.

Figure 3. Overview of NCV7694 Reference Design PCB

Table 1 summarizes specifications of the reference design:
Table 1. SPECIFICATIONS OF THE NCV7694 REFERENCE DESIGNPOC Voltage Specification

12 V 5%

Imager Frame Rate

30–60 fps

Pulsed Output (LED) Current

4A

Input Current Limitation

500 mA typ.

Number of Series LEDs

2

LED Current Pulse Duration

Up to 500 s

LED Wavelength

940 nmDriver Proximity Sensing

30 cm typ.

Ambient Temperature−40C to +85C

Diagnostics and Protection Features

Open of the LED String
Short of the LED String
Maximum LED current pulse width limited to 572 s
Maximum LED Current pulse frequency limited to 74 fps

Flash Signal Level

1.8 V logic compatible input

Diagnostics Output

5 V logic output

Initial Start Up Time

28 ms Typ.

Compatible Power LEDs

Evaluation performed with Osram SFH 4725AS

PCB Size

15 x 15 mm

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DESCRIPTION OF THE SELECTED NIR LED DRIVER TOPOLOGYfrom the power supply to 500 mA, as it is assumed that 12 V
is supplied through POC. D1 and D2 are the two SFH
4725AS LEDs connected in series. The NCV7694
controller is used to drive an external NMOS to regulate thecurrent through the LEDs to 4 A, as soon as the FLASH
signal is activated. RSNS is a power resistor used to measure
the LED current. The voltage developed across RSNS is usedby NCV7694 to control the gate of the external MOSFET
T2. Due to the 500 mA input current limitation, the required
4 A LED current pulses cannot be directly drawn from the
12 V power supply. Due to this fact a hold−up capacitor
CBULK is required to store enough energy to drive the LEDs
with 4 A during the 500 s LED flash duration.

The reference design assumes the use of two SFH 4725AS
NIR Power LEDs, each driven with 4 A, 500 s current
pulses at frequency of 60 Hz (60 fps). It is assumed that suchconfiguration can provide a sufficient NIR light illuminationlevel, to assure the correct operation of the image processing
algorithms.
Furthermore, it is assumed that a 12 V 5% power supply,with a maximum nominal current carrying capability of
500 mA, is available in the system.
Figure 4 shows a block diagram of the LED driver
topology used in the reference design. VS is a 12 V 5%
constant voltage power supply. ILIM is a low−dropout
constant current limiter, to keep the maximum current drawn

VBULK

RSW
+
−

VS

I LIM

C IN

I LED

CBULK
NCV7694

VPU

VS

VSTR

RST R

RPU
VDIAG

DIAG

VFLASH

FLASH

D1
D2
DET

RETL

RET L

RFRL

RFRL

GATE

GND

FB
EPAD

RDE T

VDRAINRGAT E T1
RFB1

VSNS
RSNS

Figure 4. NCV7694 Based LED Driver Operating Principle

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STEP−BY−STEP DESIGN GUIDE
Verification of the Maximum Supported LED Turn−on
TimeConsidering the design input parameters summarized inTable 1 i.e. frame rate = 60 fps, ILIM = 0.5 A, ILED = 4 A, themaximum supported LED pulse current duration is
TON(MAX) = 2.08 ms.
Based on this initial check it can be expected that the
topology shown in Figure 4 is a good candidate for thisdesign and the needed TON = 500 s can be met. This initialcheck doesn’t consider thermal aspects which will beanalyzed later in this document.
In case the required TON exceeds the calculated
TON(MAX), a potential solution is to increase the power
supply voltage and introduce a voltage pre−regulator stage
to effectively reduce the current drawn from the power
supply as shown on Figure 5.

As the first design step, it is recommended to check if the
topology shown on Figure 4 can meet the target LED pulse
current duration, given the required frame rate, LED current
and the limitations of the power supply current. Such
verification can be made according to the Equation 1:
T ON(MAX) +

I LIM
1
@
frame rate I LED(eq. 1)

where:TON(MAX) − Maximum supported LED pulse current
duration (s)Frame rate − Target image sensor frame rate (fps)
ILIM − Input Current limit value (A)ILED − LED current (A)IIN = (IOUT x VOUT/VIN) / 

IIN
+
−

VIN
VS

Buck−
DC−DC

VOUT

V BULK

R SW

I OUT
C IN

I LIM

ILED

CBULK

NCV7694
V PU

VS

VSTR

R STR

R PU
V DIAGDIAG

V FLASH

FLASH

D1
D2
DET

RETL

R ETL

R FRL

RFRL

GATE

GND

FB
EPAD

R DE TV DRAINR GATE T1
R FB1

V SNS
R SNS

Figure 5. NCV7694 Based LED Driver with an Additional Buck DC−DC Stage
Hold−up Capacitor Selection

Based on these inputs it is possible to use Equation 2 todetermine the required minimum hold−up capacitance:

The next step is to calculate the required hold−up
capacitor value CBULK. It needs to be sufficiently large tomaintain enough voltage across D1, D2, T1 and RSNS for the
LED current to be constant during the entire on−time period.
The minimum required voltage headroom should bedetermined based on D1, D2 and T1 device specifications.
Based on the SFH 4725AS datasheet the maximum forward
voltage VF of this LED is 4.1 V at ILED = 4 A acrosstemperature of −40C to 145C and process variations. In
case of T1 it is desired to keep its drain−source voltage drop,
VDS, as low as possible to minimize the power losses within
the MOSFET but high enough to operate this device insaturation. In this example VDS = 0.5 V was picked for
calculations. The sensing voltage VSNS voltage is kept
constant at 0.3 V by the NCV7694 feedback loop.

C BULK(MIN) u

I LED * I LIM
V BULK(MIN) * 2 @ V LED(MAX) * V DS * V SNS@ T ON(eq. 2)where:CBULK(MIN)− Minimum hold−up capacitance (F)ILED − NIR LED current (A)VLED(MAX) − Maximum diode VF voltage (V)ILIM − Input current limit (A)VDS− MOSFET voltage drop Vds (V)VSNS − Sensing voltage (V)TON − LED on−time (s)VBULK(MIN) − Minimum power supply input voltage (V)www.onsemi.com
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1000 F, 16 V aluminum polymer capacitor with an ESR of
13 m and a ripple current of 4.3 A has been selected. Since
the hold−up capacitor has a significant impact on the overallsolution size, at this point it is good to verify if the design
based on the selected capacitor will be able to meet therequired PCB dimensions.

Design specification:
VBULK(MIN) = 11.4 V, VLED(MAX) = 4.1 V, VDS = 0.5 V,
VSNS = 0.3 V, ILED = 4.0 A, ILIM = 500.0 mA, TON = 500 s
Substituting these to Equation 2 gives the following result:
C BULK(MIN) u

4.0 A * 0.5 A
11.4 V * 2 @ 4.1 V * 0.5 V * 0.3 V@ 500 s +MOSFET Selection+ 730 F

Proper selection of the MOSFET is essential in case of the
LED driver reference design. The average power dissipationin the MOSFET can be estimated using Equation 3:

When selecting a hold−up capacitor, it is important toselect a part with low ESR and sufficient ripple current
capability. In the design Nichicon PCR1C102MCL1GS, a
P D_T1(AVG) +ǒǒ

V BULK(MAX) *ǓV BULK(MIN)2* 2 @ V LED(MIN) * V SNSǓ@ I LED @ T ON @ frame rate(eq. 3)VBULK(MIN) in Equation 3 can be calculated using thefollowing formula:
T on @ ǒI LED * I LIMǓwhere:
PD_T1(AVG) − Average MOSFET power dissipation (W)
VBULK(MAX) − Maximum bulk capacitor voltage (V)V BULK(MIN) +VBULK(MIN) − Minimum bulk capacitor voltage dip during
LED on−time (V)VLED(MIN) − Minimum LED forward voltage drop (V)VSNS − Current shunt voltage (V)ILED − LED current (A)TON − LED turn−on time (s)Frame rate − image sensor frame rate (fps)

C BULK(MAX)(eq. 4)

where:VBULK(MIN) = Minimum bulk capacitor voltage dip
during LED on−time (V)TON − LED turn−on time (s)ILED − LED current (A)ILIM − Input current limit value (A)CBULK(MIN) − Maximum hold−up capacitance (F)Considering the reference design
Equation 3 yields the following results:

requirements,

P D_T1(AVG) + ((12.6 V * 1.46 V) * 2 @ 2.63 V * 0.3 V) @ 4 A @ 0.5 ms @ 60 fps + 706 mWof the MOSFET TJ of about 43C, which results in ajunction temperature TJ of 128C at an ambient temperature
TA(MAX) of 85C. This leaves 47C of headroom withrespect to NVLJWS5D0N03CL maximum operating
junction temperature TJ of 175C.
The self heating TJ of 43C is the average junction
temperature increase as it is based on the average MOSFET
power dissipation and steady state JA. To find the peak TJ,
a SPICE simulations according to Figure 6 was performed.

The power dissipation calculated above can be used toestimate the MOSFET self−heating for a given PCB size
through a computational fluid dynamics (CFD) type ofsimulation.
To minimize the PCB size, the NVLJWS5D0N03CL
MOSFET in PWR22 2 x 2 mm package was selected. In thecase of this reference design it was estimated that the overall
MOSFET junction to ambient thermal resistance (JA) is~61C/W. The thermal resistance JA leads to self−heatingwww.onsemi.com
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Figure 6. NVLJWS5D0N03CL Junction Temperature Simulation Setup

Figure 7 shows the junction temperature simulation
results. After 10 seconds the junction temperature reaches asteady state. During this time the average junction

temperature TJ increases from initially 85C to 128C,
which matches with the value predicted by calculations.

Figure 7. Simulated NVLJWS5D0N03CL Junction Temperature

Figure 8 shows the simulated MOSFET junction
temperature during a drain current pulse in greater detail. As
a result of large instantaneous power dissipation during thedrain current pulse, the junction temperature TJ increases by
about 20C during this period above the steady−state valueof 148C peak.

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Figure 8. Detailed View of the Simulated MOSFET Junction Temperature and Drain Current

NCV7694 allows to limit both maximum LED turn−ontime and frequency.
Resistor RETL is used to set the maximum LED turn−ontime according to the following equation:

TJ(PEAK) = 148C is well below the maximum operating
TJ(MAX) of NVLJWS5D0N03CL of 175C.
Since in this type of application the MOSFET is operated
in saturation, an important part of the NVLJWS5D0N03CL
analysis is the thermal stability evaluation. Low−voltage
trench MOSFETs operated in saturation may potentiallysuffer from thermal instability which, in the worst case, could
lead to MOSFET damage. The thermal instability effect, also
know as the Spirito effect, is described in more details in [1].
To validate that the usage of NVLJWS5D0N03CL is safein this regard, a thermal stability evaluation has been
performed based on the following assumptions: MOSFET drain source voltage VDS of 6 V
 Drain current pulse width of 1 ms
 MOSFET ID was swept from 0 A until the device failed
 Device mounted on a tiny snap out card with 1 layer with
1 oz copper Testing performed on 5 units Initial junction temperature of TJ(initial) of 128C

T ON(MAX) +

R ETL
K ETL

(eq. 5)where:TON(MAX) − maximum LED turn−on time limit (ms)
KETL − 2.5 13% across temperature and process (k/ms)
RETL − value of the resistor connected to pin RETL of
NCV7694 (k)As soon as the FLASH input is asserted NCV7694 starts
to internally generate a voltage ramp at RETL pin with a slope
which is inversely proportional to the RETL value. As soon
as the RETL pin voltage reaches 1 V, the gate output is turnedoff, which disables MOSFET T1. Operation of this feature
is explained on the timing diagram shown in Figure 10.
Additionally, when the NCV7694 gate output goes low the/DIAG output is asserted which turns−off the FPF2895V
high−side switch in series with the LEDs as shown on
Figure 9. In case of this reference design RETL = 1.43 k
was chosen to limit TON to 572 s. The RETL resistor allows
to adjust TON from 320 s up to 6 ms.
The frame rate limitation operates as follows: When the
FLASH signal goes low, the voltage at NCV7694 RFRL pin
starts to rise. Before asserting of the next FLASH signal, the
RFRL pin voltage is compared with an internal reference
voltage. If the RFRL pin voltage is higher than the reference
voltage, then T1 is turned−on. If that is not the case, then the
NCV7694 /DIAG output becomes activated and the
NCV7694 gate output turn−on is delayed until the RFRL pin
voltage exceeds the internal reference voltage. The formula
below allows to calculate the minimum time between the

Under the conditions anticipated above, according tomeasurements on 5 samples of NVLJWS5D0N03CL thedevice is not damaged until a drain current of 14 A isreached. This gives a very high confidence that the device
can be safely used in the end application and won’t sufferfrom thermal instability.
Design of Eye−safety Protection

The reference design features the following eye−safety
protection mechanisms:
 Maximum LED on−time limitation
 Maximum LED turn−on frequency limitation
 Minimum permissible illumination distance.

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LED current pulses. The minimum supported off−time
TOFF(MIN) is 8 ms which is corresponding to 125 Hz.
T OFF(MIN) +RFRL − value of the resistor connected to pin RFRL of
NCV7694 (k)

R FRL
K FRL

In the design RFRL = 1.3 k was used to limit theminimum time between the LED current pulses to 13 ms.
This value corresponds to a maximum frame rate of 74 fps.
The minimum permissible distance between the source of
NIR illumination and driver eyes is limited by an external
phototransistor and NCV803 voltage detector, connected as
depicted on Figure 9.

(eq. 6)

where:TOFF(MIN) − minimum off−time between the LED
activations (ms)KFRL − 0.1 13% across temperature and process (k/ms)

FPF2895V
Intelligent High−side Switch withadjustable current limit.
V BULK
+
−

VS

ILIM

C IN

R PU

I LED

C BULK

V PU
ON/OFF
Control Logic

V PU
R PU1

NCV803SQ308
/RST

VCC
T2

C D1

GND
VS

NCV7694VS

V DIAGDIAG

V FLASH

FLASH

VSTR

D1
D2

DET

RETL

R ETL

R FRL

RFRL

GATE

GND

FB
EPAD

Figure 9. LED Driver Block Diagram

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R STR

R DET

VDRAINR GATE T 1
R FB1

VSNS
RSNS

TND6416/D

Figure 10. Operation of NCV7694 Eye−safety Protection Features

When the illuminated object approaches the NIR LEDs,
T2 collector current starts to increase which causes thevoltage drop across RPU = 10 k resistor to increase. Once
VCC drops below 3.08 V, the NCV803 /RST output isactivated turning−off the LEDs. For VCC to drop down to
3.08 V, T2 collector current of 190 A is required.
Once the LEDs are turned−off VCC rises back to a voltageof ~5 V. Due to an internal NCV803 reset delay /RST output
remains in the logic low state for tRP = 20−66 ms after
VCC~5 V is restored as shown on Figure 11.

When the illuminated object is far from the NIR LEDs thereflected NIR light captured by the phototransistor T2 hasvery low intensity and T2 is cut−off.
The voltage supervisor NCV803SQ308D2T1G VCC isbiased from VPU = 5 V through the resistor RPU = 10 k. The
NCV803 supply current is 2.5 A max. across TA = −40C
to 105C which creates 25 mV drop across RPU andconsequently VCC for supply of the device is close to 5 V. As
a result the /RST output is deactivated.

Figure 11. NCV803 Voltage Detector Operationwww.onsemi.com
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Programming the LED Current Level

In some cases, it may be necessary to adjust the LED
current level in the application.
I.e. LED current adjustment may be needed in cases whenreduction of LED pulse width is not feasible to implement.
LED current adjustment may also help to save power bylimiting the LED intensity during an optimal lighting
conditions. i.e. a very bright sun light can negatively affect
the quality of the captured images. In such cases, increasingof the NIR LED intensity could help to achieve higher
quality images. During the night, when no or very limited
sun light interference is present the NIR LEDs could operatewith less intensity to reduce power losses.
This reference design doesn’t include the LED current
level adjustment functionality. Such a feature is, however,feasible to implement with NCV7694. Figure 12. shows
how an external buffered Digital−to−Analog Converter(DAC) output can be connected to NCV7694 to adjust the
LED current level.

The following equation can be used to set the nominal NIR
LED current level:
I LED +

V SNS
R SNS

(eq. 7)

where:
ILED − LED current (A)VSNS − 0.3 (V)(VSNS I is an internal NCV7694 voltage reference value.
The reference has 10% tolerance across operating junction
temperature and process variation)
RSNS − LED current sense resistor value ().
In this design RSNS = 75 m was selected to supply theLEDs with a current of 4 A. It is worth highlighting that the
NCV7694 has an internal diagnostic function which helps to
identify and flag if an open or short across RSNS is present.
RSW
+
−

VS

I LIM

C IN

CBULK
NCV7694

VPU

VS

VSTR

RSTR

RPU
VDIAG

DIAG

VFLASH

FLASH

RETL

RFRL

D1
D2

RETL

DET

RFRL

GATE

GND

FB

RDET
RGATE T1
VFB RFB1

EPAD
RFB2
VCC
DAC

Buffer

RFB3

VSNS
RSNS

VDAC

Figure 12. LED Current Level Adjustment through an External Digital−to−Analog Converter

Equations (8), (9) and (10) can be used to determine thecomponent values needed to adjust the LED current in a
specified range:
V SNS(MAX) +where:VSNS(MAX) − Maximum voltage across RSNS corresponding
to the target maximum LED current (V)V FB @ I LED(MAX) @ V DAC(MAX)RSNS − Sense resistor value ()ILED(MAX) − Target maximum LED current (A)ILED(MIN) − Target minimum LED current (A)VFB − NCV7694 FB pin voltage = 0.3 (V)VDAC(MIN) − Minimum DAC voltage (V)VDAC(MAX) − Maximum DAC voltage (V)I LED(MAX) [V DAC(MAX) * V FB] ) I LED(MIN) @ V FB
(eq. 8)

R FB3
R FB2

+

R SNS +V SNS(MAX) * V FBV FB * V DAC(MIN)(eq. 9)V SNS(MAX)I LED(MAX)

RFB3 − Feedback resistor () (it is recommended to set RFB3
in the range of 330  to 1 k)(eq. 10)

RFB2 − Feedback resistor ()www.onsemi.com
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Design of the Input Current Limiting and High−sideProtection Switch

The example below shows how to design a circuit whichallows to set the LED current in a range between 0.5 A and
4.0 A using a voltage source adjustable in the range from 0 V
to 3.1 V:
VFB = 0.3 V, ILED(MAX) = 4 A, ILED(MIN) = 0.5 A,
VDAC(MAX) = 3.1 V, VDAC(MIN) = 0 V, RFB3 = 470 
From Equation (8):To limit the hold−up capacitor charging current andprovide a means to disconnect VS from VBULK during a fault
event, the current limit switch, FPF2895V is used in thereference design. FPF2895V is an AEC−Q100 qualified
intelligent high−side switch which offers the following
features: Input to output adjustable current limiting Output to input current blocking
 Fixed undervoltage and adjustable overvoltage
 Overtemperature shutdown Fault output flag Configurable behavior upon tripping of the current limit

V SNS(MAX) + 0.328 V

From Equation (9):
R FB3
R FB2

+ 0.093

After substituting RFB3 = 470  into Equation (9):R FB2 +

470 
0.093

+ 5.05 k

The very good dynamic behavior of the FPF2895V
current limit loop assures that there are no significant input
current overshoots when entering the current limit
operation. This was verified during the device evaluation
covered in Section Evaluation Results.
Figure 14 shows the actual implementation of FPF2895V
in the reference design:

From Equation (10):R SNS + 82 m

Finally, the complete LED current adjustment circuit
looks as follows:

V FB

RFB1
750 W

RFB3
470 W

V SOURCE
V SNS
41 mV−328 mV

RFB2
5.05 kW
V DAC
0 V−3.1 V

RSNS
82 mW

+
−

Figure 13. LED Current Adjustment Circuit
FPF2895V

+
−

VS

ON

C IN

OC_M

V PU
R PU

POL

OV2

ISET
GND

T2

R ILIM

NCV803SQ308
/RST

VIN
C D1

I LED

C BULK

FLAGB

OV1

V PU
R PU1

V BULK

VOUT

VIN

GND
VS

NCV7694VSTRVS
V DIAGDIAG

V FLASH

FLASH

D1
D2
DET

RETL

R ETL

R FRL

R STR

RFRL

GATE

GND

FB
EPAD

R DET

V DRAINR GATE T 1
R FB1

V SNS
R SNS

Figure 14. LED Driver with FPF2895V Current Limit and High−side Protection Switch
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Resistor RILIM connected to pin ISET of FPF2895V is used
to set the current limit (CBULK charging current) according
to equation:
R ILIM +4448.6
I LIM

level was set to 16.8 V (typ.). Across process spread andambient temperature variation between −40C and 105C,
the OVLO level can range between 16.3 V and 17.1 V.
The FPF2895V POL pin is used to set the ON pin polarity.
ON input is a low voltage logic input used to disable orenable the device output. In the reference design a positive
polarity was set. As a result, the device will be turned−on
whenever ON pin voltage is brought above 1.2 V.
ON input is pulled−up to an onboard 5 V LDO output, asshown in Figure 14. The FPF2895V ON input is pulled
down by two sources:
1. NCV7694 LED driver /DIAG pin (open−drain,
active low output)
The /DIAG output is activated as soon as NCV7694
detects any of the following faults: LED anode to cathode open circuit
 LED anode to cathode short LED cathode short to ground Flash input being too long or too frequent VS undervoltage or VS Overvoltage
 Overtemperature
2. NCV803 Light Sensor Comparator /RST pin(open−drain, active low output)
As the illuminated object gets closer to the LEDs, theT2 collector current increases creating a larger
voltage drop across RPU1 and eventually the
NCV803 /RST output is pulled low.

(eq. 11)

where:ILIM − target current limit value (mA)
RILIM − required current limit value (k)In the design example a 8.87 k 1% RILIM resistor wasused, which corresponds to a current limit of ILIM = 501.5 mA(typ.). FPF2895V supports 15% current limit accuracy across−40C to 105C ambient temperature for an over−current
limit range of 500 mA to 2 A.
Pin OC_M of FPF2895V is used to set the device behavior
when in current limit. Pulling this pin low will cause thedevice to function as a constant current source. Pulling
OC_M high enabled an auto−restart mode.
Pins OV1 and OV2 of FPF2895V allow to set theovervoltage lockout (OVLO) threshold according to Table 2:
Table 2. SUPPORTED FPF2895V OVLO LEVELS
OV1

OV2

OVLO Level

Low

Low

23 V (typ.)Low

High (Floating)

10 V (typ.)High (Floating)Low

16.8 V (typ.)High (Floating)High (Floating)

5.95 V (typ.)When selecting the current limiter, it is important to verify
that the selected IC can meet the required power dissipation
profile in the target system. To complete this verification a
SPICE simulation was set up according to Figure 15.

As the nominal supply voltage VS in the application
example is 12 V and the CBULK rating is 16 V, the OVLO

Figure 15. LED Current Adjustment Circuit

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The resulting high−side switch power dissipation profile
can be seen on Figure 16. The power dissipation has atriangular shape with peak power reaching 0.9 W at the endof the 500 s LED on pulse. The average power dissipation

is 105 mW. Based on this thermal analysis it was confirmedthat at TA(MAX) = 85C the device maximum junction
temperature TJ(MAX) will stay below 125C during
operation.

Figure 16. LED Current Adjustment Circuit

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REFERENCE DESIGN SCHEMATIC

Figure 17. Schematic of DMS LED Driver Reference Designwww.onsemi.com
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REFERENCE DESIGN LAYOUT
The NIR LED driver reference design is based on a
15x15 mm 4−layer FR−4 PCB. The top layer contains all thecomponents besides the hold−up capacitor which is placedon the bottom layer. Copper polygons are used on the bottomside to minimize the effects of parasitic inductance whenturning−on and off the LED current. The signal traces arerouted on the top and inner2 layers. Inner1 layer is entirely
covered by a GND copper plane.

Figure 18. Top Layer

Figure 19. Inner1 Layer

Figure 20. Inner2 Layer

Figure 21. Bottom Layer

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REFERENCE DESIGN BILL OF MATERIALS
Table 3. BILL OF MATERIALS
Reference
Designator

QTY

Part Number

Supplier

Package

CD1

1

UMF105B7222KVHF

Taiyo Yuden

0402

MLCC X7R 2.2 nF 10%, 50 V 0402

2.2 nF

CD

1

N/A

N/A

0402

Part not populated

2.2 nF

CVS

1

C0402C104K3RACTU

Kemet

0402

MLCC X7R 100 nF 10%, 25 V 0402

100 nFCIN

1

GRM31CC71E226ME15L

Murata1206

MLCC X7S 22 F 20%, 25 V 1206

22 F

COUT

1

GRM155R70J105MA12D

Murata0402

MLCC X7R 1 F 20%, 6.3 V 0402

1 F

P4−P7

4

5002

KeystoneThru−Hole

Miniature testpoint, 1 mm, White

N/A

RPU, RPU1

2

AC0402FR−0710KL

Yageo

0402

Resistor 10 k 62.5 mW 1%, AEC−Q200

10.0 k

RFB1

1

AC0402FR−07750RL

Yageo

0402

Resistor 750  62.5 mW 1%, AEC−Q200

750 

RGATE

1

AC0402FR−070RL

Yageo

0402

Resistor 0  62.5 mW 1%, AEC−Q200

RILIM

1

AC0402FR−078K87L

Yageo

0402

Resistor 8.87 k 62.5 mW 1%, AEC−Q200

8.87 k

RDET, RSTR

2

AC0402FR−071KL

Yageo

0402

Resistor 1.0 k 62.5 mW 1%, AEC−Q200

1.0 k

RFRL

1AC0402FR−071K3L

Yageo

0402

Resistor 1.3 k 62.5 mW 1%, AEC−Q200

1.3 kRETL

1

ERJ−2RKF1431X

Panasonic

0402

Resistor 1.43 k 62.5 mW 1%, AEC−Q200

1.43 kRSNS

1

LTR10EVHFSR075

Rohm

0508

Current Sense Resistor 75 m 1%, AEC−Q200

0.075 Description

Value

0

T1

1

NVLJWS5D0N03CL

onsemiPWR22 2x2

Logic Level Power NMOS, 30 V 4.2 m

N/A

U4

1

NCV8730BMTW500TBG

onsemi

WDFN6 2x2

LDO regulator, Ultra−Low Iq, 5 V Vout

N/A

CBULK

1

PCR1C102MCL1GS

Nichicon

10x10 mm

Aluminum Polymer Capacitor
16 V 1000 F 20% 13 m, AEC−Q200

1000 F

U13

1

FPF2895VUCX

onsemi

CSP24

Current Limit Switch with OVP, 28 V/5 A

N/A

U14

1

NCV803SQ308D2T1G

onsemiSC70−3

Voltage Detector, Ultra−Low Iq

N/A

U15

1

NCV7694MW0R2G

onsemi

DFN10 3x3

Safety Controller for NIR LED Illumination

N/A

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Evaluation of the NCV7694 NIR LED driver reference design
Evaluation Platform Description

Figure 22. DMS NIR LED Driver Evaluation Setup

Figure 22 shows onsemi’s platform used to evaluate the
NCV7694 NIR LED driver reference design in a POC based
camera system. Evaluation was done based on a AR0239
RGB−IR image sensor and the NCV7694 NIR LED driverreference design both powered by a regulated 12 V POC.
The NCV7694 LED driver FLASH input was connected to
the FLASH output of the AR0239 RGB−IR sensor and the
NCV7694 NIR LED driver /DIAG output was connected toa serializer GPIO pin. onsemi’s Devware software was used
to configure the image sensor to stream, capture the image
data and investigate the image quality. The 12 V POC power
supply was powered by a 5 V USB port of the computer
through a 5 V to 12 V boost converter, which is part of theDeserializer board. If needed, the Deserializer board allows
disconnection from the onboard boost converter andconnection to an external POC power supply.

The following evaluation has been performed on the
NCV7694 reference design: Evaluation of the eye−safety protection features
 Evaluation of the current limit functionality
 Evaluation of VBULK and ILED and comparison with thecalculated values from Section Step−by−step Design
Guide
Evaluation Results

Figure 23 shows the typical operating waveforms of theNCV7694 based LED Driver. The FLASH signal is being
activated every 16.67 ms which corresponds to an image
sensor frame rate of 60 fps. The duration of the flash signal
is set to 500 s. As no fault is present, VDIAG is pulled−up
to 5 V. During the LED on−time VSNS is being regulated to
0.3 V and VBULK drops linearly as CBULK is being
discharged with a constant current. Once VFLASH isturned−off, VSNS drops to 0 V and VBULK recovers linearly
to 12 V.

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VBULK – Hold−up capacitor voltage

VSNS – Sense resistor voltage

VDIAG – NCV7694 /DIAG output voltage

VFLASH − NCV7694 FLASH input voltage

16.67 ms

Figure 23. NCV7694 LED Driver − Typical Operating Waveforms

Figure 24 shows the typical operating waveforms in moredetail. During the LED on−time TON = 500 s, VBULK dropsby 1.82 V. A quick verification based on Equation 4 gives
CBULK = 960 F which is in−line with the actual CBULK

value. During TCHARGE the hold−up capacitor is charged
with a 500 mA constant current assured by FPF2895V thecurrent limitation. Measured charging time of 3.51 ms is
in−line with the previous calculations.

VBULK – Hold−up capacitor voltage
VBULK = 1.82 V
TCHARGE = 3.51 ms
VSNS = 0.3 V

VSNS – Sense resistor voltage
TON = 500 s
VDIAG – /DIAG output voltage

VFLASH − FLASH input voltage

Figure 24. NCV7694 LED Driver − Typical Operating Waveforms

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to exceed the threshold voltage and start to regulate draincurrent. The LED current increases smoothly without any
overshoot which indicates good feedback loop stability.

Figure 25 shows the T1 gate voltage as well as the VSNS
signal after enabling the FLASH input. T1 gate starts to rise
~1.8 s after applying of VFLASH. It takes ~6.4 ms for T1 gate

TDELAY = 6.4 s
VSNS – Sense resistor voltage
VDIAG – /DIAG output voltage

VFLASH − FLASH input voltage
VGATE – T1 gate voltage

Figure 25. LED Current Turn−on − Detailed View

Figure 26 shows T1 gate voltage as well as VSNS signal
after disabling the FLASH input. T1 gate starts to decrease

instantly after de−asserting of VFLASH signal. It takes~20.5 s for VSNS to decrease close to 0 V.

TFALL = 20.5 s

VSNS – Sense resistor voltage
VDIAG – /DIAG output voltage

VFLASH − FLASH input voltage
VGATE – T1 gate voltage

Figure 26. LED Current Turn−off – Detailed View

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VS – LED driver input voltage
ILIM = 0.50 A

V BULKT RISE+VBULK – Hold−up capacitor voltage

4V
7.9 msILIM = 0.25 A
VBULK = 2 V
VDIAG – /DIAG output voltage

Figure 27. Start−up of the LED Driver

Figure 27 shows the LED driver start−up waveforms.
Once the VS input voltage is applied initially, VBULK isbeing charged with a constant current of 250 mA. This isbecause of an FPF2895V foldback current limit
functionality. Once VBULK exceeds 2 V, the FPF2895V
current limit is increased to 500 mA. The overall VBULK
charging time from 0 V to 12 V takes ~28 ms. VDIAG ispulled−up to VPU through 10 k, therefore VDIAG = 5 V
shortly after start−up.

Figure 28 shows the T1 MOSFET drain and source voltage
as well as T1 Power dissipation. During typical operating
conditions at room temperature VDRAIN drops down to 4 V.
This assures an additional margin for worst case conditions.
The maximum T1 power dissipation is 22.5 W while theaverage power dissipation is 585 mW. The measured value isslightly lower compared to the calculated value in section
MOSFET Selection. However, this is according to the
expectation as 706 mW calculated in section MOSFET
Selection was assuming worst case conditions.
VFLASH − FLASH input voltage

VSOURCE – T1 source voltage
VDRAIN – T1 drain voltage

PD_T1 – T1 MOSFET Power dissipation

Figure 28. T1 MOSFET Waveforms
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Figure 29 shows the LED voltages and power dissipation.
The LED power dissipation was determined to be 25 W peakand 735 mW in average. The typical forward voltage drop
across 2 series LEDs at 4 A was measured to be is 6.2 V.

VFLASH – Flash input voltage
VSNS – RSNS voltage
VANODE – LED anode voltage
VCATHODE – LED cathode voltage

PLED – LED power dissipation

VLED – LED anode−cathode voltage

Figure 29. NIR LED Waveforms

to normal operation. VDIAG increases to 5 V and FPF2895V
turns−on. Due to an internal turn−on delay implemented in
the FPF2895V it takes ~2.8 ms for the device to restart
charging of VBULK.

Figure 30 shows operation of the LED turn−on time
limitation. Once VFLASH exceeds the programmed LED
turn−on time limit of 570 s, VDIAG goes low to indicate afault condition. T1 and FPF2895V are both disabled. Oncethe prolonged VFLASH pulse is disabled, the system returns

TDELAY = 2.8 ms

VBULK – Hold−up capacitor voltage

TON = 570 s

VSNS – Sense resistor voltage
TFLASH = 1.2 ms

VDIAG – /DIAG output voltage

VFLASH − FLASH input voltage

Figure 30. Operation of LED Maximum Turn−on Time Limitationwww.onsemi.com
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immediately after VDIAG is disabled. It takes ~20 s for the
LED current to drop from 4 A down to ~0 A.

Figure 31 shows operation of LED maximum turn−ontime limitation in more details. T1 gate is pulled low

VSNS – Sense resistor voltage
VDIAG – /DIAG output voltage

VFLASH − FLASH input voltage
VGATE – T1 gate voltage

Figure 31. Operation of LED Maximum Turn−on Time Limitation – Detailed View

Figures 32 and 33 demonstrate operation of minimum LED
turn−off time limitation for two different flash signal periods.
In Figure 32 the FLASH signal period was set to 12.5 ms
which corresponds to 80 Hz. The time between FLASH
pulses in this case is 12 ms, which exceeds the programmed

time of 13 ms. As a result, the LEDs are being activated every
second FLASH input pulse, with a period of 25 ms (40 Hz).
In Figure 33 the FLASH signal frequency was increased to
180 Hz, corresponding to a FLASH period of 5.55 ms. As aresult, the actual LED turn−on frequency is divided by 3.

VBULK – Hold−up capacitor voltage

TLED_PER = 25 ms

VSNS – Sense resistor voltage

VDIAG – /DIAG output voltage

TFLASH_PER = 12.5 ms

VFLASH − FLASH input voltage

Figure 32. Operation of Minimum LED Turn−off Time Limitationwww.onsemi.com
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VBULK – Hold−up capacitor voltage

TLED_PER = 16.55 ms

VSNS – Sense resistor voltage

VDIAG – /DIAG output voltage

VFLASH − FLASH input voltage

TFLASH_PER = 5.55 ms

Figure 33. Operation of Minimum LED Turn−off Time Limitation

Figure 34 shows that there is a small delay between
enabling of the FLASH input pulse and detecting an
insufficiently short LED turn−off time fault.

VFLASH − FLASH input voltage

VSNS – Sense resistor voltage

TDIAG_DELAY = 1.8 s
VDIAG – /DIAG output voltage
VGATE – T1 gate voltage

Figure 34. Operation of Minimum LED Turn−off Time Limitation – Detailed View

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TND6416/D
Figure 35 shows a condition where the FLASH input
signal is being applied for too long a period and with afrequency that is too high. Both faults are correctly detected
and handled by NCV7694.

VBULK – Hold−up capacitor voltage

VSNS – Sense resistor voltage

VDIAG – /DIAG output voltage

VFLASH − FLASH input voltage

Figure 35. Operation of Minimum LED Turn−off Time and Maximum LED Turn−on Time Limitations

VDIAG is pulled low 30 s after the FLASH input gets
activated. During this condition MOSFET T1 is exposed toa higher−than−normal peak power dissipation, but it
survives this test.

Figure 36 shows the driver operation during a LED
anode−to−cathode short circuit condition. NCV7694
monitors the LED string anode−to−cathode voltage andreports a fault in case if this voltage drops below 1.22 V.

VFLASH − FLASH input voltage

VDIAG – /DIAG output voltage
VGATE – T1 gate voltage

VSNS – Sense resistor voltage

Figure 36. LED Driver Operation During LED Anode−to−Cathode Shortwww.onsemi.com
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Once a FLASH signal is activated with T1 MOSFET drain
shorted to GND, NCV7694 detects that VDET < 0.35 V andVSNS < 0.15 V which again leads to asserting of a fault andpulling−down VDIAG. VDIAG is pulled down after 10 s or
22 s depending on which fault is detected as first.

Figure 37 shows a condition where the T1 MOSFET drain
is shorted to GND when the FLASH signal is disabled. Such
condition leads to a rapid discharge of VBULK. NCV7694
detects that the voltage at VDET drops below 0.35 V andpulls−down VDIAG to GND after 10 s of blanking period.

VBULK – Hold−up capacitor voltage
VFLASH − FLASH input voltage

VDIAG – /DIAG output voltage

VSNS – Sense resistor voltage

Figure 37. LED Driver Operation During T1 MOSFET Drain Short to Ground

VDIAG pin goes low indicating a fault and disabling
FPF2895V load switch. If the fault persists when VFLASH is
active, then VDIAG is pulled down after 10 s or 22 sdepending on which fault is detected first.

Figure 38 demonstrates T1 VDS short situation when
VFLASH is disabled. In this case a large current up to 20 A
peak is drawn momentarily from CBULK. The capacitor
quickly discharges and as soon as VDET drops below 0.35 V,

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VBULK – Hold−up capacitor voltage

VDIAG – /DIAG output voltage
VSNS – Sense resistor voltage

VFLASH − FLASH input voltage

Figure 38. LED Driver Operation During T1 MOSFET VDS Short

Figure 39 demonstrates operation of the LED driver input
overvoltage protection. As soon as the LED driver input
voltage VS exceeds 16.8 V, the FPF2895V high−side switch

becomes disabled which terminates charging of the hold−up
capacitor VBULK.

VS – LED driver input voltage

VBULK – Hold−up capacitor voltage

VDIAG – /DIAG output voltage

Figure 39. LED Driver Operation During Input Overvoltage Conditionwww.onsemi.com
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CONCLUSIONSThis onsemi reference design details a complete solution
for a NIR LED driver for driver and occupant monitoring
applications. The design is based entirely on the following
onsemi ICs: NCV7694 LED driver FPF2895V current limited high−side switch
 NCV803 voltage detector
 NCV8730 LDO

overvoltage protections. This reference design provides astep−by−step guide on the design of each of the different
building blocks:
 Current limit
 Over−voltage protection
 Hold−up capacitor
 Eye−safety protection
 Power MOSFET LED current regulation loop

The described design features are an extensive set ofprotection and diagnostic mechanisms covering LED string
open and short circuit protection, eye−safety protection,
MOSFET short circuit protection, input current limit, input

The design was evaluated during normal operation andduring various fault cases covered in section Evaluation
Results.

REFERENCES[1] G. Breglio, F. Frisina, A. Magri, and P. Spirito, “Electro−Thermal Instability in Low Voltage Power MOS: Experimental
Characterization,” IEEE Proceedings ISPSD 1999, Toronto, p233

onsemi,, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of theinformation, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or useof any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance mayvary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any licenseunder any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or deathassociated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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