S-8245B/D Series
www.ablic.com

BATTERY PROTECTION IC
FOR 3-SERIAL TO 5-SERIAL CELL PACK© ABLIC Inc., 2018

Rev.1.4_00

The S-8245B/D Series is a protection IC for 3-serial to 5-serial cell lithium-ion rechargeable batteries, which includes
high-accuracy voltage detection circuits and delay circuits. It is suitable for protecting 3-serial to 5-serial cell lithium-ion
rechargeable battery packs from overcharge, overdischarge, and overcurrent.
Connecting an NTC, it allows for the temperature detection at four different points: high temperature detection during
charging, low temperature detection during charging, high temperature detection during discharging, and low temperaturedetection during discharging.

 Features
 High-accuracy voltage detection for each cell
Overcharge detection voltage n (n = 1 to 5):3.550 V to 4.600 V (50 mV step)
Accuracy 20 mV
Overcharge release voltage n (n = 1 to 5):3.150 V to 4.600 V*1
Accuracy 50 mV
Overdischarge detection voltage n (n = 1 to 5):
2.000 V to 3.200 V (100 mV step)
Accuracy 80 mV*2
Accuracy 100 mV
Overdischarge release voltage n (n = 1 to 5):
2.000 V to 3.400 V Three-level discharge overcurrent detection:
Discharge overcurrent 1 detection voltage:0.020 V to 0.300 V (10 mV step)
Accuracy 10 mV
Discharge overcurrent 2 detection voltage:0.040 V to 0.500 V (20 mV step)
Accuracy 15 mV
Load short-circuiting detection voltage:
0.100 V to 1.000 V (25 mV step)
Accuracy 50 mV
 Charge overcurrent detection:
Charge overcurrent detection voltage:0.300 V to 0.020 V (10 mV step)
Accuracy 10 mV
 Each delay time is settable by an external capacitor(Load short-circuiting detection delay time and temperature detection delay time are internally fixed)
 Independent control of charge inhibition, discharge inhibition, and power-saving by each control pin
 0 V battery charge function is selectable:
Available, unavailable
 Power-down function is selectable:
Available, unavailable
 CIT pin internal resistance value is selectable:
831 k typ., 8.31 M typ.
 CO and DO pin output voltage is limited to 15 V max. respectively
 Switching control for 3-serial to 5-serial cell is possible by inputting voltage to the SEL1 pin and the SEL2 pin Temperature detection is possible at four different points by connecting an NTC
High temperature detection ratio during charging / discharging: 0.600 to 0.900 (0.005 step)
Accuracy 0.005
Low temperature detection ratio during charging / discharging: 0.030 to 0.400 (0.005 step)
Accuracy 0.005
 High-withstand voltage:
Absolute maximum rating 28 V
 Wide operation voltage range:
5 V to 24 V Wide operation temperature range:
Ta = 40C to 85C Low current consumption
During operation:
20 A max. (Ta = 25C)
During power-down:
0.5 A max. (Ta = 25C)
During power-saving:
0.1 A max. (Ta = 25C) Lead-free (Sn 100%), halogen-free*1. Overcharge release voltage = Overcharge detection voltage  Overcharge hysteresis voltage(Overcharge hysteresis voltage n (n = 1 to 5) is selectable in 0 V to 0.4 V in 50 mV step)*2. Overdischarge release voltage = Overdischarge detection voltage  Overdischarge hysteresis voltage(Overdischarge hysteresis voltage n (n = 1 to 5) is selectable in 0 V to 0.7 V in 100 mV step) Application
 Lithium-ion rechargeable battery pack

 Package 24-Pin SSOP

1

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

 Block Diagram

VDD

Temperature detection circuit

TH

Voltage regulator

VREG

VC1



Overcharge 1Overdischarge 1Overcharge 2Overdischarge 2

CTLC

VC2
CTLD

PSI
CCT

VC3



Overcharge 3Overdischarge 3

CDT
CIT
CIT2

VC4



Overcharge 4Overdischarge 4Overcharge 5Overdischarge 5

Control circuit

CICT
CO pin output voltage
limit circuit

VC5
DO pin output voltage
limit circuit

VSS

DO

SEL1
SEL2







Discharge
overcurrent 1

PSO

Discharge
overcurrent 2
Loadshort-circuiting

RVMD

Chargeovercurrent

RVMS

VINI




RemarkDiodes in the figure are parasitic diodes.

VM

Figure 1
2

COBATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

 Product Name Structure
1. Product nameS-8245

x

xx

-

FGT1

U

Environmental codeU:
Lead-free (Sn 100%), halogen-free
Package abbreviation and IC packing specifications*1
FGT1: 24-Pin SSOP, Tape
Serial code*2
Sequentially set from AA to ZZ
Product typeB:
For application circuit with an integrated charge and discharge pathD:
For application circuit with separate charge and discharge paths*1. Refer to the tape drawing.
*2. Refer to "3. Product name list".

2. Package
Table 1 Package Drawing CodePackage Name
24-Pin SSOP

Dimension
FS024-B-P-SD

Tape
FS024-B-C-SD

Reel
FS024-B-R-SD

3

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

3. Product name list
3. 1 S-8245B Series
Table 2 (1 / 2)
Discharge Discharge
Load
ChargeOvercharge Overcharge Overdischarge Overdischarge
Overcurrent Overcurrent Short-circuiting Overcurrent
Detection
Release
Detection
Release1 Detection 2 Detection
Detection
Detection
Product Name
Voltage
Voltage
Voltage
Voltage
Voltage
Voltage
Voltage
Voltage
[VCU]
[VCL]
[VDL]
[VDU]
[VDIOV1][VDIOV2][VSHORT][VCIOV]
S-8245BAA-FGT1U 4.100 V
4.050 V
2.600 V
2.700 V
0.020 V
0.040 V
0.100 V
0.020 V
S-8245BAB-FGT1U 4.250 V
4.150 V
2.500 V
3.000 V
0.100 V
0.200 V
0.500 V
0.100 V
Table 2 (2 / 2)

Product Name

0 V Battery
Charge*1Function

CIT Pin High Temperature Low Temperature High Temperature Low Temperature
Internal
Detection Ratio Detection Ratio Detection Ratio Detection Ratio
PowerResistanceduringduringduringduringdown
Value*3
Function*2
Charging
Charging
Discharging
Discharging[RCIT][rTHCH][rTHCL][rTHDH][rTHDL]S-8245BAA-FGT1U Available Available 831 k
0.670
0.270
S-8245BAB-FGT1U Unavailable Available 831 k
0.670
0.270
*1. 0 V battery charge function "available" / "unavailable" is selectable.
*2. Power-down function "available" / "unavailable" is selectable.
*3. CIT pin internal resistance value 831 k typ. / 8.31 M typ. is selectable.

0.795
0.795

0.190
0.190

Remark Please contact our sales office for products other than those specified above.
3. 2 S-8245D Series
Table 3 (1 / 2)
Discharge Discharge
Load
ChargeOvercharge Overcharge Overdischarge Overdischarge
Overcurrent Overcurrent Short-circuiting Overcurrent
Detection
Release
Detection
Release1 Detection 2 Detection
Detection
Detection
Product Name
Voltage
Voltage
Voltage
Voltage
Voltage
Voltage
Voltage
Voltage
[VCU]
[VCL]
[VDL]
[VDU]
[VDIOV1][VDIOV2][VSHORT][VCIOV]
S-8245DAA-FGT1U 4.100 V
4.050 V
2.600 V
2.700 V
0.020 V
0.040 V
0.100 V
0.020 V
S-8245DAB-FGT1U 4.250 V
4.150 V
2.500 V
3.000 V
0.100 V
0.200 V
0.500 V
0.100 V
Table 3 (2 / 2)
CIT Pin High Temperature Low Temperature High Temperature Low Temperature
Internal
Detection Ratio Detection Ratio Detection Ratio Detection Ratio
PowerResistanceduringduringduringduringdown
Product Name
Value*3
Function*2
Charging
Charging
Discharging
Discharging[RCIT][rTHCH][rTHCL][rTHDH][rTHDL]S-8245DAA-FGT1U Unavailable Available 831 k
0.670
0.270
0.795
0.190
S-8245DAB-FGT1U Unavailable Available 831 k
0.670
0.270
0.795
0.190
*1. 0 V battery charge function "available" / "unavailable" is selectable.
*2. Power-down function "available" / "unavailable" is selectable.
*3. CIT pin internal resistance value 831 k typ. / 8.31 M typ. is selectable.
0 V Battery
Charge*1Function

Remark Please contact our sales office for products other than those specified above.

4

Rev.1.4_00

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

 Pin Configuration
1. 24-Pin SSOP
Table 4Top view

24
23
22
21
20
19
18
17
16
15
14
13

1
2
3
4
5
6
7
8
9
10
11
12
Figure 2

Pin No.
1

Symbol
TH

2

VDD

3

VC1

4

VC2

5

VC3

6

VC4

7

VC5

8

VSS

9

VINI

10

SEL1

11

SEL2

12

CICT

13

CCT

14

CDT

15

CIT

16

CIT2

17
18

PSO
DO

19

CO

20
21
22
23
24

VM
CTLC
CTLD
PSI
VREG

Description
Input pin for temperature detection
Input pin for positive power supply,
connection pin for positive voltage of battery 1
Connection pin for positive voltage of battery 1
Connection pin for negative voltage of battery 1,
connection pin for positive voltage of battery 2
Connection pin for negative voltage of battery 2,
connection pin for positive voltage of battery 3
Connection pin for negative voltage of battery 3,
connection pin for positive voltage of battery 4
Connection pin for negative voltage of battery 4,
connection pin for positive voltage of battery 5
Input pin for negative power supply,
connection pin for negative voltage of battery 5
Voltage detection pin between VSS pin and VINI pin
Switching pins for number of cells in series[SEL1, SEL2] = ["L", "L"] :5-serial cell
[SEL1, SEL2] = ["L", "H"] :4-serial cell
[SEL1, SEL2] = ["H", "L"] :3-serial cell
[SEL1, SEL2] = ["H", "H"] :Setting inhibited
Capacitor connection pin for delay
for charge overcurrent detection
Capacitor connection pin for delay
for overcharge detection voltage
Capacitor connection pin for delay
for overdischarge detection voltage
Capacitor connection pin for delay
for discharge overcurrent 1 detection
Capacitor connection pin for delay
for discharge overcurrent 2 detection
Output pin for power-saving signal (CMOS output)
Connection pin of discharge control FET gate (CMOS output)
Connection pin of charge control FET gate
(Pch open-drain output)
Voltage detection pin between VSS pin and VM pin
Control pin for CO pin output
Control pin for DO pin output
Control pin for Power-saving
Voltage output pin for temperature detection

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BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

 Absolute Maximum Ratings
Table 5
(Ta = 25°C unless otherwise specified)
Item
SymbolApplied Pin
Absolute Maximum Rating Unit
Input voltage between VDD pin and VSS pin VDS
VDD
VSS  0.3 to VSS  28
V
VC1, VC2, VC3, VC4, VC5,
CCT, CDT, CIT, CIT2, CICT,
Input pin voltage 1
VIN1
VSS  0.3 to VDD  0.3
V
SEL1, SEL2, TH,
CTLC, CTLD, PSI
Input pin voltage 2
VIN2
VM, VINIVDD  28 to VDD  0.3
V
Output pin voltage 1
VOUT1
DO, PSO, VREG
VSS  0.3 to VDD  0.3
V
Output pin voltage 2
VOUT2
COVDD  28 to VDD  0.3
V
Operation ambient temperatureTopr40 to 85°CStorage temperatureTstg
40 to 125
°C
Caution

The absolute maximum ratings are rated values exceeding which the product could suffer physicaldamage. These values must therefore not be exceeded under any conditions.

 Thermal Resistance Value
Table 6
Item

SymbolCondition
Board A
Board B
Junction-to-ambient thermal resistance*1 JA
24-Pin SSOP
Board CBoard D
Board E
*1. Test environment: compliance with JEDEC STANDARD JESD51-2A
Remark Refer to " Power Dissipation" and "Test Board" for details.

6

Min.






Typ.
70
60




Max.






Unit
C/W
C/W
C/W
C/W
C/W

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

 Electrical Characteristics
Table 7 (1 / 3)

Item
Detection Voltage
Overcharge detection voltage n(n = 1 to 5)
Overcharge release voltage n(n = 1 to 5)
Overdischarge detection voltage n(n = 1 to 5)
Overdischarge release voltage n(n = 1 to 5)
Discharge overcurrent 1
detection voltage
Discharge overcurrent 2
detection voltage
Load short-circuiting detection
voltage
Charge overcurrent detection
voltage
Delay Time Function*1
CCT pin internal resistance
CDT pin internal resistance

Symbol

VCUn(V1 = V2 = V3 = V4 = V5 = 3.5 V, Ta = 25°C unless otherwise specified)
TestCondition
Min.
Typ.
Max.
Unit
Circuit
V1 = V2 = V3 = V4 = V5 =VCUn  0.050 V

VCLn



VDLn



VDUn



VDIOV1VDIOV2

VSHORT



VCIOV



RCCT
RCDT

CIT pin internal resistance

RCIT

CIT2 pin internal resistance
CICT pin internal resistance

RCIT2
RCICT

V1 = VCU  0.025
V1 = VDL  0.085
RCIT = 831 k
RCIT = 8.31 M


CCT pin detection voltage

VCCT

V1 = VCU  0.025

CDT pin detection voltage

VCDT

V1 = VDL  0.085

CIT pin detection voltage

VCIT



CIT2 pin detection voltage

VCIT2



CICT pin detection voltage

VCICT



Load short-circuiting detection
delay time
Input Voltage
Operation voltage between
VDD pin and VSS pin*1.

Refer to "6.

VCUn 
0.020
VCLn 
0.050
VDLn 
0.080
VDUn 
0.100
VDIOV1 
0.010
VDIOV2 
0.015
VSHORT 
0.050
VCIOV 
0.010

VCUn
VCLn
VDLn
VDUn
VDIOV1VDIOV2VSHORT
VCIOV

VCUn 
0.020
VCLn 
0.050
VDLn 
0.080
VDUn 
0.100
VDIOV1 
0.010
VDIOV2 
0.015
VSHORT 
0.050
VCIOV 
0.010

V

1

V

1

V

1

V

1

V

1

V

1

V

1

V

1

6.15
615
615
6.15
123
123
VDS 
0.68
VDS 
0.68
VDS 
0.68
VDS 
0.68
VDS 
0.68

8.31
831
831
8.31
166
166
VDS 
0.70
VDS 
0.70
VDS 
0.70
VDS 
0.70
VDS 
0.70

10.20
1020
1020
10.20
204
204
VDS 
0.72
VDS 
0.72
VDS 
0.72
VDS 
0.72
VDS 
0.72

M
k
k
M
k
k

1
1
1
1
1
1

V

1

V

1

V

1

V

1

V

1

tSHORTInternally fixed delay time

100

300

600

s

1

VDSOP

Fixed output voltage of DO pin
and CO pin

5



24

V



Delay time setting" in " Operation" for details of the delay time function.

7

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

Table 7 (2 / 3)

Item
Input Current
Current consumption during
operation
Current consumption during
power-downCurrent consumption during
power-saving
VC1 pin current
VC2 pin current
VC3 pin current
VC4 pin current
VC5 pin current
Internal ResistanceResistance between VM pin and
VDD pinResistance between VM pin and
VSS pin
Output Pin
CO pin voltage "H"*1
DO pin voltage "H"*2
CO pin source current
CO pin leakage current
DO pin source current
DO pin sink current
PSO pin source current
PSO pin sink current
0 V Battery Charge Function

Symbol

IOPE





10

20

A

1

IPDN

V1 = V2 = V3 = V4 = V5 = 1.5 V





0.5

A

1

IPSV







0.1

A

1

IVC1
IVC2
IVC3
IVC4
IVC5








0.8
0.8
0.8
0.8

0.25
0.0
0.0
0.0
0.0

0.50
0.8
0.8
0.8
0.8

A
A
A
A
A

1
1
1
1
1

RVMD

V1 = V2 = V3 = V4 = V5 = 1.5 V

1.35

2.70

5.40

M

1

RVMS



7.5

15.0

30.0

k

1


V1 = V2 = V3 = V4 = V5 = 5.6 VV1 = V2 = V3 = V4 = V5 = 1.9 V

11.0
11.0
10

10
10
1
1

13.0
13.0







15.0
15.0

0.1


10
10

V
V
A
A
A
A
A
A

1
1
1
1
1
1
1
1



0.8

1.5

V

1

1.0

1.3

1.5

V

1

VCOH
VDOH
ICOH
ICOL
IDOH
IDOL
IPSOH
IPSOL

0 V battery charge starting
charger voltage

V0CHA

0 V battery charge inhibition
battery voltage n (n = 1 to 5)

V0INHn*1.
*2.

(V1 = V2 = V3 = V4 = V5 = 3.5 V, Ta = 25°C unless otherwise specified)
TestCondition
Min.
Typ.
Max.
Unit
Circuit

VCOH  VDS
VDOH  VDS

0 V battery charge function"available",
V1 = V2 = V3 = V4 = V5 = 0 V
0 V battery charge function"unavailable"

When VCOH  VDS, VCOH = VDDWhen VDOH  VDS, VDOH = VDD

Remark VDS: Input voltage between the VDD pin and VSS pin (V1  V2  V3  V4  V5)

8

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

Table 7 (3 / 3)

Item
Control Pin
SEL1 pin voltage "H"
SEL2 pin voltage "H"
SEL1 pin voltage "L"
SEL2 pin voltage "L"
CTLC pin reverse voltage
CTLD pin reverse voltage
PSI pin reverse voltage
CTLC pin response delay time
CTLD pin response delay time
PSI pin response delay time
CTLC pin curent "H"
CTLC pin curent "L"
CTLD pin curent "H"
CTLD pin curent "L"
PSI pin curent "H"
PSI pin curent "L"
Temperature Detection Function
Output voltage for temperaturedetection
High temperature detection ratio
during charging
Low temperature detection ratio
during charging
High temperature detection ratio
during discharging
Low temperature detection ratio
during discharging
Charge-discharge discriminating
voltage
Temperature detection delay time

Symbol(V1 = V2 = V3 = V4 = V5 = 3.5 V, Ta = 25°C unless otherwise specified)
TestCondition
Min.
Typ.
Max.
Unit
Circuit

VSEL1HVSEL2HVSEL1LVSEL2L
VCTLC
VCTLD
VPSI
tCTLC
tCTLD
tPSI
ICTLCHICTLCLICTLDHICTLDL
IPSIH
IPSIL


















VDS  0.95
VDS  0.95


0.1
0.1
0.1
0.275
0.275
0.3
0.1
0.45
0.1
0.45
0.0
0.1





0.7
0.7
4.0
0.500
0.500
0.9
0.0
0.20
0.0
0.20
0.2
0.0



VDS  0.05
VDS  0.05
2.0
2.0
8.0
0.725
0.725
3.0
0.1
0.05
0.1
0.05
0.4
0.1

V
V
V
V
V
V
V
ms
ms
ms
A
A
A
A
A
A





1
1
1
1
1
1
1
1
1
1
1
1

VREG

Voltage between VDD pin and
VREG pin

4.0

5.0

6.0

V

2

rTHCH

rTHCH = (VREG  VTH) / VREG



2

rTHCL

rTHCL = (VREG  VTH) / VREG



2

rTHDH

rTHDH = (VREG  VTH) / VREG



2

rTHDL

rTHDL = (VREG  VTH) / VREG2

rTHCH 0.005
rTHCL 0.005
rTHDH 0.005
rTHDL 
0.005

rTHCH
rTHCL
rTHDH
rTHDL

rTHCH 0.005
rTHCL 0.005
rTHDH 0.005
rTHDL 
0.005

VCHG



0.03

0.02

0.01

V

2

tTH



1.0

2.0

3.0

s

2

9

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

 Test Circuits
Unless otherwise specified, for the CO pin output voltage (VCO), DO pin output voltage (VDO) and PSO pin output voltage(VPSO), "L" or "H" is judged as follows.
L : [VCO, VDO, VPSO]  VDS  0.1 V
H : [VCO, VDO, VPSO]  VDS  0.1 V
VDS: Input voltage between the VDD pin and VSS pin (V1  V2  V3  V4  V5)

Remark

1. Test circuit 1
10 k
0.1 F
10 k

V1
V2
V3
V4
V5

1 TH

VREG 24

2 VDD

PSI 23

A

A

3 VC1

CTLD 22

A

A

4 VC2

CTLC 21

A

A

5 VC3

VM 20

A

A

A

A

6 VC4
CO 19
S-8245B/D
7 VC5
DO 18

A

8 VSS

PSO 17A

9 VINI

CIT2 16AA

10 SEL1

CIT 15A

11 SEL2

CDT 14A

12 CICT

CCT 13A
SW2

SW3 SW4 SW5V8

V9 V10 V11

SW1
V7

V6

A

SW6
V

SW7

V12

V

SW8 SW9

V13V

1 M V14 V15 V16 V17 V18

Figure 3 Test Circuit 1
This section provides explanations of Test items using Test circuit 1.
Perform each test after setting as shown in Table 8.

V1
3.5 V

V15
0V

10

V2
3.5 V

V16
VDS

V3
3.5 V

V17
VDS

V4
3.5 V

V18
VDS

Table 8Initial Setting of Test Circuit 1 (1 / 2)

V5
3.5 V

V6
0V

Table 8Initial Setting of Test Circuit 1 (2 / 2)

SW1
OFF

SW2
OFF

V7


SW3
OFF

V8


SW4
OFF

V9


SW5
OFF

V10


SW6
OFF

V11


V12


V13


SW7
OFF

SW8
ON

SW9
OFF

V14


Rev.1.4_00

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

1. 1 Overcharge detection voltage n (VCUn), overcharge release voltage n (VCLn)
When the voltage V1 is gradually increased after setting V1 = V2 = V3 = V4 = V5 = VCUn  0.05 V and VCOchanges from "H" to "L", V1 is defined as the overcharge detection voltage 1 (VCU1). When the voltage V1 is thengradually decreased after setting V2 = V3 = V4 = V5 = 3.5 V and V15 = 5 mV and VCO changes from "L" to "H",V1 is defined as the overcharge release voltage 1 (VCL1).
Overcharge detection voltage n (VCUn) and overcharge release voltage n (VCLn) (n = 2 to 5) can be determined in
the same way as when n = 1.
1. 2 Overdischarge detection voltage n (VDLn), overdischarge release voltage n (VDUn)
When the voltage V1 is gradually decreased and VDO changes from "H" to "L", V1 is defined as the overdischarge
detection voltage 1 (VDL1). When the voltage V1 is then gradually increased after setting V15 = 0.1 V and VDOchanges from "L" to "H", V1 is defined as the overdischarge release voltage 1 (VDU1).
Overdischarge detection voltage n (VDLn) and overdischarge release voltage n (VDUn) (n = 2 to 5) can be
determined in the same way as when n = 1.
1. 3 Discharge overcurrent 1 detection voltage (VDIOV1)When the voltage V6 is gradually increased and VDO changes from "H" to "L", V6 is defined as the discharge
overcurrent 1 detection voltage (VDIOV1).
1. 4 Discharge overcurrent 2 detection voltage (VDIOV2)When the voltage V6 is gradually increased after setting V10 = 0 V and SW4 to ON and VDO changes from "H" to"L", V6 is defined as the discharge overcurrent 2 detection voltage (VDIOV2).
1. 5 Load short-circuiting detection voltage (VSHORT)
When the voltage V6 is gradually increased after setting V10 = V11 = 0 V and SW4 and SW5 to ON and VDOchanges from "H" to "L", V6 is defined as the load short-circuiting detection voltage (VSHORT).
1. 6 Charge overcurrent detection voltage (VCIOV)
When the voltage V6 is gradually decreased and VCO changes from "H" to "L", V6 is defined as the charge
overcurrent detection voltage (VCIOV).
1. 7 CCT pin internal resistance (RCCT), CCT pin detection voltage (VCCT)The CCT pin internal resistance (RCCT) is defined by RCCT = VDS / ICCT under the set conditions of V1 = VCU1 
0.025 V after setting V8 = 0 V and setting SW2 to ON. When the voltage V8 is then gradually increased and VCOchanges from "H" to "L", V8 is defined as the CCT pin detection voltage (VCCT).
1. 8 CDT pin internal resistance (RCDT), CDT pin detection voltage (VCDT)The CDT pin internal resistance (RCDT) is defined by RCDT = VDS / ICDT under the set conditions of V1 = VDL1 
0.085 V after setting V9 = 0 V and setting SW3 to ON. When the voltage V9 is then gradually increased and VDOchanges from "H" to "L", V9 is defined as the CDT pin detection voltage (VCDT).
1. 9 CIT pin internal resistance (RCIT), CIT pin detection voltage (VCIT)The CIT pin internal resistance (RCIT) is defined by RCIT = VDS / ICIT under the set conditions of V6 = VDIOV1  0.015
V after setting V10 = 0 V and setting SW4 to ON. When the voltage V10 is then gradually increased and VDOchanges from "H" to "L", V10 is defined as the CIT pin detection voltage (VCIT).
1. 10 CIT2 pin internal resistance (RCIT2), CIT2 pin detection voltage (VCIT2)
The CIT2 pin internal resistance (RCIT2) is defined by RCIT2 = VDS / ICIT2 under the set conditions of V6 = VDIOV2 
0.020 V after setting V10 = V11 = 0 V and setting SW4 and SW5 to ON. When the voltage V11 is then gradually
increased and VDO changes from "H" to "L", V11 is defined as the CIT2 pin detection voltage (VCIT2).

11

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

1. 11 CICT pin internal resistance (RCICT), CICT pin detection voltage (VCICT)The CICT pin internal resistance (RCICT) is defined by RCICT = VDS / ICICT under the set conditions of V6 = VCIOV 
0.015 V after setting V7 = 0 V and setting SW1 to ON. When the voltage V7 is then gradually increased and VCOchanges from "H" to "L", V7 is defined as the CICT pin detection voltage (VCICT).
1. 12 Load short-circuiting detection delay time (tSHORT)The load short-circuiting detection delay time (tSHORT) is the time period from when the voltage V6 changes to V6 =VSHORT  0.055 V until when VDO changes from "H" to "L" after setting V10 = V11 = 0 V and setting SW4 and SW5
to ON.
1. 13 Current consumption during operation (IOPE)
The current consumption during operation (IOPE) is IVSS when SW8 is OFF.
1. 14 Current consumption during power-down (IPDN)
The current consumption during power-down (IPDN) is IVSS when V1 = V2 = V3 = V4 = V5 = 1.5 V, V15 = VDS and
SW8 is OFF.
1. 15 Current consumption during power-saving (IPSV)
The current consumption during power-saving (IPSV) is IVSS when V18 = 0 V and SW8 is OFF.
1. 16 Resistance between VM pin and VDD pin (RVMD)
The resistance between VM pin and VDD pin (RVMD) is defined by RVMD = VDS / IVM when setting V1 = V2 = V3 =V4 = V5 = 1.5 V.
1. 17 Resistance between VM pin and VSS pin (RVMS)
The resistance between VM pin and VSS pin (RVMS) is defined by RVMS = V15 / IVM when setting V6 = VDIOV1 
0.015 V and V15 = 2.0 V.
1. 18 CO pin source current (ICOH)
The CO pin source current (ICOH) is ICO when V14 = VCOH  0.5 V, SW8 is OFF, and SW9 is ON.
1. 19 CO pin leakage current (ICOL)The CO pin leakage current (ICOL) is ICO when V1 = V2 = V3 = V4 = V5 = 5.6 V, V14 = 0 V, SW8 is OFF, and SW9
is ON.
1. 20 DO pin source current (IDOH)
The DO pin source current (IDOH) is IDO when V13 = VDOH  0.5 V and SW7 is ON.
1. 21 DO pin sink current (IDOL)The DO pin sink current (IDOL) is IDO when V1 = V2 = V3 = V4 = V5 = 1.9 V, V13 = 0.5 V, and SW7 is ON.
1. 22 PSO pin source current (IPSOH)
The PSO pin source current (IPSOH) is IPSO when V18 = 0 V, V12 = VDS  0.5 V, and SW6 is ON.
1. 23 PSO pin sink current (IPSOL)
The PSO pin sink current (IPSOL) is IPSO when V12 = 0.5 V and SW6 is ON.

12

Rev.1.4_00

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

1. 24 0 V battery charge starting charger voltage (V0CHA) (0 V battery charge function "available")
When the voltage V15 is gradually decreased after setting V1 = V2 = V3 = V4 = V5 = 0 V and VCO is "H", theabsolute value of V15 is defined as the 0 V battery charge starting charger voltage (V0CHA).
1. 25 0 V battery charge inhibition battery voltage n (V0INHn) (0 V battery charge function "unavailable")
When the voltage V1 is gradually decreased and VCO changes from "H" to "L", V1 is defined as the 0 V battery
charge inhibition battery voltage 1 (V0INH1).
0 V battery charge inhibition battery voltage n (V0INHn) (n = 2 to 5) can be determined in the same way as when n =1.
1. 26 CTLC pin reverse voltage (VCTLC)
When the voltage V16 is gradually decreased and VCO changes from "H" to "L", V16 is defined as the CTLC pinreverse voltage (VCTLC).
1. 27 CTLD pin reverse voltage (VCTLD)
When the voltage V17 is gradually decreased and VDO changes from "H" to "L", V17 is defined as the CTLD pinreverse voltage (VCTLD).
1. 28 PSI pin reverse voltage (VPSI)When the voltage V18 is gradually decreased and VPSO changes from "L" to "H", V18 is defined as the PSI pin
reverse voltage (VPSI).
1. 29 CTLC pin response delay time (tCTLC)
The CTLC pin response delay time (tCTLC) is the time period from when the voltage V16 changes to V16 = 0 V until
when VCO changes from "H" to "L".
1. 30 CTLD pin response delay time (tCTLD)The CTLD pin response delay time (tCTLD) is the time period from when the voltage V17 changes to V17 = 0 V until
when VDO changes from "H" to "L".
1. 31 PSI pin response delay time (tPSI)The PSI pin response delay time (tPSI) is the time period from when the voltage V18 changes to V18 = 0 V until
when VPSO changes from "L" to "H".
1. 32 CTLC pin current "H" (ICTLCH), CTLC pin current "L" (ICTLCL)The CTLC pin current "H" (ICTLCH) is ICTLC when V16 = VDS.
The CTLC pin current "L" (ICTLCL) is ICTLC when V16 = 0 V.
1. 33 CTLD pin current "H" (ICTLDH), CTLD pin current "L" (ICTLDL)The CTLD pin current "H" (ICTLDH) is ICTLD when V17 = VDS.
The CTLD pin current "L" (ICTLDL) is ICTLD when V17 = 0 V.
1. 34 PSI pin current "H" (IPSIH), PSI pin current "L" (IPSIL)
The PSI pin current "H" (IPSIH) is IPSI when V18 = VDS.
The PSI pin current "L" (IPSIL) is IPSI when V18 = 0 V.

13

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series
2. Test circuit 2

V

V7

1 TH

V1
V2
V3
V4
V5

20 k

0.1 F

VREG 24

2 VDD

PSI 23

3 VC1CTLD 22

4 VC2CTLC 21

5 VC3

VM 20

6 VC4
CO 19
S-8245B/D
DO 18
7 VC5
8 VSS

PSO 17

9 VINI

CIT2 16

10 SEL1

CIT 15

11 SEL2

CDT 1412 CICT

CCT 13VV

1 M V6

Figure 4 Test Circuit 2This section provides explanations of Test items using Test circuit 2.
Perform each test after setting as shown in Table 9.
Table 9 Initial Setting of Test Circuit 2
V1
V2
V3
3.5 V
3.5 V
3.5 V
*1. V7 is an absolute value.

14

V4
3.5 V

V5
3.5 V

V6
0V

V7*1
2.5 V

Rev.1.4_00

Rev.1.4_00

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

2. 1 Output voltage for temperature detection (VREG)
The maximum voltage between the VDD pin and VREG pin is defined as the output voltage for temperaturedetection (VREG).
2. 2 High temperature detection ratio during charging (rTHCH)
When the voltage V7 is gradually decreased after setting V6 = 0.03 V and VCO changes from "H" to "L" and VDOchanges from "H" to "L", the high temperature detection ratio during charging (rTHCH) is defined by (VREG  V7) /VREG.
2. 3 Low temperature detection ratio during charging (rTHCL)
When the voltage V7 is gradually increased after setting V6 = 0.03 V and VCO changes from "H" to "L" and VDOchanges from "H" to "L", the low temperature detection ratio during charging (rTHCL) is defined by (VREG  V7) /VREG.
2. 4 High temperature detection ratio during discharging (rTHDH)
When the voltage V7 is gradually decreased and VCO changes from "H" to "L" and VDO changes from "H" to "L", thehigh temperature detection ratio during discharging (rTHDH) is defined by (VREG  V7) / VREG.
2. 5 Low temperature detection ratio during discharging (rTHDL)
When the voltage V7 is gradually increased and VCO changes from "H" to "L" and VDO changes from "H" to "L", thelow temperature detection ratio during discharging (rTHDL) is defined by (VREG  V7) / VREG.
2. 6 Charge-discharge discriminating voltage (VCHG)
When the voltage V6 is gradually decreased after setting (1  rTHDH)  VREG  V7  (1  rTHCH)  VREG and VCOchanges from "H" to "L" and VDO changes from "H" to "L", V6 is defined as the charge-discharge discriminating
voltage (VCHG).
2. 7 Temperature detection delay time (tTH)
The temperature detection delay time (tTH) is the time period from when the voltage V7 changes to 0 V until when
VCO changes from "H" to "L" and VDO changes from "H" to "L".

15

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

 Operation
Remark Refer to " Connection Examples of Battery Protection IC".

1. Normal status
The status when the CO pin output voltage (VCO) = "H", DO pin output voltage (VDO) = "H" and PSO pin output voltage(VPSO) = "L" is the normal status.
All the conditions mentioned below should be satisfied for returning to normal status.
 The voltage of each of the batteries is in the range from the overcharge detection voltage n (VCUn) to
overdischarge detection voltage n (VDLn).
 The VINI pin voltage is in the range of the charge overcurrent detection voltage (VCIOV) to the discharge
overcurrent 1 detection voltage (VDIOV1).
 The CTLC pin voltage, CTLD pin voltage, and PSI pin voltage are higher than the CTLC pin reverse voltage(VCTLC), CTLD pin reverse voltage (VCTLD), and PSI pin reverse voltage (VPSI), respectively.
 Either (1) or (2) below is satisfied for the TH pin voltage (VTH).
(1) When VVM  VCHG:(2) When VVM  VCHG:
Caution(1  rTHCH)  VREG  VTH  (1  rTHCL)  VREG
(1  rTHDH)  VREG  VTH  (1  rTHDL)  VREG

After a battery is connected, there may be cases when discharging cannot be performed. In thiscase, the S-8245B/D Series returns to the normal status when any of the following conditions is
satisfied.
(1) Connecting a charger(2) Shorting between the VM pin and the VSS pin(3) Changing the PSI pin voltage to be VDS 0 V  VDS

RemarkVVM:
VCHG:
rTHCH:rTHCL:
rTHDH:rTHDL:VREG:
VDS:

VM pin voltage
Charge-discharge discriminating voltage
High temperature detection ratio during charging
Low temperature detection ratio during charging
High temperature detection ratio during discharging
Low temperature detection ratio during discharging
Output voltage for temperature detection
Input voltage between the VDD pin and VSS pin (V1  V2  V3  V4  V5)

2. Overcharge status
When the voltage of any of the batteries exceeds the overcharge detection voltage n (VCUn) and the status continues*1
for the overcharge detection delay time (tCU) or longer, the CO pin changes to high impedance. This is theovercharge status. The CO pin is pulled down to EB by an external resistor so that the charge control FET is turned
off to stop charging.
The overcharge status is released if either condition mentioned below is satisfied.
(1) VVM  0 V, and voltage of battery  VCLn
(2) VVM  0 V, and voltage of all batteries  VCUn
*1. Refer to "6.
Remark

16

VVM:
VDS:
VCUn:
VCLn:

Delay time setting" for details.
VM pin voltage
Input voltage between the VDD pin and VSS pin (V1  V2  V3  V4  V5)
Overcharge detection voltage n (n = 1 to 5)
Overcharge release voltage n (n = 1 to 5)

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

3. Overdischarge status
When the voltage of any of the batteries falls below the overdischarge detection voltage n (VDLn) and the status*1
continues for the overdischarge detection delay time (tDL) or longer, the DO pin changes to the VSS level. This is theoverdischarge status. The discharge control FET is turned off to stop discharging.
The overdischarge status is released if either condition mentioned below is satisfied.
(1) VVM  VCHG, and voltage of all batteries  VDLn
(2) VVM  VCHG, and voltage of battery  VDUn
*1. Refer to "6.

Delay time setting" for details.

Remark

VM pin voltage
Charge-discharge discriminating voltage
Overdischarge detection voltage n (n = 1 to 5)
Overdischarge release voltage n (n = 1 to 5)

VVM:
VCHG:
VDLn:
VDUn:

3. 1 With power-down function
When S-8245B/D Series reaches the overdischarge status, the VM pin is pulled up to the VDD level by a resistance
between VM pin and VDD pin (RVMD). If the voltage difference between the VDD pin and the VM pin decreases to
1.0 V typ. or lower, the power-down function starts to operate and most operations in the S-8245B/D Series halt. In
this case, the CO pin changes to high impedance, and the PSO pin changes to the VDD level.
The power-down function is released when the VM pin voltage changes to 0.7 V typ. or lower.

4. Discharge overcurrent status
When the discharge current increases to a certain value or more, the VINI pin voltage increases to the level ofdischarge overcurrent 1 detection voltage (VDIOV1) or higher. If the status continues for the discharge overcurrent 1*1
detection delay time (tDIOV1) or longer, the DO pin changes to the VSS level. This is the discharge overcurrent status.
The discharge control FET is turned off to stop discharging. The VM pin is pulled down to the VSS level by resistance
between VM pin and VSS pin (RVMS).
Discharge overcurrent is detected at the following three levels: VDIOV1, VDIOV2, and VSHORT. When discharge
overcurrent 2 detection voltage (VDIOV2) and load short-circuiting detection voltage (VSHORT) are detected, the same
operations as VDIOV1 detection are performed.
The discharge overcurrent status is released if the following conditions are satisfied.
 S-8245B Series: VVM  VDS / 2 typ.
 S-8245D Series: VVM  VDS / 4 typ.
*1. Refer to "6.

Delay time setting" for details.

Remark

VM pin voltage
Input voltage between the VDD pin and VSS pin (V1  V2  V3  V4  V5)

VVM:
VDS:

5. Charge overcurrent status
When the charge current increases to a certain value or more, the VINI pin voltage decreases to the level of charge
overcurrent detection voltage (VCIOV) or lower. If the status continues for the charge overcurrent detection delay time
*1
(tCIOV) or longer, the CO pin changes to high impedance. This is the charge overcurrent status. The charge control
FET is turned off to stop charging. The VM pin is pulled up to the VDD level by resistance between VM pin and VDD
pin (RVMD).
The charge overcurrent status is released if VVM  0 V typ.
*1. Refer to "6.

Delay time setting" for details.

Remark

VM pin voltage
Input voltage between the VDD pin and VSS pin (V1  V2  V3  V4  V5)

VVM:
VDS:

17

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

6. Delay time setting
Users are able to set delay time for the period from when the S-8245B/D Series detects change in the voltage of anyof the batteries or the VINI pin until when it outputs to the CO pin or the DO pin. Each delay time is determined by aresistor in the S-8245B/D Series and an external capacitor.
In the overchage detection, when the voltage of any of the batteries exceeds overcharge detection voltage n (VCUn),
the S-8245B/D Series starts charging to the CCT pin's capacitor (CCCT) via the CCT pin internal resistance (RCCT).
After a certain period, the CO pin changes to high impedance when the CCT pin reaches the CCT pin detection
voltage (VCCT). This period is overcharge detection delay time (tCU).
tCU is calculated using the following equation.
tCU [s] = ln (1  VCCT / VDS)  CCCT [F]  RCCT [M]= ln (1  0.7 typ.)  CCCT [F]  8.31 [M] typ.
= 10.0 [M] typ.  CCCT [F]
Overdischarge detection delay time (tDL), discharge overcurrent 1 detection delay time (tDIOV1), discharge overcurrent 2
detection delay time (tDIOV2) and charge overcurrent detection delay time (tCIOV) are calculated using the following
equations as well.
tDL [ms] = ln (1  VCDT / VDS)  CCDT [F]  RCDT [k]tDIOV1 [ms] = ln (1  VCIT / VDS)  CCIT [F]  RCIT [k]tDIOV2 [ms] = ln (1  VCIT2 / VDS)  CCIT2 [F]  RCIT2 [k]tCIOV [ms] = ln (1  VCICT / VDS)  CCICT [F]  RCICT [k]
When CCCT = CCDT = CCIT = CCIT2 = CCICT = 0.1 [F], each delay time is calculated as follows.
tCU [s] = 10.0 [M] typ.  0.1 [F] = 1.0 [s] typ.
tDL [ms] = 1000 [k] typ.  0.1 [F] = 100 [ms] typ.
tDIOV1 [ms] = 1000 [k] typ.  0.1 [F] = 100 [ms] typ. (when RCIT = 831 k typ.)tDIOV1 [ms] = 10.0 [M] typ.  0.1 [F] = 1.0 [s] typ. (when RCIT = 8.31 M typ.)tDIOV2 [ms] = 200 [k] typ.  0.1 [F] = 20 [ms] typ.
tCIOV [ms] = 200 [k] typ.  0.1 [F] = 20 [ms] typ.
Load short-circuiting detection delay time (tSHORT) is fixed internally.
RemarkVDS:

Input voltage between the VDD pin and VSS pin (V1  V2  V3  V4  V5)

7. 0 V Battery charge function
Regarding how to charge a self-discharged battery (0 V battery), users are able to select either function mentioned
below.
(1) 0 V battery charge function "available"
A 0 V battery is charged when charger voltage is higher than V0CHA.
(2) 0 V battery charge function "unavailable"
A 0 V battery is not charged when the voltage of any of the batteries is V0INHn or lower.

18

CautionWhen the VDD pin voltage is lower than the minimum value of operation voltage between the VDD
pin and VSS pin (VDSOP), the S-8245B/D Series' operation is not assured.

Remark

V0CHA:
V0INHn:0 V battery charge starting charger voltage
0 V battery charge inhibition battery voltage n (n = 1 to 5)

Rev.1.4_00

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

8. SEL1 pin and SEL2 pin
Switching control for 3-serial to 5-serial cell is possible by inputting voltage to the SEL1 pin and the SEL2 pin.
Be sure to use the SEL1 pin and the SEL2 pin at the "H" or "L" level.
Table 10

Settings of SEL1 Pin and SEL2 Pin

SEL1 Pin
"L"
"L"
"H"
"H"
RemarkSEL2 Pin
"L"
"H"
"L"
"H"

Setting
5-serial cell
4-serial cell
3-serial cell
Setting inhibited"H" is the status when VSEL1  VSEL1H, VSEL2  VSEL2H, and "L" is the status when VSEL1 
VSEL1L, VSEL2  VSEL2L.
VSEL1H:VSEL2H:VSEL1L:VSEL2L:SEL1 pin voltage "H"
SEL2 pin voltage "H"
SEL1 pin voltage "L"
SEL2 pin voltage "L"

9. CTLC pin and CTLD pin
The CTLC pin controls the CO pin, and the CTLD pin controls the DO pin. Thus it is possible for users to control theCO pin and the DO pin respectively. These controls precede the battery protection circuit.
Table 11 Status Set by CTLC Pin
CTLC Pin
VSS level  CTLC pin voltage  VCTLC
VCTLC  CTLC pin voltage  VDD level
Remark

VCTLC:CO PinHigh impedance"H"

CTLC pin reverse voltage
Table 12 Status Set by CTLD Pin
CTLD Pin

VSS level  CTLD pin voltage  VCTLD
VCTLD  CTLD pin voltage  VDD level
RemarkVCTLD:DO Pin
VSS level"H"

CTLD pin reverse voltage

19

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

10. PSI pin
When the PSI pin is activated, the power-saving function starts to operate and most operations halt. In this case, theCO pin changes to high impedance, DO pin changes to the VSS level, and the PSO pin changes to the VDD level.
Table 13
PSI Pin
VPSI  PSI pin voltage  VDD level
VSS level  PSI pin voltage  VPSI
RemarkStatus Set by PSI Pin
CO Pin"H"
High impedance

DO Pin"H"
VSS level

PSO Pin
VSS level
VDD level

VPSI: PSI pin reverse voltage

The S-8245B/D Series is initialized and the power-saving function is released by deactivating the PSI pin. As a result,each detection operation is carried out after returning to the normal status.

11. Temperature detection
Serially connect an NTC and a low temperature-dependent resistor (RTH) between the VDD pin and the VREG pin,and then connect their middle point to the TH pin. It allows for temperature detection at four different points: hightemperature detection during charging, low temperature detection during charging, high temperature detection during
discharging, low temperature detection during discharging.
When the temperature rises, according to the NTC temperature characteristics, the resistance (RNTC) decreases, andthe ratio between RNTC and RTH changes, and then the TH pin voltage (VTH) increases.
When the temperature falls, according to the NTC temperature characteristics, the resistance (RNTC) increases, andthe ratio between RNTC and RTH changes, and then the TH pin voltage (VTH) decreases.
The temperature detection during charging and temperature detection during discharging switch by comparing the VM
pin voltage (VVM) and charge-discharge discriminating voltage (VCHG).
If the relation between RNTC, RTH, and VVM satisfies the itemized condition in Table 14 in each temperature detection,and each status continues for the temperature detection delay time (tTH) or longer, the CO pin changes to highimpedance, and the DO pin changes to the VSS level. This is the temperature protection status.
If the itemized condition in Table 14 is not satisfied in each temperature detection, and each status continues for tTH or
longer, the temperature protection status is released.
Table 14 Conditions for Each Temperature Detection
Item
High temperature detection during charging
Low temperature detection during charging
High temperature detection during discharging
Low temperature detection during discharging
Remark20

rTHCH:rTHCL:
rTHDH:rTHDL:TH PinrTHCH  RTH / (RNTC  RTH)
rTHCL  RTH / (RNTC  RTH)
rTHDH  RTH / (RNTC  RTH)
rTHDL  RTH / (RNTC  RTH)

High temperature detection ratio during charging
Low temperature detection ratio during charging
High temperature detection ratio during discharging
Low temperature detection ratio during discharging

VM PinVVM  VCHG
VVM  VCHG
VVM  VCHG
VVM  VCHG

CO PinDO PinHigh impedance

VSS level

Rev.1.4_00

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

The detection temperature can be set according to the NTC and RTH characteristics.
*1
For example, if RNTC and RTH (10 k) are connected to the S-8245BAA, each detection temperature is as follows.
Table 15
Item
Temperature for high temperature detection
during charging
Temperature for low temperature detection
during charging
Temperature for high temperature detection
during discharging
Temperature for low temperature detection
during discharging

Temperature Detection Ratio

RNTC

Detection Temperature

rTHCH = 0.670

4.9 k45C

rTHCL = 0.270

27.0 k0C

rTHDH = 0.795

2.6 k65C

rTHDL = 0.190

42.6 k10C*1. The calculation method for RNTC is as follows.
rTHCL = RTH / (RNTC  RTH)
RNTC = RTH / rTHCL  RTH= 10 k / 0.270  10 k= 27.0 k

RNTC [k]

When low temperature during charging is detected, RNTC = 27.0 k, so detection temperature = 0C according to
the RNTC characteristics shown in Figure 5.

200
180
160
140
120
100
80
60
40
20
0

RNTC = 10 k, Ta = 25C, B constant (25 / 85C) = 3434K

40

25

0

25
Ta [C]

50

75

85

Figure 5 Example of RNTC Characteristics
RemarkTemperature detection is carried out intermittently for 512 ms typ. per cycle, of which 1 ms typ. is thedetection operation period.
The VREG pin voltage is output only during detection operation. During other periods, the VREG pin is at
the VDD level.
Regarding details of intermittent operation, refer to "4. Temperature detection (High temperaturedetection during charging)" in " Timing Charts".

21

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

 Timing Charts
1. Overcharge detection, overdischarge detection
VCUn
VCLn
Battery voltage
VDUn
VDLn
(n = 1 to 5)
VDD
DO pin voltage
VSS
VCOH
CO pin voltage

High-Z

High-Z

Overcharge detection
delay time (tCU)

Overdischarge detection
delay time (tDL)

(1)

(1)

VEB

VDD
VDD  0.7 V typ.
VM pin voltage
VSS
VEB
Charger connection
Load connection*1

Status(With power-down function)(2)*1. (1) : Normal status(2) : Overcharge status(3) : Overdischarge status(4) : Power-down status
Figure 6

22

(3)

(4)

(1)

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

2. Discharge overcurrent detection
VHC

VCUn
VCLn
Battery voltage
VDUn
VDLn

VHD

(n = 1 to 5)
VDOH
DO pin voltage
VSS
VCOH
CO pin voltage
VEB
VDD
VM pin voltage
VSS
VDD
VSHORT
VINI pin voltage VDIOV2VDIOV1VSS
Load connection

Status*1

Discharge overcurrent 1
detection delay time (tDIOV1)(1)

Discharge overcurrent 2
detection delay time (tDIOV2)

(2)

(1)

(2)

Load short-circuiting
detection delay time (tSHORT)
(1)

(2)

(1)

*1. (1) : Normal status(2) : Discharge overcurrent status
Figure 7

23

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

3. Charge overcurrent detection
VHC

VCUn
VCLn
Battery voltage

VHD
VDUn
VDLn

(n = 1 to 5)
VDOH
DO pin voltage
VSS
VCOH
High-Z

CO pin voltage

High-Z

High-Z

VEBVDD
VM pin voltage
VSS
VEB

VINI pin voltage

VDD

VSS
VCIOV
Charger connection
Load connection
Charge overcurrent detection
delay time (tCIOV)*1

Status(With power-down function)

(4)

(3)

(1)

(2)

*1. (1) : Normal status(2) : Charge overcurrent status(3) : Overdischarge status(4) : Power-down status
Figure 824

Charge overcurrent detection
delay time (tCIOV)
(1)

(2)

(1)

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

4. Temperature detection (High temperature detection during charging)
VDD
VTHCH = (1  rTHCH)  VREG
TH pin voltage
VTHCL = (1 rTHCL)  VREG
VREG

VDOH
DO pin voltage

VSS
VCOH
CO pin voltage
High-ZVEB

VM pin voltage

VDD
VSS
VCHG
VEB

Charger connection

Status*1

(2)

(3)

(2)

(3)

Temperature detection delay time (tTH)
(3)
(2)
(3)
(2)
(2)
(1)

(3)

(2)
(4)

*1. (1) : Normal status(2) : Temperature detection sleep time(3) : Temperature detection awake time(4) : Temperature protection status
Figure 925

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

 Connection Examples of Battery Protection IC
1. S-8245B Series (5-serial cell with an integrated charge and discharge path)

EB
NTC
CTH

RTH

RVDD
RVC1
RVC2

CVDD
CVC1
CVC2

RVC3

CVC3

CVC5

RVC5

CCICT

VREG 24

2 VDD

PSI 23

3 VC1CTLD 22

4 VC2CTLC 21

5 VC3

VM 20

6 VC4

CVC4

RVC4

1 TH

RVINI

S-8245B

RPSI
RCTLD
RCTLC

CO 19

7 VC5

DO 18

8 VSS

PSO 17

9 VINI

CIT2 16

10 SEL1

CIT 15

11 SEL2

CDT 1412 CICT

CCT 13
RDO
CCCT

RCO

RVM

CCIT2
EB

CCDT CCIT
RSEL1 RSEL2RSENSE
Discharge control FET Charge control FET

Remark26

Regarding the recommended values for external components, refer to "Table 16
Components".
Figure 10

Constants for External

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

2. S-8245B Series (4-serial cell with an integrated charge and discharge path)

EB
NTC
CTH

RTH

RVDD

CVDD

RVC1

CVC1

RVC2

CVC2

RVC3

CVC3

2 VDD

PSI 23

3 VC1CTLD 22

4 VC2CTLC 21

5 VC3

VM 20

7 VC5

RVC5
RSEL2

CCICT

VREG 24

6 VC4

CVC4

RVC4

1 TH

RVINI

S-8245B

RPSI
RCTLD
RCTLC

CO 19
DO 18

8 VSS

PSO 17

9 VINI

CIT2 16

10 SEL1

CIT 15

11 SEL2

CDT 1412 CICT

CCT 13
RDO
CCCT

RCO

RVM

CCIT2
EB

CCDT CCIT
RSEL1RSENSE
Discharge control FET Charge control FET

RemarkRegarding the recommended values for external components, refer to "Table 16
Components".
Figure 11

Constants for External

27

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

3. S-8245B Series (3-serial cell with an integrated charge and discharge path)

EB
NTC
CTH

RTH

RVDD
RVC1
RVC2

CVDD
CVC1
CVC2

RVC3

CVC3

1 TH

VREG 24

2 VDD

PSI 23

3 VC1CTLD 22

4 VC2CTLC 21

5 VC3

VM 20

6 VC4

RVC4

7 VC5

RVC5
RSEL1

CCICT

RVINI

S-8245B

RPSI
RCTLD
RCTLC

CO 19
DO 18

8 VSS

PSO 17

9 VINI

CIT2 16

10 SEL1

CIT 15

11 SEL2

CDT 1412 CICT

CCT 13
RDO
CCCT

RCO

RVM

CCIT2
EB

CCDT CCIT
RSEL2RSENSE
Discharge control FET Charge control FET

Remark28

Regarding the recommended values for external components, refer to "Table 16
Components".
Figure 12

Constants for External

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

4. S-8245D Series (5-serial cell with separate charge and discharge paths)

EB
NTC
CTH

RTH

RVDD
RVC1
RVC2

CVDD
CVC1
CVC2

CVC5

RVC5

2 VDD

PSI 23

3 VC1CTLD 22

4 VC2CTLC 21

6 VC4

CVC4

RVC4

VREG 24

5 VC3

CVC3

RVC3

1 TH

CCICT

RVINI

7 VC5

RPSI
RCTLD

VM 20
S-8245D

REB

RCTLC

CO 19
DO 18

8 VSS

PSO 17

9 VINI

CIT2 16

10 SEL1

CIT 15

11 SEL2

CDT 1412 CICT

CCT 13

RVM
RDO

CCCT

CCIT2
CCDT CCIT

RSEL1 RSEL2

RemarkRSENSE

RCO
EB

Discharge control FET Charge control FET DISRegarding the recommended values for external components, refer to "Table 16
Components".
Figure 13

Constants for External

29

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

Table 16 Constants for External Components
SymbolRVDD*1
RVCn (n = 1 to 5)*1
RSEL1, RSEL2RVINIRCTLC, RCTLD, RPSI
RVM
RCO
RDO
REB
NTC
RTH
RSENSECVDD*1CVCn (n = 1 to 5)*1
CCCT
CCDT
CCIT
CCIT2
CCICT
CTH
D1
*1.

Typ.

Max.

Unit

68
0.68
1
1.0
1.0
1.0
1.0
1.0




0.68
0.068
0.01
0.01
0.01
0.01
0.01
0.1


100
1.00
1
1.0
2.0
5.1
5.1
5.1
10
10
10

1.00
0.100
0.10
0.10
0.10
0.10
0.10
0.1


100
1.00

5.1
5.1
5.1

20.0
10



10.00
1.000





0.1



k
k
k
k
k
M
k
M
k
k
m
F
F
F
F
F
F
F
F


RVDD  CVDD = 100 F   is recommended.
Set filter constants to satisfy RVC1  CVC1 = RVC2  CVC2 = RVC3  CVC3 = RVC4  CVC4 = RVC5  CVC5 = RVDD  CVDD.

Caution 1.
2.

3.

30

Min.

The above constants may be changed without notice.
Sufficient evaluation of transient power supply fluctuation and overcurrent protection function withthe actual application is needed to determine the proper constants when setting the filter constants
between the VDD pin and VSS pin. Contact our sales office if setting the constants between the
VDD pin and VSS pin to anything other than the recommended values.
It has not been confirmed whether the operation is normal or not in circuits other than theconnection examples. In addition, the connection examples and the constants do not guarantee
proper operation. Perform thorough evaluation using the actual application to set the constants.

Rev.1.4_00

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

 Precautions
 The application conditions for the input voltage, output voltage, and load current should not exceed the power
dissipation.
 Batteries can be connected in any order; however, there may be cases when discharging cannot be performed after abattery is connected. In this case, the S-8245B/D Series returns to the normal status when any of the following
conditions is satisfied.
(1) Connecting a charger(2) Shorting between the VM pin and the VSS pin(3) Changing the PSI pin voltage to be VDS 0 V  VDS
Remark VDS: Input voltage between the VDD pin and VSS pin (V1  V2  V3  V4  V5)
 If an overcharged battery and an overdischarged battery intermix, the S-8245B/D Series will change to the overcharge
and overdischarge statuses. Therefore, in this case, both charging and discharging are impossible.
 Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
 ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.

31

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

 Characteristics (Typical Data)
1.

Current consumption
1. 1 IOPE vs. VDS

1. 2 IOPE vs. Ta

40

30

30
IOPE [A]

IOPE [A]

Ta = 25C

40

20
10

20
10
0

0
0

5

10

15
20
VDS [V]2530

1. 3 IPDN vs. VDS

VDS = 17.5 V

40 25025Ta [C]

1.0

0.8

0.8

IPDN [A]

IPDN [A]

VDS = 7.5 V

1.0

0.6
0.4

0.6
0.4
0.2

0.2

0.0

0.0
0

5

10

15
20
VDS [V]2530

1. 5 IPSV vs. VDS40 25025Ta [C]50

75 85

1. 6 IPSV vs. Ta
Ta = 25C

0.5

0.5

0.4

0.4

IPSV [A]

IPSV [A]

75 85

1. 4 IPDN vs. Ta
Ta = 25C

0.3
0.2

VDS = 17.5 V

0.3
0.2
0.1

0.1

0.0

0.0
0

32

50

5

10

15
20
VDS [V]2530

40 25025Ta [C]50

75 85

Rev.1.4_00
2.

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Detection voltage, release voltage

S-8245BAA
4.12

S-8245BAA
4.100

4.11

4.075

VCL [V]

2. 2

VCU [V]2. 1 VCU vs. Ta

4.10
4.09
4.08

VCL vs. Ta

4.050
4.025

40 25

4.000

0

25
Ta [C]5075 85

40 25

S-8245BAA
2.68

S-8245BAA
2.80

2.64

2.75
VDU [V]

2. 4

VDL [V]2. 3 VDL vs. Ta

2.60

0

25
Ta [C]

50

75 85

2. 6
VDS = 17.5 V

025
Ta [C]

50

75 85

VDIOV2 vs. Ta

S-8245BAA
0.055

VDIOV2 [V]VDIOV1 [V]40 25

VDS = 17.5 V

0.050

0.025
0.020
0.015

0.045
0.040
0.035
0.030

40 25

0.025
0

25
Ta [C]50

75 85

2. 7 VSHORT vs. Ta

2. 8
VDS = 17.5 V

S-8245BAA
0.150

0.125
0.100
0.075
40 25

25
Ta [C]

50

75 85

0

25
Ta [C]50

75 85

VCIOV vs. Ta
VDS = 17.5 V

0.015
0.0200.025
0.030040 25

S-8245BAA
0.010VCIOV [V]VSHORT [V]75 85

VDU vs. Ta

2.60
40 25

S-8245BAA
0.030

0.050

50

2.65

2. 5 VDIOV1 vs. Ta

0.010

25
Ta [C]

2.70

2.56
2.52

0

40 25025Ta [C]

50

75 85

33

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series
3.

Delay time function
3. 1 RCCT vs. Ta

3. 2
VDS = 19 V

12

VDS = 19 V

13.5

8
4
0

VCCT vs. Ta

14.0

VCCT [V]

RCCT [M]

16

13.0
12.5

40 2512.0
025Ta [C]50

75 85

3. 3 RCDT vs. Ta

3. 4

40 25025Ta [C]VDS = 15.5 V

VCDT [V]

RCDT [k]

11

1000
750
500

40 2580

25Ta [C]50

75 85

3. 5 RCIT vs. Ta

3. 6
VDS = 17.5 V

1500

VCIT [V]

RCIT [k]

025
Ta [C]

50

75 85

VCIT vs. Ta
VDS = 17.5 V

13

1000
750
500

12
11

250
40 25100

25Ta [C]50

75 85

3. 7 RCIT2 vs. Ta

3. 8
VDS = 17.5 V

300

40 25025Ta [C]50

75 85

VCIT2 vs. Ta
VDS = 17.5 V

14

250

13

200

VCIT2 [V]RCIT2 [k]

40 25

14

1250

150
100

12
11

50
0

10
9

250

0

75 85

12

1250

0

50

VCDT vs. Ta

VDS = 15.5 V

1500

34

Rev.1.4_00

40 25100

25Ta [C]5075 85

40 25025Ta [C]50

75 85

Rev.1.4_00

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

3. 9 RCICT vs. Ta

3. 10 VCICT vs. Ta
VDS = 17.5 V

300

13

200

VCICT [V]

RCICT [k]

250
150
100
50
0

VDS = 17.5 V

1440 25

12
11
10

0

25
Ta [C]5075 85

40 25025Ta [C]50

75 85

3. 11 tSHORT vs. Ta
VDS = 17.5 V

tSHORT [s]

340
320
300
280
260

40 25025Ta [C]

50

75 85

35

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series
4.

Rev.1.4_00

Output pin
4. 1 ICOH vs. VDS

4. 2 ICOL vs. VDS
Ta = 25C

0.10

1200

0.08
ICOL [A]

ICOH [A]

Ta = 25C

1600

800
400

0.06
0.04
0.02

0

0.00
0

5

10

15
20
VDS [V]25

30

4. 3 IDOH vs. VDS

0

5

10

15
20
VDS [V]Ta = 25C

2500

5000

2000

4000

IDOL [A]

IDOH [A]

Ta = 25C

3000
2000
0
5

10

15
20
VDS [V]25

30

4. 5 IPSOH vs. VDS

0

5

10

15
20
VDS [V]25

30

4. 6 IPSOL vs. VDS
Ta = 25C

10

Ta = 25C

10

8

8
IPSOL [A]

IPSOH [A]

1000

0
0

6
4
2

6
4
2
0

0
0

5

10

15
20
VDS [V]25

030

4. 7 VCOH vs. Ta

4. 8
VDS = 17.5 V

15

5

10

15
20
VDS [V]

25

30

VDOH vs. Ta
VDS = 17.5 V

15
14
VDOH [V]14
VCOH [V]

1500

500

1000

13
12

36

30

4. 4 IDOL vs. VDS

6000

11

25

13
12

40 25110

25Ta [C]5075 85

40 25025Ta [C]50

75 85

Rev.1.4_00
5.

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Temperature detection function
5. 1 rTHCH vs. Ta

5. 2 rTHCL vs. Ta
VDS = 17.5 V

0.8

0.8

0.6

0.6

0.4
0.2
0.0

VDS = 17.5 V

1.0

rTHCL

rTHCH

1.0

0.4
0.2

40 250.0025Ta [C]50

75 85

5. 3 rTHDH vs. Ta40 25025Ta [C]VDS = 17.5 V

1.0

0.8

0.8

0.6

0.6

rTHDL

rTHDH

VDS = 17.5 V

0.4
0.2
40 250.0025Ta [C]

50

75 85

5. 6
VDS = 17.5 V

6.0

40 25025Ta [C]

50

75 85

VCHG vs. Ta
VDS = 17.5 V

0.0100.015
VCHG [V]5.5
VREG [V]0.4
0.2

5. 5 VREG vs. Ta

5.0
4.5
4.0

75 85

5. 4 rTHDL vs. Ta

1.0

0.0

50

40 25

0.0200.025
0.030025Ta [C]5075 85

40 25025Ta [C]50

75 85

5. 7 tTH vs. Ta
VDS = 17.5 V

3.0tTH [s]

2.5
2.0
1.5
1.0

40 25025Ta [C]

50

75 85

37

BATTERY PROTECTION IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8245B/D Series

Rev.1.4_00

 Power Dissipation
24-Pin SSOP
Tj = 125C max.

2.0
Power dissipation (PD) [W]

B
1.5
A
1.0

0.5

0.0

0

25

50

75

100

125

150

175

Ambient temperature (Ta) [C]
Board
A
B
C
D
E

38

Power Dissipation (PD)
1.43 W
1.67 W

24-Pin SSOP Test Board(1) Board A

IC Mount Area
Item
Size [mm]Material
Number of copper foil layer

Copper foil layer [mm]

1
2
3
4

Thermal via

Specification
114.3 x 76.2 x t1.6
FR-4
2Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.070-(2) Board B
Item
Size [mm]Material
Number of copper foil layer

Copper foil layer [mm]Thermal via

1
2
3
4

Specification
114.3 x 76.2 x t1.6
FR-4
4Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070-

No. SSOP24-A-Board-SD-1.0

ABLIC Inc.

7.9±0.2
24

13

1

12

+0.1

0.65

0.15 -0.05

0.22±0.1

No. FS024-B-P-SD-1.0

TITLE

SSOP24-B-PKG Dimensions
FS024-B-P-SD-1.0

No.
ANGLE
UNIT

mm

ABLIC Inc.

+0.1

ø1.5 -0

2.0±0.1

4.0±0.1

1.5±0.05+0.1

12.0±0.1

0.3±0.05

ø1.5 -08.15±0.1

1

24

12

13

Feed direction

No. FS024-B-C-SD-1.0

TITLE

SSOP24-B-C a r r i e r T a p e

No.

FS024-B-C-SD-1.0

ANGLE
UNIT

mm

ABLIC Inc.

60°

17.4±1.0
21.4±1.0

Enlarged drawing in the central part
ø21±0.82±0.5
ø13±0.2

No. FS024-B-R-SD-1.0

TITLE

SSOP24-B-ReelNo.

FS024-B-R-SD-1.0
QTY.

ANGLE
UNIT

mm

ABLIC Inc.

3000

Disclaimers (Handling Precautions)1.

All the information described herein (product data, specifications, figures, tables, programs, algorithms andapplication circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.

2.

The circuit examples and the usages described herein are for reference only, and do not guarantee the success ofany specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any otherright due to the use of the information described herein.

3.

ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information describedherein.

4.

Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due tothe use of the products outside their specified ranges.

5.

Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.

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The products are strictly prohibited from using, providing or exporting for the purposes of the development of
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8.

The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
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ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.

9.

In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products areallowed to apply for the system on customer's own responsibility.

10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
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12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of thisdocument described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
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the English language and the Chinese language, shall be controlling.
2.4-2019.07

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