Converter Loss Evaluation of Flyback Converter Applying Power
Decoupling Capability with ZVS operation
Hiroki Watanabe1, Jun-ichi Itoh1, Shinichiro Nagai2, Naoki Koike2
1
2

Nagaoka University of Technology, Japan
Pony Electric Co. Ltd, Japan

Corresponding author: Hiroki Watanabe, hwatanabe@vos.nagaokaut.ac.jp
The Power Point Presentation will be available after the conference.

Abstract
In this paper, the converter loss analysis of a fly-back converter with an active power decoupling capability
is discussed. The proposed fly-back converter achieves the double-line frequency power ripplecompensation using small capacitor without the additional components and the complicate control.
Furthermore, the fly-back converter is operated under the Zero Voltage Switching (ZVS) by the quasiresonance (QR) control based on the Boundary Current Mode (BCM). In this paper, the converter loss
analysis of the proposed converter focusing on the conduction loss is demonstrated by the mathematicalformula. As an experimental result, the constant input power is obtained by small DC-link capacitor of 30 F
when the output power is the 300 W. In addition, the 96.0% of the maximum efficiency is obtained including
fly-back converter and the voltage source inverter. Finally, it is confirmed that the calculation value of the
conduction loss is approximately matched to the simulation result.

1. Introduction
Recently, a photovoltaic systems (PVs) are actively
researched as a sustainable power solution due tothe attractive characteristics such as; flexibility, highsystem efficiency, and low manufacturing cost. The
utilization of the micro-inverters promisingly becomea trend for the future PV system instead of usinglarge capacity inverters [1]-[4]. In particular, themicro-inverter with the high reliability is required
because a large number of converter units are
adopted to the PV generation system. However, inthe conventional PV system, the electrolytic
capacitors are usually employed owing to therequirement of the large capacitance. These
capacitor limits the life-time of the converter, which
results in low reliability.
In the converter topologies for the micro-inverter, thefly-back converter has been studying for following
advantages; (i) Simple configuration and low
manufacture cost, (ii) galvanic isolation, (iii) highvoltage boost-up, and (IV) small volume. In this case,the configuration with the fly-back converter and theunfolding bridge is the center of attention because
the unfolding bridge is switched at the line-frequency
and the switching loss can be reduced drastically incomparison with that of two-stage isolated DC/AC
converter.
However, the large electrolytic capacitor is requiredin order to compensate the double-line frequency
power ripple owing to single-phase AC grid. As aresult, the life-time of the converter is limited due tothe large buffer capacitor, which results in low
reliability.
In order to solve this problem, the active power
decoupling topologies for electrolytic capacitor-lessconverters have been researched actively [5]-[6].
The active power decoupling can reduce thecapacitance for the double-line frequency power
ripple compensation, which enables to use of film or
ceramic capacitors instead of the electrolytic
capacitor. However, the additional components suchas the switching device and the passive components
are required. Although the low cost is the one of theadvantages of the fly-back micro-inverter, thesecomponents increase complexity of the circuit
configuration and the cost.
The authors have been proposed fly-back converter
applying active power decoupling capability without
additional components and complicate control [7].
However, the detail of the loss analysis does notconsidered on previous study.

In this paper, the conduction loss of the low voltage
side MOSFETs are clarified mathematically.
Furthermore, the new power decoupling method toensure compatibility with the Quasi-Resonancecontrol (QR control) is proposed in order to improvethe conversion efficiency.
This paper is organized as follows; first, theconfiguration of the conventional micro-inverter with
fly-back converter is explained. Next, the proposed
converter and a control block diagram are described.
After that, the operation mode of the fly-backconverter is considered focus on the power
decoupling. In addition, the conduction losses of the
fly-back converter is considered based on the loss
expression. Finally, the experimental result and aredemonstrated in order to confirm the validity of the
proposed power decoupling control.

Snubber cir.

H.F.
transformer

Cbuf+

Large capacitor is necessary for
power decoupling

Fig. 1: Typical configuration of micro inverter.
Auxiliary circuit

Cbuf
Capd

2. Conventional fly-back microinverter topology
Figure 1 shows the typical configuration for the
micro-inverter topology with a fly-back converter.
The primary side switch is switched at the highfrequency in order to reduce the volume of thetransformer. In this control, the duty command isadjusted to obtain the full-wave rectification
waveform in synchronized with the grid voltage.
After that, the secondary switches are switched at
the half cycle of the grid frequency.
Strong advantages of this configuration is a small
number of the main circuit components. However,the bulky electrolytic capacitor Cbuf is necessary on
the primary side of the transformer because thedouble-line frequency power ripple comes from thesingle-phase AC grid.
Figure 2 shows the fly-back converter with theconventional active power decoupling circuit [8]. In
order to reduce the capacitance of Cbuf, the small
buffer capacitor Capd and the auxiliary circuit areadded on the transformer secondary side. In thiscase, the Capd is charged and discharged insynchronized with the double-line frequency power
ripple. As a result, the DC side capacitor Cbuf
becomes small. However, these additional
components complex the circuit configuration. In
addition, the manufacturing cost will be increased by
the additional component for active power
decoupling.

3. Proposed converter and control
methodCbuf : small

U.F

U.F

Fig. 2: Fly-back converter with conventional active
power decoupling circuit.

3.1 Proposed converter
Figure 3 shows the proposed converter which
consists of the fly-back converter, synchronousrectifier, and the voltage source inverter (VSI) andthe small buffer capacitor Cbuf. The fly-backconverter isolates between the PV and the singlephase grid, and boosts the input voltage. After that,
PV panel is connected to the single-phase grid by
the VSI. In the proposed converter, the double-line
frequency power ripple is compensated by the Cbuf,
and the additional components such as theswitching device and the passive components does
not require in order to achieve the power decoupling.
In the proposed converter, the active clamp circuit
is applied in order to reduce the snubber loss. The
leakage energy of the transformer is absorbed by thesmall snubber capacitor Cclamp. The clamp switch
Sclamp is operated under the ZVS condition because
the parasitic capacitor of Sclamp is discharged during
the dead time between the main switch S1 and Sclamp.
Sclamp and the Synchronous rectifier Srec are switchedduring the discharge of the magnetizing current.

3.2 Principle of power decoupling

Small decoupling capacitor

N1:N2

Figure 4 shows the principle of the power decoupling
between the DC and single-phase AC sides. Whenboth the output voltage and current waveforms are
sinusoidal, the instantaneous output power pout isexpressed as

pout 

Vacp I acp
2Cclamp

Srec
Vdc

SclampCbuf

S1
Fly-back converter(1  cos 2t )(1)where Vacp is the peak voltage, Iacp is the peak current,and  is the angular frequency of the output voltage.
From (1), the power ripple that contains double-line
frequency of the power grid, appears at DC link.
In order to absorb the power ripple, theinstantaneous power pbuf should be controlled by

Fig. 3: Proposed fly-back converter. Double-line
frequency power ripple is compensated by
DC-link capacitor Cbuf.
vCbuf

Vin

t

0

t

0

t

0

igrid

＋

(2)
t

0



(3)

3.3 Operation mode of fly-back converter
Figure 5 shows the operation modes of the fly-backconverter. The detail of each mode are described in
the following.
Mode 1:
In mode 1, the main switch S1 is turned-on, and theactive clamp switch Sclamp is remaining off-state. The
DC input voltage is applied to the transformer andeach energy storage. The magnetizing current
linearly increases until the end of the mode 1, andthe energy is stored both leakage inductance andmagnetizing inductance.
Mode 2: (dead-time):
This mode starts when the main switch S1 is turnedoff. In this mode, the energy of the leakage
inductance Lleak is transferred to the parasitic
capacitor Cds_s1. In this mode, the synchronousrectifier switch Srec and the parallel diode of Srec isremaining off-state. Thus, the primary side
composes the series resonance circuit with Lm, Lleak

pbuf

pin

Input powerpin [W]t0

Buffer powerpbuf [W]

t

0

pgrid

chargedischarge

t

0

t

0

＝

where the polarity of the pbuf, is defined as positive
when the buffer capacitor Cbuf discharges. Note thatthe active power of Cbuf should be zero. Owing to thepower decoupling capability, the input power ismatched to the output power. Thus, the relationshipbetween the input and output power is expressed as1pin  Vacp I acp  VPV I PV 
2

vgrid

ibuf

Iin

1
pbuf  Vacp I acp cos 2t
2

VSI

0

t

Output power
pout [W]Fig. 4: Principle of power decoupling between DC
and single-phase AC.

and Cds_s1. Note that Cds_s1 is very small, and it ischarged quickly.
When the charge of Cds_s1 is completed, the freewheeling diode of Sclamp and Srec are turned-on. In
this period, the parasitic capacitor of Sclamp and Srec
are fully discharged.
Mode 3:This mode starts when Srec and Sclamp is turned-on.
The period of this interval is set to the energy release
period of the magnetizing inductance, and it isexpressed as
Tdis 

NVin
Ton 
Vdc



(4)

where Ipeak is the magnetizing peak current, N is theturn ratio of the transformer, Lm is the magnetizing
inductance, and the Vdc is the DC link voltage. Sclamp

Lleak

Lleak

Lleak

Lm

Lm

Lm

isclamp

isclamp

Sclamp

S1
(ZVS)
id_s1

Cds_s1Mode 1Mode 2

Lleak

id_srec

Lm

Srec
(ZVS)

This state includes dischargeof Cds on Sclamp and Srec

Lleak

Lleak

Lm

Lm

isclamp
Sclamp(ZVS)
Cds_s1
Discharge of Cds_s1

Mode 3Mode 4

Fig. 5: Operation mode of fly-back converter.

and Srec achieve the ZVS because the parasitic
capacitors are already discharged in mode 2.
Mode 4: (dead-time)
In this mode, the parasitic capacitor of S1 isdischarged utilizing the resonance between themagnetizing inductance and the Cds_s1. When the flyback converter is operated under the discontinuousmode (DCM), the resonance voltage occurs during
the zero current period. The QR-control
synchronizes the turn-on timing to the resonancevoltage by the Pulse Frequency Modulation (PFM).
In this case, the Cds_s1 is discharged due to theresonance current. As the result, the ZVS is obtainedat mode1.

3.4 Power decoupling control
3.4.1 Conventional power decoupling withDCM
In this chapter, the problem of the conventional
power decoupling using DCM condition, and the
proposed power decoupling control is demonstrated.
Firstly, the average primary current on DCM isexpressed as
I ave _ DCM 

I peak 

I peak
Don
2

Vin
DonTsw 
Lm



(5)



(6)

where Vin is the PV input voltage, Lm is themagnetizing inductance, Don is the on-duty of S1, Tsw
is the switching period. In the DCM operation, theprimary average current is decided from the primaryside parameter only from (6). Note that, in this power
decoupling method, Don and the switching frequency
is always set to constant value in order to keep theconstant average current. This control method isvery simple for the power decoupling operation.
However, the conduction losses becomes large incomparison with the CCM and BCM. In addition, thehard switching condition exist due to the resonancevoltage during the zero current period. Therefore, it
is difficult to keep the high efficiency in the wide load
range. The authors proposed the ZVS operation
using synchronous rectifier in [8]. However, it is notenough to improve the conversion efficiency
because the large current still occurs by DCM.

3.4.2 Proposed power decoupling with QRcontrol
The QR-operation is the good solution in order toimprove the conversion efficiency of the fly-backconverter. In this method, the main switch S1 isswitched under the ZVS condition using the bottom
resonance voltage. In addition, the conduction
losses is reduced by BCM. However, the power
decoupling capability becomes incompletion due tothe DC-link voltage fluctuation.

Figure 6 shows the magnetizing current waveform
and the DC link voltage under the Boundary Current
Mode (BCM). In the DC to single-phase AC
application, the DC-link voltage is fluctuated at the
double-line frequency due to the single-phase power
ripple when the small DC-link capacitor is installed
as shown in Fig.7. The BCM is achieved by the
Pulse Frequency Modulation (PFM), and the turnedon timing of the main switch S1 is synchronized to
the neighborhood of the zero of the magnetizing
current.
The On-state of the main switch Ton is provided
directly from the controller, and the peak current of
the magnetizing current is obtained from (6).
The average current Iave_BCM is also obtained from (5)and (6). However, the switching period Tsw ischanged due to the DC-link voltage fluctuation.
Iave_BCM is expressed as
I ave _ BCM 

2

VinTon f sw 
2 Lm



(7)

where fsw is the switching frequency. Note that, therelationship between Ton and the off- state Toff haveto satisfy following condition under BCM conditionf sw 

1
Ton  Toff



(8).

Note that, Toff is obtained from (4). Finally, Iave_BCM isdecided as
I ave _ BCM VinNVin 
2 Lm 1 

Vdc 


Vdc_ave

Vdc_minB
t
Magnetizing current

A

ILm

t
Ton

Toff

Ton 

t
T
is
difference
off
Ton
Toff
between A and B
Fig. 6: Waveforms of magnetizing current when DClink voltage is fluctuated due to the singlephase power ripple.

where Vdc_ave is the average voltage of the DC-link
voltage, Vdc_det is the detection value of Vdc, Vin_det isthe detection value of Vin. In the proposed method,Ton fluctuates at the double-line frequency to cancel
the fluctuation of the Iave_BCM. Finally, the Ton with thepower decoupling is obtained as

Vdc _ det Vdc _ ave  NVin _ det 



(11).

(9).

Note that, Vdc_ave is used from the voltage command
value of the voltage control on the VSI.

Figure 7 shows the control block diagram of the flyback converter. In this paper, the power decoupling
control with QR-operation is proposed. The
proposed method adjust the Ton to keep the constantaverage current of Iave_BCM. In order to decide thecompensation value for power decoupling, thefluctuation ratio  is defined, and  is expressed as
Vdc _ ave Vdc _ det  NVin _ det  Magnetizing current
ILm

B

Ton _ decoupling  Ton 

According to (9), Iave_BCM does not become theconstant value when the DC-link voltage isfluctuated at the double-line frequency.

DC link voltage
Vdc_peakA(10)

The gate signals of active clamp MOSFET Sclamp andthe synchronous rectifier Srec are generated from the
Off-state calculation which means discharge periodof the magnetizing inductance. In order to avoid theshort circuit between S1 and Sclamp, the turned-on
timing is delayed based on the delay time Tdead.
The QR-control achieves ZVS using the resonancebetween the self-inductance and the parasitic
capacitor of S1. The resonance period Tres isexpressed as
Tres  2 Lleak  Lm  Cds 



(12).

This resonance states when the Sclamp and Srec areturned-off, and the drain-source voltage Vds_S1 isdecreased. In order to adjust the turned-on timing of
S1 to the bottom of the resonance voltage, turned-onof S1 is started before the delay time Tdelay. Tdelay is
set to the half of the resonance period of Tres, and it
is expressed asT 
Tdelay  res2

On state cal.
Eq. (11)

Vgs_Sclamp
Vgs_SrecDetection(13)

Fig. 7: Control block diagram of fly-back converter.
Mode1

(14)

where Ron is the on-resistor, Irms is the effective
current of the MOSFET.
The effective current of S1 is calculated easily, andthe effective current Irms_S1 is expressed as

3

2

4

vgs_s1
vgs_sclamp
Ton

Figure 8 shows the each waveforms of the fly-backconverter. The ZVS is the important operation inorder to improve the conversion efficiency. The
proposed fly-back converter is operated using QR
control based on the PFM. The QR control utilizes
the resonance between the magnetizing inductance
Lm and the parasitic capacitor of S1 during the zerocurrent period.
The MOSFET of the active clamp Sclamp and the Srec
are switched during the discharge period of themagnetizing inductance. Note that, both switch arealso active ZVS because the drain current isconducted from the source side. That meansdischarge of the parasitic capacitor of each
MOSFETs. Therefore, the all switches of the flyback converter is switched under the ZVS condition.
In the proposed converter, the loss reduction of the
fly-back converter including the transformer isimportant in order to achieve the high efficiency. In
this paper, the conduction losses of the primary side
MOSFETs are evaluated by the loss formula
because the all MOSFET of the fly-back converter
achieves ZVS. Especially, the primary side has thelarge current due to the low voltage input from thePVs. Each conduction losses are expressed as*Off state cal. Toff
Eq. (4)vin
vdc

4. Converter loss calculation



Vgs_S1
PFM

note that the resonance frequency is fluctuated dueto the junction temperature condition because theparasitic capacitance depends on the temperature
condition.

Pcond  Ron I rms 2

Ton*

vgs_srec

Toff
Tdead
Resonance is started

TdelayZVS

vds_s1
ZVS

vds_sclamp
iLm
i_s1
isclamp
t0

t3 t4

t1 t2

Fig. 8: Key waveforms of fly-back converter. Main
switch S1 achieves ZVS by QR-control. Active
clamp switch Sclamp and synchronous rectifier
Srec also achieve ZVS.

I rms _ S1  I peak

Don 
3



(15)

where Ipeak is the peak current of the magnetizing
current, Don is the on duty of S1. In fact, the initial
current should be considered because the small
negative current for ZVS occurs before the turnedon of S1.
The effective current of Sclamp is calculated from the
LCR equivalent circuit, and the effective current
Irms_Sclamp corresponds to the transient current
waveform of the LCR circuit. Irms_Sclamp and angularfrequency are expressed as

e

Ron
t
2 LleakN Vcclamp ( t 2)  0.5 I ( t 2) Ron   Vdcsin t  I ( t 2) cos t 
N  Lleak








(16)

 R 

  on 
Cclamp Lleak  2 Lleak 
1

2

(17)

where I(t2) is initial drain current, Vcclamp(t2) is the initial
voltage of the clamp capacitor. According to (16) and(17), the Irms_Sclamp is expressed as

I sclamp _ rms 

1 t 3 t 2
2
 iSclamp (t ) dt
Tsw 0

0.8
Calculation

0.6

Sim.

0.4
0.2
0
0

250

300

Cclamp : 10F

1.0

Loss is reduced by 38%
when Cclamp is set from 10F to 50F.

Cclamp : 20F
0.8

Cclamp : 30F
Cclamp : 50F

0.6

Calculation

0.4
Sim.

0.2
0
0

50

100

150
200
Output power [W]250

Fig. 10: Conduction loss evaluation result of active
clamp switch Sclamp.
Table.1: Experimental parameter.
Symbol
Vin
Pin
Lm
Lleak
Coss
Cclamp
Cbuf
Vac
fac

5. Experimental result
Table. 1 shows the experimental parameters. This
chapter presents experimental results using 300 W
prototype drawn in Figure 3 to confirm the active
power decoupling operation. Note that, the DC-link
voltage control and inverter output current control areapplied to the VSI. The decoupling capacitor isselected to 30F in order to apply the small film
capacitor.
Figure 11 shows the input and output waveforms.
According to Figure 11(a), the input current
fluctuates at the double-line frequency due to the DC
link voltage fluctuation. On the other hand, according
to figure 11(b), the Input current is regulated under
the constant value by the proposed power
decoupling control. In addition, the sinusoidal
inverter output current with low THD is obtained.
Figure 12 shows the input current harmonics
analysis result. According to Figure12, the second

100
150
200
Output power [W]

1.2

(18)

Figure 9 and 10 show the calculation result of the
conduction loss of S1 and Sclamp. The calculation
result and the simulation result are approximately
matched within 5% error. The reason of this error isthe mismatch of the initial current condition between
calculation result and the simulation result. In thecalculation result, the bottom value of themagnetizing current is set to zero. On the other hand,in the simulation result, the small negative current
occurs due to the QR-operation. In this paper, theparasitic capacitor of Srec does not be considered forsimplification. In fact, the initial current of Isclamp isdecreased due to the parasitic capacitor current
when the synchronous rectifier is applied.

50

Fig. 9: Conduction loss evaluation result of Main
switch S1.

Conduction loss of Sclamp [W]Conduction loss of S1 [W]

1.0

iSclamp (t ) Quantity

value

Input voltage
Input power
Magnetizing inductance
Leakage inductanceParasitic capacitor of S1
Clamp capacitor
Decoupling capacitor (DC link cap.)
Grid voltage
Grid frequency

50 V
300 W
11 H
250 nH
1100 pF
20 F
30 F
200 Vrms
50 Hz

Input current Iin 2 [A/div]

DC link capacitor voltage vdc 200 [V/div]0

Grid voltage vac 200 [V/div]000Inverter output current iac 2 [A/div](a) Without power decoupling

4 [ms/div]

300

Conclusion
This paper described the power loss analysis of the
fly-back converter applying the power decoupling
capability and the ZVS operation. As the result, it was
confirmed that the error rate between the calculationand the simulation result is less than 5%. From theexperimental result, the second order harmonics of
100 Hz is reduced by 70.3% by the proposed power
decoupling. Finally, the maximum efficiency
including the fly-back converter and VSI reach to96.0% when the output power is 150 W.
In the future work, the transformer design will beconsidered in order to improve the conversion
efficiency.

Input current Iin 2 [A/div]

DC link capacitor voltage vdc 200 [V/div]0

Grid voltage vac 200 [V/div]000(b) With power decoupling
Fig. 11: Experimental result.
10
Fundamental frequency : 50 Hz
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0.1

Without proposed control
With proposed control

0.01

0.0001DC

1

2
3(100 Hz)

4
5
6
Harmonic order

7

8

9

10

Fig. 12: Harmonic analysis result.
100

VSI

98

Flyback
converter

Efficiency [%]Reference

Second order harmonics is
reduced by 70.3%

0.001

Acknowledgment
This study was supported by New Energy andIndustrial Technology Development Organization(NEDO) of Japan.

4 [ms/div]

Inverter output current iac 2 [A/div]

Input current [A]order harmonics of 100 Hz is reduced by 70.3% by
the power decoupling control. From this result, thepower decoupling operation with 30F is confirmedby experiment.
Figure 13 shows the efficiency characteristics of the
proposed converter with R-L load. According to
Figure 13, the maximum efficiency including the flyback converter and VSI reach to 96.0% when the
output power is 150 W. Especially, the fly-backconverter achieves maximum efficiency of 96.8%
due to the ZVS operation.

96
96.0%

DC/AC

94
92
90

50

70

90

110
130
150
Output power [W]

170

190

210

Fig. 13: Efficiency curves with R-L load condition.
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