PC104-DAC06
User’s Manual

Revision 4A
January, 2001

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HM PC104-DAC06.lwp

Table of Contents
1.0 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.0 SOFTWARE INSTALLATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3.0 HARDWARE INSTALLATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3.1 BASE ADDRESS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3.2 SIMULTANEOUS UPDATE JUMPER . . . . . . . . . . . . . . . . . . . . . . 3
3.3 ANALOG OUTPUT RANGE JUMPER . . . . . . . . . . . . . . . . . . . . . . 4
3.4 OUTPUT TRANSFER FUNCTIONS . . . . . . . . . . . . . . . . . . . . . . . 43.5 CABLING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.6 SIGNAL CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.7 CONNECTOR DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64.0 CONTROL & DATA REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . 75.0 SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

This page intentionally left blank.

1.0 INTRODUCTION
The PC104-DAC06 is a six-channel analog output board. The analog outputs aredual-DAC AD7237s with each output buffered. The PC104-DAC06 is compatible
with the CIO-DAC16 but has only six channels. Software designed for the DAC16
and DDA-06 will operate the analog outputs correctly.
The analog outputs are controlled by writing a digital control word (two bytes) to theDAC's control register. The control register is double buffered so the DAC's output is
not updated until both bytes (first low byte, then high byte) have been written to theregister.
The analog outputs may also be set for simultaneous update in groups of two, four or
all six. Analog outputs are grouped as 0&1, 2&3, 4&5. By selecting XFER on thejumper below the DAC, each pair may be set for simultaneous update.
When a DAC pair is set for simultaneous update, writing new digital values to theDAC's control register does not cause an update of the DAC's voltage output. Updateof the output occurs only after a READ from the board's valid addresses (any addressbase + 0 through base + 11).
In this way, the PC104-DAC06 may be set to hold new values until all channels areloaded, then update any two, four or all six channels simultaneously. This is a very
useful feature for multi-axis motor control.
The PC104-DAC06 has six sets of gain jumpers, one base address switch and threesimultaneous update jumpers.

2.0 SOFTWARE INSTALLATIONThe board has a variety of switches and jumpers to set before installing the board inyour computer. By far the simplest way to configure your board is to use theInstaCalTM program provided as part of your software package. InstaCalTM will show
you all available options, how to configure the various switches and jumpers to matchyour application requirements, and will create a configuration file that yourapplication software (and the Universal Library) will refer to so the software you use
will automatically know the exact configuration of the board.
Please refer to the Software Installation Manual regarding the installation andoperation of InstaCalTM. The following hard copy information is provided as a matter1

of completeness, and will allow you to set the hardware configuration of the board ifyou do not have immediate access to InstaCalTM and/or your computer.

3.0 HARDWARE INSTALLATION
Several switch and jumper settings must be made before the PC104-DAC06 is
installed into the computer. There are six jumper blocks for setting the gain of eachchannel, a simultaneous update jumper for each pair of channels and a base addressswitch.

3.1 BASE ADDRESSThe switches on your base address switch are set at the factory to address 300 hex(768 decimal) as shown in Figure 3-1. Unless there is already a board in your systemusing address 300h (768 decimal), we suggest leaving the switches as they are set atthe factory..

Figure 3-1. Base Address Switches
Certain address are used by the PC, others are free and may be used by thePC104-DAC06 and other expansion boards.

2HEX
RANGE
000-00F
020-021040-043060-063060-064070-071080-08F
0A0-0A1
0A0-0AF0C0-0DF
0F0-0FF
1F0-1FF
200-20F
210-21F
238-23B
23C-23F
270-27F
2B0-2BF

Table 3-1. PC I/O Addresses
FUNCTIONHEXRANGE
8237 DMA #1
2C0-2CF8259 PIC #1
2D0-2DF
8253 TIMER
2E0-2E78255 PPI (XT)
2E8-2EF
8742 CONTROLLER (AT)
2F8-2FFCMOS RAM & NMI MASK (AT)
300-30FDMA PAGE REGISTERS
310-31F
8259 PIC #2 (AT)320-32FNMI MASK (XT)378-37F
8237 #2 (AT)380-38F
80287 NUMERIC CO-P (AT)3A0-3AF
HARD DISK (AT)
3B0-3BBGAME CONTROL
3BC-3BF
EXPANSION UNIT (XT)
3C0-3CFBUS MOUSE
3D0-3DFALT BUS MOUSE
3E8-3EFPARALLEL PRINTER
3F0-3F7EGA
3F8-3FFFUNCTION
EGA
EGA
GPIB (AT)SERIAL PORTSERIAL PORTPROTOTYPE CARD
PROTOTTYPE CARD
HARD DISK (XT)
PARALLEL PRINTER
SDLC
SDLC
MDA
PARALLEL PRINTEREGACGASERIAL PORTFLOPPY DISKSERIAL PORTThe PC104-DAC06 BASE switch may be set for address in the range of 000-3F0 so it
should not be hard to find a free address area for your PC104-DAC06. Once again, if
you are not using IBM prototype cards or some other board which occupies theseaddresses, then 300-31Fh are free to use. Address not specifically listed, such as
390-39Fh, are free.

3.2 SIMULTANEOUS UPDATE JUMPER
The analog outputs can be jumpered so that new output data is held until two, four, orsix DACs have been loaded with new digital data. Then, as a group, those that are
jumpered for simultaneous outputs will have that new data sent to the voltage outputs.
Simultaneous update occurs whenever any addresses BASE + 0 through BASE + 11are read.
The analog output chips are dual DACs. A single jumper sets both DACs on a single
chip to be either simultaneous TRANSFER or individual UPDATE.

3

Figure 3-2 shows the jumper block in each configuration. Place the jumper on the two
pins closest to the word XFER for simultaneous transfer.
XFR

XFR

Shown for simultaneous transferof both channels.

Shown for individualtransfers per channel.

SIMULTANEOUS TRANSFER JUMPERS - One per pair of channels.

Figure 3-2. Simultaneous Transfer Jumpers
Jumper #J1
J2J3

DAC Controlled
DAC 0 & 1
DAC 2 & 3DAC 4 & 5

3.3 ANALOG OUTPUT RANGE JUMPER
The analog output voltage range of each channel can be set via a six pin jumper block.
The switches are located on the board near the DACs they control and are labeled S1
through S6. The number corresponds to the DAC under control + 1.
Set the jumpers for an individual channel using Figure 3-3 to orient the jumper block
pin 1, and Table 3-2 below to select the range.
53

1
S#

642

65

4

32

1
S#Position of S# relative
to pin1 for S1-S4

Position of S# relativeto pin 1 for S5 & S6

JUMPERS SHOWN +/-5v RANGE

Figure 3-3. Range Jumpers

4Table 3-2. Range Select Jumpers
Jump Pins
Range
2-4, 3-5+/-10V
2-4, 5-6+/-5V
1-2, 3-5
0 to 10V
1-2, 5-6
0 to 5V

3.4 OUTPUT TRANSFER FUNCTIONS
To program a DAC, you must select the output you desire in volts, then apply atransfer function to that value. The transfer function for CODE = output is:
The UNIPOLAR transfer function of the DAC is:
FSV / 4096 * CODE = OutV
or CODE = OutV / FSV * 4096For Example:
If the range is 0 to 5V and you desire a 2V output:
CODE = 2/5 * 4096 = 1638
The BIPOLAR transfer function for the DAC is:
FSV/4096 * CODE − .5 * FSV
or CODE = (OutV + .5 * FSV) / FSV * 4096
For example:
If the range is set to ±10 and you desire a −7V output:
CODE = (−7V + .5 * 20) / 20 * 4096=614.

3.5 CABLING
Several cabling and screw termination options are available.
C40FF-2
CIO-MINI40
C40-37F-2
CIO-MINI37
CIO-TERMINAL

2 foot (and longer) ribbon cable with 40-pin connectors.
Simple, 40-position 4"X4" screw terminal board.
2 foot ribbon cable maps 40-pin to 37-pin D connector.
Simple, 40-position 4"X4" screw terminal board.
Full featured 4"X16" screw terminal board with prototype
and interface circuitry.

3.6 SIGNAL CONNECTIONS
The analog outputs are two-wire hookups; a signal, labeled D/A # OUT on theconnector diagram below, and a Low Level Ground (LLGND). The low level ground5

is an analog ground and is the ground reference which should be used for all analoghookups.
Possible analog output ranges are:Bipolar Ranges
andUnipolar Ranges

±10V

±5V

0 to 10V

0 to 5V

Each of the DAC06 outputs are individually buffered through an OP-27 operational
amplifier (OP-AMP). The OP-27s are socketted so that if one fails it can be replacedin the field. The OP-27 for each channel is located adjacent to the calibration
potentiometers for that channel.
At the full rated output swing of ±10V, each channel is capable of sinking or sourcing±5 mA. That means a load of 2KΩ can be connected to each channel.
If load resistance is raised from 2KΩ up to 10 MegΩ or more, the output load on theDAC decreases. Any load resistor greater than 2KΩ is acceptable.
As the load resistance decreases, the output load increases. The OP-27 responds byproducing a lower output voltage. If your DAC06 will not produce the output voltage
specified by the code and range combination, check the load with an ohmmeter.
Under normal circumstances you will not damage the OP-27 by connecting the outputto ground. If your connection results in a failure of the OP-27, chances are there wassome potential at the connecting point in addition to a load at ground or between 0and 2K ohms. Explore the point with a DVM before reconnecting the DAC06 (andafter replacing the OP-27 of course). Connect the negative lead of the DVM to any
LLGND pin of the DAC06.

3.7 CONNECTOR DIAGRAM
The connector is a male, 40-pin header type connector (Figure 3-4).
The connector accepts female 40 pin connectors, such as those on the C40FF-2, atwo- foot cable with connectors or, for compatibility with the CIO-DAC series, aBP40-37 adapter (Figure 3-5) may be used along with a C37FF-2 cable.

6

If frequent changes to signal connections or signal conditioning are required, pleaserefer to the information on the CIO-TERMINAL, CIO-SPADE50, CIO-MINI40 andCIO-MINI37 (if using a BP40-37 adapter) screw terminal boards.

-12VDC+12VDC

543210Figure 3-4. Board Connector–12VDC 19
GND 18+12VDC 17
NC 16
NC 15
NC 14
NC 13NC 12NC 11NC 10NC 9NC 8NC 7
VOUT 5 6VOUT 4 5
VOUT 3 4VOUT 2 3
VOUT 1 2
VOUT 0 137 GND
36 +5VDC
35 LLGND
34 LLGND
33 LLGND
32 LLGND
31 LLGND
30 LLGND
29 LLGND
28 LLGND
27 LLGND
26 LLGND
25 LLGND
24 LLGND
23 LLGND
22 LLGND
21 LLGND
20 LLGND

Figure 3-5 Cable BP40-37 Pin-Out

4.0 CONTROL & DATA REGISTERS
All control and data is read/written with simple I/O read and write signals. No
interrupt or DMA control software is required. Hence, the board's functions are easy
to control directly from BASIC, C or PASCAL.
The PC104-DAC06 has 12 analog output registers. There are two for each channel,
one for the lower eight bits and one for the upper four bits.
The first address, or BASE ADDRESS, is determined by setting a bank of switches onthe board.
A register is easy to read and write to. The register descriptions all follow the format:
7

7A7

6A65A5

4A43A3

2A2

1A1

0
A0

Where the numbers along the top row are the bit positions within the 8-bit byte andthe numbers and symbols in the bottom row are the functions associated with that bit.
To write to or read from a register in decimal or HEX, the bit weights in table 2-1
apply:
Table 2-1. Bit Weights
BIT POSITIONDECIMAL VALUEHEX VALUE01
1122244388416
10532
20
664
40
7128
80
To write a control word or data to a register, the individual bits must be set to 0 or 1
then combined to form a byte.
The method of programming required to set/read bits from bytes is beyond the scopeof this manual.
In summary form, the registers and their function are listed in Table 2-2. Eachregister has eight bits which constitute a byte of data or eight individual bit functions.
Each DAC has two 8-bit registers which are used to control it. The first registercontains the least-significant eight bits of D/A code. Write to it first.
7D56
D65
D74D83D92
D101
D110
D12LSBThe second register contains the most significant four bits of D/A code. Write to it
last. A write to this register will update the output of the D/A with all 12 bits of theD/A code contained in the two registers. If the XFER jumper is set for the DAC, noupdate will occur until a read of any one of the DAC registers is executed. Upon aread, all DACs set for simultaneous transfer (XFER jumper set) will update together.
7X

6X

5X

4X

3
D1MSB
82
D21
D30D4

The DAC06 contains 12 registers. Two registers control one D/A output. Theseregister functions are identical to the CIO-DAC series registers except that there are
only 12 of them.

ADDRESS
BASE + 0BASE + 1
BASE + 2
BASE + 3
BASE + 4
BASE + 5
BASE + 6
BASE + 7BASE + 8
BASE + 9
BASE + 10
BASE + 11
BASE + 12 to 15

Table 2-2. Board Registers
WRITE FUNCTION
D/A 0 Least Significant Byte
D/A 0 Most Significant Nibble
D/A 1 Least Significant Byte
D/A 1 Most Significant Nibble
D/A 2 Least Significant Byte
D/A 2 Most Significant Nibble
D/A 3 Least Significant Byte
D/A 3 Most Significant Nibble
D/A 4 Least Significant Byte
D/A 4 Most Significant Nibble
D/A 5 Least Significant Byte
D/A 5 Most Significant Nibble
None

9READ FUNCTION
Initiate simultaneous upInitiate simultaneous up
Initiate simultaneous up
Initiate simultaneous up
Initiate simultaneous up
Initiate simultaneous up
Initiate simultaneous up
Initiate simultaneous up
Initiate simultaneous up
Initiate simultaneous up
Initiate simultaneous up
Initiate simultaneous up
None5.0 SPECIFICATIONSPower consumption
Icc: +5V quiescent
Icc: +12V quiescent
Icc: −12V quiescent

130 mA typical, 180 mA max
50 mA typical, 75 mA max
30 mA typical, 45 mA max

Analog Output section
D/A converter type
Resolution
Number of channels
RangesD/A pacing
Data transferAD7237
12 bits
6±10V, ±5V, 0 to 10V, 0 to 5V each channel
individually jumper selectable
Software
Software polledThroughput

125 kHz typical (PC-dependent)

Offset error
Gain error
Integral non-linearity
Differential non-linearity
Monotonicity

Adjustable to zero
Adjustable to zero
±0.5 LSB±0.5 LSB
Guaranteed over temperature range

Gain drift
Zero drift

160 ppm/°C
150 ppm/°C

Current Drive
Short circuit current
Output resistance±5 mA min
±40 mA
0.1ohms

Slew rate

1.7V/µs

Miscellaneous

Double buffered input latchesUpdate DACs individually or simultaneously(jumper selectable by DAC pairs)
DAC output state on power-up and reset
undefined

Environmental
Operating temperature range
Storage temperature range
Humidity

0 to 70°C−40 to 100°C
0 to 90% non-condensing
10EC Declaration of Conformity
We, Measurement Computing Corporation, declare under sole responsibility that theproduct:
PC104-DAC06
Part Number

Description

to which this declaration relates, meets the essential requirements, is in conformity
with, and CE marking has been applied according to the relevant EC Directives listed
below using the relevant section of the following EC standards and other normative
documents:
EU EMC Directive 89/336/EEC: Essential requirements relating to electromagneticcompatibility.
EU 55022 Class B: Limits and methods of measurements of radio interference
characteristics of information technology equipment.
EN 50082-1: EC generic immunity requirements.
IEC 801-2: Electrostatic discharge requirements for industrial process measurement
and control equipment.
IEC 801-3: Radiated electromagnetic field requirements for industrial process
measurements and control equipment.
IEC 801-4: Electrically fast transients for industrial process measurement and control
equipment.

Carl Haapaoja, Director of Quality Assurance

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Suite 1008
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Fax: (508) 946-9500
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