Quantinuum System Model H1
Product Data Sheet

Version 5.20 February 15, 2023

TABLE OF CONTENTS• INTRODUCTION .............................................................................................. 3• FEATURES ...................................................................................................... 3• SPECIFICATIONS............................................................................................ 3• SYSTEM OPERATION ..................................................................................... 4
Generational Hardware Nomenclature ............................................................................................... 4
API Interface ...................................................................................................................................... 4
Native Gate Set .................................................................................................................................. 4
Constructed gate examples using QASM notation ............................................................................. 5
Mid-circuit measurement and conditional operations .......................................................................... 6
Inter-circuit performance validation..................................................................................................... 6Dynamic calibrations .......................................................................................................................... 7
Depth-1 circuit time ............................................................................................................................ 7
Estimating circuit time ........................................................................................................................ 7
Arbitrary Angle ZZ Gates.................................................................................................................... 8• ERROR DEFINITIONS ..................................................................................... 8Single-qubit gate fidelity ..................................................................................................................... 8
Two-qubit gate fidelity ........................................................................................................................ 9
State preparation and measurement (SPAM) error ............................................................................ 9Mid-circuit measurement and reset cross-talk error ............................................................................ 9Memory error per qubit at depth-1 circuit time .................................................................................... 9Benchmarking Data.......................................................................................................................... 10• REFERENCES ............................................................................................... 10© 2023 by Quantinuum. All rights reserved.

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INTRODUCTION
This Product Data Sheet covers all features and characteristics of the Quantinuum System
Model H1, Powered by Honeywell. This includes specifications for all quantum computersavailable online, which includes quantum computers H1-1 and H1-2.

FEATURES
N ≥ 12 qubit trapped-ion based quantum computers
All-to-all connectivity
Laser based quantum gates
Quantum charge-coupled device (QCCD) architecture with three or more parallel gatezones
Mid-circuit measurement conditioned circuit branching
Qubit reuse after mid-circuit measurement
Native gate set: single-qubit rotations, two-qubit ZZ gates, arbitrary-angle ZZ gates

SPECIFICATIONS
Table 1 lists the specifications for the Quantinuum H1-1 and H1-2 quantum computers.
Table 1 Quantinuum H-Series Specifications

System Fundamentals
Parameters

H1-1minGeneralQubits
Connectivity
Parallel two-qubit operations

typH1-2maxmin

typ20

12

All-to-all

All-to-all

53max

ErrorsSingle-qubit gate infidelity

1 × 10−5

4 × 10−5

3 × 10−4

2 × 10−5

4 × 10−5

3 × 10−4

Two-qubit gate infidelity
State preparation andmeasurement (SPAM) error
Memory error per qubit ataverage depth-1 circuit
Mid-circuit measurement
cross-talk error

1.7 × 10−3

2 × 10−3

5 × 10−3

2 × 10−3

3 × 10−3

5 × 10−3

2 × 10−3

3 × 10−3

5 × 10−3

2 × 10−3

3 × 10−3

6 × 10−3

1 × 10−4

2 × 10−4

1 × 10−3

1 × 10−4

4 × 10−4

1 × 10−3

5 × 10−6

1 × 10−5

2 × 10−4

1 × 10−5

5 × 10−5

2 × 10−4© 2023 by Quantinuum. All rights reserved.

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SYSTEM OPERATIONThe Quantinuum System Model H1, Powered by Honeywell, operates on qubits
implemented through atomic hyperfine states of 171Yb+. The H1 systems include twomachines, the H1-1 and the H1-2, which each have twelve or more physical qubits (ions)that move, individually or in pairs, between three or more interaction zones where allquantum operations (initialization, measurement, single-, and two-qubit gates) are performed
using lasers. By rearranging the physical location of the qubits, a two-qubit gate can beperformed on any arbitrary pair, giving the system all-to-all connectivity. Additionally,
because there are multiple interaction zones, multiple quantum operations may beperformed in parallel.
Although the qubits are all identical, there may be differences in the errors associated withquantum operations depending on the location, i.e., interaction zone, in which the quantum
operations take place, independent of the specific qubits that are in that location. However,the location for each quantum operation is determined by the compiler and may vary evenfor similar circuits, as each circuit is optimized to minimize the number of transport
operations and the time required to run the circuit. The typical infidelities reported on thisproduct data sheet are an average over all operational zones, with the minimum andmaximum spanning both the difference between zones and the day-to-day variation.

Generational Hardware Nomenclature
System Model H1 refers to a generation of quantum computing hardware using ion traps
with a single linear geometry. Individual machines that use this generation of ion traps will be
designated by the H1-X nomenclature, for example H1-1 and H1-2 are two separate
quantum computing machines using the same ion trap design. Though the machines are
based on the same architecture, it is inevitable that at any time individual machines may
have different capabilities and slight differences in noise and error sources. At no timeshould either machine exceed the maximum allowed error specified above.

API Interface
Communication with Quantinuum System Model H1 occurs through an API endpoint basedon the OpenQASM 2.0 standard [1]. Interface details are given in the Quantinuum
Application Programming Interface (API) Specification.

Native Gate SetThe Quantinuum System Model H1 utilizes the following native gate set.
𝜃Native single-qubit gates:

𝑈1𝑞 (𝜃, 𝜑) = 𝑒−𝑖 (cos 𝜑𝑋̂+sin 𝜑𝑌̂) 𝜃⁄2𝑖𝜆− ⁄2𝜆𝑅𝑧 (𝜆) = 𝑒 −𝑖 𝑍̂ ⁄2 = (𝑒0cos 2=(𝜃−𝑖𝑒 𝑖𝜑 sin 2𝜃−𝑖𝑒 −𝑖𝜑 sin 2𝜃cos 2)0 )𝑖𝜆𝑒 ⁄2© 2023 by Quantinuum. All rights reserved.

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Fully entangling two-qubit gate:

Arbitrary angle two-qubit gate:

1 0 0 00 𝑖 0 0)
𝑍𝑍() = 𝑒=𝑒 (0 0 𝑖 00 0 0 11 00𝑖𝜃𝜃𝑖𝜃0𝑒0−𝑖 𝑍̂ ⨂ 𝑍̂−𝑅𝑍𝑍(𝜃) = 𝑒 2=𝑒 2(0 0 𝑒 𝑖𝜃
0 00−𝑖𝜋𝑍̂ ⨂ 𝑍̂
4−𝑖𝜋
400)
01𝜋

𝑅𝑍𝑍 ( 2 ) = 𝑍𝑍()
𝑋̂, 𝑌̂, and 𝑍̂ are the standard Pauli operators and the two-qubit matrix is written in the𝜋|0,0⟩, |0,1⟩, |1,0⟩, |1,1⟩ basis. Currently only 𝑈1𝑞 (𝜃 = {2 , 𝜋} , 𝜑) gates are run on the hardware,arbitrary values of 𝜃 are executed with two single-qubit gates.
𝜋𝜋𝜋𝜋𝑈1𝑞 (𝜃, 𝜑) = 𝑈1𝑞 ( 2 , 𝜑 + 2 ) 𝑅𝑧 (𝜃)𝑈1𝑞 ( 2 , 𝜑 − 2 ).
It is important to note that the arbitrary rotation around the z axis, 𝑅𝑧 (𝜆), is performed
virtually within the software. All other gates are constructed from this set.
Please note that our native 𝑈1𝑞 (𝜃, 𝜑) gate is NOT IBM’s standard 𝑈(𝜃, 𝜑, 𝜆) as defined in [1].
𝜋 𝜋
𝑈1𝑞 (𝜃, 𝜑) = 𝑈 (𝜃, 𝜑 − , − 𝜑)2 2Constructed gate examples using QASM notationExamples using the native gate set within QASM are below.
Pauli gate: bit-flipx() a=

U1q(pi,0) a;

Pauli gate: bit and phase flipy() a=U1q(pi,pi/2) a;Pauli gate: phase flipz() a=

Rz(pi) a;

Clifford gate: Hadamardh() a=

U1q(pi/2,-pi/2) a;Rz(pi) a;

Clifford gate: CNOT

CX() c,t=© 2023 by Quantinuum. All rights reserved.

U1q(-pi/2, pi/2) t;
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ZZ() c, t;
Rz(-pi/2) c;
U1q(pi/2, pi) t;
Rz(-pi/2) t;
Pauli interaction: Z basisrzz(pi/4) c,t=RZZ(pi/4) c, t;

Pauli interaction: X basis

rxx(pi/4) c,t=U1q(pi/2, pi/2) c;
U1q(pi/2, pi/2) t;
RZZ(pi/4)c, t;
U1q(pi/2, -pi/2) c;
U1q(pi/2, -pi/2) t;

Mid-circuit measurement and conditional operations
Due to the internal level structure of trapped-ion qubits, a mid-circuit measurement may
leave the qubit in a non-computational state. All mid-circuit measurements should befollowed by initialization if the qubit is to be used again in that circuit. The qubit may be
prepared in the measured state by calling for a measurement followed by initialization and ameasurement dependent spin-flip.
When a subset of qubits is measured in the middle of the circuit, the classical informationfrom these measurements can be used to condition future elements of the circuit. Although
the laser pulses that implement both single- and two-qubit gates are conditional, thetransport operations used to rearrange the physical location of the qubits are not. The qubits
will be reconfigured to allow for all gates in all branches irrespective of the mid-circuit
measurement outcome. In the context of memory error and run time, the effective depth of acircuit with measurement conditioned branching includes all branches.

Inter-circuit performance validation
Jobs submitted with large shot-counts are automatically divided into appropriately sized
chunks of smaller shot-counts. Chunking ensures that system state-checks and dynamic
calibrations happen at the appropriate frequency. The number of shots in a chunk is
dynamically chosen by the compiler and will vary with the complexity of the circuit. A seriesof system checks are performed before and after each chunk. If an error is detected, anysuspect results are rejected and the failed chunk shots are rerun at no additional cost. Forjobs consisting of multiple chunks, the time between the start date and result date will
include all of the system checks and calibrations that happened in the middle of that job andpossibly chunks from other jobs in the queue.

© 2023 by Quantinuum. All rights reserved.

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Dynamic calibrations
The system automatically schedules and executes calibration routines. There are two types
of automated calibrations: those that are executed on a predetermined time interval andthose that are triggered when a drift tolerance is exceeded. Because the latter does notfollow a predetermined schedule, the circuit throughput will vary due to these calibrations.

Depth-1 circuit time
We define the depth-1 circuit time as the time it takes to arbitrarily permute all qubits andperform single-qubit and two-qubit gates on all ⌊𝑁2⌋ pairs, as shown in Figure 1,where 𝑃
represents the random permutation of all qubits. Many circuits cannot be fully parallelized
into a maximally dense circuit where each qubit participates in a two-qubit gate at each stepof the circuit, and may have shorter depth-1 circuit times as a result.

Figure 1 Depth-1 circuit time for a maximally dense circuit

Estimating circuit time
The run time for a given circuit depends on many factors, including factors in the circuit
structure, such as if the circuit is highly connected or not, as well as factors in the system,
such as dynamic calibrations. Run time can be reasonably predicted using the same
formula that defines H-System Quantum Credits (HQC). Typically, between 500 and 1200
HQCs can be executed in an hour. A HQC is defined as:
𝑁1𝑞 + 10 𝑁2𝑞 + 5 𝑁𝑚
𝐶5000
where 𝑁1𝑞 is the number of single-qubit gates, 𝑁2𝑞 is the number of native two-qubit gates,
𝑁𝑚 is the number of state preparation and measurement operations in a circuit, including theinitial implicit state preparation and any intermediate and final measurements and resets,
and 𝐶 is the shot count. When a circuit is submitted (either to the syntax checker or H2) thecost in HQCs is returned with the results. The total HQCs includes all gates andmeasurements across any conditional branches.
𝐻𝑄𝐶 = 5 +© 2023 by Quantinuum. All rights reserved.

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Arbitrary Angle ZZ Gates
Although an abitrary angle two-qubit entagling gate can be constructed using two fixed angle
two-qubit entangling gates, a direct implementation will lower the error rate in the circuit. Not
only is the number of entangling gates reduced, but the error of an RZZ(θ) gate also scaleswith the angle θ. The error on RZZ(π/2) is equal to the error of ZZ().

Figure 2 Quantum circuits that use the gate sequence CNOT, RZ, CNOT can be replaced with thearbitrary angle ZZ gate. This enables a lower number of two-qubit gates in a quantum circuit,
improving performance by decreasing gate errors.

ERROR DEFINITIONSSingle-qubit gate fidelity
The single-qubit gate fidelity is measured using single-qubit randomized benchmarking (RB)with random single-qubit Clifford gates [2]. Benchmarking also uses final gate randomization,
similar to Ref. [3], to fix the asymptote of the RB decay curve in order to reduce the numberof fit parameters and allow fitting of shorter sequences. We run single-qubit RB with twoqubits per active gate zone in parallel. The error rate is calculated by translating the RB
decay curve to a per-Clifford average infidelity under the standard RB assumptions.
Uncertainty is calculated from a semi-parametric bootstrap resampling of the collected data.
For datasets produced after January 2023 the spontaneous emission rate is also measured
from single-qubit RB experiments by applying a “leakage gadget” to the end of each circuit,which detects if a qubit leaks out of the computational subspace. The number of leakage
events depends on the number of gates applied and the spontaneous emission rate. By
fitting the number of detected leakage events as a function of number of gates we canextract an estimate of the spontaneous emission rate.

Figure 3: Single-qubit RB data from H1-1 taken on 2023/01/20 with 2 qubits per each of the 5 gate zones.
Infidelity estimate averaged over all zones is 4.5(8)x10-5.

© 2023 by Quantinuum. All rights reserved.

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Two-qubit gate fidelity
The two-qubit gate fidelity is measured with two-qubit RB using similar methods outlined
above on single-qubit RB. Two-qubit RB is run with two-qubit random Clifford gates pairs ofqubits in each active gate zone in parallel. The infidelity of our native entangling gate isestimated by scaling per-Clifford infidelity by the average number of entangling gates per
Clifford (= 1.5). After January 2023 datasets also include the estimated spontaneousemission rate using the leakage gadget described above and scaled for the number of twoqubit gates per Clifford.

Figure 4: Two-qubit RB results from H1-1 taken on 2023/01/20. Infidelity estimate averaged over all 5zones is 2.05(7)x10-3.

State preparation and measurement (SPAM) error
The SPAM error is measured by preparing the qubits in the |0⟩ (or |1⟩) state and measuring
to determine the fraction of time the incorrect |1⟩ (or |0⟩) state is returned. The reported
SPAM error is the average between the |0⟩ and |1⟩ state preperation experiments. The
experiment is repeated for two qubits per active gate zone and done in parallel.

Mid-circuit measurement and reset cross-talk error
Although qubits are physically separated during measurement and reset, there is a small
chance that an unmeasured qubit in the |1⟩ state will absorb the detection light, destroying its
quantum state, and potentially scattering to the non-computational states used for state
detection. This is not an issue with measurement at the end of a circuit when all qubits aremeasured but can impact circuits with mid-circuit measurement and reset. The mid-circuit
measurement and reset cross-talk errors are quantified by the population decay of anunmeasured qubit while applying many measurement or reset pulses to a neighboring qubit
as described in Ref. [4].

Memory error per qubit at depth-1 circuit time
To characterize memory error in depth-1 circuit time, we perform single-qubit RB as
described above, while interleaving failed conditional two-qubit gates and time delays. The
failed conditional two-qubit gates are between random pairs of all available qubits andinduce ion transport that would be required for dense circuits like in quantum volume. The© 2023 by Quantinuum. All rights reserved.

Page 9delay time mimics the time required for sideband cooling before two-qubit gates. The net RB
error measured is the average single-qubit error due to depth-1 circuits. We perform this test
for all available qubits in the system.

Benchmarking Data
The data for the measurements in this document can be found online at:https://github.com/CQCL/quantinuum-hardware-specifications. This repository contains theraw data along with the analysis code. For completeness a subset of the measurements aredescribed below.

REFERENCES[1] A. W. Cross, L. S. Bishop, J. A. Smolin and J. M. Gambetta, "Open Quantum Assembly Language,"
arXiv:1707.03429v2, 2017.
[2] E. Magesan, J. M. Gambetta and J. Emerson, "Characterizing quantum gates via randomized
benchmarking," Phys. Rev. A, vol. 85, no. 4, p. 042311, 2012.
[3] R. Harper, I. Hincks, C. Ferrie, S. T. Flammia and J. J. Wallman, "Statistical analysis of randomized
benchmarking," Phys. Rev. A, vol. 99, no. 5, p. 052350, 2019.
[4] J. P. Gaebler, C. H. Baldwin, S. A. Moses, J. M. Dreiling, C. Figgatt, M. Foss-Feig, D. Hayes and J.
M. Pino, "Suppression of midcircuit measurement crosstalk errors with micromotion," Phys. Rev. A,
vol. 104, no. 6, 2021.

© 2023 by Quantinuum. All rights reserved.

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