CIO-DAS801

Specifications

Document Revision 3.1, March, 2010
© Copyright 2010, Measurement Computing Corporation

Specifications
All specifications are subject to change without notice.
Typical for 25°C unless otherwise specified.
Specifications in italic text are guaranteed by design.

Analog input
Table 1. Analog input specifications
Parameter

Specification

A/D converter type
Resolution
Number of channels
Input ranges

AD674A, successive approximation
12-bits8±10 V, ±5 V , ±1 V, ±0.5 V , ±0.1 V, ±0.05 V, ±0.01 V , ±0.005 V,0 to 10 V, 0 to 1 V, 0 to 0.1 V, 0 to 0.01 V, fully programmable
Polarity
Unipolar/Bipolar programmable
A/D pacing
Programmable: internal counter or external source (IR Input / XCLK, fallingedge) or software polled
A/D trigger sources
External hardware (DIN1 / Trig, rising edge)
Data transfer
Interrupt or software polled from 256 sample FIFO buffer
Channel configuration
Differential (or pseudo-differential with installation of a SIP resistor) or
single-ended, switch selectable for each channel
DMANoneA/D conversion time
20 µs
Throughput
50 kHzAccuracy±0.01% of full scale ±1 LSB typ, ±0.05% of full scale ±1 LSB max
Differential linearity error±0.5 LSB max
Integral linearity error±1 LSBNo missing codes (guaranteed)
12-bits
Gain drift (A/D specs)±50 ppm/°C
Zero drift (A/D specs)±10 ppm/°C
Common mode range±10 V
CMRR @ 60 Hz
Gain = 1
70 dB min
Gain = 1090 dB min
Gain ≥ 100
100 dB min± 30 nA
Input leakage current (@ 25 C)
Input leakage current (over temperature)±250 nA
Input impedance>1 Gohm typicalAbsolute maximum input voltage±35 V
Noise distribution (results presented as Average % ±2 bins, Average % ±1 bin, Average # bins):
Bipolar
10 V, 5 V, 1 V 100% / 100% / 3 bins
0.5 V, 0.1 V
100% / 99.3% / 4 bins
0.05 V
100% / 99.1% / 5 bins
0.01 V
95.2% / 79.8% / 11 bins
0.005 V
72% / 48.3% / 21 bins
Unipolar
10 V
100% / 99.96% / 4 bins
1V
100% / 99.59% / 4 bins
0.1 V
99.95% / 98.73% / 6 bins
0.01 V
72.8% / 49% / 24 bins

1

CIO-DAS801

Specifications

Digital input/output
Table 2. Digital I/O specifications
Digital type
Configuration
Input low voltage
Input high voltage
Output low voltage (IOL = 4 mA)
Output high voltage (IOH = -4 mA)
Absolute maximum input voltage
Interrupts

FPGA
Two ports, 3 input and 4 output
0.8 V max
2.0 V min
0.32 V max
3.86 V min-0.5 V, +5.5 V
Jumper selectable: levels 2, 3, 4, 5, 6, 7 or not connected
Positive edge triggered
Programmable
External (IR Input / XCLK), A/D End-of-conversion, A/D FIFO-half-fullInterrupt enable
Interrupt sourcesCounters
Table 3. Counter specifications
Counter type
Configuration
Counter 0 — Independent, user counter

Counter 1 — ADC Pacer Lower Divider
or independent user counter

Counter 2 — ADC Pacer Upper Divider

Clock input frequency
High pulse width (clock input)
Low pulse width (clock input)
Gate width highGate width low
Input low voltage
Input high voltage
Output low voltage
Output high voltage
Crystal oscillator

82C54
3 down counters, 16-bits resolution
Source:External, user connector (CTR0 In)
Gate:
External, user connector (CTR0 Gate)
Output:User connector (CTR0 Out)
Source:User connector (CTR1 In) and optionally CTR2 Out,selectable by software
Gate:
Programmable, disabled or user connector (CTR1 Gate)
Output:User connector (CTR1 Out) and optionally to A/D start
convert, software selectable
Source:Internal 1 MHz oscillator
Gate:
Programmable, disabled or user connector (CTR2 Gate)
Output:User connector (CTR2 Out) and optionally to CTR1 In,
software selectable
10 MHz max
30 ns min
50 ns min
50 ns min
50 ns min
0.8 V max
2.0 V min
0.4 V max
3.0 V minFrequency:
10 MHzFrequency accuracy:
100 ppm

Power consumption
Table 4. Power consumption specifications+5 V quiescent

500 mA typical, 750 mA max

2CIO-DAS801

Specifications

Environmental
Table 5. Environmental specifications
Operating temperature range
Storage temperature range
Humidity

0 to 50 °C-20 to 70 °C
0 to 90% non-condensing

Main connector and pin out
Table 6. Main connector specifications
Connector typeCompatible cableCompatible accessory products with the
C37FF-x cable

37-pin D type connector
C37FF-x
CIO-MINI37
CIO-EXP16
CIO-EXP32
CIO-TERMINAL
ISO-RACK08
Table 7. Connector pin out

Pin12345678910111213141516171819Signal Name+15V from DC/DC
CTR0 In
CTR0 OutCTR1 In
CTR1 OutCTR2 Out
DOUT1DOUT2DOUT3DOUT4LLGND
CH7 LO
CH6 LO
CH5 LO
CH4 LO
CH3 LO
CH2 LO
CH1 LO
CH0 LO

Pin
202122232425262728293031323334353637Signal Name
-15V from DC/DC
CTR0 Gate
CTR1 Gate
CTR2 Gate
IR Input / XCLKDIN1 / Trig
DIN2DIN3
DGND
PC +5VCH7 HICH6 HICH5 HI
CH4 HI
CH3 HICH2 HICH1 HI
CH0 HI

3Measurement Computing Corporation
10 Commerce Way
Suite 1008
Norton, Massachusetts 02766(508) 946-5100
Fax: (508) 946-9500
E-mail: info@mccdaq.com
www.mccdaq.com
CIO-DAS801-spec.doc