Proceedings of 6th Thin Film Materials & Devices Meeting
November 2-3, 2009, Kyoto, Japan
http://www.tfmd.jp/

Electrical properties of thin film transistors with ZnO channel layer
deposited by atomic layer deposition
Yumi Kawamura1 and Yukiharu Uraoka1,2
1

Graduate School of Materials Science, Nara Institute of Science and Technology,
8916-5 Takayama, Ikoma, Nara 630-0192, Japan
2
CREST, Japan Science and Technology Agency,
Honcho, Kawaguchi, Saitama 332-0012, Japan

Keywords:

ZnO, TFT, ALD, electrical properties, stability

Abstract. We investigated zinc oxide (ZnO) thin films by atomic layer deposition (ALD) for
the application of thin film transistors (TFTs). The fabricated TFTs were annealed at various
temperatures, in an oxygen ambient gas. Annealing at the temperature up to 400 ℃ improved
the characteristics of TFTs without any degradation of the subthreshold swing or any large shiftof the threshold voltage. From the annealing temperature dependence of transfer characteristics
and x-ray diffraction patterns, we found that the improvement of electrical characteristics is
attributable to the crystalline modification of ZnO films. The TFTs annealed at 400 ℃ in theO2 ambient improved the stability for the bias stress. Secondary ion mass spectrometry
measurements revealed marked decrease of hydrogen in the ZnO channel layer after theannealing at 400 ℃.

Introduction
Amorphous (a-Si:H) and polycrystalline silicon (poly-Si) have been widely used for an
active channel layer in thin film transistors (TFTs). However, there are a number of drawbacks
in these materials, such as the high temperature fabrication process and their limited
performance. In recent years, the application of zinc oxide (ZnO) thin films as an active channel
layer in TFTs has become of great interest owing to its specific characteristics. [1-3] ZnO istransparent to visible wavelengths because of the wide band gap (~3.37 eV), and the availabilityof high-quality ZnO films over large areas at low temperature suggests compatibility withplastic or flexible substrates. It has recently been demonstrated that the field effect mobility ofZnO TFTs is higher than that of a-Si:H TFTs. To take advantage of the high performance ofZnO, the issue of stability should be solved.
To ensure the stability of ZnO thin films, we focused on an atomic layer deposition(ALD) method. The ALD method is one of the thin film preparation techniques, which is
widely studied in LSI industry. The ALD thin film is deposited with alternating exposures of asource gas and an oxidant. The ALD film has features of accurate thickness control, highconformity, and uniformity over large areas, because of the layer-by-layer growth. [4] It isreported that the TFTs with ALD ZnO channel layers demonstrated high mobility. [5‐7]In this study, we fabricated TFTs using ZnO thin film as the channel layer deposited by
ALD, and investigated the stability. The dependence of TFT characteristics on the annealing
condition is evaluated, and the reliability of TFTs is characterized by applying the bias stress.

Experimental

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The schematic structure of bottom-gate typeTi 150 (nm)ZnO TFTs fabricated in this study is shown in Fig.1.
SD
50-nm-thick SiO2 gate insulator was prepared by athermal oxidation method. 30-nm-thick ZnO thin
ZnO
DS
films were deposited on p-type Si (100) substrates by
30 (nm)plasma assisted ALD (PA-ALD) using alkyl-Zn as a
SiO2 50 (nm)metal precursor and oxygen radical (O*) as a reactant
Silicon substrateGat the substrate temperature of 100 ℃. Ti metal was
deposited and patterned by lift-off technique for theFig.1. Bottom-gate ZnO TFT
source/drain (S/D) electrodes. The Si substrate wasused as the gate electrode.
The fabricated TFTs were annealed at 100 ~500 ℃ for 1hour in an O2 (O2 =20 %,N2=80 %) ambient. [8] The electrical properties were measured using a semiconductor
parameter analyser (Agilent 4156C).
The channel length (L) and width (W) used in this study were 10 and 20 µm,
respectively. The threshold voltage (Vth) was defined by the gate voltage (Vg), which induces adrain current of 1 nA at a drain voltage (Vd) of 5 V. The on/off current ratio was measured by
the ratio of maximum to minimum drain current (Id) on the gate voltage axis, and on-current(Id_on) was defined as the drain current measured with Vg = 10 V.

Results and Discussion

10-3
10-4 (a)
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10-8
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10-10
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10-12
10-13
10-14
10-15
-10
0

0.1

(b)
0.08

Id on [mA]

Id [A]

Electrical characteristics: Transfer characteristics of TFTs annealed at various
temperatures in O2 ambient were measured in a single-sweep mode of the gate voltage with Vd= 5 V. The variation of the transfer characteristics and the Id_on as a function of the O2 annealing
temperature are shown in Figs. 2(a) and 2(b), respectively. For the ZnO TFTs annealed at
350 ℃ in O2 ambient, the off-current (Id_off) was 2.0×10-14 A, and the on/off ratio was 5×109.
The field effect mobility was about 2.1 cm2/Vs, the Vth was -2.1 V, and the subthreshold swing(S.S.) was 0.22 V/decade. The TFTs annealed over 450 ℃ showed lower Id_on than thatannealed at 400 ℃. We suppose that the deduction of the Id_on of TFTs annealed over 450 ℃
are due to the oxidation of Ti used for S/D electrodes.
From the measurement of electrical properties in the fabricated TFTs annealed in O2
ambient, it is assumed that the oxygen deficiencies were reduced by the introduction of oxygen
during the annealing, resulting in the clear transistor operation.

non annealed
O2 annealed

0.06
0.04
0.02
0

10

20

30

Vg [V]

100

200

300

400

500

anneal temperature [ ℃]

Fig.2. (a) Id-Vg characteristics non-annealed and annealed at 350℃, O2 ambient. (b) Id_on of ZnO-TFTs
annealed at O2 ambient as a function of annealing temperature. (Vd=5 V)

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(b)

(002)

(a)

O2 400℃℃
O2 300℃℃（100）（002） （101）Intensity [a.u.]

Intensity[a.u.]

XRD measurement: Crystal
structure of the ZnO films wascharacterized by x-ray diffraction(XRD) measurements. Figures 3(a) and3(b) show x-ray diffraction patterns of
ZnO films used for the fabrication of
the ZnO TFTs. In Fig.3 (a), threedominant peaks were observed from theas-deposited and 300 ℃-annealed ZnO
films, which originate from the (100),(002), and (101) reflections. In Fig.3(b), (002) diffraction peaks ofas-deposited and 200 ~400 ℃-annealed ZnO films are shown. The

O2 300℃℃

O2 200℃℃
as-dep.
30

32

34

36

38

as-dep.

40

2θ°

33.5

34

34.5
2θ°

35

35.5

Fig.3. (a) XRD patterns of ZnO films annealed at 300℃.
(b) Dependence of (002) peaks of ZnO films on theannealing temperature.

Before stressstress 1sstress 10s
stress 100s
stress 1000s
stress 10000s
10Gate voltage Vg[V]

20

30

10-3
10-4 (b) 400℃
10-5
10-6
10-7
10-8
Before stress
10-9
stress 1s
10-10
stress 10s
10-11stress 100s
10-12stress 1000s
10-13
stress 10000s
10-14
10-15
-10
0
10
20
30
Gate voltage Vg[V]Fig. 4. Transfer characteristics of ZnO TFTs annealed at (a) 300℃℃,
and (b) 400℃
℃ under the stress (Vg =20 V, Vd = 20 V)

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54⊿Vth[V]

10-3
10-4 (a) 300℃
10-5
10-6
10-7
10-8
10-9
10-10
10-11
10-12
10-13
10-14
10-15
-10
0

Drain current Id[A]D rain current Id[A ]Table I. Results of XRD measurement
characteristic(002) peak positions of the 2θ scans,
Non-anneal
O2 , 300℃
value2)and the lattice constant c calculatedο(002) peak offrom the peak positions are summarized 2θ atZnO
34.32534.42534.422
filmin Tab. I. In the films annealed at 300
Lattice constant~400 ℃, the intensity of (002) peaks
5.221
5.206
5.204
c[Å]
was slightly higher than that of (100)peaks. The resistivity of ZnO films is affected by the number of grain boundaries and the phaseat grain boundary. [9 -11] These results suggest that the resistivity is reduced by the (002)preferred orientation of the film annealed over 300 oC. Further, (002) peak shifted to a highangle of 2θ of the ZnO films annealed above 200 oC, and thus the lattice constant c of the ZnO
films was reduced. This reduction of the lattice constant toward the characteristic value of ZnO
by annealing implies release of the strain of the ZnO films. It can be estimated that the strain ofgrains in non-annealed film was considerably improved by the annealing. These changes arewell matched with the increasing of Id_on by annealing. Compared with the temperaturedependence of electrical properties, the changes of the transfer characteristics by annealing are
possibly related to the reduction of the lattice constant.
Bias stress stability: The stability of TFTs under bias stresses is of crucial importancefor their application to display driver. [12, 13] To evaluate the device stability, we measured thevariation of the transfer characteristics under gate and drain bias stresses at room temperature.
The stressing condition was 20 V of the Vg with 20 V of the Vd. The stress was applied forvarious periods of time up to 10000 s.
Figures 4(a) and 4(b) show the transfer characteristics before and after stressing
periods of 1, 10, 100, 1000 and 10000 s. Figure 4 (a) shows bias stress stability of the TFTs

3
2

300℃stress
400℃stress
300℃recover
400℃recover

1
0 -1
10

100

101
102
103
stress time[sec]104

Fig.5. The ∆Vth during stressing(Vg=20 V, Vd=20 V), and recovery.

Id[A]

Id[A]annealed at 300 oC in O2 ambient, and Fig. 4 (b) shows that annealed at 400 oC. The positive
shift of the Vth (~ +5.2 V) was observed after 10000seconds stressing in the TFTs annealed at
300 oC, while the Vth shift was remarkably reduced in the TFTs annealed at 400 oC. After theimposition of the stress, the transfer characteristics were measured in the absence of the stress atroom temperature. Immediately after turning off the stress, the ∆Vth was recovered gradually astime advances as shown in Fig.5. For a recovery time of 10000 s, transfer characteristics almost
recovered to the initial state. This behavior was not observed in poly-Si or a-Si:H TFTs, forwhich thermal annealing was required for these TFTs to recover. [14] The variation of thesubthreshold swing (∆S) was not varied with the stress time.
Figures 6 (a) and 6 (b)show the changes in the transfer
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10-4
10
characteristics of ZnO TFTs
10-5 (b)10-5 (a)-610-610annealed at 300 and 400 ℃
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10-7
under the gate voltage stress of Vg
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10-8
before stress
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10-9
before stress= 20 V. Since the Vd was 0 V, anstress 1s
10-10
10-10
stress 1sstress 10s
10-11
10-11
uniform and transverse electric
stress 10s
stress 100s
10-12
10-12
stress 100s
stress 1000s
field was formed across the
10-13
10-13
-14
-14
stress1000s
stress 10000s
10
10
-15
-15
stress
10000schannel. Similar ∆Vth and no
10
10
-10
0
10
20
-10
0
10
20
variation of S.S. were observed
Vg[V]
Vg[V]
between with and without drain Fig.6. Transfer characteristics of ZnO TFTs annealed at (a) 300℃℃,
bias stress applied. Furthermore, and (b) 400℃
℃ under the stress (Vg =20 V, Vd = 0 V)
for the drain voltage stress withno gate voltage bias, no marked degradation was observed.
These results suggest that ∆Vth is exclusively attributed to the gate bias stress. It wasreported that there are two prominent mechanisms of ∆Vth in a-Si:H TFTs under positive gate
voltage stresses. The ∆Vth caused by the state creation process shows power law timedependence, while the ∆Vth caused by the charge trapping process shows a logarithmic timedependence. [15 -17] This suggests that these Vth shifts in ZnO TFTs under stress are due tocharge trapping near the interface between ZnO channel layer and SiO2 gate insulator.
SIMS measurement: Secondary ion mass spectrometry (SIMS) measurements were
performed for ZnO films non-annealed, and annealed in O2 ambient at 200 ℃, 300 ℃ and
400 ℃ as shown in Figs.7 (a), (b), (c), and (d), respectively. Further, fig. 8 shows thedependence of hydrogen in ZnO films and ∆Vth after 10000seconds stressing on annealing

10

C

103
102
101

O
H

4

10

C

103
102
101

0

10

O

4

H
C

103
102

100 200
Time[sec.]

300

0

O

4

H

103

C

10

102
101

(b)
100

105

101

(a)
100

C o un ts[a.u.] unit]
[arb.

4

105

C o un ts [a.u.] unit]
[arb.

105

H
O

C o un ts [a.u.] unit][arb.

C o un ts [a.u.] unit]
[arb.

105

(c)
100 200
Time[sec.]

300

100

0

(d)
100 200
Time[sec.]

300

100

0

100 200
Time[sec.]

300

Fig. 7. SIMS profiles of H, O, and C in ZnO films (a) non-annealed, (b) annealed at 200oC,(c) annealed at 300oC, (d) annealed at 400oC, in O2 ambient.

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Counts of hydrogen [a.u.]⊿Vth [V]temperature. In the samples annealed at 300 ℃
105
102
and 400 ℃ , the reduction of hydrogen wasobserved as compared with the non-annealed101
as-dep.
sample as shown in fig. 8. It is considered thatthe residual hydrogen was released by the104
100
annealing. These results suggest that thehydrogen plays an important role for the
10-1
improvement of reliability.
hydrogen in ZnO films
Based on the results obtained in this⊿Vth after stress 10000s
3
10
10-2
study, features of the degradation observed in
0
100
200
300
400
anneal temperature[℃]
these TFTs were the marked ∆Vth with no ∆S andthe recovery properties. As we pointed earlier,Fig. 8. Dependence of hydrogen in ZnO films
such degradation markedly improved and aand ∆Vth on annealing temperature
marked decrease in hydrogen was confirmed in
the 400 oC-annealed TFTs. Therefore, residual hydrogen in the ZnO films is possible toaccelerate the degradation caused by the electrical stresses.

Summary
We investigated TFTs with ZnO channel layers deposited by PA-ALD at low temperatures.
The fabricated ZnO TFTs were annealed at various temperatures in O2 ambient, and thechanges in their electrical properties were measured. ZnO TFTs with post-thermal annealing in
O2 ambient stably exhibited clear transistor operations with no Vth shift or degradation in S.S.
regardless of annealing temperature. In addition, the (002) peak of the films had a slightly
larger intensity than the (100) peak, and a shift of the (002) peak was observed for the films
annealed above 300 ℃ . These results suggest that the improvements in the transfer
characteristics of ZnO TFTs are attributed to the change of the crystallinity of these TFTs.
Furthermore, the ZnO TFTs annealed at 400 ℃ showed low Vth shift with bias stress.
SIMS analysis revealed a marked reduction in hydrogen by the annealing at 400 ℃. Hydrogenis introduced during the deposition of a film. Therefore, the control of hydrogen concentration
will be the key issue in promoting the reliability. Through this study, we found that electricalproperties of ZnO TFTs are dependent on the annealing temperature, and the threshold voltage
shifts by the stress seem to be caused by the residual hydrogen in ZnO films.

Acknowledgments
The authors would like to thank Dr. N. Hattori and Mr. K. Murata in Mitsui
Engineering & Shipbuilding Co., Ltd. for their help in preparation of ZnO films.

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