Vol. 54 No. 6Material Science and Technology of Japan, 54㸦2017㸧223㹼228

31Regular Paper
Integral Formation of Circuit and Bump by Plating Process without
Chemical Mechanical Polishing (CMP)
Genki KANAMORI1,*, Mitsuhiro WATANABE2, Hideo HONMA2 and Osamu TAKAI1,2
1

College of Engineering, Kanto Gakuin University, 1-50-1㸪Mutsuurahigasi, Kanazawa, Yokohama㸪Kanagawa,236-8501, Japan

2

Kanto Gakuin University Materials and Surface Engineering Research Institute, 1162-2, Ogikubo㸪Odawara, Kanagawa 236-8501, Japan
Received Nov. 2, 2017; accepted for publication Nov. 15, 2017
Abstract
In order to form a bump on an existing circuit, after forming a plating resist having an open portion that would
become a bump on the circuit, plating is performed with a thickness equal to or greater than the thickness of the resist
to form a mushroom-shaped bump. These mushroom-shaped bumps are polished by CMP, whereby it is possible toform bumps having a uniform height and a flat top. However, this kind of process is complicated and advanced
techniques are required. Furthermore, as circuits and bumps are become more miniaturized, it is also difficult toachieve the necessary adhesion strength between the circuit and the bumps as well as the circuit and the materials. By
using the formation method that we examined, we were able to form circuit-integrated bumps of uniform height andflat top without using CMP.
Keywords: Bump, Electroplating, Photolithography
1.

Introduction

is difficult to obtain uniform bump height over the entire surface.

With the expansion of telecommunications including IoT

As a countermeasure to this, shielding plates are placed between(Internet of Things), electronic devices such as smartphones andthe anode and the substrate, or an auxiliary anode is used totablets have made remarkable progress. The development of suchmake the current distribution uniform. However, it is difficult toelectronic devices is supported by fine circuit processing

optimize due to constraints of plating equipment and plating

technologies using plating, which contributes to miniaturization

conditions. For this reason, plating is performed to a thickness

and high functionality.

greater than the resist pattern thickness to form a mushroom-like

Bumps are provided as electrodes for flip-chip mounting

bump. Thereafter, uniformity of the bump height and flatness ofwhich can accommodate high density packaging. Generally,

the top of the bumps are ensured by CMP. However, advanced

bumps are formed by a plating method using a photoresist

flat polishing techniques are required. In addition, there arepattern; however, this method has the following problems.

concerns about defects such as voids in the bumps and adhesion

In order to achieve high-density packaging, it is necessary to

between bumps and the circuit. There is an apprehension thatnarrow the pitch of the plating resist opening that becomes avoids would lead to an increase in electrical resistance andbump due to narrowing of the pitch between the bumps. When

deterioration of electro-migration resistance[1], and hence it lacks

bump formation is performed by electroplating, the current

connection

concentrates on the outer peripheral portion due to the effect ofFurthermore, the finer the bumps are, the smaller the adhesive

the primary current distribution and the film thickness of thearea with the circuit becomes, making it difficult to secureouter peripheral portion tends to become thick. For this reason, itadhesion between the bumps and the circuit.

reliability

as

well

asinsulation

reliability.

Given that, in this study, we examined a method of forming*Corresponding author: g.kanamori@ogic.ne.jp(223)