ST31G480 ST31G384
ST31G320 ST31G256
Secure dual interface microcontroller
with enhanced security and up to 480 Kbytes of Flash memory
Data brief

Contactless features
 Complies with ISO/IEC 14443 Type A, Band B’, PayPass™ and ISO/IEC 18092 passivemode standards Two tuning capacitor values: 20 pF and 68 pF
 Automatic CPU frequency adaptation for
optimum power consumption
 Automatic RF communication type detection
 13.56 MHz carrier frequency

Features RFUART (RF universal asynchronous receivertransmitter) up to 848 Kbps

Hardware features

 Very high bitrate (ASK VHBR) up to 3.4 Mbps
in reception and 6.8 Mbps in transmission

 ARM® SecurCore® SC000™ 32-bit RISC core
 12 Kbytes of User RAM
 Up to 480 Kbytes of secure User high-density
Flash memory including 128 bytes of User OTP
area:– 30-year data retention– 500 000 Erase/Write cycle endurance Operating temperature: –25 °C to +85 ° C

 Simultaneous mode (contact and contactless) 4-Kbyte RF frame buffer in dedicated RFUARTRAM MIFARE Plus® and MIFARE® DESFire® EV1
hardware and software implementation
 MIFARE® Classic available as part ofMIFARE Plus®

 Three 16-bit timers with interrupt

Security features

 Watchdog timer

 Active shield 21. V to 5.5 V supply voltages

 Monitoring of environmental parameters External clock frequency up to 10 MHz Three-key Triple DES accelerator

 CPU clock frequency up to 28 MHz

 AES accelerator

 Power-saving Standby state

 AIS-31 Class PTG2 compliant true random
number generator (TRNG)

 Contact assignment compatible with
ISO/IEC 7816-3 standards
 Asynchronous receiver transmitter (IART) with
RAM buffer for high speed serial data support(ISO/IEC 7816-3 T=0/T=1 and EMV®
compliant) ESD protection greater than 6 kV (HBM) NESCRYPT coprocessor for public key
cryptography algorithm
 ISO/IEC 13239 CRC calculation block Unique serial number on each die Protection against multiple attacks

 CCEAL6+ and EMVCo certification targetApril 2016

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www.st.com

Description

1

ST31G480 ST31G384 ST31G320 ST31G256

Description
Designed for secure ID and banking applications, the ST31G480, ST31G384, ST31G320
and ST31G256 are serial access microcontrollers that incorporate the most recent
generation of ARM processors for embedded secure systems. Their SecurCore® SC000™
32-bit RISC core is built on the Cortex® M0 core with additional security features to help toprotect against advanced forms of attacks.
Cadenced at 28 MHz, the SC000™ core brings great performance and excellent code
density thanks to the Thumb®-2 instruction set.
Some devices implement the MIFARE® DESFire® EV1 or MIFARE Plus® (includingMIFARE® Classic) technology. MIFARE, MIFARE DESFire, MIFARE Plus andMIFARE Classic are registered trademarks of NXP B.V. and are used under license.
An RF interface including an RF universal asynchronous receiver (RFUART) enables
contactless communication up to 848 Kbps compatible with ISO/IEC 14443 Types A, B and
B’ as well as ISO/IEC 18092 standards.
Very-high bitrates (ASK VHBR) up to 3.4 Mbps in reception and 6.8 Mbps in transmission
are possible.
A Simultaneous mode where contactless communication can be enabled while the device isin Contact mode is also available.
The devices also offer a serial communication interface fully compatible with the ISO/IEC7816-3 standard (T=0, T=1).
Three 16-bit general-purpose timers with interrupt capability are available as well as awatchdog timer.
The devices feature hardware accelerators for advanced cryptographic functions. The AESaccelerator provides a high-performance implementation of the AES-128, AES-192 andAES-256 algorithms. The 3-key Triple DES accelerator (EDES+) peripheral enables Cipher
Block Chaining (CBC) mode, fast DES and triple DES computation based on three key
registers and one data register, while the NESCRYPT cryptoprocessor efficiently supports
the public key algorithm with native operations up to 4096 bits long.
The devices operate in the –25 to +85 °C temperature range, at 2.1 V, 3 V and 5 V supply
voltage ranges in Contact mode, and complies with the ISO/IEC 14443 and ISO/IEC18092
specification limits. A comprehensive range of power-saving modes enables the design ofefficient low-power and contactless applications.
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.

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2Software development tool description

Software development tool description
Dedicated SecurCore® SC000™ software development tools are provided by ARM® andKeil™. This includes the Instruction Set Simulator (ISS) and C compiler. The documentation
is available on the ARM and Keil web sites.
Moreover, STMicroelectronics provides:
A time-accurate hardware emulator controlled by the Keil debugger and the ST
development environment.
A complete product simulator based on Keil’s ISS simulator for the SecurCore®
SC000™ CPU.

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Ordering code

3ST31G480 ST31G384 ST31G320 ST31G256

Ordering code

Example:

ST31G480

MRXXA

xxx

Platform type
ST31 = ARM® SecurCore™ SC000 platform
Product family
Dual interface device in 80 nm technology
Memory size (Flash memory)
480 = 480 Kbytes
320 = 320 Kbytes

384 = 384 Kbytes
256 = 256 Kbytes

Specific software features
S = No additional software
M = MIFARE Plus™ or MIFARE DESFire™ EV1
Specific hardware features
B = Contact only, no NESCRYPTC = Contact only
F = Contactless only, no NESCRYPT
G = Contactless only
Q = Dual, no NESCRYPT
R = Dual
Delivery formXX
Product external revision
A = Revision 1
B = Revision 2
Chameleon codexxx

Not all combinations are necessarily available. For a list of available options (speed, package, etc.) or for
further information on any aspect of these devices, please contact your nearest STMicroelectronics
Sales Office.

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4

Revision history

Revision history
Table 1. Document revision history
Date

Revision

17-Jun-2014

1

Initial release.

2

Added the ST31G384, ST31G320 and ST31G256 partnumbers.
Updated cover page features.
Added ECOPACK text.
Replaced Device and feature summary of derivative devices bySection 3: Ordering code.

13-Apr-2016

Changes

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