S-82B1B Series
www.ablic.com
www.ablicinc.com

BATTERY PROTECTION IC
WITH POWER-SAVING FUNCTION FOR 1-CELL PACK© ABLIC Inc., 2017

Rev.1.0_01

The S-82B1B Series is a protection IC for lithium-ion / lithium polymer rechargeable batteries and includes high-accuracy
voltage detection circuits and delay circuits. It is suitable for protecting 1-cell lithium-ion / lithium polymer rechargeable
battery packs from overcharge, overdischarge, and overcurrent.
The S-82B1B Series has an input pin for power-saving signal (PS pin), allowing for reduction of current consumption byusing an external signal to start the power-saving function.

 Features
 High-accuracy voltage detection circuit
Overcharge detection voltage
3.500 V to 4.600 V (5 mV step)
Accuracy 20 mV*1
Accuracy 50 mV
Overcharge release voltage
3.100 V to 4.600 V
Overdischarge detection voltage
2.000 V to 3.000 V (10 mV step)
Accuracy 50 mV*2
Accuracy 100 mV
Overdischarge release voltage
2.000 V to 3.400 V
Discharge overcurrent detection voltage 1
0.010 V to 0.100 V (1 mV step)
Accuracy 3 mV
Discharge overcurrent detection voltage 2
0.030 V to 0.200 V (1 mV step)
Accuracy 5 mV
Load short-circuiting detection voltage
0.050 V to 0.500 V (5 mV step)
Accuracy 20 mV
Charge overcurrent detection voltage
0.100 V to 0.010 V (1 mV step)
Accuracy 3 mV
 Detection delay times are generated only by an internal circuit (external capacitors are unnecessary).
 Power-saving function
PS pin control logic is selectable:
Active "H", active "L"
PS pin internal resistance connection is selectable:
Pull-up, pull-down
PS pin internal resistance value is selectable:
1.0 M, 2.0 M, 3.0 M, 4.0 M, 5.0 M
 0 V battery charge function is selectable:
Available, unavailable
 Power-down function
 Release condition of discharge overcurrent status is selectable:
Load disconnection, charger connection
 Release voltage of discharge overcurrent status is selectable:
Discharge overcurrent detection voltage 1 (VDIOV1),
Discharge overcurrent release voltage (VRIOV) = VDD0.8 (typ.) High-withstand voltage:
VM pin and CO pin: Absolute maximum rating 28 V
 Wide operation temperature range:
Ta = 40°C to 85°C
 Low current consumption
During operation:
2.0 A typ., 4.0 A max. (Ta = 25°C)
During power-down:
50 nA max. (Ta = 25°C)
During power-saving:
50 nA max. (Ta = 25°C)
 Lead-free (Sn 100%), halogen-free*1. Overcharge release voltage = Overcharge detection voltage  Overcharge hysteresis voltage(Overcharge hysteresis voltage can be selected as 0 V or from a range of 0.1 V to 0.4 V in 50 mV step.)*2. Overdischarge release voltage = Overdischarge detection voltage  Overdischarge hysteresis voltage(Overdischarge hysteresis voltage can be selected as 0 V or from a range of 0.1 V to 0.7 V in 100 mV step.) Applications
 Lithium-ion rechargeable battery pack
 Lithium polymer rechargeable battery pack

 Package SNT-6A
1

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
 Block Diagram

VDD
Overdischarge
detection comparator
DO
Overcharge
detection comparator

VSS

Discharge overcurrent
detection 1 comparator
Control logic
Discharge overcurrent
detection 2 comparator

Delay circuit
Oscillator

Load short-circuiting
detection comparator

Charge overcurrent
detection comparator

VM

PS

Pull-up / pull-down
selection circuit

Figure 1

2

COBATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
 Product Name Structure
1. Product name
S-82B1B

xx

-

I6T1

U

Environmental codeU:
Lead-free (Sn 100%), halogen-free
Package abbreviation and IC packing specifications*1
I6T1: SNT-6A, Tape
Serial code*2
Sequentially set from AA to ZZ*1. Refer to the tape drawing.
*2. Refer to "3. Product name list".

2. Package
Table 1 Package Drawing Codes
Package Name
SNT-6A

Dimension
PG006-A-P-SD

Tape
PG006-A-C-SD

Reel
PG006-A-R-SD

Land
PG006-A-L-SD

3. Product name list
3. 1 SNT-6A
Table 2 (1 / 2)
Product Name

Overcharge
Detection
Voltage[VCU]

Overcharge
ReleaseVoltage[VCL]

Overdischarge
Detection
Voltage[VDL]

Overdischarge
ReleaseVoltage[VDU]

Delay Time
Combination*1

Function
Combination*2

S-82B1BAA-I6T1U

4.275 V4.075 V

3.100 V

3.200 V

(1)

(1)

Table 2 (2 / 2)
Product Name

Discharge Overcurrent
Detection Voltage 1[VDIOV1]

Discharge Overcurrent
Detection Voltage 2[VDIOV2]

S-82B1BAA-I6T1U
0.030 V
0.045 V
*1. Refer to Table 3 about the details of the delay time combinations.
*2. Refer to Table 5 about the details of the function combinations.

Load Short-circuiting
Detection Voltage[VSHORT]

Charge Overcurrent
Detection Voltage[VCIOV]

0.205 V

0.030 V

Remark Please contact our sales office for the products with detection voltage value other than those specified above.

3

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
Table 3
Delay Time
Combination

Overcharge
Detection
Delay Time
[tCU]

Overdischarge
Detection
Delay Time[tDL]

Discharge
Overcurrent
Detection
Delay Time 1[tDIOV1]

Discharge
Overcurrent
Detection
Delay Time 2[tDIOV2]

Load Shortcircuiting
Detection
Delay Time[tSHORT]

ChargeOvercurrent
Detection
Delay Time[tCIOV]Powersaving
Delay Time
[tPS]

(1)

256 ms32 ms

256 ms

16 ms

280 s8 ms

256 msRemark The delay times can be changed within the range listed in Table 4. For details, please contact our sales office.
Table 4
Delay Time

SymbolOvercharge detection
delay time
Overdischarge detection
delay time
Discharge overcurrent
detection delay time 1
Discharge overcurrent
detection delay time 2
Load short-circuiting
detection delay time
Charge overcurrent
detection delay timePower-saving delay time

Selection Range

RemarktCU

256 ms

512 ms

1.0 s







tDL

32 ms

64 ms

128 ms256 mstDIOV14 ms
256 ms8 ms
512 ms

16 ms
1.0 s

32 ms
2.0 s

64 ms
4.0 s

128 mstDIOV2

4 ms

8 ms

16 ms

32 ms

64 ms

128 mstSHORT280 s530 s









tCIOV

4 ms

8 ms

16 ms

32 ms

64 ms

128 ms

tPS

32 ms

64 ms

128 ms256 ms

Select a value fromthe left.
Select a value fromthe left.
Select a value fromthe left.
Select a value fromthe left.
Select a value fromthe left.
Select a value fromthe left.
Select a value fromthe left.

Table 5PS pinFunction
Combination(1)

Control
Logic*1
Active "H"Internal
ResistanceConnection*2

Internal
Resistance
*3
Value
[RPS]

0 V Battery
ChargeFunction*4

Release Conditionof Discharge
Overcurrent Status*5

Release Voltage
of Discharge
Overcurrent Status*6

Pull-down

5.0 M

Unavailable

Charger connection

VDIOV1*1. PS pin control logic active "H" / active "L" is selectable.
*2. PS pin internal resistance connection "pull-up" / "pull-down" is selectable.
*3. PS pin internal resistance value 1.0 M / 2.0 M / 3.0 M/ 4.0 M / 5.0 M is selectable.
*4. 0 V battery charge function "available" / "unavailable" is selectable.
*5. Release condition of discharge overcurrent status "load disconnection" / "charger connection" is selectable.
*6. Release voltage of discharge overcurrent status "VDIOV1" / "VRIOV = VDD0.8 (typ.)" is selectable.
Remark Please contact our sales office for the products with function combinations other than those specified above.

4

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
 Pin Configuration
1. SNT-6A
Top view
1
2
3

Table 66
5
4

Figure 2

Pin No.

Symbol

1

VM

2

CO

3

DO

4
5
6

VSS
VDD
PS

Description
Overcurrent detection pin
Connection pin of charge control FET gate
(CMOS output)
Connection pin of discharge control FET gate
(CMOS output)
Input pin for negative power supply
Input pin for positive power supply
Input pin for power-saving signal

5

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
 Absolute Maximum Ratings
Table 7
(Ta = 25°C unless otherwise specified)
Item

SymbolApplied Pin

Absolute Maximum Rating

Unit

Input voltage between VDD pin and VSS pin

VDS

VDD

VSS  0.3 to VSS  6

VPS pin input voltage

VPS

PS

VDD  6 to VDD  0.3

V

VM pin input voltage

VVM

VM

VDD  28 to VDD  0.3

V

DO pin output voltage

VDO

DO

VSS  0.3 to VDD  0.3

V

CO pin output voltage
Operation ambient temperature

VCO
Topr

CO


VVM  0.3 to VDD  0.3
40 to 85

VC

Storage temperature

Tstg



55 to 125

C

Caution The absolute maximum ratings are rated values exceeding which the product could suffer physicaldamage. These values must therefore not be exceeded under any conditions.

 Thermal Resistance Value
Item

Junction-to-ambient thermal resistance*1

SymbolJA

Table 8
Condition
Board A
Board B
Board C
SNT-6A
Board D
Board E

*1. Test environment: compliance with JEDEC STANDARD JESD51-2A
Remark Refer to " Power Dissipation" and "Test Board" for details.

6

Min.






Typ.
224
176




Max.






Unit
C/W
C/W
C/W
C/W
C/W

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series Electrical Characteristics
1. Ta = 25°C
Table 9Item

SymbolConditionMin.

(Ta = 25°C unless otherwise specified)
Test
Typ.
Max.
Unit
Circuit

Detection Voltage
Overcharge detection voltage

VCU

Overcharge release voltage

VCL

Overdischarge detection voltage

VDL

Overdischarge release voltage

VDU

Discharge overcurrent detection voltage 1
Discharge overcurrent detection voltage 2
Load short-circuiting detection voltage
Charge overcurrent detection voltage
Discharge overcurrent release voltage
0 V Battery Charge Function*1Ta = 10°C to 60°C
VCL  VCUVCU  0.020
VCU0.025

VCU
VCU

VCU0.020
VCU0.025

V
V

1
1

VCL0.050

VCL

VCL0.050

V

1

VCL = VCU

VCL0.025
VDL  0.050
VDU0.100

VCL
VDL
VDU

VCL0.020
VDL0.050
VDU0.100

V
V
V

1
2
2






VDU0.050
VDU
VDU0.050
VDIOV1  0.003
VDIOV1VDIOV10.003
VDIOV2  0.005
VDIOV2VDIOV20.005
VSHORT0.020 VSHORT VSHORT0.020
VCIOV  0.003
VCIOV
VCIOV0.003
VDD  0.77
VDD0.8
VDD  0.83

V
V
V
V
V
V

2
2
2
2
2
2

VDL  VDU

VDL = VDUVDIOV1VDIOV2VSHORTVCIOVVRIOV VDD = 3.4 V

0 V battery charge starting charger voltage

V0CHA

0 V battery charge inhibition battery voltage

V0INH

Internal Resistance
RVMD
Resistance between VDD pin and VM pin
RVMS
Resistance between VM pin and VSS pin
RPS
PS pin internal resistance
Input Voltage
Operation voltage between VDD pin and
VDSOP1
VSS pinOperation voltage between VDD pin and
VDSOP2
VM pinVPSH
PS pin voltage "H"VPSL
PS pin voltage "L"
Input Current
IOPE
Current consumption during operation
IPDN
Current consumption during power-down
IPS
Current consumption during power-saving
Output Resistance
RCOH
CO pin resistance "H"RCOL
CO pin resistance "L"
RDOH
DO pin resistance "H"RDOL
DO pin resistance "L"
Delay Time
tCU
Overcharge detection delay time
tDL
Overdischarge detection delay time
Discharge overcurrent detection delay time 1 tDIOV1
Discharge overcurrent detection delay time 2 tDIOV2tSHORT
Load short-circuiting detection delay time
tCIOV
Charge overcurrent detection delay timetPS
Power-saving delay time

0 V battery charge function"available"
0 V battery charge function"unavailable"

0.0

0.7

1.0

V

2

0.9

1.2

1.5

V

2



500
5
RPS  0.5

1000
10
RPS

2000
15
RPS2.0

k
k
M

3
3
3



1.5



6.0

V





1.5



28

V







VDD  0.1

VDD  0.9


V
V

2
2





2.0



4.0
0.05
0.05

A
A
A

3
3
3






5
5
5
5

10
10
10
10

20
20
20
20

k
k
k
k

4
4
4
4









tCU0.7
tDL  0.7
tDIOV1  0.7
tDIOV2  0.7
tSHORT  0.7
tCIOV  0.7
tPS  0.7

tCU
tDL

tCU1.3
tDL1.3
tDIOV11.3
tDIOV21.3
tSHORT 1.3
tCIOV1.3
tPS1.3









5
5
5
5
5
5
5

VDD = 1.8 V, VVM = 0 V
VDD = 3.4 V, VVM = 1.0 V

VDD = 3.4 V, VVM = 0 V
VDD = VVM = 1.5 V
VDD = VVM = 3.4 V

tDIOV1tDIOV2tSHORTtCIOVtPS*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed bydesign, not tested in production.
7

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
2. Ta = 40°C to 85°C*1
Table 10
Item

SymbolDetection Voltage
Overcharge detection voltage

VCU

Overcharge release voltage

VCL

Overdischarge detection voltage

VDL

Overdischarge release voltage

VDU

Discharge overcurrent detection voltage 1
Discharge overcurrent detection voltage 2
Load short-circuiting detection voltage
Charge overcurrent detection voltage
Discharge overcurrent release voltage
0 V Battery Charge Function

Condition
VCL  VCU
VCL = VCU
VDL  VDU

VDL = VDUVDIOV1VDIOV2
VSHORT

VCIOV

VRIOV
VDD = 3.4 V

0 V battery charge starting charger voltage

V0CHA

0 V battery charge inhibition battery voltage

V0INH

Internal Resistance
RVMD
Resistance between VDD pin and VM pin
RVMS
Resistance between VM pin and VSS pin
RPS
PS pin internal resistance
Input Voltage
Operation voltage between VDD pin and
VDSOP1
VSS pinOperation voltage between VDD pin and
VDSOP2
VM pinVPSH
PS pin voltage "H"VPSL
PS pin voltage "L"
Input Current
IOPE
Current consumption during operation
IPDN
Current consumption during power-down
IPS
Current consumption during power-saving
Output Resistance
RCOH
CO pin resistance "H"RCOL
CO pin resistance "L"
RDOH
DO pin resistance "H"RDOL
DO pin resistance "L"
Delay Time
tCU
Overcharge detection delay time
tDL
Overdischarge detection delay time
Discharge overcurrent detection delay time 1 tDIOV1
Discharge overcurrent detection delay time 2 tDIOV2tSHORT
Load short-circuiting detection delay time
tCIOV
Charge overcurrent detection delay timetPS
Power-saving delay time

0 V battery charge function"available"
0 V battery charge function"unavailable"*1(Ta = 40°C to 85°C unless otherwise specified)
Test
Min.
Typ.
Max.
Unit
Circuit

VCU  0.045
VCL0.080

VCU
VCL

VCU0.030
VCL0.060

V
V

1
1

VCL0.050
VDL  0.080
VDU0.130

VCL
VDL
VDU

VCL0.030
VDL0.060
VDU0.110

V
V
V

1
2
2

VDU0.080
VDU
VDU0.060
VDIOV1  0.003 VDIOV1VDIOV10.003
VDIOV2  0.005 VDIOV2VDIOV20.005
VSHORT0.020 VSHORT VSHORT0.020
VCIOV  0.003
VCIOV
VCIOV0.003
VDD  0.77
VDD0.8
VDD  0.83

V
V
V
V
V
V

2
2
2
2
2
2

0.0

0.7

1.5

V

2

0.7

1.2

1.7

V

2

VDD = 1.8 V, VVM = 0 V
VDD = 3.4 V, VVM = 1.0 V


250
3.5
RPS  0.25

1000
10
RPS

3000
20
RPS3.0

k
k
M

3
3
3



1.5



6.0

V





1.5



28

V







VDD  0.05

VDD  0.95


V
V

2
2





2.0



5.0
0.1
0.1

A
A
A

3
3
3






2.5
2.5
2.5
2.5

10
10
10
10

30
30
30
30

k
k
k

4
4
4
4









tCU0.4
tDL  0.4
tDIOV1  0.4
tDIOV2  0.4
tSHORT  0.4
tCIOV  0.4
tPS  0.4

tCU
tDL

tCU2.5
tDL2.5
tDIOV12.5
tDIOV22.5
tSHORT2.5
tCIOV2.5
tPS2.5








VDD = 3.4 V, VVM = 0 V
VDD = VVM = 1.5 V
VDD = VVM = 3.4 V

tDIOV1tDIOV2tSHORT
tCIOV
tPS

k



5
5
5
5
5
5
5

*1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed bydesign, not tested in production.

8

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
 Test Circuits
When PS pin control logic is active "H", SW1 and SW3 are turned off, SW2 and SW4 are turned on. When PS pin control
logic is active "L", SW1 and SW3 are turned on, SW2 and SW4 are turned off.
Caution Unless otherwise specified, the output voltage levels "H" and "L" at CO pin (VCO) and DO pin (VDO) are
judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to
VVM and the DO pin level with respect to VSS.

1. Overcharge detection voltage, overcharge release voltage(Test circuit 1)
Overcharge detection voltage (VCU) is defined as the voltage V1 at which VCO goes from "H" to "L" when the voltage
V1 is gradually increased from the starting condition of V1 = 3.4 V. Overcharge release voltage (VCL) is defined as
the voltage V1 at which VCO goes from "L" to "H" when the voltage V1 is then gradually decreased. Overcharge
hysteresis voltage (VHC) is defined as the difference between VCU and VCL.

2. Overdischarge detection voltage, overdischarge release voltage(Test circuit 2)
Overdischarge detection voltage (VDL) is defined as the voltage V1 at which VDO goes from "H" to "L" when thevoltage V1 is gradually decreased from the starting conditions of V1 = 3.4 V, V2 = V5 = 0 V. Overdischarge releasevoltage (VDU) is defined as the voltage V1 at which VDO goes from "L" to "H" when setting V2 = 0.01 V, V5 = 0 V andwhen the voltage V1 is then gradually increased. Overdischarge hysteresis voltage (VHD) is defined as the difference
between VDU and VDL.

3. Discharge overcurrent detection voltage 1, discharge overcurrent release voltage(Test circuit 2)
3. 1 Release voltage of discharge overcurrent status "VDIOV1"Discharge overcurrent detection voltage 1 (VDIOV1) is defined as the voltage V2 whose delay time for changing
VDO from "H" to "L" is discharge overcurrent detection delay time (tDIOV1) when the voltage V2 is increased fromthe starting conditions of V1 = 3.4 V, V2 = V5 = 0 V. VDO goes from "L" to "H" when setting V2 = 3.4 V and whenthe voltage V2 is then gradually decreased to VDIOV1 typ. or lower.
3. 2 Release voltage of discharge overcurrent status "VRIOV"VDIOV1 is defined as the voltage V2 whose delay time for changing VDO from "H" to "L" is tDIOV1 when the voltage
V2 is increased from the starting conditions of V1 = 3.4 V, V2 = V5 = 0 V. Discharge overcurrent release voltage(VRIOV) is defined as the voltage V2 at which VDO goes from "L" to "H" when setting V2 = 3.4 V and when thevoltage V2 is then gradually decreased.

4. Discharge overcurrent detection voltage 2(Test circuit 2)
Discharge overcurrent detection voltage 2 (VDIOV2) is defined as the voltage V2 whose delay time for changing VDOfrom "H" to "L" is discharge overcurrent detection delay time 2 (tDIOV2) when the voltage V2 is increased from thestarting conditions of V1 = 3.4 V, V2 = V5 = 0 V.

5. Load short-circuiting detection voltage(Test circuit 2)
Load short-circuiting detection voltage (VSHORT) is defined as the voltage V2 whose delay time for changing VDO from
"H" to "L" is load short-circuiting detection delay time (tSHORT) when the voltage V2 is increased from the starting
conditions of V1 = 3.4 V, V2 = V5 = 0 V.

6. Charge overcurrent detection voltage(Test circuit 2)
Charge overcurrent detection voltage (VCIOV) is defined as the voltage V2 whose delay time for changing VCO from
"H" to "L" is charge overcurrent detection delay time (tCIOV) when the voltage V2 is decreased from the starting
conditions of V1 = 3.4 V, V2 = V5 = 0 V.
9

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
7. Current consumption during operation(Test circuit 3)
The current consumption during operation (IOPE) is the current that flows through the VDD pin (IDD) under the set
conditions of V1 = 3.4 V and V2 = V5 = 0 V. However, the current flowing through the internal resistor of the PS pin
is excluded.

8. Current consumption during power-down(Test circuit 3)
The current consumption during power-down (IPDN) is IDD under the set conditions of V1 = V2 = 1.5 V, V5 = 0 V.

9. Current consumption during power-saving(Test circuit 3)
The current consumption during power-saving (IPS) is IDD under the set conditions of V1 = V2 = V5 = 3.4 V.

10. Resistance between VDD pin and VM pin(Test circuit 3)
RVMD is the resistance between VDD pin and VM pin under the set conditions of V1 = 1.8 V, V2 = V5 = 0 V.

11. Resistance between VM pin and VSS pin (Release condition of discharge overcurrent status"load disconnection")(Test circuit 3)
RVMS is the resistance between VM pin and VSS pin under the set conditions of V1 = 3.4 V, V2 = 1.0 V, V5 = 0 V.

12. PS pin internal resistance(Test circuit 3)
12. 1 PS pin control logic active "H" and PS pin internal resistance connection "pull-up"
Resistance between PS pin and VDD pin is RPS under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.
12. 2 PS pin control logic active "H" and PS pin internal resistance connection "pull-down"
Resistance between PS pin and VSS pin is RPS under the set conditions of V1 = V5 = 3.4 V, V2 = 0 V.
12. 3 PS pin control logic active "L" and PS pin internal resistance connection "pull-up"
Resistance between PS pin and VDD pin is RPS under the set conditions of V1 = V5 = 3.4 V, V2 = 0 V.
12. 4 PS pin control logic active "L" and PS pin internal resistance connection "pull-down"
Resistance between PS pin and VSS pin is RPS under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.

13. CO pin resistance "H"(Test circuit 4)
The CO pin resistance "H" (RCOH) is the resistance between VDD pin and CO pin under the set conditions of V1 = 3.4 V,
V2 = 0 V, V3 = 3.0 V.

14. CO pin resistance "L"(Test circuit 4)
The CO pin resistance "L" (RCOL) is the resistance between VM pin and CO pin under the set conditions of V1 = 4.7 V,
V2 = 0 V, V3 = 0.4 V.

10

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
15. DO pin resistance "H"(Test circuit 4)
The DO pin resistance "H" (RDOH) is the resistance between VDD pin and DO pin under the set conditions of V1 = 3.4 V,
V2 = 0 V, V4 = 3.0 V.

16. DO pin resistance "L"(Test circuit 4)
The DO pin resistance "L" (RDOL) is the resistance between VSS pin and DO pin under the set conditions of V1 = 1.8 V,
V2 = 0 V, V4 = 0.4 V.

17. PS pin voltage "H", PS pin voltage "L"(Test circuit 2)
17. 1 PS pin control logic active "H"
The PS pin voltage "H" (VPSH) is defined as the voltage V5 at which VDO goes from "H" to "L" and when thevoltage V5 is gradually increased under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.
17. 2 PS pin control logic active "L"
The PS pin voltage "L" (VPSL) is defined as the voltage difference between the voltage V5 and the voltage V1(V1  V5) at which VDO goes from "H" to "L" when the voltage V5 is gradually increased under the set
conditions of V1 = 3.4 V, V2 = V5 = 0 V.

18. Overcharge detection delay time
(Test circuit 5)
The overcharge detection delay time (tCU) is the time needed for VCO to go to "L" just after the voltage V1 increases
and exceeds VCU under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.

19. Overdischarge detection delay time
(Test circuit 5)
The overdischarge detection delay time (tDL) is the time needed for VDO to go to "L" after the voltage V1 decreases
and falls below VDL under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.

20. Discharge overcurrent detection delay time 1(Test circuit 5)
The discharge overcurrent detection delay time 1 (tDIOV1) is the time needed for VDO to go to "L" after the voltage V2
increases and exceeds VDIOV1 under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.

21. Discharge overcurrent detection delay time 2(Test circuit 5)
The discharge overcurrent detection delay time 2 (tDIOV2) is the time needed for VDO to go to "L" after the voltage V2
increases and exceeds VDIOV2 under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.

22. Load short-circuiting detection delay time
(Test circuit 5)
The load short-circuiting detection delay time (tSHORT) is the time needed for VDO to go to "L" after the voltage V2
increases and exceeds VSHORT under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.

23. Charge overcurrent detection delay time
(Test circuit 5)
The charge overcurrent detection delay time (tCIOV) is the time needed for VCO to go to "L" after the voltage V2
decreases and falls below VCIOV under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.

11

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
24. Power-saving delay time
(Test circuit 5)
24. 1 PS pin control logic active "H"Power-saving delay time (tPS) is the time needed for VDO to go to "L" after the voltage V5 increases andexceeds VPSH under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.
24. 2 PS pin control logic active "L"Power-saving delay time (tPS) is the time needed for VDO to go to "L" after the voltage V5 increases and V1 
V5 falls below VPSL under the set conditions of V1 = 3.4 V, V2 = V5 = 0 V.

25. 0 V battery charge starting charger voltage (0 V battery charge function "available")(Test circuit 2)
The 0 V battery charge starting charger voltage (V0CHA) is defined as the absolute value of voltage V2 at which VCO
goes to "H" (VCO = VDD) when the voltage V2 is gradually decreased from the starting condition of V1 = V2 = V5 =0 V.

26. 0 V battery charge inhibition battery voltage (0 V battery charge function "unavailable")(Test circuit 2)
The 0 V battery charge inhibition battery voltage (V0INH) is defined as the voltage V1 at which VCO goes to "L" (VCO =VVM) when the voltage V1 is gradually decreased, after setting V1 = 1.9 V, V2 = 2.0 V, V5 = 0 V.

12

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series

R1= 330 

SW1
PS

VDD

VDD

SW2

V1

VSS

C1
= 0.1 F

VSS

VM
DO

CO

V VDO

V VCO

SW3
VM

DO

CO

V VDO

V VCO

SW2

V2

COM

COM

Figure 4 Test Circuit 1

IDD
A

V5
S-82B1B Series

S-82B1B Series

V1

SW4 SW1

PS

PS

VDD

V1

S-82B1B Series
VSS

Figure 5 Test Circuit 2

IPS SW4 SW1
A
V5
SW3

VM
DO

CO

SW1
PS

VDD
V1

SW2
S-82B1B Series

SW2
VSS

VM

IVM A

DO

CO

V2

A IDO

A ICO

V4

V3

COM

V2

COM

Figure 6 Test Circuit 3

Figure 7 Test Circuit 4

SW4
VDD
V1

SW1

PS
V5
S-82B1B Series

VSS

SW3
VM

DO

Oscilloscope

SW2

CO

Oscilloscope

V2

COM

Figure 8 Test Circuit 5

13

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
 Operation
Remark Refer to " Battery Protection IC Connection Example".

1. Normal status
The S-82B1B Series monitors the voltage of the battery connected between VDD pin and VSS pin, the voltage
between VM pin and VSS pin and the voltage between PS pin and VSS pin to control charging and discharging.
When the battery voltage is in the range from overdischarge detection voltage (VDL) to overcharge detection voltage(VCU), the VM pin voltage is in the range from charge overcurrent detection voltage (VCIOV) to discharge overcurrent
detection voltage 1 (VDIOV1), the S-82B1B Series turns both the charge-discharge control FETs on. This condition iscalled the normal status, and in this condition charging and discharging can be carried out freely.
The resistance between VDD pin and VM pin (RVMD), and the resistance between VM pin and VSS pin (RVMS) are notconnected in the normal status.
Caution After the battery is connected, discharging may not be carried. In this case, the S-82B1B Series
becomes the normal status by connecting a charger.

2. Overcharge status
2. 1 VCL  VCU (Product in which overcharge release voltage differs from overcharge detection voltage)
When the battery voltage becomes higher than VCU during charging in the normal status and the condition
continues for the overcharge detection delay time (tCU) or longer, the S-82B1B Series turns the charge control
FET off to stop charging. This condition is called the overcharge status.
The overcharge status is released in the following two cases.
(1) In the case that the VM pin voltage is lower than 0.35 V typ., the S-82B1B Series releases the overcharge
status when the battery voltage falls below overcharge release voltage (VCL).
(2) In the case that the VM pin voltage is equal to or higher than 0.35 V typ., the S-82B1B Series releases theovercharge status when the battery voltage falls below VCU.
When the discharge is started by connecting a load after the overcharge detection, the VM pin voltage rises by
the Vf voltage of the parasitic diode than the VSS pin voltage, because the discharge current flows through theparasitic diode in the charge control FET. If this VM pin voltage is equal to or higher than 0.35 V typ., the S-82B1B
Series releases the overcharge status when the battery voltage is equal to or lower than VCU.
CautionIf the battery is charged to a voltage higher than VCU and the battery voltage does not fall below VCUeven when a heavy load is connected, discharge overcurrent detection and load short-circuiting
detection do not function until the battery voltage falls below VCU. Since an actual battery has aninternal impedance of tens of m, the battery voltage drops immediately after a heavy load thatcauses overcurrent is connected, and discharge overcurrent detection and load short-circuiting
detection function.

2. 2 VCL = VCU (Product in which overcharge release voltage is the same as overcharge detection voltage)
When the battery voltage becomes higher than VCU during charging in the normal status and the condition
continues for the overcharge detection delay time (tCU) or longer, the S-82B1B Series turns the charge control
FET off to stop charging. This condition is called the overcharge status.
In the case that the VM pin voltage is equal to or higher than 0.35 V typ. and the battery voltage falls below VCU,
the S-82B1B Series releases the overcharge status.
When the discharge is started by connecting a load after the overcharge detection, the VM pin voltage rises by
the Vf voltage of the parasitic diode than the VSS pin voltage, because the discharge current flows through theparasitic diode in the charge control FET. If this VM pin voltage is equal to or higher than 0.35 V typ., the S-82B1B
Series releases the overcharge status when the battery voltage is equal to or lower than VCU.
Caution 1. If the battery is charged to a voltage higher than VCU and the battery voltage does not fall below
VCU even when a heavy load is connected, discharge overcurrent detection and load shortcircuiting detection do not function until the battery voltage falls below VCU. Since an actual
battery has an internal impedance of tens of m, the battery voltage drops immediately after aheavy load that causes overcurrent is connected, and discharge overcurrent detection and load
short-circuiting detection function.
2. When a charger is connected after overcharge detection, the overcharge status is not released
even if the battery voltage is below VCL. The overcharge status is released when the discharge
current flows and the VM pin voltage goes over 0.35 V typ. by removing the charger.
14

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
3. Overdischarge status
When the battery voltage falls below VDL during discharging in the normal status and the condition continues for the
overdischarge detection delay time (tDL) or longer, the S-82B1B Series turns the discharge control FET off to stopdischarging. This condition is called the overdischarge status.
Under the overdischarge status, VDD pin and VM pin are shorted by RVMD in the S-82B1B Series. The VM pin
voltage is pulled up by RVMD.
When connecting a charger in the overdischarge status, the battery voltage reaches VDL or higher and the S-82B1B
Series releases the overdischarge status if the VM pin voltage falls below 0 V typ.
The battery voltage reaches the overdischarge release voltage (VDU) or higher and the S-82B1B Series releases theoverdischarge status if the VM pin voltage does not fall below 0 V typ.
RVMS is not connected in the overdischarge status.
Under the overdischarge status, when voltage difference between VDD pin and VM pin is 0.8 V typ. or lower, thepower-down function works and the current consumption is reduced to the current consumption during power-down(IPDN). By connecting a battery charger, the power-down function is released when the VM pin voltage is 0.7 V typ. or
lower.
 When a battery is not connected to a charger and the VM pin voltage 0.7 V typ., the S-82B1B Series maintains
the overdischarge status even when the battery voltage reaches VDU or higher.
 When a battery is connected to a charger and 0.7 V typ.the VM pin voltage 0 V typ., the battery voltage
reaches VDU or higher and the S-82B1B Series releases the overdischarge status.
 When a battery is connected to a charger and 0 V typ.the VM pin voltage, the battery voltage reaches VDL or
higher and the S-82B1B Series releases the overdischarge status.

4. Discharge overcurrent status (discharge overcurrent 1, discharge overcurrent 2, load shortcircuiting)
When a battery in the normal status is in the status where the VM pin voltage is equal to or higher than VDIOV1
because the discharge current is equal to or higher than the specified value and the status lasts for the discharge
overcurrent detection delay time (tDIOV1) or longer, the discharge control FET is turned off and discharging is stopped.
This status is called the discharge overcurrent status.
4. 1

Release condition of discharge overcurrent status "load disconnection" and release voltage ofdischarge overcurrent status "VDIOV1"Under the discharge overcurrent status, VM pin and VSS pin are shorted by RVMS in the S-82B1B Series.
However, the VM pin voltage is the VDD pin voltage due to the load as long as the load is connected. When theload is disconnected, VM pin returns to the VSS pin voltage.
When the VM pin voltage returns to VDIOV1 or lower, the S-82B1B Series releases the discharge overcurrent
status.
RVMD is not connected in the discharge overcurrent status.

4. 2

Release condition of discharge overcurrent status "load disconnection" and release voltage ofdischarge overcurrent status "VRIOV"
Under the discharge overcurrent status, VM pin and VSS pin are shorted by RVMS in the S-82B1B Series.
However, the VM pin voltage is the VDD pin voltage due to the load as long as the load is connected. When theload is disconnected, VM pin returns to the VSS pin voltage.
When the VM pin voltage returns to VRIOV or lower, the S-82B1B Series releases the discharge overcurrent
status.
RVMD is not connected in the discharge overcurrent status.

4. 3 Release condition of discharge overcurrent status "charger connection"
Under the discharge overcurrent status, VDD pin and VM pin are shorted by RVMD in the S-82B1B Series.
When a battery is connected to a charger and the VM pin voltage returns to VDIOV1 or lower, the S-82B1B Series
releases the discharge overcurrent status.
RVMS is not connected in the discharge overcurrent status.

5. Charge overcurrent status
When a battery in the normal status is in the status where the VM pin voltage is equal to or lower than VCIOV because
the charge current is equal to or higher than the specified value and the status lasts for the charge overcurrent
detection delay time (tCIOV) or longer, the charge control FET is turned off and charging is stopped. This status iscalled the charge overcurrent status.
The S-82B1B Series releases the charge overcurrent status when the discharge current flows and the VM pin voltage
is 0.35 V typ. or higher by removing the charger.
The charge overcurrent detection does not function in the overdischarge status.
15

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
6. Power-saving function
6. 1 PS pin control logic active "H"
When a battery in the normal status is in the status where the PS pin voltage is equal to higher than PS pin
voltage "H" (VPSH) and the status lasts for the power-saving delay time (tPS) or longer, the discharge control FET
is turned off, and discharging is stopped. This status is called the discharge inhibition status.
Under the discharge inhibition status, VDD pin and VM pin are shorted by RVMD in the S-82B1B Series, and VM
pin is pulled up by RVMD.
When the discharge inhibition status lasts for the overdischarge detection delay time (tDL) or longer, the powersaving function works and the current consumption is reduced to the current consumption during power-saving(IPS) if voltage difference between VDD pin and VM pin is 0.8 V typ. or lower.
6. 2 PS pin control logic active "L"
When a battery in the normal status is in the status where the PS pin voltage is equal to lower than PS pin
voltage "L" (VPSL) and the status lasts for the power-saving delay time (tPS) or longer, the discharge control FET
is turned off, and discharging is stopped. This status is called the discharge inhibition status.
Under the discharge inhibition status, VDD pin and VM pin are shorted by RVMD in the S-82B1B Series, and VM
pin is pulled up by RVMD.
When the discharge inhibition status lasts for the overdischarge detection delay time (tDL) or longer, the powersaving function works and the current consumption is reduced to the current consumption during power-saving(IPS) if voltage difference between VDD pin and VM pin is 0.8 V typ. or lower.
When the PS pin is active and the condition lasts for tPS  tDL or longer, the power-saving function works and it
continues working even if the PS pin is made inactive.
By connecting a battery charger, the power-saving function is released when the VM pin voltage is 0.7 V typ. or lower.

7. 0 V battery charge function "available"
This function is used to recharge a connected battery whose voltage is 0 V due to self-discharge. When the 0 V
battery charge starting charger voltage (V0CHA) or a higher voltage is applied between the EB and EB pins byconnecting a charger, the charge control FET gate is fixed to the VDD pin voltage.
When the voltage between the gate and source of the charge control FET becomes equal to or higher than thethreshold voltage due to the charger voltage, the charge control FET is turned on to start charging. At this time, thedischarge control FET is off and the charging current flows through the internal parasitic diode in the discharging
control FET. When the battery voltage becomes equal to or higher than VDL, the S-82B1B Series enters the normal
status.
Caution 1. Some battery providers do not recommend charging for a completely self-discharged lithium-ion
rechargeable battery. Please ask the battery provider to determine whether to enable or inhibit
the 0 V battery charge function.
2. The 0 V battery charge function has higher priority than the charge overcurrent detection
function. Consequently, a product in which use of the 0 V battery charge function is enabledcharges a battery forcibly and the charge overcurrent cannot be detected when the battery
voltage is lower than VDL.

8. 0 V battery charge function "unavailable"
This function inhibits charging when a battery that is internally short-circuited (0 V battery) is connected. When thebattery voltage is the 0 V battery charge inhibition battery voltage (V0INH) or lower, the charge control FET gate is
fixed to the EB pin voltage to inhibit charging. When the battery voltage is V0INH or higher, charging can be
performed.
Caution Some battery providers do not recommend charging for a completely self-discharged lithium-ion
rechargeable battery. Please ask the battery provider to determine whether to enable or inhibit the0 V battery charge function.

16

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
9. Delay circuit
The detection delay times are determined by dividing a clock of approximately 4 kHz by the counter.
RemarktDIOV1, tDIOV2 and tSHORT start when VDIOV1 is detected. When VDIOV2 or VSHORT is detected over tDIOV2 or tSHORT
after the detection of VDIOV1, the S-82B1B Series turns the discharge control FET off within tDIOV2 or tSHORTof each detection.
VDD
DO pin voltage
tD
VSS

VDD

tSHORT0  tD  tSHORTTimeVSHORT
VM pin voltage
VDIOV1VSS
Time

Figure 917

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series Timing Charts
1. Overcharge detection, overdischarge detection
VCU
VCL(VCUVHC)
Battery voltage
VDU(VDLVHD)
VDL

VDD
DO pin voltage

VSS
VDD
CO pin voltage
VSS
VEB

VDD
VM pin voltage
0.35 V typ.
VSS
VCIOV
VEB
Charger connection
Load connection
Overcharge detection delay time (tCU)
Status*1(1)Overdischarge detection delay time (tDL)

(2)

(1)

*1. (1): Normal status(2): Overcharge status(3): Overdischarge status
Remark The charger is assumed to charge with a constant current.
Figure 10

18

(3)

(1)

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
2. Discharge overcurrent detection
2. 1 Release condition of discharge overcurrent status "load disconnection"

VCU
VCL (VCU VHC)
Battery voltage
VDU (VDL VHD)
VDL

VDD
DO pin voltage

VSS
VDD
CO pin voltage
VSS

VDD
VRIOV
VM pin voltage VSHORTVDIOV2VDIOV1VSS
Load connection

Status*1

Discharge overcurrent
Discharge overcurrent
detection delay time 1 (tDIOV1) detection delay time 2 (tDIOV2)
(1)

(2)

(1)

(2)

Load short-circuiting
detection delay time (tSHORT)
(1)

(2)

(1)

*1. (1): Normal status(2): Discharge overcurrent status
Remark The charger is assumed to charge with a constant current.
Figure 11

19

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
2. 2 Release condition of discharge overcurrent status "charger connection"
VCU
VCL (VCU VHC)
Battery voltage
VDU (VDL VHD)
VDL

VDD
DO pin voltage

VSS
VDD
CO pin voltage
VSS

VDD
VSHORT
VDIOV2
VM pin voltage VDIOV1
VSS
VCIOV
VEBCharger connection
Load connection

Discharge overcurrent
detection delay time 1 (tDIOV1)

Status

*1

(1)

(2)

Discharge overcurrent
Load short-circuiting
detection delay time 2 (tDIOV2) detection delay time (tSHORT)(1)*1. (1): Normal status(2): Discharge overcurrent status
Remark The charger is assumed to charge with a constant current.
Figure 12

20

(2)

(1)

(2)

(1)

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
3. Charge overcurrent detection
VCU
VCL (VCUVHC)
Battery voltage
VDU (VDLVHD)
VDL

VDD
DO pin voltage

VSS
VDD
CO pin voltage
VSS
VEB
VDD
VM pin voltage
0.35 V typ.
VDIOV1
VSS
VCIOV
VEB
Charger connection
Load connection

Status*1

Charge overcurrent
detection delay time (tCIOV)(2)(1)

Overdischarge
detection delay time (tDL)(1)

Charge overcurrent
detection delay time (tCIOV)
(3)

(1)

(2)

*1. (1): Normal status(2): Charge overcurrent status(3): Overdischarge status
Remark The charger is assumed to charge with a constant current.
Figure 13

21

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
4. Power-saving function
VCU
VCL (VCUVHC)
Battery voltage
VDU (VDLVHD)
VDL

VDD
DO pin voltage

VSS
VDD
CO pin voltage
VSS
VEB
VDD
VDD  0.8 V
VM pin voltage
0.7 V
VSS
VEB

PS pin voltage(Active "H")

VDD
VPSH

VSS
VDD
PS pin voltage(Active "L")VPSL
VSSCharger connection
Load connetion
Power-saving delay time (tPS) Overdischarge detection time (tDL)

Status

*1

(1)

(2)

*1. (1): Normal status(2): Discharge inhibition status(3): Working of power-saving function
Remark The charger is assumed to charge with a constant current.
Figure 14

22

(3)

(1)

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
 Battery Protection IC Connection Example
EB
R1

VDD

BatteryPS

R3
External input

C1
S-82B1B Series

VSS

DO

CO

FET1

VM

FET2

R2
EB

Figure 15
Table 11 Constants for External Components
Symbol
FET1
FET2

Part
N-channel
MOS FETN-channel
MOS FET

Purpose

Min.

Typ.

Max.

Discharge control







Charge control







R1

Resistor

ESD protection,
For power fluctuation

270 

330 

1 k

C1

Capacitor

For power fluctuation

0.068 F

0.1 F1.0 F

RemarkThreshold voltage  Overdischarge*1detection voltage
Threshold voltage  Overdischarge
detection voltage*1
Caution should be exercised when setting*2
VDIOV1  30 mV, VCIOV  30 mV.
Caution should be exercised when setting*2
VDIOV1  30 mV, VCIOV  30 mV.

ESD protection,
Protection for reverse
300 
470 
1.5 k

connection of a charger

1 k


R3
Resistor
PS pin input protection*1. If a FET with a threshold voltage equal to or higher than the overdischarge detection voltage is used, discharging may be
stopped before overdischarge is detected.
*2. When setting VDIOV1  30 mV, VCIOV  30 mV for power fluctuation protection, the condition of R1 C1 100 F • 
should be met.
R2

Resistor

Caution 1. The above constants may be changed without notice.
2. It has not been confirmed whether the operation is normal or not in circuits other than the above
example of connection. In addition, the example of connection shown above and the constant do notguarantee proper operation. Perform thorough evaluation using the actual application to set theconstant.

23

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
 Precautions
 The application conditions for the input voltage, output voltage, and load current should not exceed the power
dissipation.
 Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
 ABLIC Inc. claims no responsibility for any and all disputes arising out of or in connection with any infringement byproducts including this IC of patents owned by a third party.

24

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
 Characteristics (Typical Data)
1. Current consumption
1. 2 IPDN vs. Ta

5.0

0.100

4.0

0.075

IPDN [A]

IOPE [µA]

1. 1 IOPE vs. Ta

3.0
2.0
1.0
0.0

0.050
0.025
0.000

−40 −25025Ta [°C]

50

2

3
VDD [V]475 85

40 25025Ta [C]

50

75 85

0

25
Ta [C]

50

75 85

0

25
Ta [C]50

75 85

1. 3 IOPE vs. VDD

5.0
IOPE [A]

4.0
3.0
2.0
1.0
0.0

0

1

5

6

2. Detection voltage
2. 2 VCL vs. Ta

4.32

4.12

4.30

4.10

4.28

4.08

VCL [V]VCU [V]2. 1 VCU vs. Ta

4.26
4.24
4.22

4.04
40 25

4.02

0

25
Ta [C]50

75 85

2. 3 VDL vs. Ta

3.18

3.32

3.14

3.26

3.10
3.06
3.02

40 25

2. 4 VDU vs. Ta

VDU [V]

VDL [V]

4.06

3.20
3.14

40 25

3.08

0

25
Ta [C]5075 85

40 25

25

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series

2. 6 VDIOV1 vs. Ta

0.034

0.034

0.032

0.032

VDIOV1 [V]VDIOV1 [V]

2. 5 VDIOV1 vs. VDD

0.030
0.028
0.026

3.4

3.2

3.6

3.8

4.0

4.2

0.030
0.028
0.026

4.4

40 25025Ta [C]

50

75 85

0

25
Ta [C]

50

75 85

VDD [V]

2. 8 VDIOV2vs.Ta

0.055

0.055

0.050

0.050

VDIOV2 [V]VDIOV2 [V]

2. 7 VDIOV2vs.VDD

0.045
0.040
0.035

3.4

3.2

3.6

4.0
3.8
VDD [V]

4.2

4.4

0.045
0.040
0.035

0.225

0.225

0.215

0.215

VSHORT [V]

2. 10 VSHORTvs.Ta

VSHORT [V]

2. 9 VSHORTvs.VDD

0.205
0.195

0.205
0.195
0.185

0.185

3.2

3.4

3.6

3.8
4.0
VDD [V]

4.2

4.4

40 25

0.026

0.026

0.028

0.028VCIOV [V]2. 12 VCIOVvs.Ta

VCIOV [V]2. 11 VCIOVvs.VDD0.0300.032

3.2

3.4

3.6

3.8
4.0
VDD [V]

4.2

4.4

0

25
Ta [C]

50

75 85

0

25
Ta [C]50

75 85

0.0300.032
0.034

0.03426

40 25

40 25

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
3. Delay time
3. 2 tDL vs. Ta

600

80

450

60

tDL [ms]tCU [ms]

3. 1 tCU vs. Ta

300
150
0

40
20

40 250025Ta [C]5075 85

40 25

600

600

450

450

tDIOV1 [ms]3. 4 tDIOV1 vs. Ta

tDIOV1 [ms]3. 3 tDIOV1 vs. VDD

300
150

3.2

3.4

3.6

3.8
4.0
VDD [V]

4.2

30

30

tDIOV2 [ms]tDIOV2 [ms]

40

20
10

40 25

25
Ta [C]

50

75 85

0

25
Ta [C]

50

75 85

0

25
Ta [C]

50

75 85

10

3.4

3.6

3.8
4.0
VDD [V]

4.2

4.4

40 25

3. 8 tSHORT vs. Ta

600

600

450

450

tSHORT [s]3. 7 tSHORT vs. VDD

tSHORT [s]

0

20

0

0

300
150

300
150
0

0
3.2

75 85

3. 6 tDIOV2vs.Ta

40

3.2

50

150

4.4

3. 5 tDIOV2vs.VDD

25
Ta [C]

300

0

0

0

3.4

3.6

4.0
3.8
VDD [V]

4.2

4.4

40 25

27

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series
3. 10 tCIOV vs. Ta

20

20

15

15

tCIOV [ms]tCIOV [ms]3. 9 tCIOV vs. VDD

10
5
0

3.2

3.4

3.6

4.0
3.8
VDD [V]4.2

40 25025Ta [C]

50

75 85

0

25
Ta [C]50

75 85

3. 12 tPSvs.Ta

600

600

450

450
tPS [ms]tPS [ms]

50

4.4

3. 11 tPSvs.VDD

10

300
150

300
150

0

0

3.2

3.4

3.6

3.8
4.0
VDD [V]

4.2

4.4

40 25

4. Output resistance
4. 2 RCOL vs. VCO

30

30

25

25

20

20

RCOL [k]

RCOH [k]

4. 1 RCOH vs. VCO

15
10
5

0

0

1

2
3
VCO [V]4

5

4. 3 RDOH vs. VDO

0

1

2
3
VCO [V]

4

5

1

2
3
VDO [V]4

5

4. 4 RDOL vs. VDO

30

30

25

25

20

20

RDOL [k]

RDOH [k]

10
5

0

15
10
5

15
10
5

0

0

0

28

15

1

2
3
VDO [V]

4

50

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series Marking Specifications
1.

SNT-6ATop view
65(1) to (3):(4) to (6):4Product code (refer to Product name vs. Product code)
Lot number(1) (2) (3)(4) (5) (6)

1

2

3

Product name vs. Product code
Product Name
S-82B1BAA-I6T1U

Product Code
(1)
(2)
(3)
7
L
A

29

BATTERY PROTECTION IC WITH POWER-SAVING FUNCTION FOR 1-CELL PACK
Rev.1.0_01
S-82B1B Series Power Dissipation
SNT-6A
Tj = 125C max.

Power dissipation (PD) [W]

1.0
0.8
B

0.6

A
0.4
0.2
0.0

0

25

50

75

100

125

150

Ambient temperature (Ta) [C]

Board
A
B
C
D
E

30

Power Dissipation (PD)0.45 W
0.57 W


175

SNT-6A Test Board(1) Board A

IC Mount Area
Item
Size [mm]Material
Number of copper foil layer

Copper foil layer [mm]

1
2
3
4

Thermal via

Specification
114.3 x 76.2 x t1.6
FR-4
2Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.070-(2) Board B
Item
Size [mm]Material
Number of copper foil layer

Copper foil layer [mm]Thermal via

1
2
3
4

Specification
114.3 x 76.2 x t1.6
FR-4
4Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070-

No. SNT6A-A-Board-SD-1.0

ABLIC Inc.

1.57±0.03
6

5

4

1

2

3

+0.05
0.08 -0.02

0.5

0.48±0.02

0.2±0.05

No. PG006-A-P-SD-2.1

TITLE

SNT-6A-A-PKG Dimensions

No.

PG006-A-P-SD-2.1

ANGLE
UNIT

mm

ABLIC Inc.

+0.1

ø1.5 -0

4.0±0.1

2.0±0.05

0.25±0.05+0.1

1.85±0.05

ø0.5 -0

4.0±0.1

0.65±0.05

3 2 1

4

5 6

Feed direction

No. PG006-A-C-SD-2.0

TITLE

SNT-6A-A-Carrier Tape

No.

PG006-A-C-SD-2.0

ANGLE
UNIT

mm

ABLIC Inc.

12.5max.

9.0±0.3

Enlarged drawing in the central part
ø13±0.2

(60°)

(60°)

No. PG006-A-R-SD-1.0

TITLE

SNT-6A-A-Reel

No.

PG006-A-R-SD-1.0

ANGLE

QTY.

UNIT

mm

ABLIC Inc.

5,000

0.52

1.36

2

0.52

0.2 0.3

1.
2.

1(0.25 mm min. / 0.30 mm typ.)(1.30 mm ~ 1.40 mm)
0.03 mm
SNT

1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package ( 1.30 mm ~ 1.40 mm ).
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
1.
2.

(0.25 mm min. / 0.30 mm typ.)(1.30 mm ~ 1.40 mm)

No. PG006-A-L-SD-4.1

TITLE

SNT-6A-A-Land Recommendation

No.

PG006-A-L-SD-4.1

ANGLE
UNIT

mm

ABLIC Inc.

Disclaimers (Handling Precautions)1.

All the information described herein (product data, specifications, figures, tables, programs, algorithms andapplication circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.

2.

The circuit examples and the usages described herein are for reference only, and do not guarantee the success ofany specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any otherright due to the use of the information described herein.

3.

ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information describedherein.

4.

Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due tothe use of the products outside their specified ranges.

5.

Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.

6.

When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-relatedlaws, and follow the required procedures.

7.

The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,biological or chemical weapons or missiles, or use any other military purposes.

8.

The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.

9.

In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products areallowed to apply for the system on customer's own responsibility.

10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of thisdocument described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07

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