Timing Control
Hitoshi Sugimura

1

Outline• Construction of DR Sub Timing Station• Fixed charging time delivery to injection/extraction kicker magnet.

• Beam Gate via “Distributed bus”
• Optional Extraction System• Extraction after dispersion measurement.
• Beam Extraction at DR after LER Abort.
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Outline• Construction of DR Sub Timing Station• Fixed charging time delivery to injection/extraction kicker magnet.

• Beam Gate via “Distributed bus”
• Optional Extraction System• Extraction after dispersion measurement.
• Beam Extraction at DR after LER Abort.
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Event Timing System• We built up timing delivery structure by using a pair of EventGenerator(EVG) and Event Receiver(EVR) series produced by MRF/SINAP.

• 2-byte of characters are transmitted from EVG to EVR synchronized with
114 MHz event clock cycle.

• First 8-bit is Event Code and the second 8-bit is shared with Data buffer
and Distributed Bus.

114MHz RFEventCodeEVG

EVR
Data
D-Busbuffer4Construction of Timing Station at
LINAC/DR/MR• Without DR, One timing is enough. But With DR …
• Two timing is needed to consider about DR storage• Injection at DR• Extraction at DR and Injection MR• Timing decision considered with Bucket Selection
LINAC
2856 MHzDR508.9 MHz
230 Bkt
40ms Storage

MR508.9 MHz
5120 Bkt

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Construction of Timing Station at
LINAC/DR/MR
Main timing station
Upper EVG calculates 20 ms duration fromrevolution/49/23.
Lower EVGs calculates bucket selection delay.

EVG
EVR
EVG

EVG

DR sub-timing station

EVR

MR sub-timing station

EVR
6EVR

EVR

EVR

EVR

EVR

EVR

Construction of DR Sub timing Station(2017.7-)
Pre-trigger

KickerMain-trigger

SeptumEVR
DR
Injection Timing
Frequency divider withexternal synchronizer

MonitorSKIDR-RF(508.89MHz)
DRExtraction Timing

MonitorPre-trigger

Kicker

EVR

SeptumMain-trigger
Monitor
7DR-RF(508.89MHz)
DR-revolution

optional extraction

Construction of DR Sub timing Station(2017.7-)
Event Receiver for
Optical fiber
injection timing(Timing signal)

Event Receiver for
extraction timing

Event Timing System

TDC for timing monitor
Optional Extraction
SystemSKI

To RTL-BPM
8RF

To Kicker,SeptumPre-Trigger generation with fixed time
duration for Kicker magnets
20 ms

20 ms

EVG
#n-2

#n-1

12 mstime

Dischargecharge

EVR#ntime• Event code transmits every 20ms, and includes bucket
selection delay within 2ms. Timing is fluctuated.

• Trigger timing to charge Kicker magnet has to send 12 ms
before discharge timing.

• If discharge timing generates at shot #n, charge timing(pretrigger) has to generate between shot #n-1 and #n

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Pre-Trigger generation with fixed time
duration for Kicker magnets
20 ms

20 ms

EVG
#n-2

#ntimeDpre
12 ms

Dischargecharge

EVR#n-1time• To generate pre-trigger, we realized it by delaying shot#n-1timing.

• The delay time (Dpre) must be considered with bucket

selection delay otherwise time duration of 12 ms is fluctuated.

• The value of Dpre is represented by follows formula.
•Dpre = D(n) - D(n-1) + 8ms

10How to get Dpre from EVG
20 ms

20 ms

EVG
#n-1

#ntimeDpre
12 ms

Discharge

chargeEVR

Dpre#n-2time• To get Dpre information from EVG, we realized it bytransmitting via data buffer at shot#n-2 timing.

• When EVR received Dpre, it sets this value board register.
• In this specification, resolution(jitter) of 12 ms charging timereached at 30 ps. This value has almost no effect on beamjitter originated from kicker timing.

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Outline• Construction of DR Sub Timing Station• Fixed charging time delivery to injection/extraction kicker magnet.

• Beam Gate via “Distributed bus”
• Optional Extraction System• Extraction after dispersion measurement.
• Beam Extraction at DR after LER Abort.
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Beam Gate via Distributed Bus• We have developed beam gate transmitted by using 8-bit of
distributed bus(D-bus).

• 8 kinds of logic level is available to transfer to EVR
EVG

EVR

Beam Gate Input• There is nothing to do with operation.
• Fast response(57.12 MHz)

EVR

13EVR

Establishment of Injection/extraction control
with D-bus beam gate
• We made it possible to control each injection/extraction kicker andseptum by making AND logic D-bus beam gate and the Event in IOC.

• This Logic is also applied Gun and Kicker/Septum of LER and HER.
EVR for injection
EventD-bus

Injection Kicker

Injection Septum

Low Status
Hi Status

EVR for extraction
EventD-bus

Extraction Kicker
Extraction Septum14Outline• Construction of DR Sub Timing Station• Fixed charging time delivery to injection/extraction kicker magnet.

• Beam Gate via “Distributed bus”
• Optional Extraction System• Extraction after dispersion measurement.
• Beam Extraction at DR after LER Abort.
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Optional Extraction System• We need to consider various situation to operate beam handling.
• It is necessary to generate extraction trigger in the case of …

Among them …

• Extraction after changing DR RF for dispersion measurement• Extraction when LER abort• In this case, Event Timing system cannot calculate reasonable

extraction timing.
• For this purpose, Optional Extraction System has been developed.
Bucket No.
DR RFDR Revolution

Optional
Extraction
SystemExtraction Septumcharge

discharge

Extraction Kicker

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Optional Extraction System18

Summary and future• DR sub-timing station was developed.

• Event is received 2-EVRs and send to devices• Pre-Trigger generation with fixed time duration for Kicker magnets wassucceeded by calculating at EVG and sending to EVR via data buffer.

• Optional Extraction system was developed.
• Beam Gate transmission via Distributed bus was succeeded• Injection and extraction control was well established.

• During only DR operation, this system has not hang up yet!
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20

Shot#n-2

Shot#nMain Trigger

Shot#n-1
Pre-Trigger

ns21

How to get Dpre from EVG to EVR
20 ms

20 ms

EVG
Dpre

time

EVR

#n-2

#n

#n-1

Dpre

12 mstime• Event code transmits every 20ms, and includes bucket selection

delay within 2ms.
• Trigger timing to charge Kicker magnet has to send 12 ms before
discharge timing.
• If discharge timing generates at shot #n, charge timing(pretrigger) has to generate at shot #n-1
• To satisfy this situation,2223

Master Event Timing system
PF-AR
PF

114MHz RFRF IN

IN 0

EVG

AC IN

Rev/49/46
TTLDR
Injection Timing

IN 1RF IN
AC IN

TTL

EVG

114MHz RFEVRTTLAC INPFPF-ARIN 0RF IN

EVGDRExtraction Timing

IN 124

Specification of the VME-EVR-230RF•FPGA:VertexⅡpro(XC2VP7)•Bit rate 1.0 to 2.5 Gbps, event clock rate
50 MHz to 125 MHz•Four programmable front panel TTLoutputs•Two front panel TTL inputs•Three differential CML pattern outputs
capable of RF recovery•Two universal I/O slots•Rear I/O
•Jitter typically < 15 ps rms for TTLoutputs, < 5 ps rms for CML outputs

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Beam Gate
Dbus-4: DR-Kicker

KBP-pre : Ev(41)KBP-Main(42)Dbus-5: DR-Septum

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