Product/Process Change Notice - PCN 17_0181 Rev. B
Analog Devices, Inc. Three Technology Way Norwood, Massachusetts 02062-9106

This notice is to inform you of a change that will be made to certain ADI products (see Appendix A) that you may have purchased in thelast 2 years. Any inquiries or requests with this PCN (additional data or samples) must be sent to ADI within 30 days ofpublication date. ADI contact information is listed below.
Note: Revised fields are indicated by a red field name. See Appendix B for revision history.

PCN Title:
Publication Date:

Data Sheet Corrections for ADSP-2157x and ADSP-SC57x Products
26-Mar-2018

Effectivity Date:

26-Mar-2018 (the earliest date that a customer could expect to receive changed material)

Revision Description:
Add a few more changes to the Rev A datasheet that were not captured in the previous PCN revision.
Description Of Change:
The following specification changes have been made to the Rev A Data Sheet:
1) Rev 0 page 18 of 142 "• 12-bit ADC core (10-bit accuracy) with built in sample and hold."
Rev A page 18 of 142 "• 12-bit ADC core with built in sample and hold."2) Rev 0 page 62 of 142 Table 31 DD-Type_2575 0.50, DD-Peak_100 1.20
Rev A page 62 of 142 Table 31 DD-Type_2575 0.53, DD-Peak_100 1.273) Rev 0 page 64 of 142 Table 35 Offset error +-8, Offset error matching +-10
Rev A page 64 of 142 table 35 Offset error +-5, Offset error matching +-64)Rev 0 page 45 of 142 “The internal termination column specifies the termination present when the processor is not in the reset state”
Rev A page 46 of 142 “The internal termination column specifies the termination present after the processor is powered up (both during resetand after reset)”5) Rev A page 46 of 142 Table 25 Reset termination column removed
6) REV 0 - page 49 of 142 Table 25 HADC0_VREFN “Desc: HADC0 Ground Reference for ADC Notes: Can be left floating if HADC and TMU
are not used”
Rev A – Page 50 of 142 Table 25 HDACO_VREFN “Desc: HADC0 Ground Reference for ADC, Notes: Connect to GND if HADC and TMU arenot used
7) Rev 0- Page 49 of 142 Table 25 HADC0_VINx pins –“Notes: Connect to GND if not used”
Rev A- Page 49 and Page 50 of 142 Table 25 HADC0_VINx pins –“Connect to GND through a resistor if not used” and note 4 is “AllHADC0_VINx pins can be connected directly to GND if HADC and TMU are not used”
8) Rev 0 (Table 25) Px_nn PORT pins and DAI0_PIN20 to 01 pins –“Notes: No notes”
Rev A- (Table 25) Px_nn PORT pins and DAI0_PIN20 to 01 pins –“ Notes: See note2”
Note2 “Input by default. When unused, terminate externally in hardware or enable the internal pull-up resistor (when applicable) in software.
When present, the internal pull-up
design holds the internal path from the pins at the expected logic levels. To pull up the external pads to the expected logic levels, use externalresistors.”
9) Rev 0 (Table 25) Px_nn PORT pins and DAI0_PIN16 to 01 pins Internal Termination column is “PullDown”
Rev A (Table 25) Px_nn PORT pins and DAI0_PIN16 to 01 pins Internal Termination column is “Programmable PullUp 1 ” and note 1 is“Disabled by default.”
10) There are few PORT pins do not have the Programmable pull-up (PB_03 – PB_14, PE_02). For these pins the internal termination field ischanged as None and the notes field is updated as “connect to VDD_EXT or GND if not used”.
11) The DAI0_PIN20 – DAI0_PIN17 have the change to internal termination field and a reference to a different note.
12) Rev 0 (Table 25) JTG_TDO “Reset Drive none”
Rev A (Table 25) JTG_TDO “High-Z when JTG_TRST is low, not affected by SYS_HWRST”

Analog Devices, Inc. PCN 17_0181_Rev_B Page 1 of 313) Rev 0 (Table 25) SYS_BMODEx “Notes: No notes”
Rev A (Table 25) SYS_BMODEx “No connection not allowed”
14) Rev 0 (Table 25) SYS_CLKIN0 “Notes :No notes”
Rev A (Table 25) SYS_CLKIN0 “Notes: No connection not allowed”
15) Rev 0 (Table 25) SYS_RESOUT# “Reset drive: low”
Rev A (Table 25) SYS_RESOUT# “Reset drive: High-Z when SYS_HWRST and JTG_TRST are both active” Note 5 “Actively driven byprocessor otherwise”
16) Rev 0 (Table 25) SYS_CLKOUT “Reset drive: none”
Rev A (Table 25) SYS_CLKOUT “Reset drive: High-Z when SYS_HWRST and JTG_TRST are both active” Note 5 “Actively driven byprocessor otherwise”
Changes are reflected in the Rev A datasheet made available February 16, 2018.

Reason For Change:
To better align with JEDEC JESD79 specifications and to more accurately represent the functionality of the product.
Capturing a few additional changes regarding internal termination.
Impact of the change (positive or negative) on fit, form, function & reliability:
Customers are advised to confirm these changes against their product designs. These changes are not expected to impact the fit, form,function or reliability of the ADSP-2157x and ADSP-SC57x products.
Summary of Supporting Information:
These corrections will be reflected in Rev A of the product Data Sheet made available February 16, 2018.
Supporting Documents

NoneFor questions on this PCN, please send an email to the regional contacts below or contact your local ADI sales representatives.
Americas:
PCN_Americas@analog.com

Europe:PCN_Europe@analog.com

Japan:
PCN_Japan@analog.com

Rest of Asia:
PCN_ROA@analog.com

Appendix A - Affected ADI Models
Existing Parts - Product Family / Model Number (58)
ADSP-21571 / ADSP-21571BSWZ-4

ADSP-21571 / ADSP-21571BSWZ-5ADSP-21571 / ADSP-21571CSWZ-4ADSP-21571 / ADSP-21571CSWZ-5ADSP-21571 / ADSP-21571KSWZ-4ADSP-21571 / ADSP-21571KSWZ-5ADSP-21571W / AD21571WCSWZ400ADSP-21571W / AD21571WCSWZ500ADSP-21573 / ADSP-21573BBCZ-4ADSP-21573 / ADSP-21573BBCZ-5ADSP-21573 / ADSP-21573CBCZ-4ADSP-21573 / ADSP-21573CBCZ-5ADSP-21573 / ADSP-21573KBCZ-4ADSP-21573 / ADSP-21573KBCZ-5ADSP-21573W / AD21573WCBCZ400ADSP-21573W / AD21573WCBCZ500ADSP-21573W / ADW95168Z-00

ADSP-21573W / ADW95168Z-00RLADSP-21573W / ADW95169Z-00

ADSP-21573W / ADW95169Z-00RLADSP-SC570 / ADSP-SC570BSWZ-4ADSP-SC570 / ADSP-SC570BSWZ-42ADSP-SC570 / ADSP-SC570CSWZ-4ADSP-SC570 / ADSP-SC570CSWZ-42ADSP-SC570 / ADSP-SC570KSWZ-4ADSP-SC570 / ADSP-SC570KSWZ-42ADSP-SC571 / ADSP-SC571BSWZ-3ADSP-SC571 / ADSP-SC571BSWZ-4ADSP-SC571 / ADSP-SC571BSWZ-5ADSP-SC571 / ADSP-SC571CSWZ-3ADSP-SC571 / ADSP-SC571CSWZ-4ADSP-SC571 / ADSP-SC571CSWZ-5ADSP-SC571 / ADSP-SC571KSWZ-3ADSP-SC571 / ADSP-SC571KSWZ-4ADSP-SC571 / ADSP-SC571KSWZ-5ADSP-SC571W / ADSC571WCSWZ300ADSP-SC571W / ADSC571WCSWZ400ADSP-SC571W / ADSC571WCSWZ500ADSP-SC572 / ADSP-SC572BBCZ-4ADSP-SC572 / ADSP-SC572BBCZ-42ADSP-SC572 / ADSP-SC572CBCZ-4ADSP-SC572 / ADSP-SC572CBCZ-42ADSP-SC572 / ADSP-SC572KBCZ-4ADSP-SC572 / ADSP-SC572KBCZ-42ADSP-SC572W / ADSC572WCBCZ400ADSP-SC572W / ADSC572WCBCZ4200ADSP-SC573 / ADSP-SC573BBCZ-3ADSP-SC573 / ADSP-SC573BBCZ-4ADSP-SC573 / ADSP-SC573BBCZ-5ADSP-SC573 / ADSP-SC573CBCZ-3ADSP-SC573 / ADSP-SC573CBCZ-4ADSP-SC573 / ADSP-SC573CBCZ-5ADSP-SC573 / ADSP-SC573KBCZ-3ADSP-SC573 / ADSP-SC573KBCZ-4ADSP-SC573 / ADSP-SC573KBCZ-5ADSP-SC573W / ADSC573WCBCZ300ADSP-SC573W / ADSC573WCBCZ400ADSP-SC573W / ADSC573WCBCZ500Appendix B - Revision History

Analog Devices, Inc. PCN 17_0181_Rev_B Page 2 of 3

RevPublish Date

Effectivity Date

Rev Description

Rev. -25-Jan-2018

25-Jan-2018

Initial Release

Rev. A

31-Jan-2018

31-Jan-2018

Corrected the date of the Rev A datasheet release to be released by February 28, 2018.

Rev. B

26-Mar-2018

26-Mar-2018

Add a few more changes to the Rev A datasheet that were not captured in the previous PCN revision.
Analog Devices, Inc.

DocId:4394 Parent DocId:None Layout Rev:7

Analog Devices, Inc. PCN 17_0181_Rev_B Page 3 of 3