Comparison Sheet
Between W5100S and W5100
Version 1.1.0

http://www.wiznet.io© Copyright 2018 WIZnet Co., Ltd. All rights reserved.

Contents
HOST Interface .......................................................................................... 4
Ethernet PHY Interface ............................................................................... 5
Register ................................................................................................... 53.1

Change & Expansion ......................................................................... 5

3.2

Addition ........................................................................................ 5

3.3

Removal ........................................................................................ 7

Package ................................................................................................... 7
Document Revision History .......................................................................... 8

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Comparison Sheet (W5100S and W5100)

List of Figures
Figure 1 W5100S SPI Frame ...................................................................................... 4Figure 2 W5100 SPI Frame ......................................................................................... 4

Comparison Sheet (W5100S and W5100)

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W5100S vs W5100
W5100S is based on W5100. However, W5100S does not support Hardware PIN-to-PIN
compatibility for 5100. W5100S supports W5100 Registers except PPPoE for Firmware
compatibility.
Compared to W5100, W5100S Registers are deleted, modified, and added for improving
functions. For more details of the improving functions, please refer to the W5100S Datasheet.
W5100 supports fully Hardwired Logic for PPPoE Connection. However, W5100S supports
Hardwired Logic only for ‘PPP LCP echo Reply’.
W5100S also supports ARP/PING Request Transmission Command, Ethernet PHY Access andLow Power Consumption. For Low Power Consumption, W5100S has Ethernet PHY Power
Down Mode and System Clock Switching.

HOST Interface
HOST Interface

W5100SW5100

SCLK Period(1)

20ns

70ns

MISO value on Write Data Phase(2)

0x00

0x03

Parallel

ADDR

ADDR[1:0]

ADDR[14:0]

Bus

DirectXOIndirectOO

SPI

Notice(1)Refer to SPI Timing in each datasheet.
(2)SPI Frame

Figure 1 W5100S SPI Frame

Figure 2 W5100 SPI Frame

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Comparison Sheet (W5100S and W5100)

Ethernet PHY Interface
Function

W5100S

W5100

Link LED

LNKn, No Blink (Hold Low)

LINKLED, Blink

RX/TX LED

-RXLED, TXLED

Activity LED

ACTn-By Register PHYCR0[2:0]

By Pins OPMODE[2:0]

PHY Operation
Mode
Ethernet PHY’s

Accessible with PHYAR, PHYRAR,Register

PHYDIR, PHYDOR and PHYACR.

InaccessibleRegister
3.1

Change & Expansion
REG
MRW5100S
AI: Always ‘1’

IND : Always ‘1’
Sn_MR

Removed PPPoE Mode

Sn_SR

Removed the PPPoE SOCKET Status- SOCK_PPPOE, SOCK_CLOSING,W5100
AI: Configurable

IND : Configurable-SOCK_ARP
S0_CR

Removed the PPPoE Commands- PCON, PDISCON, PCR, PCN, PCJ

S0_IR-Removed the PPPoE Interrupts- PRECV, PFAIL, PNEXT

Sn_TX_RR

Renamed Sn_TX_RD-

Sn_RX_WR

UsableReserved

Additional Dedicated Register

Shared with S0_DHAR

PHAR

for PPPoE Server Hardware Address
PSIDR

Additional Dedicated Register

Shared with S0_DPORTfor PPPoE Session ID Register

3.2Addition
REG
INTPTMR

Description

RemarkInterrupt Pending Time Register

Interrupt

IR2Interrupt Register 2, For Wake On LAN(WOL) over UDP

IMR2Interrupt Register 2 Mask, For Mask IR2[WOL]

Comparison Sheet (W5100S and W5100)

5/8

MR2

Mode Register 2

Modecf> System clock can be selectable at 100MHz or 10MHz
by MR2[CLKSEL]
PMRUR

Maximum Receive Unit Register on PPPoEPHAR

PPPoE Server Hardware Address

PSIDR

PPPoE Session ID

PHYSR

PHY Status Register

PHYAR

PHY Address Value Register (“01010”)

PHYRARPHY Register Address Register

PHYDIRPHY Data Input Register

PHYDORPHY Data Output Register

PHYACRPHY Action Register

PHYDIVR

PHY Division Register

PHYCR

PHY Control Register

SLCR

SOCKET-less Command Register

SLRTR

SOCKET-less Retransmission Time Register

SLRCR

SOCKET-less Retransmission Count Register

SLPIPR

SOCKET-less Peer IP Address Register

SLPHAR

SOCKET-less Peer Hardware Address Register

PINGSEQR

PING Sequence-number Register

PINGIDRPING ID Register

SLIMR

SOCKET-less Interrupt Mask Register

SLIR

SOCKET-less Interrupt Register

CLKLCKR

Clock Lock Register

NETLCKR

Network Lock Register

PHYLCKRPHY Lock Register

PPPoE

Ethernet PHY

SOCKET-lessLock

VERR

Chip Version Register

VersionTCNTR

Ticker Count Register

TickerTCNTCLR

TCNTR Clear Register

Sn_RXBUF_SIZESOCKET n Receive Buffer Size Register

SOCKETcf) It is also set by RMSR and is the same as W5100.
Sn_TXBUF_SIZESOCKET n Transmit Buffer Size Registercf) It is also set by TMSR and is the same as W5100.

Sn_IMR

SOCKET n Interrupt Mask Register

Sn_FRAGR

SOCKET n Fragment Offset in IP Header

Sn_MR2

SOCKET n Mode Register 2

Sn_KPALVTR

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SOCKET n Keep-alive Timer Register

Comparison Sheet (W5100S and W5100)

3.3

Sn_RTR

SOCKET n Retransmission Time Register

Sn_RCR

SOCKET n Retransmission Count Register

RemovalREG

Description

PATR

Because some PPPoE Hardwired Logic is replaced with Software

Package
W5100S
Package

W5100S-L 48 LQFP
W5100S-Q 48 QFNComparison Sheet (W5100S and W5100)

W5100
80 LQFP

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Document Revision History
Version

Date

Ver. 1.0.0

1APR2018

Ver. 1.1.0

6ARP2018

Descriptions
Initial Release
1.

Changed PHYRR to PHYRAR (in 3.2 Addition)

2.

Changed Retry to Retransmission in SLRCR (in 3.2 Addition)

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8/8Comparison Sheet (W5100S and W5100)