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TPS63020, TPS63021
SLVS916D – JULY 2010 – REVISED OCTOBER 2015

TPS6302x High Efficiency Single Inductor Buck-Boost Converter With 4-A Switches
1 Features

3 Description••

The TPS6302x devices provide a power supply
solution for products powered by either a two-cell or
three-cell alkaline, NiCd or NiMH battery, or a onecell Li-ion or Li-polymer battery. Output currents cango as high as 3 A while using a single-cell Li-ion or
Li-polymer battery, and discharge it down to 2.5 V orlower. The buck-boost converter is based on a fixed
frequency, pulse width modulation (PWM) controller
using synchronous rectification to obtain maximum
efficiency. At low load currents, the converter enters
power save mode to maintain high efficiency over awide load current range. The power save mode canbe disabled, forcing the converter to operate at a
fixed switching frequency. The maximum average
current in the switches is limited to a typical value of
4 A. The output voltage is programmable using an
external resistor divider, or is fixed internally on thechip. The converter can be disabled to minimize
battery drain. During shutdown, the load is
disconnected from the battery.

1

•
•
•
•
•
•
•
•
•
•
•
•
•

Input Voltage Range: 1.8 V to 5.5 V
Fixed and Adjustable Output Voltage Options from
1.2 V to 5.5 V
Up to 96% Efficiency
3-A Output Current at 3.3 V in Step Down Mode
(VIN = 3.6 V to 5.5 V)
More than 2-A Output Current at 3.3 V in Boost
Mode (VIN > 2.5 V)
Automatic Transition Between Step Down and
Boost Mode
Dynamic Input Current Limit
Device Quiescent Current less than 50 μA
Power Save Mode for Improved Efficiency at Low
Output Power
Forced Fixed Frequency Operation at 2.4 MHz
and Synchronization Possible
Smart Power Good Output
Load Disconnect During Shutdown
Overtemperature Protection
Overvoltage Protection
Available in a 3mm × 4mm 14-Pin VSON Package(DSJ)

The TPS6302x devices operate over a free airtemperature range of –40°C to 85°C. The devices arepackaged in a 14-pin VSON package measuring
3mm × 4mm (DSJ).
Device Information(1)PART NUMBER

2 Applications
•
•
•
•
•
•
•
•

TPS63020

All Two-Cell and Three-Cell Alkaline, NiCd or
NiMH or Single-Cell Li Battery Powered Products
Ultra Mobile PCs and Mobile Internet Devices
Digital Media Players
Digital Still Cameras (DSC) and Camcorders
Mobile Phones and Smart Phones
Personal Medical Products
Industrial Metering Equipment
High Power LEDs
SPACE

TPS63021

OUTPUT VOLTAGE
DC/DC

PACKAGE

Adjustable

VSON (14)3.3 V(1) For all available packages, see the orderable addendum atthe end of the datasheet.

Efficiency vs Output Current

Typical Application Schematic
L1 1µH

VOUT

VIN
2.5 V to 5.5V
C1
2X10µF

C3
0.1µF

L1

L2

VIN

VOUT

VINA

FB

3.3V2A

R1

R3

1MΩ

1MΩ

EN

)*+ ,
)*+ ,
)*+ ,
)*+ ,

- )! ) . ,- )! ) . ,- )! ) . ,- )! ) . ,

- )
- )
- )
- )

C2

4X22µF

! "#

$%

$&' (

PS/SYNC
PG
GND

PGND

TPS63020

R2180kΩ
Power Good
Output1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

TPS63020, TPS63021
SLVS916D – JULY 2010 – REVISED OCTOBER 2015

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Table of Contents
1
2
3
4
5
6

Features .................................................................. 1
Applications ........................................................... 1
Description ............................................................. 1
Revision History..................................................... 2
Pin Configuration and Functions ......................... 3
Specifications......................................................... 3
6.1
6.2
6.3
6.4
6.5
6.6

7

Detailed Description .............................................. 7
7.1
7.2
7.3
7.4

8

Absolute Maximum Ratings ...................................... 3
ESD Ratings.............................................................. 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 4
Electrical Characteristics........................................... 5
Typical Characteristics .............................................. 6
Overview ................................................................... 7
Functional Block Diagram ......................................... 7
Feature Description................................................... 8
Device Functional Modes.......................................... 9

Application and Implementation ........................ 12

8.1 Application Information............................................ 12
8.2 Typical Application .................................................. 12
8.3 System Example ..................................................... 18

9 Power Supply Recommendations...................... 18
10 Layout................................................................... 18
10.1 Layout Guidelines ................................................. 18
10.2 Layout Example .................................................... 19
10.3 Thermal Considerations ........................................ 19

11 Device and Documentation Support ................. 20
11.1
11.2
11.3
11.4
11.5
11.6
11.7

Device Support...................................................... 20
Documentation Support ........................................ 20
Related Links ........................................................ 20
Community Resources.......................................... 20
Trademarks ........................................................... 20
Electrostatic Discharge Caution ............................ 20
Glossary ................................................................ 20

12 Mechanical, Packaging, and Orderable
Information ........................................................... 21

4 Revision History
Changes from Revision C (February 2013) to Revision D•

Page

Added Handling Rating table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section................................................................ 1

Changes from Revision B (August 2012) to Revision C•

Page

Changed front-page circuit to show correct values ................................................................................................................ 1

Changes from Revision A (December 2011) to Revision B•

Page

Changed the Duty cycle in step down conversion values, added MIN = 20%, deleted TYP = 30% and MAX = 40% .......... 5

Changes from Original (April 2010) to Revision A

Page

•

Changed the List Of Components table. C1 and C2 orderable number From: GRM188R60J106KME84D To:
GRM188R60J106ME84D ..................................................................................................................................................... 12•

Updated Figure 27 - PCB Layout Suggestion ...................................................................................................................... 192

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SLVS916D – JULY 2010 – REVISED OCTOBER 2015

5 Pin Configuration and Functions

VINA
GND
FB
VOUT
VOUT
L2
L2

PGND

PGND

PGND

PGND

DSJ Package
14-Pin VSON With Exposed Thermal Pad
Top View

PG
PS/SYNC
EN
VIN
VIN
L1
L1

PGND

PGND

PGND

PGND

ExposedThermal
Pad *)

NOTE: *) The exposed thermal pad is connected to PGND.

Pin Functions
PIN

I/O

DESCRIPTION

12I

Enable input (1 enabled, 0 disabled), must not be left open

3

I

Voltage feedback of adjustable versions, must be connected to VOUT on fixed output voltage
versions

GND

2

–

Control / logic ground

L1

8, 9

I

Connection for inductor

L2

6, 7

I

Connection for inductor

PG

14

O

Output power good (1 good, 0 failure; open drain)–

Power ground

13

I

Enable / disable power save mode (1 disabled, 0 enabled, clock signal for synchronization), mustnot be left open

VIN

10, 11I

Supply voltage for power stage

VINA

1

I

Supply voltage for control stage

VOUT

4, 5

O

Buck-boost converter output–

The exposed thermal pad is connected to PGND.

NAME

NO.

EN
FB

PGND
PS/SYNC

ExposedThermal Pad

6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN

MAX

–0.3

7

V

Operating junction temperature, TJ

–40

150

°C

Storage temperature, Tstg

–65

150

°C

Voltage (2)

(1)
(2)

VIN, VINA, L1, L2, VOUT, PS/SYNC, EN, FB, PG

UNIT

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
All voltages are with respect to network ground terminal.

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6.2 ESD Ratings
VALUE
V(ESD)(1)(2)

Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)±3000

Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins (2)

±1500

UNIT
V

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions
MIN

NOM

MAX

UNIT

Supply voltage at VIN, VINA

1.8

5.5

V

Operating free air temperature, TA

–40

85

°C

Operating junction temperature, TJ

–40

125

°C

6.4 Thermal Information
TPS6302x
THERMAL METRIC (1)DSJ (VSON)

UNIT

14 PINS
RθJA

Junction-to-ambient thermal resistance

41.8

°C/W

RθJC(top)

Junction-to-case(top) thermal resistance

47

°C/W

RθJB

Junction-to-board thermal resistance

17

°C/W

ψJT

Junction-to-top characterization parameter

0.9

°C/W

ψJB

Junction-to-board characterization parameter

16.8

°C/W

RθJC(bot)

Junction-to-case(bottom) thermal resistance

3.6

°C/W

(1)

4

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.

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SLVS916D – JULY 2010 – REVISED OCTOBER 2015

6.5 Electrical Characteristics
over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature
range of 25°C) (unless otherwise noted)
PARAMETERTEST CONDITIONS

MIN

TYP

MAX

UNIT

DC/DC STAGE
Input voltage
VIN
VOUT
VFB

1.8

5.5

V

1.5

1.8

1.9

V

Minimum input voltage for startup

1.5

1.8

2.0

V

TPS63020 output voltage

1.2

5.5

V

Duty cycle in step down conversion

20%

0°C ≤ TA ≤ 85°C

Minimum input voltage for startup

TPS63020 feedback voltage

PS/SYNC = VINTPS63021 output voltage
VFB

495

500

505

mV

3.267

3.3

3.333

V

TPS63020 feedback voltage

PS/SYNC = GND referenced to 500 mV

0.6%

TPS63021 output voltage regulation

PS/SYNC = GND referenced to 3.3 V

0.6%

Maximum line regulation

ISW

Iq

IS

5%
0.5%

Maximum load regulation
f

5%

0.5%

Oscillator frequency

2200

2400

2600

kHz

Frequency range for synchronization

2200

2400

2600

kHz

3500

4000

4500

mA

Average switch current limit

VIN = VINA = 3.6 V, TA = 25°C

High side switch on resistance

VIN = VINA = 3.6 V

50

Low side switch on resistance

VIN = VINA = 3.6 V

50

IOUT = 0 mA, VEN = VIN = VINA = 3.6 V,
VOUT = 3.3 V

25

50

5

10

TPS63021 FB input impedance

VEN = HIGH

1

Shutdown current

VEN = 0 V, VIN = VINA = 3.6 V

Quiescentcurrent

VIN and VINA
VOUT

mΩ
mΩ
μA
μA
MΩ

0.1

1

1.5

1.6

μA

CONTROL STAGE
UVLO

Under voltage lockout threshold

VINA voltage decreasing

1.4

Under voltage lockout hysteresis

VIL

EN, PS/SYNC input low voltage

VIH

EN, PS/SYNC input high voltage

200

V
mV

0.4

V

1.2

V

EN, PS/SYNC input current

Clamped to GND or VINA

0.01

0.1

μA

PG output low voltage

VOUT = 3.3 V, IPGL = 10 μA

0.04

0.4

V

0.01

0.1

μA

PG output leakage current
Output overvoltage protection

5.5

7

V

Overtemperature protection

140

°C

Overtemperature hysteresis

20°C

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6.6 Typical Characteristics
!"

!"

#
#

$
$

Figure 1. Maximum Output Current vs Input Voltage,
TPS63020, VOUT = 2.5 V/4.5 V

6Submit Documentation Feedback#$

Figure 2. Maximum Output Current vs Input Voltage,
TPS63021, VOUT = 3.3V

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7 Detailed Description
7.1 Overview
The control circuit of the device is based on an average current mode topology. The controller also uses input
and output voltage feed forward. Changes of input and output voltage are monitored and immediately canchange the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier
gets its feedback input from the FB pin. At adjustable output voltages, a resistive voltage divider must beconnected to that pin. At fixed output voltages, FB must be connected to the output voltage to directly sense thevoltage. Fixed output voltage versions use a trimmed internal resistive divider. The feedback voltage will becompared with the internal reference voltage to generate a stable and accurate output voltage.
The device uses 4 internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power
range.
To avoid ground shift problems due to the high currents in the switches, two separate ground pins GND and
PGND are used. The reference for all control functions is the GND pin. The power switches are connected to
PGND. Both grounds must be connected on the PCB at only one point, ideally close to the GND pin. Due to the
4-switch topology, the load is always disconnected from the input during shutdown of the converter. To protect
the device from overheating an internal temperature sensor is implemented.

7.2 Functional Block Diagram
L1

L2

VIN

VOUT
Current
Sensor

VINA
VIN
VOUT

PGND

_

VINA

Modulator

PG

PS/SYNC

PGND

Gate
Control+

Oscillator
DeviceControl

EN

+
_

FB

+
-

Temperature
Control

GND

VREF

PGND
PGND

Figure 3. Functional Block Diagram (TPS63020)

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Functional Block Diagram (continued)
L1

L2

VIN

VOUT
Current
Sensor

VINA
VIN
VOUT

PGND

FB

_

VINA

Modulator

PG

PS/SYNC

PGND

Gate
Control+_+

Oscillator+-

DeviceControlEN

VREF
Temperature
Control

PGND

GND

PGND

Figure 4. Functional Block Diagram (TPS63021)

7.3 Feature Description
7.3.1 Dynamic Voltage Positioning
As detailed in Figure 6, the output voltage is typically 3% above the nominal output voltage at light load currents,
as the device is in power save mode. This gives additional headroom for the voltage drop during a load transientfrom light load to full load. This allows the converter to operate with a small output capacitor and still have a low
absolute voltage drop during heavy load transient changes.
7.3.2 Dynamic Current Limit
To protect the device and the application, the average inductor current is limited internally on the IC. At nominal
operating conditions, this current limit is constant. The current limit value can be found in the electricalcharacteristics table. If the supply voltage at VIN drops below 2.3 V, the current limit is reduced. This can happen
when the input power source becomes weak. Increasing output impedance, when the batteries are almost
discharged, or an additional heavy pulse load is connected to the battery can cause the VIN voltage to drop. The
dynamic current limit has its lowest value when reaching the minimum recommended supply voltage at VIN. At
this voltage, the device is forced into burst mode operation trying to stay active as long as possible even with aweak input power source.
If the die temperature increases above the recommended maximum temperature, the dynamic current limit
becomes active. Similar to the behavior when the input voltage at VIN drops, the current limit is reduced withtemperature increasing.
7.3.3 Device Enable
The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In
shutdown mode, the regulator stops switching, all internal control circuitry is switched off, and the load is
disconnected from the input. This means that the output voltage can drop below the input voltage during
shutdown. During start-up of the converter, the duty cycle and the peak current are limited in order to avoid highpeak currents flowing from the input.
8

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Feature Description (continued)
7.3.4 Power Good
The device has a built in power good function to indicate whether the output voltage is regulated properly. As
soon as the average inductor current gets limited to a value below the current the voltage regulator demands formaintaining the output voltage the power good output gets low impedance. The output is open drain, so its logic
function can be adjusted to any voltage level the connected logic is using, by connecting a pull up resistor to the
supply voltage of the logic. By monitoring the status of the current control loop, the power good output provides
the earliest indication possible for an output voltage break down and leaves the connected application amaximum time to safely react.
7.3.5 Overvoltage Protection
If, for any reason, the output voltage is not fed back properly to the input of the voltage amplifier, control of theoutput voltage will not work anymore. Therefore overvoltage protection is implemented to avoid the output
voltage exceeding critical values for the device and possibly for the system it is supplying. The implemented
overvoltage protection circuit monitors the output voltage internally as well. In case it reaches the overvoltage
threshold the voltage amplifier regulates the output voltage to this value.
7.3.6 Undervoltage Lockout
An undervoltage lockout function prevents device start-up if the supply voltage on VINA is lower thanapproximately its threshold (see Electrical Characteristics). When in operation, the device automatically enters
the shutdown mode if the voltage at VINA drops below the undervoltage lockout threshold. The device
automatically restarts if the input voltage recovers to the minimum operating input voltage.
7.3.7 Overtemperature Protection
The device has a built-in temperature sensor which monitors the internal IC temperature. If the temperature
exceeds the programmed threshold (see Electrical Characteristics) the device stops operating. As soon as the IC
temperature has decreased below the programmed threshold, it starts operating again. There is a built-in
hysteresis to avoid unstable operation at IC temperatures at the overtemperature threshold.

7.4 Device Functional Modes
7.4.1 Softstart and Short Circuit Protection
After being enabled, the device starts operating. The average current limit ramps up from an initial 400 mA
following the output voltage increasing. At an output voltage of about 1.2 V, the current limit is at its nominal
value. If the output voltage does not increase, the current limit will not increase. There is no timer implemented.
Thus, the output voltage overshoot at startup, as well as the inrush current, is kept at a minimum. The device
ramps up the output voltage in a controlled manner even if a large capacitor is connected at the output. Whenthe output voltage does not increase above 1.2 V, the device assumes a short circuit at the output, and keeps
the current limit low to protect itself and the application. At a short on the output during operation, the current limit
also is decreased accordingly.
7.4.2 Buck-Boost Operation
To regulate the output voltage at all possible input voltage conditions, the device automatically switches fromstep down operation to boost operation and back as required by the configuration. It always uses one active
switch, one rectifying switch, one switch permanently on, and one switch permanently off. Therefore, it operates
as a step down converter (buck) when the input voltage is higher than the output voltage, and as a boost
converter when the input voltage is lower than the output voltage. There is no mode of operation in which all 4
switches are permanently switching. Controlling the switches this way allows the converter to maintain highefficiency at the most important point of operation, when input voltage is close to the output voltage. The RMS
current through the switches and the inductor is kept at a minimum, to minimize switching and conduction losses.
For the remaining 2 switches, one is kept permanently on and the other is kept permanently off, thus causing noswitching losses.

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Device Functional Modes (continued)
7.4.3

Control Loop

The controller circuit of the device is based on an average current mode topology. The average inductor current
is regulated by a fast current regulator loop which is controlled by a voltage control loop. Figure 5 shows thecontrol loop.
The non inverting input of the transconductance amplifier, gmv, is assumed to be constant. The output of gmv
defines the average inductor current. The inductor current is reconstructed by measuring the current through thehigh side buck MOSFET. This current corresponds exactly to the inductor current in boost mode. In buck modethe current is measured during the on time of the same MOSFET. During the off time, the current isreconstructed internally starting from the peak value at the end of the on time cycle. The average current and thefeedback from the error amplifier gmv forms the correction signal gmc. This correction signal is compared to thebuck and the boost sawtooth ramp giving the PWM signal. Depending on which of the two ramps the gmc output
crosses either the Buck or the Boost stage is initiated. When the input voltage is close to the output voltage, onebuck cycle is always followed by a boost cycle. In this condition, no more than three cycles in a row of the samemode are allowed. This control method in the buck-boost region ensures a robust control and the highest
efficiency.
The Buck-Boost Overlap ControlTM makes sure that the classical buck-boost function, which would cause two
switches to be on every half a cycle, is avoided. Thanks to this block whenever all switches becomes active
during one clock cycle, the two ramps are shifted away from each other, on the other hand when there is noswitching activities because there is a gap between the ramps, the ramps are moved closer together. As a result
the number of classical buck-boost cycles or no switching is reduced to a minimum and high efficiency values
has been achieved.

TM

Figure 5. Average Current Mode Control

10

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Device Functional Modes (continued)
7.4.4 Power Save Mode and Synchronization
The PS/SYNC pin can be used to select different operation modes. Power save mode is used to improve
efficiency at light load. To enable power save mode, PS/SYNC must be set low. If PS/SYNC is set low thenpower save mode is entered when the average inductor current gets lower than about 100 mA. At this point theconverter operates with reduced switching frequency and with a minimum quiescent current to maintain highefficiency. See Figure 6 for detailed operation of the power save mode.
During the power save mode, the output voltage is monitored with a comparator by the threshold comp low andcomp high. When the device enters power save mode, the converter stops operating and the output voltage
drops. The slope of the output voltage depends on the load and the value of output capacitance. As the output
voltage falls below the comp low threshold set to 2.5% typical above VOUT, the device ramps up the output
voltage again, by starting operation using a programmed average inductor current higher than required by thecurrent load condition. Operation can last one or several pulses. The converter continues these pulses until thecomp high threshold, set to typically 3.5% above VOUT nominal, is reached and the average inductance current
gets lower than about 100 mA. When the load increases above the minimum forced inductor current of about 100
mA, the device will automatically switch to pulse width modulation (PWM) mode.
The power save mode can be disabled by programming high at the PS/SYNC. Connecting a clock signal at
PS/SYNC forces the device to synchronize to the connected clock frequency.
Synchronization is done by a phase-locked loop (PLL), so synchronizing to lower and higher frequencies
compared to the internal clock works without any issues. The PLL can also tolerate missing clock pulses without
the converter malfunctioning. The PS/SYNC input supports standard logic thresholds.

Heavy Load transient step

3.5%

PFM mode at light load
current

Comparator High3%

Comparator low

2.5%

Vo

PWM mode
Absolute Voltage dropwith positioning

Figure 6. Power Save Mode Thresholds and Dynamic Voltage Positioning

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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.

8.1 Application Information
The TPS6302x are high efficiency, low quiescent current buck-boost converters suitable for applications
where the input voltage is higher, lower or equal to the output. Output currents can go as high as 2 A inboost mode and as high as 4 A in buck mode. The maximum average current in the switches is limited to atypical value of 4 A.

8.2 Typical Application
L1 1.5µH

VOUT

VIN
2.5 V to 5.5V
C1
2X10µF

C3

L1

L2

VIN

VOUT

VINA

FB

3.3V1.5A

R1

R3

1MΩ

1MΩ

EN

0.1µF

C2

3X22µF

PS/SYNC

R2

PG
GND

PGND

180kΩ
Power Good
OutputTPS63020

Figure 7. Application Circuit
8.2.1 Design Requirements
The design guidelines provide a component selection to operate the device within the operating conditions
specified in Figure 7.
For the fixed output voltage option the feedback pin needs to be connected to VOUT.
Table 1 shows the list of components for the Application Curves.
Table 1. List of Components
REFERENCEDESCRIPTIONMANUFACTURER

TPS63020 or TPS63021

Texas Instruments

L1

1.5 μH, 4 mm x 4 mm x 2 mm

XFL4020-152ML, Coilcraft

C1

2 × 10 μF 6.3V, 0603, X5R ceramic

GRM188R60J106ME84D, Murata

C2

3 × 22 μF 6.3V, 0603, X5R ceramic

GRM188R60J226MEAOL Murata

C3

0.1 μF, X5R or X7R ceramic

R1

Depending on the output voltage at TPS63020, 0 Ω at TPS63021

R2

Depending on the output voltage at TPS63020, not used at TPS63021

R3

1 MΩ

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8.2.2 Detailed Design Procedure
The TPS6302x series of buck-boost converter has internal loop compensation. Therefore, the external L-C filter
has to be selected to work with the internal compensation. As a general rule of thumb, the product L x C should
not move over a wide range when selecting a different output filter. However, when selecting the output filter alow limit for the inductor value exists to avoid subharmonic oscillation which could be caused by a far too fast
ramp up of the amplified inductor current. For the TPS6302x series the minimum inductor value should be kept at
1 uH.
In particular either 1 µH or 1.5 µH is recommended working at output current between 1.5 A and 2 A. If operatingwith lower load current is also possible to use 2.2 µH.
Selecting a larger output capacitor value is less critical because the corner frequency moves to lower
frequencies.
8.2.2.1 Inductor Selection
For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Especially at
high-switching frequencies, the core material has a high impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response. To avoid saturation of the inductor, the peak current for
the inductor in steady state operation is calculated using Equation 2. Only the equation which defines the switch
current in boost mode is shown, because this provides the highest value of current and represents the criticalcurrent value for selecting the right inductor.
Duty Cycle Boost

IPEAK =

D=

V
-V
IN
OUT
V
OUT

(1)

Iout
Vin ´ D+
η ´ (1 - D)
2 ´ f ´ L

(2)Where,
D =Duty Cycle in Boost modef = Converter switching frequency (typical 2.5MHz)
L = Inductor valueη = Estimated converter efficiency (use the number from the efficiency curves or 0.90 as an assumption)
Note: The calculation must be done for the minimum input voltage which is possible to have in boost mode
Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation
current of the inductor needed. It's recommended to choose an inductor with a saturation current 20% higher
than the value calculated using Equation 2. Possible inductors are listed in Table 2.
Table 2. Inductor Selection
VENDOR

INDUCTOR SERIES

Coilcraft

XFL4020Toko

FDV0530S

8.2.2.2 Capacitor Selection
8.2.2.2.1

Input Capacitor

At least a 10 μF input capacitor is recommended to improve transient behavior of the regulator and EMI behaviorof the total power supply circuit. A ceramic capacitor placed as close as possible to the VIN and PGND pins of
the IC is recommended.

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8.2.2.2.2

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Output Capacitor

For the output capacitor, use of a small ceramic capacitors placed as close as possible to the VOUT and PGND
pins of the IC is recommended. If, for any reason, the application requires the use of large capacitors which can
not be placed close to the IC, use a smaller ceramic capacitor in parallel to the large capacitor. The small
capacitor should be placed as close as possible to the VOUT and PGND pins of the IC. The recommended
typical output capacitor value is 30 µF with a variance that depends on the specific application requirements.
There is also no upper limit for the output capacitance value. Larger capacitors will cause lower output voltage
ripple as well as lower output voltage drop during load transients.
When choosing input and output capacitors, it needs to be kept in mind, that the value of capacitanceexperiences significant losses from their rated value depending on the operating temperature and the operating
DC voltage. It is not uncommon for a small surface mount ceramic capacitor to lose 50% and more of its rated
capacitance. For this reason could be important to use a larger value of capacitance or a capacitor with higher
voltage rating in order to ensure the required capacitance at the full operating voltage.
8.2.2.2.3

Bypass Capacitor

To make sure that the internal control circuits are supplied with a stable low noise supply voltage, a capacitor canbe connected between VINA and GND. Using a ceramic capacitor with a value of 0.1 μF is recommended. The
value of this capacitor should not be higher than 0.22 μF.
8.2.2.3 Setting the Output Voltage
When the adjustable output voltage version TPS63020 is used, the output voltage is set by the external resistor
divider. The resistor divider must be connected between VOUT, FB and GND. When the output voltage isregulated properly, the typical value of the voltage at the FB pin is 500 mV. The maximum recommended value
for the output voltage is 8 V. The current through the resistive divider should be about 100 times greater than thecurrent into the FB pin. The typical current into the FB pin is 0.01 μA, and the voltage across the resistor
between FB and GND, R2, is typically 500 mV. Based on these two values, the recommended value for R2
should be lower than 500 kΩ, in order to set the divider current at 1 μA or higher. It is recommended to keep thevalue for this resistor in the range of 200 kΩ. From that, the value of the resistor connected between VOUT and
FB, R1, depending on the needed output voltage (VOUT), can be calculated using Equation 3:æVö
R1 = R2 × ç OUT - 1÷
V
è FB
ø

(3)

8.2.3 Application Curves

)*+ ,
)*+ ,
)*+ ,
)*+ ,

- )! ) . ,- )! ) . ,- )! ) . ,- )! ) . ,

! "#

$%

- )
- )
- )
- )

+,- .
+,- .
+,- .
+,- .

$&' (

! "#

Figure 8. Efficiency vs Output Current, TPS63020, Power
Save Enabled

14

Submit Documentation Feedback/ +! + 0 .
/ +! + 0 .
/ +! + 0 .
/ +! + 0 .

/ +
/ +
/ +
/ +

$% & '$() *Figure 9. Efficiency vs Output Current, TPS63020, Power
Save Disabled

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SLVS916D – JULY 2010 – REVISED OCTOBER 2015)*+ , - ))*+ , - )! "#$%+,- . / ++,- . / +$&' (Figure 10. Efficiency vs Output Current, TPS63021, Power
Save Enabled! "#Figure 11. Efficiency vs Output Current, TPS63021, Power
Save Disabled& ,&,$% & &
$%
!"

#

$%

&

& ,&
,$% & &
$%

$%

$%

$%

$%

#! ' (" )* +Figure 12. Efficiency vs Input Voltage, TPS63020, VOUT =2.5 V, Power Save Enabled

!"

#

$%

&

#! ' (" )

& ./
&
./
$% & /$% & /

$%

$%

$%

$%

#

$%

&

* +

Figure 13. Efficiency vs Input Voltage, TPS63020, VOUT =4.5 V, Power Save Enabled

& ./
&
./
$% & /$% & /!"$% & '$() *#! ' (" ) *+ , -Figure 14. Efficiency vs Input Voltage, TPS63020, VOUT =2.5 V, Power Save Disabled

!"

#

$%

&

#! ' (" ) *+ , -Figure 15. Efficiency vs Input Voltage, TPS63020, VOUT =4.5 V, Power Save Disabled

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www.ti.com+ ,+,+ )* + !"

- ./
./
- /
+, - /

)*

+,

)*

+,

)*

+,

#! $ %" &' (Figure 16. Efficiency vs Input Voltage, TPS63021, Power
Save Enabled!"#! $ %" & '( ) *Figure 17. Efficiency vs Input Voltage, TPS63021, Power
Save Disabled

&' (

&' (

!"# $ %!"# $ %

Figure 18. Output Voltage vs Output Current, TPS63020,
Power Save Enabled

Figure 19. Output Voltage vs Output Current, TPS63020,
Power Save Disabled&' (Output Voltage
50 mV/div, AC

Output Current
500 mA/div, DC

TPS63021

VIN = 2.4 V, IOUT = 500 mA to 1500 mA!"# $ %

Time 2 ms/div

Figure 20. Output Voltage vs Output Current, TPS63021,
Power Save Disabled

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Figure 21. Load Transient Response, TPS63021

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Output Voltage
50 mV/div, AC
Output Voltage
50 mV/div, AC

Output Current
500 mA/div, DC
Input Voltage
500 mV/div, AC
TPS63021

VIN = 4.2 V, IOUT = 500 mA to 1500 mA

TPS63021

Time 2 ms/div

VIN = 3.0 V to 3.7 V, IOUT = 1500 mA

Time 2 ms/div

Figure 22. Load Transient Response, TPS63021

Figure 23. Line Transient Response, TPS63021

Enable2 V/div, DC

Enable2 V/div, DC
Output Voltage
1 V/div, DC

Output Voltage
1 V/div, DC

Inductor Current
500 mA/div, DC

Inductor Current
1 A/div, DC

Voltage at L1
5 V/div, DC

TPS63021

Voltage at L2
5 V/div, DC

VIN = 2.4 V, RL = 2.2 W

TPS63021

Time 100 ms/div

VIN = 4.2 V, RL = 2.2 W

Time 40 ms/div

Figure 24. Startup After Enable, TPS63021

Figure 25. Startup After Enable, TPS63021

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8.3 System Example
8.3.1 2A Load Current
Capacitor C4 and resistor R1 are added for improved load transient performance.
L1 1µH

VOUT

VIN
2.5 V to 5.5V
C1
2X10µF

C3

L1

L2

VIN

VOUT

VINA

FB

3.3V2A

R1

R1

300kΩ

68kΩ
C4

EN

0.1µF

PS/SYNC

1MΩ

C2

4X22µF

4.7pF

PG
GND

R3

PGND

R2
53kΩ
Power Good
OutputTPS63020

Figure 26. Application Circuit for 2A Load Current

9 Power Supply Recommendations
The TPS6302x devices have no special requirements for its input power supply. The input power supply's output
current needs to be rated according to the supply voltage, output voltage and output current of the TPS6302x.

10 Layout10.1 Layout Guidelines
For all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems aswell as EMI problems. Therefore, use wide and short traces for the main current path and for the power groundtracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC.
Use a common ground node for power ground and a different one for control ground to minimize the effects ofground noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out thecontrol ground, short traces are recommended as well, separation from the power ground traces. This avoids
ground shift problems, which can occur due to superimposition of power ground current and control groundcurrent.

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SLVS916D – JULY 2010 – REVISED OCTOBER 201510.2 Layout Example

L1

GND

GND
C1

C2
U1

VOUT

VIN
R2
C3

EN
PS/SYNC
PG

GND

R1

Figure 27. PCB Layout Suggestion

10.3 Thermal Considerations
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the powerdissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below:• Improving the power dissipation capability of the PCB design• Improving the thermal coupling of the component to the PCB by soldering the exposed thermal pad• Introducing airflow in the system
For more details on how to use the thermal parameters, see the application notes: Thermal Characteristics
Application Note, SZZA017 and Semiconductor and IC Package Thermal Metrics Application Note, SPRA953.

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11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOTCONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHERALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

11.2 Documentation Support
11.2.1 Related Documentation
For related documentation see the following:• Thermal Characteristics Application Note, SZZA017• IC Package Thermal Metrics Application Note, SPRA953

11.3 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 3. Related LinksPARTS

PRODUCT FOLDERSAMPLE & BUY

TECHNICALDOCUMENTS

TOOLS &SOFTWARE

SUPPORT &COMMUNITY

TPS63020

Click here

Click here

Click here

Click here

Click here

TPS63021

Click here

Click here

Click here

Click here

Click here

11.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms ofUse.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools andcontact information for technical support.

11.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.

11.6 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

11.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

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12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the mostcurrent data available for the designated devices. This data is subject to change without notice and revision ofthis document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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PACKAGE OPTION ADDENDUM

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22-Aug-2014

PACKAGING INFORMATION
Orderable Device

Status(1)

Package Type Package Pins Package
Drawing
Qty

Eco Plan

Lead/Ball Finish

MSL Peak Temp

(2)

(6)

(3)

Op Temp (°C)

Device Marking(4/5)

TPS63020DSJRACTIVE

VSON

DSJ

14

3000

Green (RoHS& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM-40 to 85

PS63020

TPS63020DSJTACTIVE

VSON

DSJ

14

250

Green (RoHS& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM-40 to 85

PS63020

TPS63021DSJRACTIVE

VSON

DSJ

14

3000

Green (RoHS& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM-40 to 85

PS63021

TPS63021DSJTACTIVE

VSON

DSJ

14

250

Green (RoHS& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM-40 to 85

PS63021(1)

The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)(3)

MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)

There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)

Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.
(6)

Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Addendum-Page 1

SamplesPACKAGE OPTION ADDENDUM

www.ti.com

22-Aug-2014

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION
www.ti.com

22-Aug-2014

TAPE AND REEL INFORMATION*All dimensions are nominal

DevicePackage Package Pins
Type Drawing

SPQ

Reel
Reel
A0
Diameter Width (mm)(mm) W1 (mm)TPS63020DSJR

VSON

DSJ

14

3000

330.0

12.4

B0
(mm)

K0
(mm)

P1
(mm)

W
Pin1
(mm) Quadrant

3.3

4.3

1.1

8.0

12.0

Q1

TPS63020DSJT

VSON

DSJ

14

250

180.0

12.4

3.3

4.3

1.1

8.0

12.0

Q1

TPS63021DSJR

VSON

DSJ

14

3000

330.0

12.4

3.3

4.3

1.1

8.0

12.0

Q1

TPS63021DSJT

VSON

DSJ

14

250

180.0

12.4

3.3

4.3

1.1

8.0

12.0

Q1

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION
www.ti.com

22-Aug-2014*All dimensions are nominal

DevicePackage Type

Package Drawing

Pins

SPQ

Length (mm)Width (mm)Height (mm)TPS63020DSJR

VSON

DSJ

14

3000

367.0

367.0

35.0

TPS63020DSJT

VSON

DSJ

14

250

210.0

185.0

35.0

TPS63021DSJR

VSON

DSJ

14

3000

367.0

367.0

35.0

TPS63021DSJT

VSON

DSJ

14

250

210.0

185.0

35.0

Pack Materials-Page 2

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