LT8580
Boost/SEPIC/Inverting
DC/DC Converter with 1A, 65V
Switch, Soft-Start and Synchronization
FEATURESDESCRIPTION

1A, 65V Power Switchn Adjustable Switching Frequency
n Single Feedback Resistor Sets V
OUT
n Synchronizable to External Clockn High Gain SHDN Pin Accepts Slowly Varying
Input Signals
n Wide Input Voltage Range: 2.55V to 40V
n Low VCESAT Switch: 400mV at 0.75A (Typical)
n Integrated Soft-Start Functionn Easily Configurable as a Boost, SEPIC, or Inverting
Convertern User Configurable Undervoltage Lockout (UVLO)
n Pin Compatible with LT3580
n Tiny Thermally Enhanced 8-Lead 3mm × 3mm DFN
and 8-Lead MSOP Packages
n AEC-Q100 Qualified for Automotive Applications

The LT®8580 is a PWM DC/DC converter containing aninternal 1A, 65V switch. The LT8580 can be configured
as either a boost, SEPIC or inverting converter.

APPLICATIONS

All registered trademarks and trademarks are the property of their respective owners.

n

The LT8580 has an adjustable oscillator, set by a resistor
from the RT pin to ground. Additionally, the LT8580 can besynchronized to an external clock. The switching frequencyof the part may be free running or synchronized, and canbe set between 200kHz and 1.5MHz.
The LT8580 also features innovative SHDN pin circuitrythat allows for slowly varying input signals and an adjustable undervoltage lockout function.
Additional features such as frequency foldback andsoft-start are integrated. The LT8580 is available in tiny
thermally enhanced 3mm × 3mm 8-lead DFN and 8-lead
MSOP packages.

VFD Bias Supplies
TFT-LCD Bias Supplies
n GPS Receivers
n DSL Modems
n Local Power Supplynn

TYPICAL APPLICATION
1.5MHz, 5V to 12V Boost Converter
15µH

VOUT
12V
200mA

10k
SW

SHDN

FBX

130k
4.7µF

LT8580

2.2µF
SYNC
RT

VC
GND

56.2k

6.04k

SS

47pF
0.22µF

100

480

90

420

80

360

70

300

60

240

50

180

40

120
EFFICIENCY
POWER LOSS

30

3.3nF
8580 TA01a

20

0

50
150
100
LOAD CURRENT (mA)

POWER LOSS (mW)VIN

EFFICIENCY (%)

VIN
5V

Efficiency and Power Loss

60

0
200
8580 TA01b

Rev. C

Document Feedback

For more information www.analog.com

1

LT8580
ABSOLUTE MAXIMUM RATINGS (Note 1)
VIN Voltage.................................................. –0.3V to 40V
SW Voltage................................................. –0.4V to 65V
RT Voltage.................................................... –0.3V to 5V
SS Voltage................................................. –0.3V to 2.5V
FBX Voltage..................................................................5VFBX Current.............................................................–1mA
VC Voltage.................................................... –0.3V to 2V

SHDN Voltage............................................. –0.3V to 40V
SYNC Voltage............................................. –0.3V to 5.5V
Operating Junction Temperature Range
LT8580E (Notes 2, 5).......................... –40°C to 125°C
LT8580I (Notes 2, 5)........................... –40°C to 125°C
LT8580H (Notes 2, 5)......................... –40°C to 150°C
Storage Temperature Range...................–65°C to 150°C

PIN CONFIGURATIONTOP VIEW
FBX 1
VC 2
VIN 3

TOP VIEW

8 SYNC
9
GND

SW 4

FBX 1
VC 2
VIN 3
SW 4

7 SS
6 RT
5 SHDN

9GND

8 SYNC
7 SS
6 RT
5 SHDNMS8E PACKAGE
8-LEAD PLASTIC MSOPDD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN

θJA = 35°C/W TO 40°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCBθJA = 43°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCBORDER INFORMATIONLEAD FREE FINISH

TAPE AND REELPART MARKING*PACKAGE DESCRIPTIONTEMPERATURE RANGE

LT8580EDD#PBF

LT8580EDD#TRPBF

LGKH

8-Lead (3mm × 3mm) Plastic DFN– 40°C to 125°C

LT8580IDD#PBF

LT8580IDD#TRPBF

LGKH

8-Lead (3mm × 3mm) Plastic DFN– 40°C to 125°C

LT8580HDD#PBF

LT8580HDD#TRPBF

LGKH

8-Lead (3mm × 3mm) Plastic DFN– 40°C to 150°C

LT8580EMS8E#PBF

LT8580EMS8E#TRPBFLTGKJ

8-Lead Plastic MSOP

– 40°C to 125°C

LT8580IMS8E#PBF

LT8580IMS8E#TRPBFLTGKJ

8-Lead Plastic MSOP

– 40°C to 125°C

LT8580HMS8E#PBF

LT8580HMS8E#TRPBFLTGKJ

8-Lead Plastic MSOP

– 40°C to 150°C

AUTOMOTIVE PRODUCTS**
LT8580EMS8E#WPBF

LT8580EMS8E#WTRPBFLTGKJ

8-Lead Plastic MSOP

– 40°C to 125°C

LT8580IMS8E#WPBF

LT8580IMS8E#WTRPBFLTGKJ

8-Lead Plastic MSOP

– 40°C to 125°C

Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Thesemodels are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact yourlocal Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports forthese models.

2

Rev. CFor more information www.analog.com

LT8580
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VSHDN = VIN unless otherwise noted. (Note 2)

PARAMETERCONDITIONS

Operating Voltage Range

LT8580E, LT8580I
LT8580H

Positive Feedback Voltage
Negative Feedback Voltage
Positive FBX Pin Bias Current
Negative FBX Pin Bias Current

MIN
l
l
l
l

VFBX = Positive Feedback Voltage, Current Into Pin
VFBX = Negative Feedback Voltage, Current Out of Pin

l
l

2.55
2.9
1.185
–3
81
81

Error Amplifier Transconductance
Error Amplifier Voltage Gain
Quiescent Current
Quiescent Current in Shutdown
Reference Line Regulation
Switching Frequency, fOSC
Switching Frequency in Foldback
Switching Frequency Set Range
SYNC High Level for Synchronization
SYNC Low Level for Synchronization
SYNC Clock Pulse Duty Cycle
Recommended Minimum SYNC Ratio fSYNC/fOSC
Minimum Off-Time
Minimum On-Time
Switch Current Limit
Switch VCESAT
Switch Leakage Current
Soft-Start Charging Current
SHDN Minimum Input
Voltage HighSHDN Input Voltage Low
SHDN Pin Bias Current

TYP

MAX

UNITS

1.204
3
83.3
83.3

40
40
1.220
12
85
86

V
V
V
mV
µA
µA

200
VSHDN = 2.5V, Not Switching
VSHDN = 0V
2.5V ≤ VIN ≤ 40V
RT = 56.2k
RT = 422k
Compared to Normal fOSC
SYNCing or Free Running

l
l

1.23
165

l

200
1.3

l

60
1.2
0
0.01
1.5
200
1/6

0.4
65

35

Minimum Duty Cycle (Note 3)
Maximum Duty Cycle (Notes 3, 4), fOSC = 1.5MHz
Maximum Duty Cycle (Notes 3, 4), fOSC = 200kHz
ISW = 0.75A
VSW = 5V
VSS = 0.5V
Active Mode, SHDN Rising
Active Mode, SHDN Falling
Shutdown Mode
VSHDN = 3V
VSHDN = 1.3V
VSHDN = 0V

SHDN Hysteresis
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT8580E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT8580I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT8580H is guaranteed over the full –40°C to
150°C operating junction temperature range. Operating lifetime is derated
at junction temperatures greater than 125°C.

l
l
l

1.2
0.6
0.4

l

4
1.23
1.21

l
l

3/4
100
120
1.5
1
0.8
400
0.01
6
1.31
1.27

l

9

1.7
1
0.05
1.77
235
1500

l

VSYNC = 0V to 2V

µmhos

44
12
0
40

1.8
1.5
1.4
1
8
1.4
1.33
0.3
56
15
0.1

V/V
mA
µA
%/V
MHz
kHz
Ratio
kHz
V
V
%
ns
ns
A
A
A
mV
µA
µA
V
V
V
µA
µA
µA
mV

Note 3: Current limit guaranteed by design and/or correlation to static test.
Note 4: Current limit measured at equivalent of listed switching frequency.
Note 5: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 150°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.

Rev. CFor more information www.analog.com

3

LT8580
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise specified

600

1.25
1.00
0.75
0.50

500
400
300
200

1.5

1.0

0.5

100

0.25
0

2.0

SWITCH CURRENT (A)

1.75
1.50

Commanded Switch Current vs SS

Switch Saturation Voltage
700

SATURATION VOLTAGE (mV)

SWITCH CURRENT LIMIT (A)Switch Current Limit vs Duty Cycle
2.00

10

20

30

40 50 60 70
DUTY CYCLE (%)

80

90

0

0

0.25

1
0.5
0.75
1.25
SWITCH CURRENT (A)Switch Current Limitvs Temperature

POSITIVE FBX VOLTAGE (V)

1.5

1.0

0.5

1.220

30

1.215

25

1.210

20

1.205

15

1.200

10

1.195

5

1.190

0

1.185

–5

1.180

–10

1.175

–15

1.170
–50 –25

25 50 75 100 125 150
TEMPERATURE (°C)

0–20
25 50 75 100 125 150
TEMPERATURE (°C)

85

85

84

84

83

83

82

82

81

81
80
25 50 75 100 125 150
TEMPERATURE (°C)

1.8
RT = 56.2k

1.6
1.4
FREQUENCY (MHz)86
NEGATIVE FBX CURRENT OUT OF PIN (µA)

POSITIVE FBX CURRENT INTO PIN (µA)

1.2

Oscillator Frequency

86

1.2
1.0
0.8
0.6
0.4

RT = 422k

0.2
0–50 –258580 G06

418580 G05

Positive and Negative FBX Current
at Output Voltage Regulation

0

0.4
0.6
0.8
SS VOLTAGE (V)8580 G03

8580 G04

80–50 –25

0.2

NEGATIVE FBX VOLTAGE (mV)

SWITCH CURRENT LIMIT (A)0

Positive and Negative Output
Voltage Regulation

2.0

0

0

8580 G02

8580 G01

0–50 –25

1.5

0

25 50 75 100 125 150
TEMPERATURE (°C)
8580 G07

Rev. CFor more information www.analog.com

LT8580
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise specified
Internal UVLO

1/2

0

INVERTING
CONFIGURATIONS
0.2

0

1

2.6

25

2.5
2.4
2.3
2.2

NONINVERTINGCONFIGURATIONS

0.4
0.6
0.8
FBX VOLTAGE (V)30

2.1–50 –25

1.2

0

SHDN VOLTAGE (V)SHDN PIN CURRENT (µA)

350

150
100

1.34
1.32

SHDN RISING

1.30
1.28
1.26

SHDN FALLING

1.24

50
10

15

20

25

30

35

40

SHDN VOLTAGE (V)1.20–50 –250

25 50 75 100 125 150
TEMPERATURE (°C)

8580 G118580 G12RECOMMENDED MINIMUM ON TIME

300
250
200
150
100
50

1.22
5

2

400

1.36

200

0.25 0.5 0.75 1 1.25 1.5 1.75
SHDN VOLTAGE (V)Minimum On Timevs Temperature

1.38

250

0

8580 G10

1.40

125°C
25°C
–40°C

0

10

Active/Lockout Threshold

300

0

15

8580 G09

SHDN Pin Current
350

20

0

25 50 75 100 125 150
TEMPERATURE (°C)

8580 G08

400

125°C
25°C
–40°C

5

MINIMUM ON TIME (NS)

1/3
1/4
1/5
1/6

SHDN Pin Current

2.7

SHDN PIN CURRENT (µA)

1

VIN VOLTAGE (V)NORMALIZED OSCILLATOR FREQUENCY (F/FNOM)

Oscillator Frequency During
Soft-Start

MEASURED MINIMUM ON TIME

0
–50 –250

25 50 75 100 125 150
TEMPERATURE (°C)
8580 G13

Rev. CFor more information www.analog.com

5LT8580
PIN FUNCTIONSFBX (Pin 1): Positive and Negative Feedback Pin. For anoninverting or inverting converter, tie a resistor from the
FBX pin to VOUT according to the following equations:sequence. Drive below 1.21V to disable the chip. Drive
above 1.40V to activate the chip and restart the soft-start
sequence. Do not float this pin.

RFBX =( VOUT − 1.204V ) ; Noninverting Converter

RFBX =( VOUT + 3mV) ; Inverting Converter

RT (Pin 6): Timing Resistor Pin. Adjusts the switchingfrequency. Place a resistor from this pin to ground to set
the frequency to a fixed free running level. Do not float
this pin.

83.3µA

83.3µA

SS (Pin 7): Soft-Start Pin. Place a soft-start capacitor here.
Upon start-up, the SS pin will be charged by a (nominally)
280k resistor to about 2.1V.

VC (Pin 2): Error Amplifier Output Pin. Tie external compensation network to this pin.

SYNC (Pin 8): To synchronize the switching frequency toan outside clock, simply drive this pin with a clock. The
high voltage level of the clock needs to exceed 1.3V, andthe low level should be less 0.4V. Drive this pin to lessthan 0.4V to revert to the internal free-running clock. See
the Applications Information section for more information.

VIN (Pin 3): Input Supply Pin. Must be locally bypassed.
SW (Pin 4): Switch Pin. This is the collector of the internal
NPN Power switch. Minimize the metal trace area connec­
ted to this pin to minimize EMI.
SHDN (Pin 5): Shutdown Pin. In conjunction with the
UVLO (undervoltage lockout) circuit, this pin is used
to enable/disable the chip and restart the soft-start

GND (Exposed Pad Pin 9): Ground. Exposed pad must
be soldered directly to local ground plane.

BLOCK DIAGRAM
RC

VIN

CSS
7

50k
SHDN
5
1.3V

–
+

VIN

VC

L1

SOFTSTARTR

3

ILIMIT

COMPARATOR

–

Q2

A3

+

R

4
SR1
S

DRIVER

+
∑

A1

A4

–
FBX

+
14.5k

RFBX
0.02Ω

–
SLOPE
COMPENSATION

1

VOUT
C1

Q1

Q

+
14.5k

D1

SW

VC

S

1.204V
REFERENCE

CIN

280k

SR2
Q

2

SS

DISCHARGE
DETECT

UVLO

CC

A2

FREQUENCYFOLDBACK

GND
9÷N ADJUSTABLE
OSCILLATOR

–
SYNC
BLOCK
SYNC

8

6

RT
RT

8580 BD

6

Rev. CFor more information www.analog.com

LT8580
OPERATION
The LT8580 uses a constant-frequency, current mode control scheme to provide excellent line and load regulation.
Refer to the Block Diagram for the following descriptionof the part’s operation. At the start of each oscillator cycle,
the SR latch (SR1) is set, which turns on the power switch,
Q1. The switch current flows through the internal current
sense resistor, generating a voltage proportional to theswitch current. This voltage (amplified by A4) is added
to a stabilizing ramp and the resulting sum is fed into thepositive terminal of the PWM comparator A3. When thisvoltage exceeds the level at the negative input of A3, theSR latch is reset, turning off the power switch. The levelat the negative input of A3 (VC pin) is set by the error
amplifier A1 (or A2) and is simply an amplified version of
the difference between the feedback voltage (FBX pin) andthe reference voltage (1.204V or 3mV, depending on theconfiguration). In this manner, the error amplifier sets thecorrect peak current level to keep the output in regulation.
The LT8580 has an FBX pin architecture that can be used
for either noninverting or inverting configurations. Whenconfigured as a noninverting converter, the FBX pin ispulled up to the internal bias voltage of 1.204V by the
RFBX resistor connected from VOUT to FBX. Amplifier A2
becomes inactive and amplifier A1 performs the inverting amplification from FBX to VC. When the LT8580 is in
VIN > VOUTOR
VIN = VOUTOR
VIN < VOUT

+

C2

L1

•

D1
VOUT

VIN

SW

SHUTDOWN

FBX

RT

GND

SYNC
RT

•

SHDN

SS

SEPIC Topology
As shown in Figure 1, the LT8580 can be configured asa SEPIC (single-ended primary inductance converter).
This topology allows for the input to be higher, equal, or
lower than the desired output voltage. Output disconnect
is inherently built into the SEPIC topology, meaning no DC
path exists between the input and output. This is usefulfor applications requiring the output to be disconnectedfrom the input source when the circuit is in shutdown.
Inverting Topology
The LT8580 can also work in a dual inductor inverting
topology, as shown in Figure 2. The part’s unique feedback
pin allows for the inverting topology to be built by simply
changing the connection of external components. Thissolution results in very low output voltage ripple due tothe inductor L2 in series with the output. Abrupt changes
in output capacitor current are eliminated because theoutput inductor delivers current to the output during boththe off-time and the on-time of the LT8580 switch.

+
R1

VIN

+

C3

SW

SHDN

FBX

RT

GND

SYNC

RC
CSS

RT

CC
8580 F01

Figure 1. SEPIC Topology Allows for the Input to Spanthe Output Voltage. Coupled or Uncoupled Inductors
Can Be Used. Follow Noted Phasing if Coupled

L2

SS

•

R1

VC

+

RC
CSS

VOUT

D1

LT8580C1

SHUTDOWN

VC

C2

L1

•

VIN

L2

LT8580C1

an inverting configuration, the FBX pin is pulled down to
3mV by the RFBX resistor connected from VOUT to FBX.
Amplifier A1 becomes inactive and amplifier A2 performs
the noninverting amplification from FBX to VC.

C3

CC
8580 F02

Figure 2. Dual Inductor Inverting Topology Results in
Low Output Ripple. Coupled or Uncoupled Inductors
Can Be Used. Follow Noted Phasing if CoupledRev. CFor more information www.analog.com

7

LT8580
OPERATION
Start-Up Operation
Several functions are provided to enable a very clean
start-up for the LT8580.
• First, the SHDN pin voltage is monitored by an internal
voltage reference to give a precise turn-on voltage level.
An external resistor (or resistor divider) can be connectedfrom the input power supply to the SHDN pin to provide
a user-programmable undervoltage lockout function.
• Second, the soft-start circuitry provides for a gradual
ramp-up of the switch current. When the part is broughtout of shutdown, the external SS capacitor is firstdischarged (providing protection against SHDN pin
glitches and slow ramping), then an integrated 280k
resistor pulls the SS pin up to ~2.1V. By connecting an
external capacitor to the SS pin, the voltage ramp rateon the pin can be set. Typical values for the soft-startcapacitor range from 100nF to 1µF.
• Finally, the frequency foldback circuit reduces the switching frequency when the FBX pin is in a nominal range

8of 300mV to 920mV. This feature reduces the minimum
duty cycle that the part can achieve thus allowing better
control of the switch current during start-up. When the
FBX voltage is pulled outside of this range, the switchingfrequency returns to normal.
Current Limit and Thermal Shutdown Operation
The LT8580 has a current limit circuit not shown in the
Block Diagram. The switch current is constantly monitored
and not allowed to exceed the maximum switch current at
a given duty cycle (see the Electrical Characteristics table).
If the switch current reaches this value, the SR latch (SR1)
is reset regardless of the state of the comparator (A1/
A2). Also, not shown in the Block Diagram is the thermal
shutdown circuit. If the temperature of the part exceeds
approximately 165°C, the SR2 latch is set regardless of thestate of the amplifier (A1/A2). When the part temperature
falls below approximately 160°C, a full soft-start cycle willthen be initiated. The current limit and thermal shutdown
circuits protect the power switch as well as the external
components connected to the LT8580.

Rev. CFor more information www.analog.com

LT8580
APPLICATIONS INFORMATION
Setting Output Voltage
The output voltage is set by connecting a resistor (RFBX)
from VOUT to the FBX pin. RFBX is determined from thefollowing equation:
RFBX =|VOUT − VFBX |83.3µA

where VFBX is 1.204V (typical) for noninverting topologies(i.e., boost and SEPIC regulators) and 3mV (typical) for
inverting topologies (see the Electrical Characteristics).
Power Switch Duty Cycle
In order to maintain loop stability and deliver adequate
current to the load, the power NPN (Q1 in the Block Diagram) cannot remain “on” for 100% of each clock cycle.
The maximum allowable duty cycle is given by:
DCMAX =(TP − Min Off Time)• 100%
TP

where TP is the clock period and Min Off Time (found in
the Electrical Characteristics) is typically 100ns.
The application should be designed so that the operating
duty cycle does not exceed DCMAX.
The minimum allowable duty cycle is given by:
DCMIN =Min On TimeTP

• 100%

where TP is the clock period and Minimum On Time is asshown in the Typical Performance Characteristics.
The application should be designed so that the operating
duty cycle is at least DCMIN.
Duty cycle equations for several common topologies are
given below, where VD is the diode forward voltage dropand VCESAT is typically 400mV at 0.75A.
For the boost topology:
DC ≅VOUT − VIN + VD
VOUT + VD − VCESAT

For the SEPIC or dual inductor inverting topology (seeFigure 1 and Figure 2):
DC ≅VD + |VOUT |VIN + |VOUT | + VD − VCESAT

The LT8580 can be used in configurations where the duty
cycle is higher than DCMAX, but it must be operated in the
discontinuous conduction mode so that the effective duty
cycle is reduced.
Inductor Selection

General Guidelines: The high frequency operation of theLT8580 allows for the use of small surface mount inductors.
For high efficiency, choose inductors with high frequency
core material, such as ferrite, to reduce core losses. To
improve efficiency, choose inductors with more volume
for a given inductance. The inductor should have low
DCR (copper wire resistance) to reduce I2R losses, andmust be able to handle the peak inductor current without
saturating. Note that in some applications, the current
handling requirements of the inductor can be lower, suchas in the SEPIC topology, where each inductor only carries
a fraction of the total switch current. Multilayer or chip
inductors usually do not have enough core area to support peak inductor currents in the 1A to 2A range. To
minimize radiated noise, use a toroidal or shielded inductor. Note that the inductance of shielded types will drop
more as current increases, and will saturate more easily.
See Table 1 for a list of inductor manufacturers. Thoroughlab evaluation is recommended to verify that the following
guidelines properly suit the final application.
Table 1. Inductor Manufacturers
Coilcraft

XAL5050, MSD7342, MSS7341 and
LPS4018 Serieswww.coilcraft.com

Coiltronics DR, DRQ, LD and CD Serieswww.coiltronics.com

SumidaCDRH8D58/LD, CDRH64B, andCDRH70D430MN Serieswww.sumida.com

Würth

WE-PD, WE-DD, WE-TPC,
WE-LHMI and WE-LQS Series

www.we-online.com

Minimum Inductance : Although there can be a trade-off
with efficiency, it is often desirable to minimize board
space by choosing smaller inductors. When choosing
Rev. CFor more information www.analog.com

9LT8580
APPLICATIONS INFORMATION
an inductor, there are two conditions that limit the minimum inductance: (1) providing adequate load current,and (2) avoiding subharmonic oscillation. Choose an
inductance that is high enough to meet both of theserequirements.

Adequate Load Current : Small value inductors result inincreased ripple currents and thus, due to the limited peakswitch current, decrease the average current that can beprovided to a load (IOUT). In order to provide adequateload current, L should be at least:
LBOOST >LMIN >

VIN
2 i DC − 1i1.25 • (DC − 300ns • f) • f 1− DC

LMIN = L1 for boost topologies (see Figure 15)
LMIN = L1 = L2 for coupled dual inductor topologies(see Figure 16 and Figure 17)

DC • VIN⎛⎞|V | • I
2(f) ⎜ILIM − OUT OUT ⎟VIN • η ⎠⎝LMIN = L1||L2 for uncoupled dual inductor topologies(see Figure 16 and Figure 17)

for boost, topologies, or:Maximum Inductance: Excessive inductance can reduce
current ripple to levels that are difficult for the current comparator (A3 in the Block Diagram) to cleanly discriminate,thus causing duty cycle jitter and/or poor regulation. The
maximum inductance can be calculated by:DC • VINLDUAL >⎛⎞
•IV
2(f) ⎜ILIM− OUT OUT − IOUT ⎟VIN • η⎝⎠for the SEPIC and inverting topologies.

LMAX =

where:LBOOST = L1 for boost topologies (see Figure 15)
LDUAL = L1 = L2 for coupled dual inductor topologies(see Figure 16 and Figure 17)
LDUAL = L1||L2 for uncoupled dual inductor topologies(see Figure 16 and Figure 17)
DC = switch duty cycle (see previous section)
ILIM = switch current limit, typically about 1.2A at 50%
duty cycle (see the Typical Performance Characteristics
section).
h = power conversion efficiency (typically 85% for boost
and 83% for dual inductor topologies at high currents).
f = switching frequency
IOUT = maximum load current
Negative values of L indicate that the output load current
IOUT exceeds the switch current limit capability of theLT8580.

10

Avoiding Subharmonic Oscillations: The LT8580’s internal
slope compensation circuit can prevent subharmonic oscillations that can occur when the duty cycle is greater than
50%, provided that the inductance exceeds a minimum
value. In applications that operate with duty cycles greaterthan 50%, the inductance must be at least:

VIN − VCESAT DC•
IMIN-RIPPLE
f

where
LMIN = L1 for boost topologies (see Figure 15)
LMIN = L1 = L2 for coupled dual inductor topologies(see Figure 16 and Figure 17)
LMIN = L1||L2 for uncoupled dual inductor topologies(see Figure 16 and Figure 17)
IMIN(RIPPLE) = typically 80mA

Current Rating: Finally, the inductor(s) must have a rating
greater than its peak operating current to prevent inductor
saturation resulting in efficiency loss. In steady state, thepeak input inductor current (continuous conduction mode
only) is given by:
IL1-PEAK =|VOUT • IOUT | VIN • DC+
VIN • η2 • L1• f

for the boost, SEPIC and dual inductor inverting topologies.

Rev. CFor more information www.analog.com

LT8580
APPLICATIONS INFORMATION
For dual dual inductor topologies, the peak output inductor
current is given by:
IL2-PEAK = IOUT +VOUT • (1− DC)
2 • L2 • f

Table 2 shows a list of several ceramic capacitor manufacturers. Consult the manufacturers for detailed informationon their entire selection of ceramic parts.
Table 2. Ceramic Capacitor Manufacturers

For the dual inductor topologies, the total peak current is:⎡⎤ V • DCV
IL-PEAK = IOUT ⎢1+ OUT ⎥ + IN
⎣ η • VIN ⎦ 2 • L • f

Note: Peak inductor current is limited by the switch current
limit. Refer to the Electrical Characteristics table and to
the Switch Current Limit vs Duty Cycle plot in the Typical
Performance Characteristics.
Capacitor Selection
Low ESR (equivalent series resistance) capacitors should
be used at the output to minimize the output ripple voltage.
Multilayer ceramic capacitors are an excellent choice, as
they have an extremely low ESR and are available in verysmall packages. X5R or X7R dielectrics are preferred, as
these materials retain their capacitance over wider voltage
and temperature ranges. A 0.47µF to 10µF output capacitor
is sufficient for most applications. Always use a capacitor
with a sufficient voltage rating. Many ceramic capacitors,
particularly 0805 or 0603 case sizes, have greatly reduced
capacitance at the desired output voltage. Solid tantalum
or OS-CON capacitors can be used, but they will occupy
more board area than a ceramic and will have a higher
ESR with greater output ripple.
Ceramic capacitors also make a good choice for the input
decoupling capacitor, which should be placed as closely
as possible to the VIN pin of the LT8580 as well as to the
inductor connected to the input of the power path. If it is
not possible to optimally place a single input capacitor,
then use one at the VIN pin of the chip (CVIN) and one at
the input of the power path (CPWR). See equations inTable 4, Table 5 and Table 6 for sizing information. A 1µF
to 2.2µF input capacitor is sufficient for most applications.

Kemet

www.kemet.com

Muratawww.murata.com

Taiyo Yuden

www.t-yuden.com

TDK

www.tdk.com

Compensation—Adjustment
To compensate the feedback loop of the LT8580, a series
resistor-capacitor network in parallel with a single capacitor
should be connected from the VC pin to GND. For mostapplications, the series capacitor should be in the rangeof 470pF to 2.2nF with 1nF being a good starting value.
The parallel capacitor should range in value from 10pF to
100pF with 47pF a good starting value. The compensation
resistor, RC , is usually in the range of 5k to 50k. A goodtechnique to compensate a new application is to use a
100kΩ potentiometer in place of series resistor RC. With
the series capacitor and parallel capacitor at 1nF and 47pF
respectively, adjust the potentiometer while observing
the transient response and the optimum value for RC canbe found. Figure 3 (3a to 3c) illustrates this process forthe circuit of Figure 4 with a load current stepped between 60mA and 160mA. Figure 3a shows the transient
response with RC equal to 2k. The phase margin is poor,
as evidenced by the excessive ringing in the output
voltage and inductor current. In Figure 3b, the value of
RC is increased to 3k, which results in a more damped
response. Figure 3c shows the results when RC is increased
further to 6.04k. The transient response is nicely damped
and the compensation procedure is complete.
Compensation—Theory
Like all other current mode switching regulators, theLT8580 needs to be compensated for stable and efficient
operation. Two feedback loops are used in the LT8580—
a fast current loop which does not require compensation,
and a slower voltage loop which does. Standard bode plot
analysis can be used to understand and adjust the voltage
feedback loop.
Rev. CFor more information www.analog.com

11

LT8580
APPLICATIONS INFORMATION
ISTEP
100mA/DIV

ISTEP
100mA/DIV

VOUT
500mV/DIV
AC-COUPLED

VOUT
500mV/DIV
AC-COUPLED

IL1200mA/DIV

IL1200mA/DIV
100µs/DIV

100µs/DIV8580 F03a(3a) Transient Response Shows Excessive Ringing

8580 F03b(3b) Transient Response Is Better

ISTEP
100mA/DIV
VOUT
500mV/DIV
AC-COUPLED

IL1200mA/DIV
100µs/DIV8580 F03c(3c) Transient Response Is Well Damped
Figure 3. Transient Response

L1
15µH

VIN
5V

D1

VOUT
12V
200mA

10k
VIN
CIN
2.2µF

SW

SHDN

FBX

RFBX
130k

COUT
4.7µF

LT8580
SYNC
RT

VC
GND

RT
56.2k

RC
6.04k

SS
CSS
0.22µF

CC
3.3nF

CF
47pF
8580 F04

Figure 4. 1.5MHz, 5V to 12V Boost Converter

12

Rev. CFor more information www.analog.com

LT8580
APPLICATIONS INFORMATION
As with any feedback loop, identifying the gain and phase
contribution of the various elements in the loop is critical.
Figure 5 shows the key equivalent elements of a boost converter. Because of the fast current control loop, the powerstage of the IC, inductor and diode have been replaced by
a combination of the equivalent transconductance amplifier gmp and the current controlled current source whichconverts IVIN to (ηVIN/VOUT) • IVIN. gmp acts as a current
source where the peak input current, IVIN, is proportional
to the VC voltage. η is the efficiency of the switchingregulator, and is typically about 85%.
Note that the maximum output currents of gmp and gma are
finite. The limits for gmp are in the Electrical Characteristics
section (switch current limit), and gma is nominally limited
to about +15µA and –17µA.

From Figure 5, the DC gain, poles and zeros can be calculated as follows:
Output Pole: P1=

2
2 • π • RL • COUT

Error Amp Pole: P2 =1
2 • π • [RO +RC ] • CC

Error Amp Zero: Z1=

1
2 • π • RC • CC

DC Gain:(Breaking Loop at FBX Pin)
ADC = AOL (0) =∂VC ∂IVIN ∂VOUT ∂VFBX•••=∂VFBX ∂VC ∂IVIN ∂VOUT⎛(gma • R0 ) • gmp • ⎜ η •
⎝

–
+

gmp

η • VIN
•IVIN
VOUT

VC
CF

RC
CC

RO

+
gma

ESR Zero: Z2 =

VOUT

IVIN

RESR
CPL

1.204V
REFERENCE

R2

–

COUT
R1

FBX

8580 F05

R2

CC: COMPENSATION CAPACITOR
COUT: OUTPUT CAPACITOR
CPL: PHASE LEAD CAPACITOR
CF: HIGH FREQUENCY FILTER CAPACITOR
gma: TRANSCONDUCTANCE AMPLIFIER INSIDE IC
gmp: POWER STAGE TRANSCONDUCTANCE AMPLIFIER
RC: COMPENSATION RESISTORRL: OUTPUT RESISTANCE DEFINED AS VOUT DIVIDED BY ILOAD(MAX)
RO: OUTPUT RESISTANCE OF gma
R1, R2: FEEDBACK RESISTOR DIVIDER NETWORKRESR: OUTPUT CAPACITOR ESR
η: CONVERTER EFFICIENCY (~85% AT HIGHER CURRENTS)

RL

RHP Zero: Z3 =0.5R2
VIN RL ⎞• ⎟•VOUT 2 ⎠ R1+ 0.5R2

12 • π • RESR • COUT
VIN2 • RL

4 • π • VOUT2•L

fHigh Frequency Pole: P3 > S
3Phase Lead Zero: Z4 =Phase Lead Pole: P4 =1
2 • π • R1• CPL
1

R2
2 •C
2•π•
R2 PL
R1+
2
R1•

Error Amp Filter Pole:
P5 =

C
1
, CF < C
RC • RO
10
• CF
2•π•
RC + RO

Figure 5. Boost Converter Equivalent Model

The current mode zero (Z3) is a right-half plane zero
which can be an issue in feedback control design, but ismanageable with proper external component selection.

Rev. CFor more information www.analog.com

13

LT8580
APPLICATIONS INFORMATION
Using the circuit in Figure 4 as an example, Table 3 shows
the parameters used to generate the bode plot shown in
Figure 6.
140

0

120

–90

80

–135

60

–180
54° AT
14kHz

GAIN

–225

20

–270

0

–315

–20
10

100

1k
10k
FREQUENCY (Hz)100k

PHASE (DEG)

GAIN (dB)100

40

Diode Selection

–45
PHASE

–360
1M
8580 F06

Figure 6. Bode Plot for Example Boost Converter
Table 3. Bode Plot Parameters
PARAMETER

VALUE

UNITS

COMMENT

RL

60

W

Application Specific

COUT

4.7

µF

Application Specific

RESR

10

mW

Application Specific

RO

300

kW

Not Adjustable

CC

3300

pF

Adjustable

CF

47

pF

Optional/Adjustable

CPL

0

pF

Optional/Adjustable

RC

6.04

kW

Adjustable

R1

130

kW

Adjustable

R2

14.6

kW

Not Adjustable

VOUT

12

V

Application Specific

VIN

5

V

Application Specific

gma

200

µmho

Not Adjustable

gmp

7

mho

Not Adjustable

L

15

µH

Application Specific

fS

1.5

MHz

Adjustable

14

In Figure 6, the phase is –126° when the gain reaches 0dB
giving a phase margin of 54°. The crossover frequency is
14kHz, which is more than three times lower than the frequency of the RHP zero to achieve adequate phase margin.

Schottky diodes, with their low forward-voltage drops andfast switching speeds, are recommended for use with theLT8580. For applications where VR (see Tables 4, 5 and6) < 40V, the Diodes, Inc. SBR1V40LP is a good choice.
Where VR > 40V, the Diodes Inc. DFLS1100 works well.
These diodes are rated to handle an average forward
current of 1A.
Oscillator
The operating frequency of the LT8580 can be set by theinternal free-running oscillator. When the SYNC pin isdriven low (< 0.4V), the frequency of operation is set by aresistor from RT to ground. An internally trimmed timing
capacitor resides inside the IC. The oscillator frequency
is calculated using the following formula:
fOSC =

85.5(R T + 1)

where fOSC is in MHz and RT is in kΩ. Conversely, RT(in kΩ) can be calculated from the desired frequency(in MHz) using:
RT =

85.5
−1
fOSC

Clock Synchronization
The operating frequency of the LT8580 can be synchronized
to an external clock source. To synchronize to the externalsource, simply provide a digital clock signal into the SYNC
pin. The LT8580 will operate at the SYNC clock frequency.
The LT8580 will revert to the internal free-running oscillator clock after SYNC is driven low for a few free-running
clock periods.

Rev. CFor more information www.analog.com

LT8580
APPLICATIONS INFORMATION
Driving SYNC high for an extended period of time effectively stops the operating clock and prevents latch SR1
from becoming set (see the Block Diagram). As a result,the switching operation of the LT8580 will stop.
The duty cycle of the SYNC signal must be between 35%
and 65% for proper operation. Also, the frequency of the
SYNC signal must meet the following two criteria:(1) SYNC may not toggle outside the frequency range of
200kHz to 1.5MHz unless it is stopped low to enable
the free-running oscillator.
(2) The SYNC frequency can always be higher than thefree-running oscillator frequency, fOSC , but should not
be less than 25% below fOSC .
Operating Frequency Selection
There are several considerations in selecting the operating frequency of the converter. The first is staying clearof sensitive frequency bands, which cannot tolerate any
spectral noise. For example, in products incorporating RF
communications, the 455kHz IF frequency is sensitive to
any noise, therefore switching above 600kHz is desired.
Some communications have sensitivity to 1.1MHz, and inthat case, a 1.5MHz switching converter frequency may be
employed. The second consideration is the physical sizeof the converter. As the operating frequency goes up, theinductor and filter capacitors go down in value and size.
The trade-off is efficiency, since the switching losses due
to NPN base charge (see Thermal Calculations), Schottky
diode charge, and other capacitive loss terms increase
proportionally with frequency.

This capacitor is slowly charged to ~2.1V by an internal
280k resistor once the part is activated. SS pin voltages
below ~1.1V reduce the internal current limit. Thus, thegradual ramping of the SS voltage also gradually increases
the current limit as the capacitor charges. This, in turn,allows the output capacitor to charge gradually toward its
final value while limiting the start-up current.
In the event of a commanded shutdown or lockout (SHDN
pin), internal undervoltage lockout (UVLO) or a thermal
lockout, the soft-start capacitor is automatically discharged
to ~200mV before charging resumes, thus assuring thatthe soft-start occurs after every reactivation of the chip.
Shutdown
The SHDN pin is used to enable or disable the chip. For
most applications, SHDN can be driven by a digital logic
source. Voltages above 1.4V enable normal active operation. Voltages below 300mV will shutdown the chip,
resulting in extremely low quiescent current.
While the SHDN voltage transitions through the lockout
voltage range (0.3V to 1.21V) the power switch is disabled
and the SR2 latch is set (see the Block Diagram). This
causes the soft-start capacitor to begin discharging, which
continues until the capacitor is discharged and active operation is enabled. Although the power switch is disabled,
SHDN voltages in the lockout range do not necessarily
reduce quiescent current until the SHDN voltage is nearor below the shutdown threshold.
Also note that SHDN can be driven above VIN or VOUT aslong as the SHDN voltage is limited to less than 40V.

Soft-Start

The start-up current can be limited by connecting an
external capacitor (typically 100nF to 1µF) to the SS pin.

ACTIVE(NORMAL OPERATION)
1.40V(HYSTERESIS AND TOLERANCE)

1.21V
SHDN (V)The LT8580 contains a soft-start circuit to limit peak switch
currents during start-up. High start-up current is inherentin switching regulators in general since the feedback loop
is saturated due to VOUT being far from its final value. The
regulator tries to charge the output capacitor as quickly as
possible, which results in large peak currents.

LOCKOUT(POWER SWITCH OFF,SS CAPACITOR DISCHARGED)

0.3V

SHUTDOWN(LOW QUIESCENT CURRENT)

0.0V

8580 F07

Figure 7. Chip States vs SHDN Voltage
Rev. CFor more information www.analog.com

15

LT8580
APPLICATIONS INFORMATION
Configurable Undervoltage Lockout
Figure 8 shows how to configure an undervoltage lockout (UVLO) for the LT8580. Typically, UVLO is used insituations where the input supply is current-limited, hasa relatively high source resistance, or ramps up/down
slowly. A switching regulator draws constant power fromthe source, so source current increases as source voltage
drops. This looks like a negative resistance load to thesource and can cause the source to current-limit or latch
low under low source voltage conditions. UVLO prevents
the regulator from operating at source voltages wherethese problems might occur.
The shutdown pin comparator has voltage hysteresis withtypical thresholds of 1.31V (rising) and 1.27V (falling). Resistor RUVLO2 is optional. RUVLO2 can be included to reduce
the overall UVLO voltage variation caused by variationsin SHDN pin current (see the Electrical Characteristics).
A good choice for RUVLO2 is ≤10k ±1%. After choosing avalue for RUVLO2 , RUVLO1 can be determined from eitherof the following:
RUVLO1 =VIN + − 1.31V⎛ 1.31V ⎞⎜⎟ + 12µA⎝ RUVLO2 ⎠RUVLO1 =3.5V − 1.27V= 187k⎛ 1.27V ⎞⎜⎟ + 12µA⎝ ∞ ⎠To activate the LT8580 for VIN voltages greater than
4.5V using the double resistor configuration, choose
RUVLO2 = 10k and:RUVLO1 =4.5V − 1.31V= 22.1k⎛ 1.31V ⎞⎜⎟ + 12µA⎝ 10k ⎠

Internal Undervoltage Lockout
The LT8580 monitors the VIN supply voltage in case VINdrops below a minimum operating level (typically about
2.35V). When VIN is detected low, the power switch isdeactivated, and while sufficient VIN voltage persists, thesoft-start capacitor is discharged. After VIN is detected
high, the power switch will be reactivated and the softstart capacitor will begin charging.
Thermal Considerationsor
RUVLO1 =For example, to disable the LT8580 for VIN voltages below
3.5V using the single resistor configuration, choose:

VIN − − 1.27V⎛ 1.27V ⎞⎜⎟ + 12µA⎝ RUVLO2 ⎠where VIN+ and VIN– are the VIN voltages when rising or
falling, respectively.

For the LT8580 to deliver its full output power, it is imperative that a good thermal path be provided to dissipate theheat generated within the package. This is accomplishedby taking advantage of the thermal pad on the underside of
the IC. It is recommended that multiple vias in the printed
circuit board be used to conduct heat away from the IC
and into a copper plane with as much area as possible.

VIN

VIN

1.3V

RUVLO1SHDN–

ACTIVE/LOCKOUT+

12µA
AT 1.3VRUVLO2(OPTIONAL)
GND

8580 F08

Figure 8. Configurable UVLO

16

Rev. CFor more information www.analog.com

LT8580
APPLICATIONS INFORMATION
Thermal Lockout

PSW = 117mW

If the die temperature reaches approximately 165°C, thepart will go into thermal lockout, the power switch will beturned off and the soft-start capacitor will be discharged.
The part will be enabled again when the die temperature
has dropped by ~5°C (nominal).

PBAC = 169mW

Thermal Calculations
Power dissipation in the LT8580 chip comes from four
primary sources: switch I2R loss, NPN base drive (AC),NPN base drive (DC), and additional input current. The
following formulas can be used to approximate the power
losses. These formulas assume continuous mode operation, so they should not be used for calculating efficiency
in discontinuous mode or at light load currents.
Average Input Current: IIN =VOUT • IOUT
VIN • ηSwitch Conduction Loss: PSW = (DC)(IIN )(VSW )Base Drive Loss (AC): PBAC = 20ns(IIN )(VOUT )(f)Base Drive Loss (DC): PBDC =(VIN )(IIN )(DC)40

Input Power Loss: PINP = 6mA (VIN )where:
VSW = switch on voltage (see Typical Performance
Characteristics for Switch Saturation Voltage)
DC = duty cycle (see the Power Switch Duty Cycle section for formulas)
h = power conversion efficiency (typically 85% at highcurrents)
Example: boost configuration, VIN = 5V, VOUT = 12V,
IOUT = 0.2A, f = 1.25MHz, VD = 0.5V:
IIN = 0.56A
DC = 62.0%

PBDC = 44mW
PINP = 30mW
Total LT8580 power dissipation (PTOT) = 361mW
Thermal resistance for the LT8580 is influenced by the pres­ence of internal, topside or backside planes. To calculate
die temperature, use the appropriate thermal resistancenumber and add in worst-case ambient temperature:
TJ = TA + θJA • PTOT
where TJ = junction temperature, TA = ambient temperature,and θJA is the thermal resistance from the silicon junction
to the ambient air.
The published θJA value is 43°C/W for the 3mm × 3mm
DFN package and 35°C/W to 40°C/W for the MSOP exposed pad package. In practice, lower θJA values can beobtained if the board layout uses ground as a heat sink.
For instance, thermal resistances of 34.7°C/W for the
DFN package and 22.5°C/W for the MSOP package wereobtained on a board designed with large ground planes.
VIN Ramp Rate
While initially powering a switching converter application,
the VIN ramp rate should be limited. High VIN ramp rates cancause excessive inrush currents in the passive componentsof the converter. This can lead to current and/or voltage
overstress and may damage the passive components orthe chip. Ramp rates less than 500mV/µs, depending on
component parameters, will generally prevent these issues.
Also, be careful to avoid hot-plugging. Hot-plugging occurs
when an active voltage supply is “instantly” connected or
switched to the input of the converter. Hot-plugging resultsin very fast input ramp rates and is not recommended.
Finally, for more information, refer to Linear applicationnote AN88, which discusses voltage overstress that canoccur when an inductive source impedance is hot-plugged
to an input pin bypassed by ceramic capacitors.

Rev. CFor more information www.analog.com

17

LT8580
APPLICATIONS INFORMATION
Layout Hints
As with all high frequency switchers, when consideringlayout, care must be taken to achieve optimal electrical,
thermal and noise performance. One will not get advertised performance with a careless layout. For maximum
efficiency, switch rise and fall times are typically in the
10ns to 20ns range. To prevent noise, both radiated andconducted, the high speed switching current path, shown in
Figure 9, must be kept as short as possible. This is implemented in the suggested layout of a boost configuration in
Figure 10. Shortening this path will also reduce the parasitic
trace inductance. At switch-off, this parasitic inductanceproduces a flyback spike across the LT8580 switch. When
operating at higher currents and output voltages, with poor
layout, this spike can generate voltages across the LT8580
that may exceed its absolute maximum rating. A groundplane should also be used under the switcher circuitry to
prevent interplane coupling and overall noise.
The VC and FBX components should be kept as far away
as practical from the switch node. The ground for thesecomponents should be separated from the switch current path. Failure to do so can result in poor stability or
subharmonic oscillation.
Board layout also has a significant effect on thermal resistance. The exposed package ground pad is the copper
plate that runs under the LT8580 die. This is a good thermal
path for heat out of the package. Soldering the pad onto

the board reduces die temperature and increases the power
capability of the LT8580. Provide as much copper area as
possible around this pad. Adding multiple feedthroughsaround the pad to the ground plane will also help. Figure 10
and Figure 11 show the recommended component placement for the boost and SEPIC configurations, respectively.
Layout Hints for Inverting Topology
Figure 12 shows recommended component placement forthe dual inductor inverting topology. Input bypass capacitor, C1, should be placed close to the LT8580, as shown.
The load should connect directly to the output capacitor,
C2, for best load regulation. The local ground may be tied
into the system ground plane at the C3 ground terminal.
The cut ground copper at D1’s cathode is essential toobtain low noise. This important layout issue arises dueto the chopped nature of the currents flowing in Q1 andD1. If they are both tied directly to the ground plane before
being combined, switching noise will be introduced into
the ground plane. It is almost impossible to get rid of thisnoise, once present in the ground plane. The solution
is to tie D1’s cathode to the ground pin of the LT8580
before the combined currents are dumped in the groundplane as drawn in Figure 2, Figure 13 and Figure 14. This
single layout technique can virtually eliminate highfrequency “spike” noise, so often present on switchingregulator outputs.
DIFFERENCES FROM LT3580

L1
D1

C1

VOUT
SW
LT8580VIN

HIGH
FREQUENCY
SWITCHING
PATH

LT8580 is very similar to LT3580. However, LT8580 does
deviate from LT3580 in a few areas:• 65V, 1A switch• 40V VIN and SHDN absolute maximum rating• FB renamed to FBX

C2 LOAD• 5V FBX absolute maximum rating

GND

8580 F09

Figure 9. High Speed “Chopped” Switching
Path for Boost Topology

18

Rev. CFor more information www.analog.com

LT8580
APPLICATIONS INFORMATION

GND

GND

1

1

8
9

2

C1

6

4

L1

VIN

7

3

VIN

2

C1

SYNC

5

L1

SHDN

8580 F10

VOUT

D1

6

4

5

SHDN

VIAS TO GROUND
PLANE REQUIREDTO IMPROVE
THERMALPERFORMANCE

C3

8580 F11

VOUT

Figure 10. Suggested Component Placement for Boost Topology(Both DFN and MSOP Packages. Not to Scale). Pin 9 (ExposedPad) Must Be Soldered Directly to the Local Ground Plane for
Adequate Thermal Performance. Multiple Vias to Additional
Ground Planes Will Improve Thermal Performance

7

3

C2

L2

VIAS TO GROUND
PLANE REQUIREDTO IMPROVE
THERMALPERFORMANCE

C2

SYNC

SW

SW

D1

8
9

Figure 11. Suggested Component Placement for SEPIC Topology(Both DFN And MSOP Packages. Not to Scale). Pin 9 (ExposedPad) Must Be Soldered Directly to the Local Ground Plane for
Adequate Thermal Performance. Multiple Vias to Additional
Ground Planes Will Improve Thermal Performance

GND

1
2

C1
VIN
L1

8
9

SYNC

7

3

6

4

5

SHDN

SW
C2

L2

D1
VIAS TO GROUND
PLANE REQUIREDTO IMPROVE
THERMALPERFORMANCE

C3

VOUT

8580 F12

Figure 12. Suggested Component Placement for Inverting Topology (Both DFN and MSOP Packages. Not to Scale).
Note Cut in Ground Copper at Diode’s Cathode. Pin 9 (Exposed Pad) Must be Soldered Directly to Local Ground Plane
for Adequate Thermal Performance. Multiple Vias to Additional Ground Planes Will Improve Thermal Performance
Rev. CFor more information www.analog.com

19

LT8580
APPLICATIONS INFORMATION–(VIN + VOUT)VCESAT
L1

SW

VIN

L2

SWX

–VOUT

D1

Q1
C1

+

+

C2

C3

RLOAD

8580 F13

Figure 13. Switch-On Phase of an Inverting Converter. L1 and L2 Have Positive dI/dt

VIN + VOUT+ VD
L1

SW

VIN

Q1

C2

L2

SWX

–VOUT

D1

C1

+

+

VD

C3

RLOAD

8580 F14

Figure 14. Switch-Off Phase of an Inverting Converter. L1 and L2 Currents Have Negative dI/dt

20

Rev. CFor more information www.analog.com

LT8580
APPLICATIONS INFORMATIONBOOST CONVERTER COMPONENT SELECTION
L1
15µH

VIN
5V

D1

VOUT
12V
200mA

10k
VIN
CIN
2.2µF

SW

SHDN

FBX

RT

COUT
4.7µF

RC
6.04k

SS

RT
56.2k

CSS
0.22µFCC
3.3nF

DC MIN =Step 3:L1

VC
GND

PARAMETERS/EQUATIONS
Step 1: Pick VIN, VOUT, and fOSC to calculate equations below
InputsStep 2:VOUT – VIN(MIN) + 0.5 V
DC MAX =DCVOUT + 0.5 V – 0.4 V

RFBX
130k

LT8580SYNC

Table 4. Boost Design Equations

CF
47pF

L TYP =L MIN =

8580 F15

f OSC • 0.3 A(VIN(MIN) – 0.4V) • (2 • DCMAX – 1)
1.25 • (DCMAX − 300ns • fOSC ) • fOSC • (1– DCMAX )L MAX1 =The LT8580 can be configured as a boost converter as in
Figure 15. This topology allows for positive output voltages
that are higher than the input voltage. A single feedback
resistor sets the output voltage. For output voltages higher
than 60V, see the Charge Pump Aided Regulators section.

L MAX2 =Variable Definitions:
VIN = Input Voltage
VOUT = Output Voltage
DC = Power Switch Duty Cycle
fOSC = Switching Frequency(VIN(MIN) – 0.4V ) • DC MAX
fOSC • 0.08 A(VIN(MAX) – 0.4V ) • DC MIN
fOSC • 0.08 A

(1)
(2)
(3)
(4)

• Solve equations 1 to 4 for a range of L values• The minimum of the L value range is the higher of LTYP and LMIN
• The maximum of the L value range is the lower of LMAX1 and LMAX2.

Step 4:
IRIPPLEIRIPPLE(MIN) =IRIPPLE(MAX) =Step 5:IOUT(VIN(MIN) – 0.4V ) • DC MAX
fOSC • L 1(VIN(MAX) – 0.4V ) • DC MIN
fOSC • L 1

IRIPPLE(MIN) ⎞⎛IOUT(MIN) = ⎜1A −⎟ • (1− DCMAX )2⎝⎠
IRIPPLE(MAX) ⎞⎛IOUT(MAX) = ⎜1A −⎟ • (1− DCMIN )2⎝⎠

Step 6: VR > VOUT; IAVG > IOUT
D1
Step 7:
IOUT • DCMAXCOUT ≥
COUTf• 0.005 • V
OSC

Step 8:CIN

IOUT = Maximum Average Output Current
IRIPPLE = Inductor Ripple Current

VOUT + 0.5 V – 0.4 V(VIN(MIN) – 0.4V ) • DC MAX

Figure 15. Boost Converter: The Component Values and Voltages
Given Are Typical Values for a 1.5MHz, 5V to 12V Boost

Table 4 is a step-by-step set of equations to calculate component values for the LT8580 when operating as a boost
converter. Input parameters are input and output voltage,
and switching frequency (VIN, VOUT and fOSC respectively).
Refer to the Applications Information section for further
information on the design equations presented in Table 4.

VOUT – VIN(MAX) + 0.5 V

OUT

CIN ≥ C VIN + CPWR ≥IRIPPLE(MAX)
1A • DCMAX+
40 • fOSC • 0.005 • VIN(MIN) 8 • fOSC • 0.005 • VIN(MAX)• Refer to the Capacitor Selection Section for definition of CVIN and CPWR

Step 9:RFBX

RFBX =

VOUT − 1.204V
83.3µA

Step
85.5
RT =
–1; fOSC in MHz and R T in kΩ
10:
fOSC
RT
Note 1: This table uses 1A for the peak switch current. Refer to theElectrical Characteristics Table and Typical Performance Characteristics
plots for the peak switch current at an operating duty cycle.
Note 2: The final values for COUT and CIN may deviate from the previous
equations in order to obtain desired load transient performance.

Rev. CFor more information www.analog.com

21

LT8580
APPLICATIONS INFORMATION
Table 5. SEPIC Design Equations

SEPIC CONVERTER COMPONENT SELECTION(COUPLED OR UNCOUPLED INDUCTORS)•VIN
9V TO 16V

C1
1µF

L1
22µH

VOUT
12V
240mA

L2
22µH

487k
VIN
CIN
4.7µF

D1

•

SW

SHDN

FBX

RFBX
130k

COUT
4.7µF

RT

VC
GND

RC
16.2k

SS

RT
84.5k

CSS
0.22µF

CC
1nF

PARAMETERS/EQUATIONSPick VIN, VOUT and fOSC to calculate equations below

Step 3:L

CF
22pF

VOUT + 0.5 V

DC MAX =DC MIN =LT8580SYNC

Step 1:
InputsStep 2:DC

VIN(MIN) + VOUT + 0.5 V – 0.4V
VOUT + 0.5 V
VIN(MAX) + VOUT + 0.5 V – 0.4V

L TYP =L MIN =
8580 F16

L MAX =

Figure 16. SEPIC Converter: The Component Values and Voltages
Given Are Typical Values for a 1MHz, 9V to 16V Input to 12V
Output SEPIC Converter

The LT8580 can also be configured as a SEPIC, as shownin Figure 16. This topology allows for positive output
voltages that are lower, equal or higher than the input voltage. Output disconnect is inherently built into the SEPIC
topology, meaning no DC path exists between the input
and output due to capacitor C1.
Table 5 is a step-by-step set of equations to calculate component values for the LT8580 when operating as a SEPIC
converter. Input parameters are input and output voltage,
and switching frequency (VIN, VOUT and fOSC, respectively).
Refer to the Applications Information section for further
information on the design equations presented in Table 5.
Variable Definitions:
VIN = Input Voltage

fOSC = Switching Frequency
IOUT = Maximum Average Output Current
IRIPPLE = Inductor Ripple Current

f OSC • 0.3 A(VIN(MIN) – 0.4V) • (2 • DCMAX – 1)
1.25 • (DCMAX − 300ns • fOSC ) • fOSC • (1– DCMAX )(VIN(MIN) – 0.4V ) • DC MAX
f OSC • 0.08 A

(1)
(2)
(3)

• Solve equations 1, 2 and 3 for a range of L values• The minimum of the L value range is the higher of LTYP and LMIN
• The maximum of the L value range is LMAX
• L = L1 = L2 for coupled inductors• L = L1|| L2 for uncoupled inductors

Step 4:
IRIPPLEIRIPPLE(MIN) =IRIPPLE(MAX) =Step 5:IOUT(VIN(MIN) – 0.4V ) • DC MAX
fOSC • L(VIN(MAX) – 0.4V ) • DC MIN
fOSC • L

IRIPPLE(MIN) ⎞⎛IOUT(MIN) = ⎜1A −⎟ • (1− DCMAX )2⎝⎠
IRIPPLE(MAX) ⎞⎛IOUT(MAX) = ⎜1A −⎟ • (1− DCMIN)
2⎝⎠

Step 6:
D1
Step 7:
C1
Step 8:COUT

VR > VIN + VOUT; IAVG > IOUT

Step 9:CIN

CIN ≥ C VIN + CPWR ≥VOUT = Output Voltage
DC = Power Switch Duty Cycle(VIN(MIN) – 0.4V ) • DC MAX

C1 ≥ 1µF; VRATING ≥ VIN

COUT ≥IOUT(MIN) • DCMAX
fOSC • 0.005 • VOUT

IRIPPLE(MAX)
1A • DCMAX+
40 • fOSC • 0.005 • VIN(MIN) 8 • fOSC • 0.005 • VIN(MAX)• Refer to the Capacitor Selection Section for definition of CVIN and CPWR

Step 10:RFBX

RFBX =

Step 11:RT

RT =VOUT − 1.204V
83.3µA

85.5–1; fOSC in MHz and R T in kΩ
fOSC

Note 1: This table uses 1A for the peak switch current. Refer to theElectrical Characteristics Table and Typical Performance Characteristics
plots for the peak switch current at an operating duty cycle.
Note 2: The final values for COUT, CIN and C1 may deviate from theprevious equations in order to obtain desired load transient performance.

22

Rev. CFor more information www.analog.com

LT8580
APPLICATIONS INFORMATIONDUAL INDUCTOR INVERTING CONVERTER COMPONENTSELECTION (COUPLED OR UNCOUPLED INDUCTORS)•

VIN
5V TO 40V

C1
1µF

L1
22µH

10k

VOUT
–15V
90mA (VIN = 5V)
210mA (VIN = 12V)
420mA (VIN = 40V)

•

D1
VIN

CIN
4.7µF

L2
22µH

SW

SHDN

FBX

RFBX
182k

COUT
4.7µF

LT8580
SYNC
RT

VC
GND

RT
113k

RC
13.7k

SS
CSS
0.22µF

CC
10nF

Table 6. Dual Inductor Inverting Design Equations
Step 1:
InputsStep 2:
DC

PARAMETERS/EQUATIONSPick VIN, VOUT and fOSC to calculate equations below

DC MIN =Step 3:LCF
47pF

V OUT + 0.5 V

DC MAX =VIN(MIN) + V OUT + 0.5 V – 0.4 V
V OUT + 0.5 V
VIN(MAX) + V OUT + 0.5 V – 0.4 V

L TYP =L MIN =

(VIN(MIN) – 0.4V ) • DC MAX
f OSC • 0.3 A(VIN(MIN) – 0.4V) • (2 • DCMAX – 1)
1.25 • (DCMAX − 300ns • fOSC ) • fOSC • (1– DCMAX )

(1)
(2)

8580 F17

L MAX =

Figure 17. Dual Inductor Inverting Converter: The Component
Values and Voltages Given Are Typical Values for a 750kHz
Wide Input (5V to 40V) to –15V Inverting Topology Using
Coupled Inductors

Due to its unique FBX pin, the LT8580 can work in a dual
inductor inverting configuration as in Figure 17. Changing the connections of L2 and the Schottky diode in the
SEPIC topology results in generating negative output
voltages. This solution results in very low output voltage
ripple due to inductor L2 being in series with the output.
Output disconnect is inherently built into this topology
due to the capacitor C1.
Table 6 is a step-by-step set of equations to calculatecomponent values for the LT8580 when operating as adual inductor inverting converter. Input parameters are
input and output voltage, and switching frequency (VIN ,VOUT and fOSC respectively). Refer to the Applications
Information section for further information on the design
equations presented in Table 6.

Step 4:
IRIPPLEVOUT = Output Voltage
DC = Power Switch Duty Cycle
fOSC = Switching Frequency
IOUT = Maximum Average Output Current
IRIPPLE = Inductor Ripple Current

f OSC • 0.08 A

Step 5:IOUT(3)• Solve equations 1, 2 and 3 for a range of L values• The minimum of the L value range is the higher of LTYP and LMIN
• The maximum of the L value range is LMAX
• L = L1 = L2 for coupled inductors• L = L1|| L2 for uncoupled inductors(VIN(MIN) – 0.4V ) • DC MAX

IRIPPLE(MIN) =fOSC • L

IRIPPLE(MAX) =(VIN(MAX) – 0.4V ) • DC MIN
fOSC • L

IRIPPLE(MIN) ⎞⎛IOUT(MIN) = ⎜1A −⎟ • (1− DCMAX )2⎝⎠
IRIPPLE(MAX) ⎞⎛IOUT(MAX) = ⎜1A −⎟ • (1− DCMIN)
2⎝⎠

Step 6:
D1
Step 7:
C1
Step 8:COUT

VR > VIN + |VOUT|; IAVG > IOUT

Step 9:CIN

CIN ≥ C VIN + CPWR ≥Variable Definitions:
VIN = Input Voltage(VIN(MIN) – 0.4V ) • DC MAX

C1 ≥ 1µF; VRATING ≥ VIN(MAX) + |VOUT|
COUT ≥

IRIPPLE(MAX)8 • fOSC (0.005 • VOUT )IRIPPLE(MAX)
1A • DCMAX+
40 • fOSC • 0.005 • VIN(MIN) 8 • fOSC • 0.005 • VIN(MAX)• Refer to the Capacitor Selection Section for definition of CVIN and CPWR

Step 10:RFBXR FBX =

Step 11:RT

RT =VOUT + 3m V
83.3µA

85.5–1; fOSC in MHz and R T in kΩ
fOSC

Note 1: This table uses 1A for the peak switch current. Refer to theElectrical Characteristics Table and Typical Performance Characteristics
plots for the peak switch current at an operating duty cycle.
Note 2: The final values for COUT, CIN and C1 may deviate from theprevious equations in order to obtain desired load transient performance.
Rev. CFor more information www.analog.com

23

LT8580
TYPICAL APPLICATIONS
1.5MHz, 5V to 12V Output Boost Converter
L1
15µH

VIN
5V

D1

VOUT
12V
200mA

10k
VIN
CIN
2.2µF

SW

SHDN

FBX

130k

COUT
4.7µF

LT8580
SYNC
RT

VC
GND

6.04k

SS

56.2k

47pF
3.3nF

0.22µF

8580 TA02a

L1: WÜRTH 15µH WE-LQS 74404054150
D1: DIODES INC. SBR1U40LP
CIN: 2.2µF, 35V, 0805, X7R
COUT : 4.7µF, 16V, 0805, X7R

Efficiency and Power Loss
90

420

80

380

70

300

60

240

50

180

40

120

EFFICIENCY (%)

480

EFFICIENCY
POWER LOSS

30
20

0

POWER LOSS (mW)

100

60

0
200

50
150
100
LOAD CURRENT (mA)

8580 TA02b

50mA to 150mA to 50mA Output Load Step

ISTEP
100mA/DIV
VOUT
500mV/DIV
AC-COUPLED

IL1500mA/DIV
100µs/DIV

248580 TA02c

Rev. CFor more information www.analog.com

LT8580
TYPICAL APPLICATIONS
750kHz, –15V Output Inverting Converter Accepts 5V to 40V Input•

VIN
5V TO 40V

C1
1µF

L1
22µH

L2
22µH

10k

D1
VIN

CIN
4.7µF

VOUT
–15V
90mA (VIN = 5V)
210mA (VIN = 12V)
420mA (VIN = 40V)

•

SW

SHDN

182k

FBX

COUT
4.7µF

LT8580
SYNC
RT

VC
GND

13.7k

SS

47pF
10nF

0.22µF113k

8580 TA03a

L1, L2: COILCRAFT 22µH MSD7342-223
D1: CENTRAL SEMI CMMSH1-60
CIN: 4.7µF, 50V, 1206, X5R
COUT : 4.7µF, 25V, 1206, X7R
C1: 1µF, 100V, 0805, X7S

90

640

80

560

70

480

60

400

50

320

40

240

30

160
EFFICIENCY
POWER LOSS

20
10

0

50

150
100
LOAD CURRENT (mA)

POWER LOSS (mW)EFFICIENCY (%)

Efficiency and Power Loss (VIN = 12V)

80
0

200
8580 TA03b

60mA to 160mA to 60mA Output Load Step (VIN = 12V)
ISTEP
100mA/DIV
VOUT
200mV/DIV
AC-COUPLED

IL1 + IL2
200mA/DIV
200µs/DIV8580 TA03c

Rev. CFor more information www.analog.com

25

LT8580
TYPICAL APPLICATIONS
1.2MHz Inverting Converter Generates –48V Output From 12V Input
C2
2.2µF
C1
1µF

L1
150µH

VIN
12V

49.9Ω
L2
330µH

619k

D1
VIN

CIN
1µF

VOUT
–48V
70mA

SW

SHDN

576k

FBX

COUT
2.2µF

LT8580
SYNC
RT

VC
GND

20.5k

SS

69.8k

47pF
4.7nF

0.33µF

8580 TA04a

L1: COOPER 150µH DR74-151
L2: COOPER 330µH DR74-331
D1: DIODES, INC. DFLS1100
CIN: 1µF, 50V, 0805, X7R
COUT : 2.2µF, 100V, 1206, X7R
C1: 1µF, 100V, 0805, X7S
C2: 2.2µF, 100V, 1206, X7S

90

1040

80

920

70

800

60

680

50

560

40

440

30
20

320

EFFICIENCY
POWER LOSS
0

10

20
30
40
50
LOAD CURRENT (mA)

60

POWER LOSS (mW)EFFICIENCY (%)

Efficiency and Power Loss

70

200

8580 TA04b

Switching Waveforms

Start-Up Waveforms

VSW
20V/DIV

VSW
20V/DIV

VOUT
20mV/DIV
AC-COUPLED

VOUT
10V/DIV

IL1 + IL2
200mA/DIV

IL1 + IL2
200mA/DIV
200µs/DIV

268580 TA04c

200µs/DIV8580 TA04d

Rev. CFor more information www.analog.com

LT8580
TYPICAL APPLICATIONSVFD (Vacuum Fluorescent Display) Power Supply Switches at 1MHz
Danger High Voltage! Operation by High Voltage Trained Personnel Only
D5
22Ω

D4

C4
1µF
22Ω
L1
68µH

VIN
9V TO 16V

D3
D2

C2
1µF

VOUT3
180V
C5 20mA*
1µF
VOUT2
120V
C3 30mA*
1µF

D1

VOUT1
60V
60mA*

487k
VIN
CIN
1µF

SW

SHDN

698k

FBX

C1
1µF

LT8580
SYNC
RT

VC
GND

84.5k

22.1k

SS

330pF
0.47µF

4.7nF
8580 TA05a*MAX TOTAL OUTPUT POWER 3.5W
L1: WÜRTH 68µH WE-LQS 74404084680
D1-D5: DIODES, INC. DFLS1100
CIN: 1µF, 100V, 1206, X7R
C1-C5: 1µF, 100V, 1206, X7S

90

960

80

880

70

800

60

720

50

640

40

560

30
20

0.5

1
1.5
2
2.5
OUTPUT POWER (W)

3

VOUT3
50V/DIV
VOUT2
50V/DIV
VOUT1
50V/DIV

IL1
200mA/DIV480

EFFICIENCY
POWER LOSS
0

Start-Up Waveforms

POWER LOSS (mW)EFFICIENCY (%)

Efficiency and Power Loss
(VIN = 12V with Load on VOUT3)

3.5

400

2ms/DIV

8580 TA05c

8580 TA05b

Rev. CFor more information www.analog.com

27

LT8580
TYPICAL APPLICATIONS
550kHz SEPIC Converter Generates 24V from 15V to 30V Input•

VIN
15V TO 30V

C1
1µF

L1
47µH

D1
L2
47µH

1M
VIN

SW

SHDN

•

CIN
2.2µF

VOUT
24V
195mA (VIN = 15V)
300mA (VIN = 24V)

274k

FBX

COUT
4.7µF

LT8580
SYNC
RT

VC
GND

12.7k

SS

154k

22pF
3.3nF

0.1µF

8580 TA06a

L1, L2: COILCRAFT 47µH MSD7342-473
D1: DIODES INC. DFLS1100
CIN: 2.2µF, 35V, 0805, X7R
COUT : 4.7µF, 35V, 1206, X7R
C1: 1µF, 100V, 0805, X7S

90

1400

80

1250

70

1100

60

950

50

800

40

650
500

30
EFFICIENCY
POWER LOSS

20
10

0

50

200
100
150
LOAD CURRENT (mA)

250

POWER LOSS (mW)EFFICIENCY (%)

Efficiency and Power Loss
(VIN = 24V)

350

200
300

8580 TA06b

Transient Response with 100mA to 225mA
to 100mA Output Load Step (VIN = 24V)
ISTEP
100mA/DIV
VOUT
500mV/DIV
AC-COUPLED
IL1 + IL2
500mA/DIV
100µs/DIV

288580 TA06c

Rev. CFor more information www.analog.com

LT8580
PACKAGE DESCRIPTIONDD Package
8-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1698 Rev C)

0.70 ±0.05

3.5 ±0.05
1.65 ±0.05
2.10 ±0.05 (2 SIDES)
PACKAGEOUTLINE
0.25 ±0.05

0.50
BSC
2.38 ±0.05

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONSAPPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

PIN 1
TOP MARK(NOTE 6)0.200 REF

3.00 ±0.10(4 SIDES)

R = 0.125
TYP
5

0.40 ±0.1081.65 ±0.10(2 SIDES)

0.75 ±0.05

40.25 ±0.05

1(DD8) DFN 0509 REV C

0.50 BSC

2.38 ±0.10
0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATIONON TOP AND BOTTOM OF PACKAGE

Rev. CFor more information www.analog.com

29

LT8580
PACKAGE DESCRIPTION
MS8E Package
8-Lead Plastic MSOP, Exposed Die Pad(Reference LTC DWG # 05-08-1662 Rev K)

BOTTOM VIEW OFEXPOSED PAD OPTION
1.88(.074)

1

1.88 ±0.102(.074 ±.004)

0.29
REF

1.68
(.066)

0.889 ±0.127(.035 ±.005)

0.05 REF

5.10(.201)MIN

DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLYNO MEASUREMENT PURPOSE

1.68 ±0.102 3.20 – 3.45(.066 ±.004) (.126 – .136)
8
3.00 ±0.102(.118 ±.004)(NOTE 3)0.65(.0256)BSC

0.42 ±0.038(.0165 ±.0015)
TYP

8

7 6 5

0.52
(.0205)REF

RECOMMENDED SOLDER PAD LAYOUT

0.254(.010)

3.00 ±0.102(.118 ±.004)(NOTE 4)4.90 ±0.152(.193 ±.006)

DETAIL “A”
0° – 6° TYP

GAUGE PLANE

0.53 ±0.152(.021 ±.006)
DETAIL “A”

1

2 3

4

1.10
(.043)
MAX

0.86(.034)
REF

0.18(.007)SEATING
PLANE

0.22 – 0.38(.009 – .015)
TYP

0.65
(.0256)NOTE:
BSC
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.

30

0.1016 ±0.0508(.004 ±.002)
MSOP (MS8E) 0213 REV K

Rev. CFor more information www.analog.com

LT8580
REVISION HISTORY
REV

DATE

DESCRIPTION

A

09/16

Changed Minimum On-Time in the Electrical Characteristics table to typical room value instead of worst case.

3

Added Minimum On-Time vs Temperature graph.

5

Added text and equations explaining minimum on-time.

10, 11

Adjusted RC, RL, RO, gma and resultant gain and phase margin numbers and plot to better reflect applications and theElectrical Characteristics table.

11, 14

Corrected LMIN equation.
11/19

C

05/21

9

Clarified inductor paragraph in the Applications Information section.

Clarified Thermal Calculations section.

B

PAGE NUMBER

17
21, 22, 23

Clarified the Related Parts table.

32

Add AEC-Q100 Qualification in Progress.

1

Add #W Part Numbers.

2

Changed “AEC-Q100 Qualification in Progress” to “AEC-Q100 Qualified for Automotive Applications”.

1

Removed H-Grade #W Part Number.

2

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For
is granted
implication orotherwise under any patent or patent rights of Analog Devices.
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31

LT8580
TYPICAL APPLICATION
12V Battery Stabilizer Survives 40V Transients
L1
22µH

D1

FBX

130k
COUT
4.7µF

LT8580
SYNC
RT

VC
GND

84.5k

16.2k

SS

22pF
0.22µF

90

800

80

700

70

600

60

500

50

400

40

300

30

200
EFFICIENCY
POWER LOSS

20

1nF
8580 TA07a

100

L1, L2: WÜRTH 22µH WE-DD 744877220
D1: DIODES INC. DFLS1100
CIN: 4.7µF, 50V, 1206, X7R
COUT : 4.7µF, 25V, 1206, X7R
C1: 1µF, 100V, 0805, X7S

40

160
80
120
LOAD CURRENT (mA)

200

POWER LOSS (mW)

SHDN

•

SW

VIN
CIN
4.7µF

VOUT
12V
240mA

L2
22µH

487k

Efficiency and Power Loss
(VIN = 12V)

EFFICIENCY (%)•

VIN
9V TO 16V
UP TO 40V
TRANSIENT

C1
1µF

100

0
240

8580 TA07b

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32

Rev. C
05/21

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