NPS3102A; NPS3102B
12 V, 2 A to 13.5 A, 17 mΩ eFuse
Rev. 1 — 18 July 2024

Product data sheet

1. General description

2. Features and benefits

NPS3102A and NPS3102B are low-ohmic (17 mΩ),high current (13.5 A), resettable electronic fusesthat are targeted for 12 V applications. They aredesigned to protect downstream loads from exposure
to excessive voltage and protect the power supply fromload faults and large inrush currents.

•

Output slew rate is controlled by a capacitor at dVdt
pin. Current limit can be adjusted in the 2 A to 13.5 A
range using a resistor at ILIM pin. The voltage at ILIM
pin can also be used as a measure of the load current
in real-time. The devices include a built-in over voltage
clamp that will limit the output voltage during input overvoltage conditions.
The devices also include a multi-function EN/FLT pin.
When the pin is left floating and the voltage at IN isgreater than the under voltage lock-out, the devices
turn on. During operation, the voltage at the pin can beused as a fault indicator to determine if the devices areoperating normally. Pulling the EN/FLT pin low will turnoff the devices.
During thermal shutdown, both devices disable theintegrated pass-FET if the die temperature crosses theover temperature threshold. The NPS3102A latches
off under a thermal shutdown event and requires
user reset by toggling the EN/FLT pin or cycling thevoltage at the IN pin. The NPS3102B integrates autoretry, which safely attempts to re-enable the pass-FET
without the need for user intervention.
NPS3102
IN

OUT

CIN

VIN

COUT

EN/FLT

ROUT

Control block

MCU
ILIM
RLIM

dVdt

GND

CRMP

aaa-040448

Fig. 1.

Typical Application

•
•
•
•
•
•
•
•
•

•

Up to 18 V operating range, 21 V absolute
maximum
Integrated 17 mΩ pass MOSFET
15 V output voltage clamp
2 A to 13.5 A adjustable output current clamp
2 µs short circuit protection response time
Programmable output rise time control
Built-In thermal shutdown with fault alert pin
Fault response options: latch-off, auto-retry
Leadless plastic package; 10 terminals, body 3.0 x
3.0 x 0.75 mm (DFN3030-10/SOT8037-1)
ESD protection:• HBM ANSI/ESDA/JEDEC JS-001 class 2
exceeds 2000 V• CDM ANSI/ESDA/JEDEC JS-002 class C3
exceeds 1000 V
Specified from Tj = -40 °C to +125 °C

3. Applications
•
•
•
•
•

ServerSolid State Drive (SSD) and Hard Disk Drive (HDD)
Mobile infrastructure
Fan control
Hot-Swap/PlugNPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

4. Ordering information
Table 1. Ordering information
Type number
Package
NPS3102AGB
NPS3102BGB

Temperature range

Name

Description

Version-40 °C to +125 °C

DFN3030-10

leadless plastic package; 10 terminals;
body 3.0 × 3.0 × 0.75 mm

SOT8037-1

5. Marking
Table 2. Marking codes
Type number

Marking code

NPS3102AGB

s2A

NPS3102BGB

s2B

6. Block diagramIN

OUT

EN/FLT
dVdt

ILIM
GND

Fig. 2.

aaa-040451

Functional diagram

IN

OUT
Charge
pump

ILIM

UVLO
Tj

VIREF

Control logic

OTSD
VOVC

EN/FLTdVdt

GND
aaa-040452

Fig. 3.

Block diagram

NPS3102
Submit document feedback

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

2 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

7. Pinning information
7.1. Pinning
GB package
SOT8037-1 (DFN3030-10)

GND

1

10

OUT

dVdt

2

9

OUT

EN/FLT

3

8

OUT

ILIM

4

7

OUT

n.c.

5

6

OUT

IN (11)

Transparent top view
aaa-04063

Fig. 4.

Pin configuration SOT8037-1 (DFN3030-10)

7.2. Pin description
Table 3. Pin description
Symbol Pin
Description
GND

1

Ground (0 V)

dVdt

2

Controls the output voltage rise time once the device has been enabled. Rise times areproportional to the value of the capacitor at this pin. A minimum of 4.7 nF is recommended at thispin. Do not actively drive this pin.

EN/FLT3

A 3-state, bidirectional interface that serves to enable/disable the output, and alert monitoring
circuits when the eFuse enters or exits thermal shutdown. Do not actively drive this pin to any
voltage except for GND. Use an open-drain or open-collector pull-down component to set the
EN/FLT logic. See Section 13 for more details.

ILIM

4

Current limit configuration. Connect a resistor between this pin and GND to set the current limit.
The voltage at this pin can be monitored for real-time load current information.

n.c.

5

Not connected. Do not connect this pin to a trace on the PCB.

OUT

6, 7, 8, 9, 10

Output voltage of the device, connected to the downstream loads.

IN

11

Positive input supply voltage to the device.

NPS3102
Submit document feedback

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

3 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
SymbolParameter

VIN

Conditions

Min

Typ

Max

Unit

input voltage pin IN

-0.3

-

21

V

VOUT

output voltage pin
OUT

-0.3

-

VIN + 0.3 V

VEN/FLT

EN/FLT pin voltage

-0.3

-

3

V

VdVdt

dVdt pin voltage

-0.3

-

3

V

VILIM

ILIM pin voltage

-0.3

-

VIN

V

IOUT

continuous load
current

Tjjunction temperature

-40

Tstg

storage temperature-65

Ainternally limited

Internally °C
Limited150°C

9. ESD ratings
Table 5. ESD ratings.
Symbol Parameter

Conditions

Min

Typ

Max

Unit

VESD

HBM ANSI/ESDA/JEDEC JS-001 class 2

-2000

-

2000

V

CDM ANSI/ESDA/JEDEC JS-002 class C3

-1000

-

1000

V

Min

Typ

Max

Unit

electrostatic
discharge voltage

10. Recommended operating conditions
Table 6. Operating conditions
Symbol Parameter

Conditions

VIN

input voltage pin IN

9

-

18

V

RLIM

external resistor at pin ILIM

226

-

1870

Ω

Vdvdt

voltage rating of external capacitor at dVdt pin

6.3

-

-

V

Cdvdt

capacitance at dVdt pin

4.7

-

-

nF

Tj

junction temperature

-40

-

125

°C

11. Thermal characteristics
Table 7. Thermal characteristics
Symbol Parameter

Conditions

Min

Typ

Max

Unit

Rθja

As per JEDEC JESD51-7

-

62

-

°C/W

4 layers, 1oz copper,
4 thermal vias

-

38

-

°C/W

-

3.7

-

°C/W

ΨJT

junction to ambient thermal resistancejunction to top characterization parameter

NPS3102
Submit document feedback

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

4 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

12. Electrical characteristics
Table 8. Electrical characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V)
VIN = 12 V, EN/FLT = open, CdV/dt = open, RLIM = 604 Ω, RL = open, CIN = 0.1 µF,
CL = 0.1 µF, unless otherwise stated.
SymbolParameter

Conditions

Tj = -40 °C to 125 °C
Min

Typ[1]

Max

Unit

Power consumption
IIN

quiescent current

-

320

500

µA

IOFF

OFF-state (disabled) current EN/FLT = GND

-

100

200

µA

Tj = TSD;
EN/FLT is driven to VFAULT by eFuse

-

-

1000

µA

ITSD

[2] thermal shutdown current

Undervoltage lockout
VUVLO_R

undervoltage lockout
rising threshold

EN/FLT changes from VEN_UVLO to VIPU

7.8

8.4

8.9

V

VUVLO_F

undervoltage lockout
falling threshold

EN/FLT changes from VIPU to VEN_UVLO

7.0

7.6

8.1

V

VUVLO_HYS

undervoltage lockout
hysteresis

-

0.8

-

V

VCC = 18 V; RL = 100 Ω;

13.5

15

16

V

RLIM = 226 Ω; VIN - VOUT = 0.5 V

12.4

13.8

15.1

A

RLIM = 604 Ω; VIN - VOUT = 0.5 V

5

5.55

6.1

A

RLIM = Open

-

0

-

A

IILIM_R_SHORT [2] output hold/limit current short ILIM

RLIM = 0 Ω

-

20

24

A

GIMON

IILIM / IOUT

184

203

216

µA/A

-

17

30

mΩ

EN/FLT = GND; RL = 10 kΩ; Tj = 25 ºC

-

0.1

6

µA

EN/FLT = GND; RL = 10 kΩ;
Tj= -40 ºC to +85 ºC

-

-

30

EN/FLT = GND; RL = 10 kΩ;
Tj = -40 ºC to +125 ºC

-

-

100

Overvoltage and overcurrent protection
VOVC

output voltage clamp

IILIM[2] output hold/limit current

IILIM_R_OPEN

output hold/limit current open ILIM

current monitor gain

Power MOSFET
RON

ON-state resistance

ILKG

leakage current (from IN to
OUT)

Bi-directional enable and fault functionality
VIL

input voltage to reset eFuse EN/FLT pin pulled low externally

-

-

0.4

V

VIPU

EN/FLT voltage in normal
operation

EN/FLT pin voltage set by NPS3102

2.2

2.35

2.5

V

VFAULT

EN/FLT voltage due tothermal shutdown

EN/FLT pin voltage set by NPS3102

0.7

0.9

1.1

V

VEN_UVLO

EN/FLT voltage when
VIN < VUVLO_F

EN/FLT pin voltage set by NPS3102

-

-

0.3

V

IIL

current sourced out of
EN/FLT pin when in thermal
shutdown

-

17

25

µA

-

-

3

-

N

[2] fault signal fanout

NPS3102
Submit document feedback

Product data sheet

number of devices that can be paralleled

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

5 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse
SymbolParameter

Conditions

Tj = -40 °C to 125 °C
Min

Typ[1]Max

Unit

Thermal shutdown
TSD[2] termal shutdown
temperaturerising Tj

150

185

200

°C

THYST

[2] temperature hysteresis

falling Tj

-

30

-

°C

[1]
[2]

Typical values are measured at Tj = 25 °C.
Not production tested. Guaranteed by Design and/or Characterization.

Table 9. Dynamic characteristics
VCC = 12 V, EN/FLT = open, CdV/dt = open, RLIM = 604 Ω , RL = open, CIN = 0.1 µF,
CL = 0.1 µF, unless otherwise stated.
SymbolParameter

Conditions

Tj = -40 °C to 125 °C

Unit

Min

Typ

Max

170

-

µs

tONDLY

EN on delay time

VENFLT = VIPU to VOUT = 10% of VIN;
COUT = 10 µF-

tOFFDLY

EN off delay time

VENFLT < VIL to VOUT=90% of VIN; COUT = 10 µF

-

18

-

µs

SR

output slew rate

Cdvdt=10 nF; COUT = 10 µF

-

3.3

-

V/ms

Cdvdt=33 nF; COUT = 10 µF

-

1

-

V/ms

tOVC

output voltage clamp
response time

VIN rises above VOVC to peak VOUT; RL = 100 Ω

-

5

-

µs

tILIM

output current clamp
response time

IOUT > ILIM + 20% to IOUT within 5% of IILIM;
RL = 1.5 Ω

-

20

-

µs

tSC

output short circuit
response time

IOUT > ILIM + 20% to IOUT peak; RL = 0.1 Ω

-

2

-

µs

tTSD_ARI

thermal shutdown
auto-retry interval

NPS3102B
Tj = TSD - THYST

-

1

2

ms

12.1. Typical characteristics graphs
aaa-040439

400
IIN
(µA)
300

120

200

80

100

40

0
-50

-25

0

25

50

75

100 125
Tj (°C)

0
-50

150

VIN = 12 V
Fig. 5.

Product data sheet

-25

0

25

50

75

100 125
Tj (°C)150

VIN = 12 V

Input quiescent current (IIN) vs junction
temperature

NPS3102
Submit document feedback

aaa-040440

160
IOFF
(µA)

Fig. 6.

Input disabled current (IIN,OFF) vs junction
temperature

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

6 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse
aaa-040441

8.6

VUVLO_R
(V)

8.55

7.8
VUVLO_F(V)

aaa-040442

206
GIMON
(µA/A)
205

7.75
204

8.5

203

7.7
VUVLO_RVUVLO_F

202

8.45

7.65
201

8.4
-50

Fig. 7.

-25

0

25

50

75

100 125
Tj (°C)

200
-50

7.6
150

UVLO rise and fall thresholds (VUVLO_R) andVUVLO_F) vs junction temperature

VOVC
(V)
14.95

0

25

50

75

100 125
Tj (°C)150

VIN = 12 V
Fig. 8.

Current gain (GIMON) vs junction temperature

aaa-040443

15

-25

RON
(mΩ)

aaa-040444

25

20

14.9
15
14.85
10
14.8
5

14.75
14.7
-50

-25

0

25

50

75

100 125
Tj (°C)

VIN = 18 V
Fig. 9.

0
-50

150

-25

0

25

50

75

100 125
Tj (°C)150

VIN = 12 V

Output clamp voltage (VOVC) vs junction
temperature

Fig. 10. On-state resistance (RON) vs junction
temperature
IILIM
(A)

aaa-040446

16

12
Ω

8

Ω

4

0

VIN = 12 V

Product data sheet

200

400

600

800 1000 1200 1400 1600
RLIM (Ω)

VIN = 12 V; Tj = 25 °C

Fig. 11. Current limit (IILIM) vs junction temperature
NPS3102
Submit document feedback0

Fig. 12. Current limit (IILIM) vs resistance (RLIM)

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

7 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

IILIM
(A)

aaa-040447

14

12

10

8

6

4

0

25

50

75

100
Tj (°C)125

VIN = 12 V
Load current is current required for junction temperature to reach 125 °C
Fig. 13. Thermal derating curve

12.2. Typical waveforms
VIN = 12 V, EN/FLT = open, CdV/dt = 10 nF, RLIM = 1.5 kΩ, RL = open, CIN = 10 µF,
CL = 10 µF, Tj = 25 ºC unless otherwise stated.

aaa-040454

aaa-040453

VIN step up from 12 V to 18 V, RL=100 Ω
Fig. 14. Soft start with 10 nF at dVdt pin

Fig. 15. Over voltage clamp operation

aaa-040455

VIN drops from 18 V to 12 V, RL=100 Ω
Fig. 16. Recovery from an over voltage clamp

NPS3102
Submit document feedback

Product data sheet

aaa-040456

RL step from open to 3.3 Ω
Fig. 17. Current limit operation in an overload condition

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

8 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

aaa-040458
aaa-040457

OUT shorted with 0.1 Ω resistor
Fig. 18. Short circuit response

VIN = 18 V, RL=100 Ω
Fig. 19. Over temperature shutdown due to persistent
input over voltage

aaa-040459

RL = 3.33 Ω to open
Fig. 20. Recovery from over temperature condition for NPS3102B

13. Feature description
Basic operation
NPS3102 is an electronic fuse device, integrating a low ohmic pass FET along with several system protection features toensure safe power delivery to a downstream load.
NPS3102 starts its operation by monitoring the voltage on its IN pin and its EN/FLT pin. Once the pin voltages cross theirrespective thresholds (VUVLO_R and VIPU), NPS3102 will enable the pass FET, delivering power to the load that is connectedto the OUT pins. The power ramp is regulated by the configuration of the dVdt pin.
In normal operation, NPS3102 monitors the load current and input voltage, using both characteristics to regulate the pass
FET configuration. If the load current crosses the programmed over-current limit threshold (IILIM) or if the load voltage
crosses the over-voltage limit threshold (VOVC), the device will reduce the conductivity of the pass FET to restrict load
current and voltage to the respective threshold values. NPS3102 has a built-in mechanism to provide a rapid protection
response to rapid over-current events (i.e., short-circuit).
NPS3102 also integrates a junction temperature monitoring block that will disconnect power delivery before the junction
temperature rises to a point where it would be permanently damage the device.

Start-up
NPS3102 starts up when the input voltage VIN exceeds the rising under-voltage lockout threshold (VUVLO_R) and the voltage
at the EN/FLT pin reaches VIPU. Both VIN and VEN/FLT are continuously monitored. If the input voltage falls below VUVLO_F or
if the EN/FLT pin voltage drops below VIL, the device turns off.

NPS3102
Submit document feedback

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

9 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

Soft startOnce the device starts up, the device starts charging the output capacitor at a slew rate determined by the capacitor
connected at the dVdt pin. There are a few modes of operation during the soft start period.
•••

While the EN/FLT pin is held low, the internal charge pump is turned off.
When the EN/FLT pin exceeds VIPU, the internal charge pump is turned on in a low power mode. This mode lasts forapproximately 1 ms. This mode is intended to act as a fail-safe to limit the output slew rate in case there is insufficient
capacitance at the dVdt pin.
After the 1 ms time, the charge pump is switched to a high power mode.

Once the charge pump shifts to the high power mode, the device uses an internal resistor divider to step down the output
voltage and compares this voltage to the voltage at the dVdt pin.
••

If the slew rate of the output voltage is less than the slew rate of the dVdt pin voltage, the charge pump is turned on in
the strong mode.
If the slew rate of the output voltage is more than the slew rate of the dVdt pin voltage, the charge pump is turned off.

Thus, by turning the charge pump off and off, the device regulates the output slew rate to match the slew rate of the dVdt
pin.
The capacitor that is required at the dVdt pin can be computed based on the rise time desired for the output voltage.

where CdVdt is the capacitor at the dVdt pin and tR is the desired 10% - 90% rise time of the output voltage.
Fig. 14 shows the start-up waveform with a 10 μF load capacitor and a 10 nF capacitor at the dVdt pin.
Note that the maximum capacitor at dVdt pin is determined by the load capacitance.

where COUT is the total output capacitance including those of any downstream loads. For example, a 10 μF load capacitanceleads to a maximum capacitance of 167 nF at the dVdt pin.

Normal operation
Once the device completes inrush, the pass FET is completely turned on to achieve a low on-state resistance. The device
constantly monitors the output voltage and the current through the device.

Output over-voltage clamp
The over-voltage protection in the NPS3102 is designed to be fast acting and consume low power in normal operation.
When the NPS3102 is enabled, the over-voltage comparator continuously monitors the OUT pin voltage. Once the OUT
pin voltage rises above the threshold value VOVC, the internal over-voltage comparator quickly turns off the pass-FET andclamps its gate voltage.
As the output voltage droops due to the load, the IC detects that the output is lower than the clamp voltage. At this point, thedevice releases the over-voltage circuitry and turns on the pass-FET. This causes the output to rise and detect over voltage(if the input is still above the over voltage limit) and restarts the clamp circuit.
Activation of the over-voltage clamp elevates the power dissipation of the pass FET due to the increased voltage difference
between the IN and OUT pins. This increased power dissipation will also elevate the NPS3102 junction temperature,depending on the load current. A prolonged over-voltage condition can increase the junction temperature high enough totrigger a thermal shutdown (see Thermal shutdown protection).
Fig. 15 shows the device entering over voltage protection with a 100 mA load. When the input voltage jumps from 12 V to
18V, the output voltage clamps to 15 V. The short spikes seen in the output voltage are due to the periodic release of theover voltage circuitry as described. Fig. 16 shows the recovery of the part when the input over voltage condition disappears.
In both cases, there is no disruption to the load.

NPS3102
Submit document feedback

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

10 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

Current monitoring and over current protection
During normal operation, the device constantly monitors the output current (IOUT). The current is mirrored and sourced out of
the ILIM pin. The ratio of the current sourced out of the ILIM pin and the current through the pass FET is GIMON. A resistor to
ground at ILIM pin (RLIM) converts this current into a voltage (VILIM), which can be used a real time measurement of the load
current.

RLIM is chosen to program the over current limit (IILIM).

When the load current exceeds the programmed IILIM value, the device limits the current to IILIM. This is done in a hystereticmanner by turning the pass FET on and off. The FET turn off is done quickly to ensure no large over current conditions
occur, whereas the FET turn-on is controlled so that the hysteresis frequency does not become too large. The device
remains in this mode until the overload condition resolves or the device hits its over temperature shut down limit (seeThermal shutdown protection).
Fig. 17 shows the behavior of the device to an over current event. In this case, RLIM is set to 1.5 kΩ, which is about a 2 A
current limit. When a 3 A over current event occurs, the device limits the output current to the programmed value. This also
causes the output voltage drop and increases the power dissipation in the device (in this case, to approximately 8 W).
The NPS3102 is protected against ILIM pin open or short to ground conditions. If the ILIM pin is left open, the device will notallow any current to pass. If ILIM pin is shorted to ground, then the over current limit is set to 22 A internally. In either case,the device will not get damaged.

Short circuit protection
When the output of the NPS3102 is shorted to ground, the current through the device increases rapidly. Short circuit
protection comparator is activated when the voltage at ILIM pin exceeds 1.2 V. At this point, the device pulls down the gateof the NFET rapidly to prevent high peak currents and limit the output current to the programmed value.
Fig. 18 shows the behavior of the device to a short circuit condition which is initiated by shorting the output with a 0.1 Ω load.
The device reduces the gate voltage to the FET within 2 μs, which causes the load current to drop. Once the load current
drops to a safe value, the output current limit circuit is engaged.

Bi-directional enable/fault functionality
The EN/FLT pin is a bi-directional I/O. The pin has a weak pull-up internal to the device. This pin can be used to control thedevice, monitor the status of the device, and connect multiple devices in parallel.
To use this pin as a control input, connect it to an open-drain FET or a GPIO pin of a micro-controller configured as an opendrain output. Pulling the pin down to GND (less than VIL) turns off the NPS3102. Turning off the pull-down FET turns on the
NPS3102.
The pin can be used as a status pin by monitoring the voltage at the pin.
Low level (VIL) – A voltage below this level indicates NPS3102 has been turned off.
Mid level (VFAULT) – A voltage within this range indicates NPS3102 is in Thermal Shutdown.
High level (VIPU) – A voltage above this level indicates NPS3102 has been turned ON.
In cases where multiple NPS3102s are used in parallel, the EN/FLT pins of all the ICs need to be connected together toensure proper operation. NPS3102 is designed to allow up to 3 devices to be connected in parallel (see Paralleling eFuses).

Thermal shutdown protection
The NPS3102 has internal SOA management to prevent an elevated junction temperature (Tj) from permanently damaging
the pass FET. In normal operation, the NPS3102 continuously monitors its internal junction temperature. If it crosses theover temperature threshold (TSD), the pass FET is disabled and the load is disconnected. The EN/FLT pin will be driven
internally to VFAULT while the NPS3102 remains in thermal shutdown (see Bi-directional enable/fault functionality).

NPS3102
Submit document feedback

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

11 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse
In NPS3102A, there are two options to exit thermal shutdown and attempt to resume normal operation••

power cycle the IN pin, or
toggle the EN/FLT pin.

Note that if Tj has not fallen below (TSD – THYST), NPS3102 will re-enter thermal shutdown.
If user-trigger to resume normal operation is not a viable option, then NPS3102B is recommended due to its auto-retry
feature. This feature enables the NPS3102B to automatically resume normal operation once Tj has dropped to (TSD –THYST). Once Tj has sufficiently dropped, the device will wait for an additional delay of tTSD_ARI, and then attempt to reenable the pass FET. The pin voltage will return to VIPU.
•
•
•
•
•

The junction temperature of the NPS3102 can exceed its internal limit TSD in a few scenarios.
The rms current through the device exceeds the maximum current in the temperature de-rating curve (see Fig. 13)
The device is in over current protection mode causing excessive power dissipation
The device is in the over voltage clamp mode with a load current causing excess power dissipation
Start-up with a large load capacitor which causes excessive power dissipation.

Behavior of the NPS3102 to an over temperature condition is shown in Fig. 19. In this case, a persistent over current
condition causes the device to heat up and shut down. When the device shuts down, the EN/FLT pin is pulled to VFAULT to
indicate that the device is in thermal shutdown.
Fig. 20 shows the recovery of the NPS3102B device from a persistent overload condition. The device keeps trying to restart
until both the over temperature condition and overload conditions disappear. At this point, the device enters soft start andramps up the load capacitor.

NPS3102
Submit document feedback

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

12 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

14. Application information
Basic operation
The NPS3102 is an electronic fuse intended to overcome the disadvantages of one shot fuses, PTC fuses or discrete
protection circuits. It protects the downstream components against overvoltage and limits the maximum current flow during a
fault ensuring maximal safety. With an input voltage range of 9 V to 18 V and a programmable current limit between 2 A and13.5 A, it can be used in a broad range of applications where protection is needed.

Typical standalone application

Fig. 21 depicts a standard standalone application. This application is designed to limit the current to 13.5 A and an output
voltage rise time of 3 ms.

VIN = 9 V to 18 V

IN
CIN
1 F

TVS

GND

Supply rail

OUT
COUT1
0.1 F

Charge
pump

GND
ILIM

GND

Schottky
diode

GND

RLIM = 226

UVLO
Tj

GND

COUT2
10 F

VIREF

Control logic

GND

OTSD
VOVC

EN/FLT
ADC
C
GPIO

PMF250XNE

dVdt

GND

CdVdt
10 nF

GND
GND

GND

aaa-040449

Fig. 21. Typical standalone application schematic

The current limit threshold is controlled by the value of RLIM and can be calculated by:Rounded to an E96 resistor value this result in 226 Ω.
Both CIN and COUT are needed for decoupling and transient suppression. The input transient voltage suppressor protects theeFuse against large voltage transients that might exceed the recommended voltage operating range during switching of load
circuitry. These transients might occur due to parasitic inductance from the supply connection to the input of the eFuse. The
Schottky diode on the output protects the eFuse from negative voltage transients. Both the TVS and the Schottky diode canbe omitted, but for robustness, these are recommended. CdVdt sets the output slew rate to 3 ms as per the equation below.

Rounding the value to a standard value results in a 10 nF capacitor at dVdt pin. It is recommended to choose either a ≥6.3
V rated NP0/C0G or a ≥10 V rated X7R capacitor to minimize capacitance change due to DC bias. The minimum slew rateachievable is 1 ms, which occurs when the dVdt pin is left floating.

NPS3102
Submit document feedback

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

13 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse
The bi-directional EN/FLT pin is used to disable the device using an open drain NMOS which in turn is controlled by amicro controller. During normal operation, the voltage of the EN/FLT pin can be monitored using an ADC to monitor fo fault
situations. The voltage across RLIM can be used as a real time current monitor and can also be connected to an ADC. Whenusing an analog switch both signals can be monitored sequentially.
If the input range of the ADC is lower than the maximum voltages at either EN/FLT or ILIM pins, the voltages need to be
stepped down using external buffers. The pins are not capable of sourcing more than 1 μA to external circuitry.

Paralleling eFuses

If the current rating of a single eFuse is insufficient, or if there is a need to distribute power dissipation across the PCB, it ispossible to parallel a maximum of three eFuses. Fig. 22 illustrates the appropriate connection of these devices.
VIN = 9 V to 18 V
TVSIN
EN/FLT

CIN1

GND

ILIM

dVdt

GND

Supply rail

OUT
COUT1

GND

GND

COUT

GND

Schottky
diode

GND

GND
IN

OUT

EN/FLT

CIN2

ILIM

dVdt

GND

COUT2

GND

GND
GND
IN

OUT

EN/FLT

CIN3

ILIM

dVdt

GND

COUT3

GND

GND
GND

RLIM

CdVdt

ADC
C

GND

GPIO

PMF250XNE
GND

aaa-040450

Fig. 22. Parallel operation of eFuses
Several considerations must be taken into account:
•
•
•
•
•

The current charging the dVdt capacitor will be three times the value of a single device, resulting in a ramp rate that isthree times faster, if the capacitor is not adjusted accordingly.
The current through the current-limiting resistor will be three times the value of a single device. Since the voltage acrossthis resistor triggers the current-limiting circuit, it should be one-third of the value of a single device.
EN/FLT pins should be tied together. In the event that one device enters thermal shutdown, the voltage on this pin will
trigger the other eFuses to enter thermal shutdown as well.
Each device should have its own decoupling capacitors at input and output pins.
Careful attention must be paid to the layout. The distribution of current will significantly depend on the added series
resistance, which should be equal for every eFuse. Failure to comply may result in variations in power dissipation per
product, potentially leading to thermal shutdown of the system.

NPS3102
Submit document feedback

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

14 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

PCB Layout
Fig. 23 depicts a proven layout example. Both CIN and COUT should be as close as possible to the device to keep the
inductivity of the current loop as low as possible. Transient protection devices can be placed next to these capacitors.
To prevent unwanted activation of the thermal protection, it is advised to connect as much as possible copper area to the
exposed pad of the device using thermal via’s in the pad distributing the dissipated power to the VCC plane.
To optimize the thermal performance of the device, it is important to design the board stack-up and copper areas on eachlayer correctly. A stack-up example based on the NPS3102 evaluation module is shown in Fig. 24. The minimum copperareas connected to the thermal pad of the IC for each layer is listed in Table 10. Using this PCB stack-up and a similar
layout, it is possible to achieve a junction to ambient thermal impedance of 33 °C/W.
10

9

8

7

6

VIN

VOUT

COUT

TVS CIN

1
GND

2

3

CdVdt

4

DZ

5
RLIM

aaa-040460

Fig. 23. Recommended Layout
Top: 35 m (1.37 mil)
Prepreg: 110 m (4.33 mil)Inner 1: 35 m (1.37 mil)
Core: 1200 m (47 mil)Inner 2: 35 m (1.35 mil)
Prepreg: 110 m (4.33 mil)Bottom: 35 m (1.37 mil)Through-hole via
Resin-filled and tented
Hole diameter: 200 m (8 mil)Plating thickness: 25.4 m (1 mil)aaa-040461

Fig. 24. Recommend PCB Stackup
Table 10. Recommended copper area in each layer
Layer

Minimum Copper area connected to Number of vias in thermal padthermal pad

Top

30 mm

2

Inner 1

100 mmInner 220 mm

2

Bottom

50 mm

2

NPS3102
Submit document feedback

Product data sheet

15 vias arranged in a 5 x 3 pattern
2

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

15 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

15. Package outline
DFN3030-10: Leadless plastic package; 10 terminals, body 3.0 x 3.0 x 0.75 mm

SOT8037-1

y C

C
M

A2

Seating plane
A1

detail M

DABb (10x)6

A

y C 10x

C A B

v
10

K (10x)
E1

E

L (10x)5

pin 1
index area

1

e
(8x)
D1

0

1

2 mm

scale
Dimensions (mm are the original dimensions)
Unit
mm

max
nom
min

A

A1

0.80
0.75
0.70

0.05
0.03
0.00

A2

b

D

D1

E

E1

(0.20)

0.30
0.25
0.20

3.05
3.00
2.95

2.55
2.50
2.45

3.05
3.00
2.95

1.85
1.80
1.75

e

L

K

v

y

0.50

0.45
0.40
0.35

(0.2)

0.10

0.05
sot8037-1_po

OutlineversionReferences
IEC

JEDEC

JEITA

Europeanprojection

Issue date21-10-13
24-06-27

SOT8037-1

Fig. 25. Package outline SOT8037-1 (DFN3030-10)

NPS3102
Submit document feedback

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

16 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

16. Abbreviations
Table 11. Abbreviations
AcronymDescription
DUT

Device Under Test

ESD

ElectroStatic Discharge

PCB

Printed-Circuit Board

TDB

To Be Determined

17. Revision history
Table 12. Revision history
Data sheet ID

Release date

Data sheet status

Change notice Supersedes

NPS3102 v.1

20240718

Product data sheet-

NPS3102
Submit document feedback

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024-

© Nexperia B.V. 2024. All rights reserved

17 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

18. Legal information

injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products insuch equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.

Data sheet status

Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of thisdocument, and as such is not complete, exhaustive or legally binding.

Document status[1][2]

Product
status [3]Definition

Objective [short]data sheet

Development

This document contains data fromthe objective specification for
product development.

Preliminary [short]data sheet

Qualification

This document contains data fromthe preliminary specification.

Product [short]data sheet

Production

This document contains the productspecification.

[1]
[2]
[3]

Please consult the most recently issued document before initiating orcompleting a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may havechanged since this document was published and may differ in case ofmultiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.

Definitions
Draft — The document is a draft version only. The content is still underinternal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included hereinand shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheetwith the same product type number(s) and title. A short data sheet isintended for quick reference only and should not be relied upon to containdetailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, thefull data sheet shall prevail.
Product specification — The information and data provided in a Productdata sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement bevalid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.

Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for theconsequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outsideof Nexperia.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removalor replacement of any products or rework charges) whether or not suchdamages are based on tort (including negligence), warranty, breach ofcontract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with theTerms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-criticalsystems or equipment, nor in applications where failure or malfunctionof an Nexperia product can reasonably be expected to result in personal

NPS3102
Submit document feedback

Product data sheet

Applications — Applications that are described herein for any of theseproducts are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability forany assistance with applications or customer product design. It is customer’ssole responsibility to determine whether the Nexperia product is suitableand fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards tominimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for thecustomer’s applications and products using Nexperia products in order toavoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above thosegiven in the Recommended operating conditions section (if present) or theCharacteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement isconcluded only the terms and conditions of the respective agreement shallapply. Nexperia hereby expressly objects to applying the customer’s generalterms and conditions with regard to the purchase of Nexperia products bycustomer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a priorauthorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, theproduct is not suitable for automotive use. It is neither qualified nor tested inaccordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In the event that customer uses the product for design-in and use inautomotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Translations — A non-English (translated) version of a document is forreference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.

Trademarks
Notice: All referenced brands, product names, service names andtrademarks are the property of their respective owners.

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

18 / 19

NPS3102A; NPS3102B

Nexperia

12 V, 2 A to 13.5 A, 17 mΩ eFuse

Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Ordering information....................................................2
5. Marking.......................................................................... 2
6. Block diagram...............................................................2
7. Pinning information......................................................3
7.1. Pinning.........................................................................3
7.2. Pin description............................................................. 3
8. Limiting values............................................................. 4
9. ESD ratings................................................................... 4
10. Recommended operating conditions........................4
11. Thermal characteristics..............................................4
12. Electrical characteristics........................................... 5
12.1. Typical characteristics graphs....................................6
12.2. Typical waveforms..................................................... 8
13. Feature description.................................................... 9
14. Application information........................................... 13
15. Package outline........................................................ 16
16. Abbreviations............................................................ 17
17. Revision history........................................................17
18. Legal information......................................................18© Nexperia B.V. 2024. All rights reserved

For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 18 July 2024

NPS3102
Submit document feedback

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 18 July 2024

© Nexperia B.V. 2024. All rights reserved

19 / 19