UM90036
Rev. 1 — 18 July 2024

user manual

NPS3102A; NPS3102B 12 V, 2 A-13.5 A,17 mΩ eFuse evaluation boardAbstract:

The NEVB-NPS3102A; NEVB-NPS3102B evaluation board is a 4 layer PCB equipped with either
a NPS3102A or NPS3102B electronic fuse. With this evaluation PCB the user can evaluate theperformance of the device in several application scenarios.

Keywords:

NPS3102A; NPS3102B electronic fuse evaluation board (EVB)

UM90036

Nexperia

NPS3102A; NPS3102B 12 V, 2 A-13.5 A, 17 mΩ eFuse evaluation board

1. Introduction
The NPS3102A; NPS3102B is an electronic fuse designed for 12 V systems, featuring anadjustable current clamp, thermal protection, inrush current control, and an internal overvoltage
clamp to shield downstream devices from high voltage transients during hot switching.
Two versions are available: Version A latches during faults, requiring a reset afterward, while
Version B includes auto-retry circuitry that restarts after fault removal. Each version has adedicated evaluation board: NEVB-NPS3102A and NEVB-NPS3102B. The eFuses on theseboards can be swapped (replacing NPS3102A with NPS3102B or vice versa) to explore differences
between latching and auto-retry fuses.
The evaluation PCB contains one eFuse for testing in various scenarios. It integrates an NMOSTtransistor for short circuit monitoring, comparator circuitry with LED fault indication, selectable
output voltage ramp times, and adjustable current limit settings.

2. Features
The following features are available on this evaluation board:•••••••••

Two evaluation boards available:• NEVB-NPS3102A• NEVB-NPS3102B
Input operating voltage range (VIN): 9 V to 18 V
Continuous DC load current: 11 A (Tamb = 25 °C)
Selectable current limit
Selectable output slew rate
Fault detection indicator
Short circuit FET
IN and OUT transient protection diodes
Open drain enable drive

3. SchematicFig. 1 shows the schematic of the NEVB-NPS3102A; NEVB-NPS3102B evaluation board.
Explanation of the test pins, jumpers and other features can be found in the next sections.

Fig. 1.

NPS3102A; NPS3102B EVB schematic

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NPS3102A; NPS3102B 12 V, 2 A-13.5 A, 17 mΩ eFuse evaluation board

4. PCB layout

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Top copper layer

Fig. 3.

Inner 1 copper layer

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NPS3102A; NPS3102B 12 V, 2 A-13.5 A, 17 mΩ eFuse evaluation board

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Inner 2 copper layer

Fig. 5.

bottom copper layer

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NPS3102A; NPS3102B 12 V, 2 A-13.5 A, 17 mΩ eFuse evaluation board

Fig. 6.

Component placement top

5. Board stackup
The copper on the printed circuit boards serves as both a conductor and a means to dissipate
heat from the exposed pad into the surrounding air. When subjected to high currents and voltage
clamping, the device's dissipation can lead to a junction temperature exceeding 125 °C, triggering
thermal protection. To achieve low thermal and ground impedance, a 4 layer PCB has been
employed. The stackup is illustrated in Fig. 7.

Fig. 7.

PCB layer stackup

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NPS3102A; NPS3102B 12 V, 2 A-13.5 A, 17 mΩ eFuse evaluation board

6. Bill of material
Table 1. Bill of Material (BOM)
Reference
Quantity
Value

Manufacturer
name

Manufacturer
part number

C1, C4, C6

30.1 µF/25 V

KEMET

C0603C104K3RAC7013

C2110 µF/25 V

Murata Electronics

GRM188R61E106MA73D

C3110 nF/25 V

KEMET

C0603C103J3RACTU

C51Not populated

KEMET

EXV107M016A9HAA

C7133 nF/25 V

YAGEO

AC0603JRX7R8BB333C81220 µF/25 V

Rubycon

25PHV220M8X10.5

D11PTVS16VP1UP

Nexperia

PTVS16VP1UP,115

D2

1PNE20010ER

Nexperia

PNE20010ERX

D41RED

Kingbright

APHD1608LSURCK

J1, J32

Conn_01x02

CUI Devices

TB007-508-02BE

J4

1

Conn_Coaxial

Linx Technologies

CONSMB001-1-G

J2, JP1, JP2

3

Conn_01x03

Wurth Elektronik

61300311121

JP3

1

Dual_testpoint_(2p_header)

SAMTEC

TSW-102-07-L-S

Q1

1

PMF250XNE

Nexperia

PMF250XNEX

Q3

1PXN5R4-30QL

Nexperia

PXN5R4-30QLJ

R1, R102100k

YAGEORT0603FRE10100KL

R2149k9

YAGEO

RT0603FRE0749K9L

R311k5, 0.1%

YAGEO

RT0603BRD071K5L

R61226, 0.1%

YAGEO

RT0603BRD07226RL

R811.5 M, 1%

Vishay / Beyschlag

MCT06030C1504FP500

R913k3

YAGEO

RT0603FRE073K3L

R11

10.1

BournsCRA2512-FZ-R100ELF

R121768k, 1%

YAGEO

RC0603FR-07768KL

TP1, TP2, TP3,
TP4, TP62

TestPoint

Keystone Electronics

5001

TP51

TestPoint

Keystone Electronics

1430-5

U11NPS3102A or
NPS3102B

Nexperia

NPS3102AGB or
NPS3102BGB

U21TLV6703

Texas Instruments

TLV6703DDCT

JP1, JP2

2Jumper RedHarwin

M7581-46

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NPS3102A; NPS3102B 12 V, 2 A-13.5 A, 17 mΩ eFuse evaluation board

7. Test setup and operation
Fig. 8 depicts the evaluation board which is initially set up for a maximum device current of 13.5 A
and output slew rate configured at 1 ms. Connect the input voltage to J1, and the load circuitry toJ3.
To test short circuit behavior, connect a pulse generator with a 5 V amplitude to SMB connector J4.
Use JP3 to measure the voltage drop across the 100 mΩ short-circuit resistor. A fault condition will
be indicated by LED D4.
Jumper JP2 can be used to change the output slew rate to either 3 ms or 10 ms. The current limit
can be changed by means of JP1. Table 3 explains the jumper settings and associated values.
Placing a jumper to J2 pin 1-2 disables the device and resets the latch in case of a NPS3102A. A
pulse generator can be connected to J2 pin 2-3 enabling external control of the eFuse.

Fig. 8.

Evaluation board setup and jumper settings

Table 2. Available test points
Test point

Connected to

TP1EN/FLTTP2

VIN-sense

TP3

VOUT-sense

TP4dV/dt

TP5Ground

TP6ILIM

Table 3. Available jumper settings
JumperPin connections

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1-22-3Open

JP1 – Current Limit

2A

13.5 A0A

JP2 – Inrush Control

3 ms10 ms

1 ms

J2 – Device Enable

DisableExternal drive

EnableAll information provided in this document is subject to legal disclaimers.

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NPS3102A; NPS3102B 12 V, 2 A-13.5 A, 17 mΩ eFuse evaluation board

8. Revision history
Table 4. Revision history
Revision
DatenumberDescription

UM90036 v.1

Initial version

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20240718

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NPS3102A; NPS3102B 12 V, 2 A-13.5 A, 17 mΩ eFuse evaluation board

9. Legal information
Definitions
Draft — The document is a draft version only. The content is still underinternal review and subject to formal approval, which may result inmodifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included hereinand shall have no liability for the consequences of use of such information.

Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for theconsequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outsideof Nexperia.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removalor replacement of any products or rework charges) whether or not suchdamages are based on tort (including negligence), warranty, breach ofcontract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with theTerms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changesto information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to thepublication hereof.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-criticalsystems or equipment, nor in applications where failure or malfunctionof an Nexperia product can reasonably be expected to result in personal
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products insuch equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Applications — Applications that are described herein for any of theseproducts are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability forany assistance with applications or customer product design. It is customer’ssole responsibility to determine whether the Nexperia product is suitableand fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards tominimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’sapplications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for thecustomer’s applications and products using Nexperia products in order toavoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a priorauthorization from competent authorities.
Translations — A non-English (translated) version of a document is forreference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.

Trademarks
Notice: All referenced brands, product names, service names andtrademarks are the property of their respective owners.

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NPS3102A; NPS3102B 12 V, 2 A-13.5 A, 17 mΩ eFuse evaluation board

Contents
1. Introduction................................................................... 2
2. Features.........................................................................2
3. Schematic......................................................................2
4. PCB layout.................................................................... 3
5. Board stackup...............................................................5
6. Bill of material.............................................................. 6
7. Test setup and operation.............................................7
8. Revision history............................................................8
9. Legal information......................................................... 9© Nexperia B.V. 2024. All rights reserved

For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 18 July 2024

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