PRODUCT SPECIFICATIONnRF2401A

Single chip 2.4 GHz Transceiver
FEATURESAPPLICATIONS

•

•

•
•

•

•
•
•
•

•
•
•
•
•
•

True single chip GFSK transceiver in a small
24-pin package (QFN24 5x5mm)
Data rate 0 to1Mbps
Only 2 external components
Multi channel operation• 125 channels• Channel switching time <200µs.
• Support frequency hopping
Data slicer / clock recovery of data
Address and CRC computation
DuoCeiver™ for simultaneous dual receiver
topology
ShockBurst™ mode for ultra-low power
operation and relaxed MCU performance
Power supply range: 1.9 to 3.6 V
Low supply current (TX), typical 10.5mA peak
@ -5dBm output powerLow supply current (RX), typical 18mA peak inreceive mode
100 % RF tested
No need for external SAW filter
World wide use•••

Wireless mouse, keyboard, joystick
Keyless entry
Wireless data communication
Alarm and security systems
Home automation
Surveillance
Automotive

•
•
•
•

Telemetry
Intelligent sports equipment
Industrial sensors
Toys

•
•
•

GENERAL DESCRIPTIONnRF2401A is a single-chip radio transceiver for the world wide 2.4 - 2.5 GHz ISM
band. The transceiver consists of a fully integrated frequency synthesizer, a power
amplifier, a crystal oscillator and a modulator. Output power and frequency channels
are easily programmable by use of the 3-wire serial interface. Current consumption isvery low, only 10.5mA at an output power of -5dBm and 18mA in receive mode.
Built-in Power Down modes makes power saving easily realizable.

QUICK REFERENCE DATA
Parameter
Minimum supply voltage
Maximum output power
Maximum data rate
Supply current in transmit @ -5dBm output power
Supply current in receive mode
Temperature range
Sensitivity
Supply current in Power Down mode

Value

Unit

1.9
0
1000
10.5
18
-40 to +85
-93
400

V
dBm
kbps
mA
mA
°C
dBm
nA

Table 1 nRF2401A quick reference data

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio TransceiverType Number

Description

Version

NRF2401A
NRF2401AG
NRF2401A-EVKIT

24 pin QFN 5x5
24 pin QFN 5x5, lead free (green)
Evaluation kit (2 test PCB, 2 configuration PCB, SW)

A
A
1.0

Table 2 nRF2401A ordering information

VSS=0V

VSS=0V

VSS=0V

VSS=0V

VDD=3V

VDD=3V

VDD=3V

DVDD

BLOCK DIAGRAM

XC1
PWR_UP

DuoCeiverTM
XC2

ShockBurstTM

DEMOD
CE
DR2
Data
Channel 2

DOUT2
CLK2
DR1

Data
Channel 1

DATA
CLK1

3-wireinterface

Clock
Recovery,
DataSlicer
ADDR
DecodeCRC
Code/Decode
FIFO
In/OutIF BPF

VSS_PA=0V
VDD_PA=1.8V

LNA

Frequency
Synthesiser
ANT1

GFSK
Filter

PA

400Ω
ANT2

CS

IREF
22kΩ

Figure 1 nRF2401A with external components.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

PIN FUNCTIONS
Pin

Name

Pin function

Description

1
2
3
4
5
6
7

CE
DR2
CLK2
DOUT2
CS
DR1
CLK1

Digital Input
Digital Output
Digital I/O
Digital Output
Digital Input
Digital Output
Digital I/O

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

DATA
DVDD
VSS
XC2
XC1
VDD_PAANT1
ANT2
VSS_PA
VDD
VSS
IREF
VSS
VDD
VSS
PWR_UP
VDD

Digital I/OPower Output
Power
Analog Output
Analog Input
Power Output
RF
RF
Power
Power
Power
Analog Input
Power
Power
Power
Digital Input
Power

Chip Enable Activates RX or TX mode
RX Data Ready at Data Channel 2 (ShockBurst™ only)
Clock Output/Input for RX Data Channel 2
RX Data Channel 2
Chip Select Activates Configuration Mode
RX Data Ready at Data Channel 1 (ShockBurst™ only)
Clock Input (TX) & Output/Input (RX) for Data Channel 1
3-wire interface
RX Data Channel 1/TX Data Input/ 3-wire interface
Positive Digital Supply output for de-coupling purposes
Ground (0V)
Crystal Pin 2
Crystal Pin 1
Power Supply (+1.8V) to Power Amplifier
Antenna interface 1
Antenna interface 2
Ground (0V)
Power Supply (+3V DC)
Ground (0V)
Reference current
Ground (0V)
Power Supply (+3V DC)
Ground (0V)
Power UpPower Supply (+3V DC)

Table 3 nRF2401A pin function

PIN ASSIGNMENTVDD PWR_UP

VSS

VDD

VSS

IREF

24

22

21

20

19

23

18

VSS

17

VDD

3

16

VSS_PA

4

15

ANT2

CS

5

14

ANT1

DR1

6

13

VDD_PA

CE

1

DR2

2

nRF2401AQFN24 5x5

CLK2

7

8

9

10

11

12

CLK1

DATA

DVDD

VSS

XC2

XC1

Figure 2 nRF2401A pin assignment (top view) for a QFN24 5x5 package.
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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

ELECTRICAL SPECIFICATIONS
Conditions: VDD = +3V, VSS = 0V, TA = - 40ºC to + 85ºC
Symbol Parameter (condition)

Notes

Min.

Typ.

Max.

Units

1.9
-40

3.0
+27

3.6
+85

V
ºC

VDD- 0.3
Vss

VDD
0.3

V
V

VDD- 0.3
Vss

VDD
0.3

V
V

1)
2)

2400
4

2524
20

3)

>0
250

MHz
MHz
kHz
kbps
kbps
MHz

Operating conditions
VDD
TEMP

Supply voltage
Operating Temperature

Digital input pin
VIH
VIL

HIGH level input voltage
LOW level input voltage

Digital output pin
VOH
VOL

HIGH level output voltage (IOH=-0.5mA)
LOW level output voltage (IOL=0.5mA)

fOP

Operating frequency
Crystal frequency
Frequency deviation
Data rate ShockBurst™
Data rate Direct Mode
Channel spacing

General RF conditions
fXTAL
∆f
RGFSK
RGFSK
FCHANNEL

±156
1000
1000
1

Transmitter operation
PRF
PRFC
PRFCR
PBW
PRF2
PRF3
IVDD
IVDD
IVDD
IVDD
IVDD

Maximum Output PowerRF Power Control Range
RF Power Control Range Resolution
20dB Bandwidth for Modulated Carrier
2nd Adjacent Channel Transmit Power 2MHz
3rd Adjacent Channel Transmit Power 3MHz
Supply current @ 0dBm output power
Supply current @ -20dBm output power
Average Supply current @ -5dBm output
power, ShockBurst™
Average Supply current in stand-by mode
Average Supply current in power down

4)

5)
5)
6)

13
8.8
0.8

dBm
dB
dB
kHz
dBm
dBm
mA
mA
mA

7)

12
400

µA
nA

18
19
23
25
-93
-85
10/4
-20/0
-37/-20-43/-30-45/-41

mA
mA
mA
mA
dBm
dBm
dB
dB
dB
dB
dB

16

0
20

+4
±3
1000
-20
-40

Receiver operation
IVDD
IVDD
IVDD
IVDD
RXSENSRXSENS
C/ICO
C/I1ST
C/I2ND
C/I3RD
RXB
1)
2)
3)
4)
5)
6)
7)
8)

Supply current one channel 250kbps
Supply current one channel 1000kbps
Supply current two channels 250kbps
Supply current two channels 1000kbps
Sensitivity at 0.1%BER (@250kbps)
Sensitivity at 0.1%BER (@1000kbps)
C/I Co-channel
1st Adjacent Channel Selectivity C/I 1MHz
2nd Adjacent Channel Selectivity C/I 2MHz
3rd Adjacent Channel Selectivity C/I 3MHz
Blocking Data Channel 2

8)
8)
8)
8)

Usable band is determined by local regulations
The crystal frequency may be chosen from 5 different values (4, 8, 12, 16, and 20MHz) which are specified in theconfiguration word, see Table 8. 16MHz are required for 1Mbps operation.
Data rate must be either 250kbps or 1000kbps.
Antenna load impedance = 100Ω+j175Ω
Antenna load impedance = 100Ω+j175Ω. Effective data rate 250kbps or 1Mbps.
Antenna load impedance = 100Ω+j175Ω. Effective data rate 10kbps.
Current if 4 MHz crystal is used.
250kbps/1000kbps.

Table 4 nRF2401A RF specifications
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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

PACKAGE OUTLINE
nRF2401AG uses the GREEN QFN24 5x5 package, with matt tin plating.
nRF2401A uses the QFN24 5x5 package, with SnPb plating. Dimensions are in mm.

Package Type
Punch QFN24(5x5 mm)

Min
typ.
Max

A
0.8
0.9

A1
0.0
0.02
0.05

A2
0.65
0.69

b
0.25
0.3
0.35

D/E

D1/E1

e

5 BSC

4.75
BSC

0.65 BSC

J
3.47
3.57
3.67

K
3.47
3.57
3.67

L
0.3
0.4
0.5

Figure 3 nRF2401AG GREEN Package outline.
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R
1.235
1.335
1.435

PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio TransceiverAbsolute Maximum Ratings
Supply voltages
VDD............................- 0.3V to + 3.6V
VSS .................................................. 0V
Input voltage
VI ....................... - 0.3V to VDD + 0.3V
Output voltage
VO ...................... - 0.3V to VDD + 0.3V

Total Power Dissipation
PD (TA=85°C) ............................. 90mW
Temperatures
Operating Temperature…. - 40°C to + 85°C
Storage Temperature….… - 40°C to + 125°C
Note: Stress exceeding one or more of the limiting values may cause permanent
damage to the device.
ATTENTION!
Electrostatic Sensitive Device
Observe Precaution for handling.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

Glossary of Terms
Term

Description

CLK
CRC
CS
CE
DR
GFSK
ISM
MCU
OD
PWR_DWNPWR_UP
RX
ST_BY
TX

Clock
Cyclic Redundancy Check
Chip SelectChip Enable
Data Ready
Gaussian Frequency Shift Keying
Industrial-Scientific-Medical
Micro controller
Overdrive
Power Down
Power Up
ReceiveStandby
Transmit

Table 5 Glossary

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

MODES OF OPERATION
Overview
The nRF2401A can be set in the following main modes depending on three control
pins:
Mode
Active (RX/TX)
Configuration
Stand by
Power down

PWR_UP

CE

CS

1
1
1
0

1
0
0
X

0
1
0
X

Table 6 nRF2401A main modes
For a complete overview of the nRF2401A I/O pins in the different modes pleaserefer to Table 7.
Active modes
The nRF2401A has two active (RX/TX) modes:••

ShockBurst™
Direct Mode

The device functionality in these modes is decided by the content of a configuration
word. This configuration word is presented in configuration section.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

ShockBurst™
The ShockBurst™ technology uses on-chip FIFO to clock in data at a low data rate
and transmit at a very high rate thus enabling extremely power reduction.
When operating the nRF2401A in ShockBurst™, you gain access to the high data
rates (1 Mbps) offered by the 2.4 GHz band without the need of a costly, high-speed
micro controller (MCU) for data processing.
By putting all high speed signal processing related to RF protocol on-chip, thenRF2401A offers the following benefits:•••

Highly reduced current consumption
Lower system cost (facilitates use of less expensive micro controller)
Greatly reduced risk of ‘on-air’ collisions due to short transmission time

The nRF2401A can be programmed using a simple 3-wire interface where the data
rate is decided by the speed of the micro controller.
By allowing the digital part of the application to run at low speed while maximizing
the data rate on the RF link, the nRF ShockBurst™ mode reduces the average current
consumption in applications considerably.
ShockBurst™ principle
When the nRF2401A is configured in ShockBurst™, TX or RX operation isconducted in the following way (10 kbps for the example only).
Continuous 10kbps

nRF2401A

8-bit
MCU

FIFO

ShockBurstTM

1Mbps

Figure 4 Clocking in data with MCU and sending with ShockBurst technology

Without ShockBurstTM, running at speed dictated by 10Kbs MCU

10mA periode

020

10mA period

10Kbs MCU with ShockBurstTM

40

80

60

100

140

120

160

180

200

220

Time mS

Figure 5 Current consumption with & without ShockBurst technology

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240

PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio TransceiverNO

nRF2401A in
ShockBurstTM
TX (CE=hi)?
YES

Data content of registers:uController
Loading ADDR
and PAYLOAD
data

ADDR

PAYLOAD

Maximum 256 bits
nRF2401A
Calculating CRC

ADDR

PAYLOADCRC

NO
CE=Low?

YES

nRF2401A
Adding Preamble

PreamblenRF2401A
Sending
ShockBurstTM
Package(250 or 1000kbps)

YES

ADDR

PAYLOAD

CRC

Input FIFO not Empty

NO
Sendingcompleted?

Figure 6 Flow Chart ShockBurst™ Transmit of nRF2401A
nRF2401A ShockBurst™ Transmit:
MCU interface pins: CE, CLK1, DATA
1. When the application MCU has data to send, set CE high. This activatesnRF2401A on-board data processing.
2. The address of the receiving node (RX address) and payload data isclocked into the nRF2401A. The application protocol or MCU sets the
speed <1Mbps (ex: 10kbps).
3. MCU sets CE low, this activates a nRF2401A ShockBurst™ transmission.
4. nRF2401A ShockBurst™:• RF front end is powered up• RF package is completed (preamble added, CRC calculated)• Data is transmitted at high speed (250 kbps or 1 Mbps configuredby user).
• nRF2401A return to stand-by when finished
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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio TransceivernRF2401A in
ShockBurstTM
RX?

NO

YES

Data content of registers:
nRF2401A
Detects
PREAMBLE andIncoming Data

PreambleADDR

PAYLOAD

CRC

NO
Correct
ADDR?

ADDR

PAYLOADCRC

ADDR

PAYLOADCRC

ADDR

PAYLOADCRC

YES
nRF2401A
Receives Data
andChecking CRC

NO

nRF2401A
Checks:Correct CRC?
YESNOnRF2401A
Set Data Ready(DR1/2) highPAYLOADuController
Clocks out
PayloadPAYLOADnRF2401A
RegisterEmpty?
YESnRF2401A
Sets Data Ready(DR1/2) low

Output Register Empty

Figure 7 Flow Chart ShockBurst™ Receive of nRF2401A

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio TransceivernRF2401A ShockBurst™ Receive:
MCU interface pins: CE, DR1, CLK1 and DATA (one RX channel receive)
1. Correct address and size of payload of incoming RF packages are set whennRF2401A is configured to ShockBurst™ RX.
2. To activate RX, set CE high.
3. After 200 µs settling, nRF2401A is monitoring the air for incoming
communication.
4. When a valid package has been received (correct address and CRC found),nRF2401A removes the preamble, address and CRC bits.
5. nRF2401A then notifies (interrupts) the MCU by setting the DR1 pin high.
6. MCU may (or may not) set the CE low to disable the RF front end (lowcurrent mode).
7. The MCU will clock out just the payload data at a suitable rate (ex. 10kbps).
8. When all payload data is retrieved nRF2401A sets DR1 low again, and isready for new incoming data package if CE is kept high during data
download. If the CE was set low, a new start up sequence can begin, see
Figure 16.
Direct Mode
In direct mode the nRF2401A works like a traditional RF device. Data must be at
1Mbps ±200ppm, or 250kbps ±200ppm at low data rate setting, for the receiver todetect the signals.
Direct Mode Transmit:
MCU interface pins: CE, DATA
1. When application MCU has data to send, set CE high
2. The nRF2401A RF front end is now immediately activated, and after 200µs settling time, data will modulate the carrier directly.
3. All RF protocol parts must hence be implemented in MCU firmware(preamble, address and CRC).
Direct Mode Receive:
MCU interface pins: CE, CLK1, and DATA
1. Once the nRF2401A is configured and powered up (CE high) in direct RX
mode, DATA will start to toggle due to noise present on the air.
2. CLK1 will also start to toggle as nRF2401A is trying to lock on to theincoming data stream.
3. Once a valid preamble arrives, CLK1 and DATA will lock on to theincoming signal and the RF package will appear at the DATA pin with thesame speed as it is transmitted.
4. To enable the demodulator to re-generate the clock, the preamble must be
8 bits toggling hi-low, starting with low if the first data bit is low.
5. In this mode no data ready (DR) signals is available. Address andchecksum verification must also be done in the receiving MCU.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

DuoCeiver™ Simultaneous Two Channel Receive ModeIn both ShockBurst™ & direct modes the nRF2401A can facilitate simultaneous
reception of two parallel independent frequency channels at the maximum data rate.
This means:• nRF2401A can receive data from two 1 Mbps transmitters (ex: nRF2401A
or nRF2402) 8 MHz (8 frequency channels) apart through one antennainterface.
• The output from the two data channels is fed to two separate MCU
interfaces.
• Data channel 1: CLK1, DATA, and DR1• Data channel 2: CLK2, DOUT2, and DR2• DR1 and DR2 are available only in ShockBurst™.
The nRF2401A DuoCeiver™ technology provides 2 separate dedicated data channels
for RX and replaces the need for two, stand alone receiver systems.
nRF2401A
Tx/Rx
nRF2401A
Tx/Rx
nRF2401A
Tx/Rx
Figure 8 Simultaneous 2 channel receive on nRF2401A
There is one absolute requirement for using the second data channel. For thenRF2401A to be able to receive at the second data channel the frequency channelmust be 8MHz higher than the frequency of data channel 1. The nRF2401A must be
programmed to receive at the frequency of data channel 1. No time multiplexing isused in nRF2401A to fulfil this function. In direct mode the MCU must be able tohandle two simultaneously incoming data packets if it is not multiplexing between thetwo data channels. In ShockBurst™ it is possible for the MCU to clock out one datachannel at a time while data on the other data channel waits for MCU availability,
without any lost data packets, and by doing so reduce the needed performance of the
MCU.

FRF1

Clock
Recovery,
DataSlicer

ADDR,
CRC
Check

DR1
CLK1
DATA

Data(FRF1)

FRF2=FRF1+8MHz

Clock
Recovery,
DataSlicer

ADDR,
CRC
Check

DR2
CLK2
DOUT2

Data(FRF2)

Figure 9 DuoCeiverTM with two simultaneously independent receive channels.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

Configuration ModeIn configuration mode a configuration word of up to 15 bytes is downloaded tonRF2401A. This is done through a simple 3-wire interface (CS, CLK1 and DATA).
For more information on configuration please refer to the nRF2401A Device
configuration chapter on page16.
Stand-By Mode
Stand by mode is used to minimize average current consumption while maintaining
short start up times. In this mode, part of the crystal oscillator is active. Current
consumption is dependent on crystal frequency (Ex: 12 µA @ 4 MHz, 32 µA @ 16MHz). The configuration word content is maintained during stand by.
Power Down Mode
In power down the nRF2401A is disabled with minimal current consumption,
typically less than 1µA. Entering this mode when the device is not active minimizes
average current consumption, maximizing battery lifetime. The configuration word
content is maintained during power down.

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1

1

1

0

0

0

1

1

1

X

0

0

1

1

1

Stand byStand byStand byStand byConfiguration

TX ShockBurst™

TX Direct
RX ShockBurst™
in one channel
RX ShockBurst™
in two channels
RX Direct
in one channel
RX Direct
in two channels

1

X

1

1

0

X

1

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1

1

1

1

1

1

1

1

0

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1 In = X means the input should be set to either “low” or “high”.
2 Input if DR1 is “low”.
3 Output if DR1 is “high”

Table 7 Pin configuration of nRF2401A.

1

1

0

1

0

Power down

1

0

0

PWR_UPPower down

X

ShockBurst

-

1

1

1

1

1

1

0

0

0

0

0

X

X

X

1

CE

CS

0

0

0

0

0

0

1

0

0

0

0

0

0

1

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INPUT PINSXRXMODE

MODE SWITCHESPower downnRF2401A
MODES

Pin configuration for the different modes of nRF2401A

nRF2401A Single Chip 2.4 GHz Radio Transceiver

PRODUCT SPECIFICATION-

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CLK
In
CLK
In
CLK
In
X
In
CLK
In
CLK
Out
CLK
Out
CLK

CLK
In

direction
CLK1
In
X
In
X
In
CLK
In
X
In
X
In

BIDIR PINS
direction
DATA
In
X
In
X
In
X
In
X
In
X
2
In
DATA
3
Out
DATA
In
CONFIG DATA
In
DATA
In
DATA
Out
DATA
Out
DATA
Out
DATA
Out
DATA
X
In
X
In
X
In
X
In
X
In
CLK
Out
0
Out
CLK

X
In

direction
CLK2
In
X
In
X
In
X
In
X
In
X
In
0

0

0

0

DR1

DR1

0

0

0

1

0

0

0

0

DR2

0

0

0

0

DR2

DR2

0

0

0

0

0

0

DR2

0

DR1

OUTPUT PINS

DATA

0

DATA

0

0

0

0

0

0

0

0

0

0

0

DOUT2

PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

DEVICE CONFIGURATION
All configuration of the nRF2401A is done via a 3-wire interface to a single
configuration register. The configuration word can be up to 15 bytes long for
ShockBurst™ use and up to 2 bytes long for direct mode.
Configuration for ShockBurst™ operation
The configuration word in ShockBurst™ enables the nRF2401A to handle the RF
protocol. Once the protocol is completed and loaded into nRF2401A only one byte,
bit[7:0], needs to be updated during actual operation.
The configuration blocks dedicated to ShockBurst™ is as follows:• Payload section width: Specifies the number of payload bits in a RF package.
This enables the nRF2401A to distinguish between payload data and the CRC
bytes in a received package.
• Address width: Sets the number of bits used for address in the RF package.
This enables the nRF2401A to distinguish between address and payload data.
• Address (RX Channel 1 and 2): Destination address for received data.
• CRC: Enables nRF2401A on-chip CRC generation and de-coding.
NOTE:
These configuration blocks, with the exception of the CRC, are dedicated for the
packages that a nRF2401A is to receive.
In TX mode, the MCU must generate an address and a payload section that fits theconfiguration of the nRF2401A that is to receive the data.
When using the nRF2401A on-chip CRC feature ensure that CRC is enabled and uses
the same length for both the TX and RX devices.
PRE-AMBLE

ADDRESSPAYLOAD

CRC

Figure 10 Data packet set-up

Configuration for Direct Mode operation
For direct mode operation only the two first bytes (bit[15:0]) of the configuring word
are relevant.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

Configuration Word overview

General device configuration

ShockBurst™ configuration

Bit
Numberposition of bits

Name

Function

143:120

24

TEST

Reserved for testing

119:1128

DATA2_W

Length of data payload section RX channel 2

111:1048

DATA1_W

Length of data payload section RX channel 1

103:6440

ADDR2Up to 5 byte address for RX channel 2

63:24

40

ADDR1

Up to 5 byte address for RX channel 1

23:18

6

ADDR_W

Number of address bits (both RX channels).

17

1

CRC_L

8 or 16 bit CRC

161

CRC_EN

Enable on-chip CRC generation/checking.

15

1RX2_EN

Enable two channel receive mode

14

1

CM

Communication mode (Direct or ShockBurst™)

13

1

RFDR_SB

RF data rate (1Mbps requires 16MHz crystal)

12:10

3

XO_F

Crystal frequency

9:8

2

RF_PWR

RF output power

7:1

7

RF_CH#

Frequency channel

0

1

RXEN

RX or TX operation

Table 8 Table of configuration words.
The configuration word is shifted in MSB first on positive CLK1 edges. New
configuration is enabled on the falling edge of CS.
NOTE.
On the falling edge of CS, the nRF2401A updates the number of bits actually shiftedin during the last configuration.
Ex:
If the nRF2401A is to be configured for 2 channel RX in ShockBurst™, a total of 120
bits must be shifted in during the first configuration after VDD is applied.
Once the wanted protocol, modus and RF channel are set, only one bit (RXEN) is
shifted in to switch between RX and TX.
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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

Configuration Word Detailed Description
The following describes the function of the 144 bits (bit 143 = MSB) that is used toconfigure the nRF2401A.
General Device Configuration: bit[15:0]
ShockBurst™ Configuration: bit[119:16]
Test Configuration: bit[143:120]
MSB
D143

D142

D141

1

0

0

TEST
D140
D139
D138
Reserved for testing
0
1
1

D137

D136

1

0

D128

D127

MSB
D135

0

TEST
D134

D133

0

D119
0

D111
0

D132

0

D131

0

1

D130

0

D129

Reserved for testing000

DATA2_W
D118
D117
D116
D115
D114
D113
Data width channel#2 in # of bits excluding addr/crc
0
1
0
0
0
0
DATA1_W
D110
D109
D108
D107
D106
D105
Data width channel#1 in # of bits excluding addr/crc
0
1
0
0
0
0

D103

D102

D101

….

0

0

0

…

D63

D62

D61

….

0

0

0

…

D13
OD
0

D125

D124

D123

D122

D121
D120
Close PLL in TX

0

0

1

1

1

0

D67

D66

D65

D64

0

1

1

1

D27

D26

D25

D24

0

1

1

1

0

Default

0

D104
Default

0

ADDR1
D31
D30
D29
D28
Channel#1 Address RX (up to 40bit)
1
1
1
0Default

Default

Default

Default

RF-Programming
D12
D11
D10
D9
D8
XO Frequency
RF Power
0
1
1
1
1

LSB

D7

D6

0

0

D5
D4
D3
Channel selection
0
0
0

D2

D1

1

0

D0
RXEN

0

Table 9 Configuration data word
The MSB bit should be loaded first into the configuration register.
Default configuration word: h8E08.1C20.2000.0000.00E7.0000.0000.E721.0F04.

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Revision: 1.0

Default

D112

CRC
D17
D16
CRC Mode 1 = 16bit, 0 = 8bit
CRC 1 = enable; 0 = disable
0
1

D14
BUF
0

D126

ADDR2
D71
D70
D69
D68
Channel#2 Address RX (up to 40bit)
1
1
1
0

ADDR_W
D23
D22
D21
D20
D19
D18
Address width in # of bits (both channels)
0
0
1
0
0
0

D15
Two Ch.
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Default

PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

ShockBurst™ configuration:
The section bit[119:16] contains the segments of the configuration register dedicatedto ShockBurst™ operational protocol. After VDD is turned on ShockBurst™
configuration is done once and remains set whilst VDD is present. During operation
only the first byte for frequency channel and RX/TX switching need to be changed.
PLL_CTRL
PLL_CTRL

D121

D120

PLL

0
0
1
1

0
1
0
1

Open TX/Closed RX
Open TX/Open RX
Closed TX/Closed RX
Closed TX/Open RX

Table 10 PLL setting.
Bit 121-120:
PLL_CTRL: Controls the setting of the PLL for test purposes. With closed
PLL in TX no deviation will be present. For normal operationalmode these two bits must both be low.
DATAx_W
DATA2_W
119

118

117

111

110

109

116

115

114

113

112

106

105

104

DATA1_W
108

107

Table 11 Number of bits in payload.
Bit 119 – 112:
DATA2_W: Length of RF package payload section for receive-channel 2.
Bit 111 – 104:
DATA1_W: Length of RF package payload section for receive-channel 1.
NOTE:
The total number of bits in a ShockBurst™ RF package may not exceed 256!
Maximum length of payload section is hence given by:
DATAx _ W (bits ) = 256 − ADDR _ W − CRC

Where:ADDR_W: length of RX address set in configuration word B[23:18]
CRC: check sum, 8 or 16 bits set in configuration word B[17]PRE: preamble, 8 bits are automatically included
Shorter address and CRC leaves more room for payload data in each package.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

ADDRx
ADDR2
103

102

101

….

71

70

63

62

61

….

31

30

69

68

67

66

65

64

28

27

26

25

24

ADDR1
29

Table 12 Address of receiver #2 and receiver #1.
Bit 103 – 64:
ADDR2: Receiver address channel 2, up to 40 bit.
Bit 63 – 24: ADDR1
ADDR1: Receiver address channel 1, up to 40 bit.
NOTE!
Bits in ADDRx exceeding the address width set in ADDR_W are redundantand can be set to logic 0.
ADDR_W & CRC
ADDR_W
23

22

21

20

19

18

CRC_L

CRC_EN

17

16

Table 13 Number of bits reserved for RX address + CRC setting.
Bit 23 – 18:
ADDR_W: Number of bits reserved for RX address in ShockBurst™
packages.
NOTE:
Maximum number of address bits is 40 (5 bytes). Values over 40 in
ADDR_W are not valid.
Bit 17:
CRC_L:

Bit: 16:
CRC_EN:CRC length to be calculated by nRF2401A in ShockBurst™.
Logic 0: 8 bit CRC
Logic 1: 16 bit CRC

Enables on-chip CRC generation (TX) and verification (RX).
Logic 0: On-chip CRC generation/checking disabled
Logic 1: On-chip CRC generation/checking enabled

NOTE:
An 8 bit CRC will increase the number of payload bits possible in each
ShockBurst™ data packet, but will also reduce the system integrity.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

General device configuration:
This section of the configuration word handles RF and device related parameters.
Modes:
RX2_ENCM

RFDR_SB

15

14

13

XO_F
12

RF_PWR

11

10

9

8

Table 14 RF operational settings.
Bit 15:
RX2_EN:
Logic 0: One channel receive
Logic 1: Two channels receive
NOTE:
In two channels receive, the nRF2401A receives on two, separate
frequency channels simultaneously. The frequency of receive channel
1 is set in the configuration word bit[7-1], receive channel 2 is always
8 channels (8 MHz) above receive channel 1.
Bit 14:
Communication Mode:
Logic 0: nRF2401A operates in direct mode.
Logic 1: nRF2401A operates in ShockBurst™ modeBit 13:
RF Data Rate:
Logic 0: 250 kbps
Logic 1: 1 Mbps
NOTE:
Utilizing 250 kbps instead of 1Mbps will improve the receiversensitivity by 10 dB. 1Mbps requires 16MHz crystal.
Bit 12-10:
XO_F:

Selects the nRF2401A crystal frequency to be used:

D12
0
0
0
0
1

XO FREQUENCY SELECTION
D11
D10
Crystal Frequency [MHz]
0
0
1
1
0

0
1
0
1
0

4
8
12
16
20

Table 15 Crystal frequency setting.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

Bit 9-8:
RF_PWR: Sets nRF2401A RF output power in transmit mode:

RF OUTPUT POWER

D9

D8P [dBm]

0
0
1
1

0
1
0
1

-20
-10
-5
0

Table 16 RF output power setting.
RF channel & direction
RF_CH#
7

6

5

4

3

RXEN
2

1

0

Table 17 Frequency channel and RX / TX setting.
Bit 7 – 1:
RF_CH#: Sets the frequency channel the nRF2401A operates on.
The channel frequency in transmit is given by:

ChannelRF = 2400 MHz + RF _ CH # ⋅ 1.0 MHz
RF_CH #: between 2400MHz and 2527MHz may be set.
The channel frequency in data channel 1 is given by:
ChannelRF = 2400 MHz + RF _ CH # ⋅ 1.0 MHz (Receive at PIN#8)
RF_CH #: between 2400MHz and 2524MHz may be set.
NOTE:
The channels above 83 can only be utilized in certain territories (ex: Japan)
The channel frequency in data channel 2 is given by:
ChannelRF = 2400 MHz + RF _ CH # ⋅ 1.0 MHz +8MHz (Receive at PIN#4)
RF_CH #: between 2408MHz and 2524MHz may be set.
Bit 0:
Set active mode:
Logic 0: transmit mode
Logic 1: receive mode

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

DATA PACKAGE DESCRIPTION
PRE-AMBLE

ADDRESSPAYLOAD

CRC

Figure 11 Data Package Diagram
The data packet for both ShockBurst™ mode and direct mode communication isdivided into 4 sections. These are:
1. PREAMBLE

2

ADDRESS

3

PAYLOAD

4

CRC

•
•

The preamble field is required in ShockBurst™ and Direct modes.
Preamble is 8 bits in length and is dependent of the first data bit in direct
mode.
PREAMBLE
1st ADDR-BIT
010101010
10101010
1•
Preamble is automatically added to the data packet in ShockBurst™ andthereby gives extra space for payload. In Direct mode MCU must handle
preamble.
In ShockBurst™ mode RX, the preamble is removed from the received output
data, in direct mode the preamble is transparent to the output data.
•
The address field is required in ShockBurst™ mode.1•
8 to 40 bits length.
•
Address automatically removed from received packet in ShockBurst™
mode. In Direct mode MCU must handle address.
•
The data to be transmitted•
In ShockBurst™ mode payload size is 256 bits minus the following:(Address: 8 to 40 bits. + CRC 8 or 16 bits).
•
In Direct mode the maximum packet size (length) is for 1Mbps 4000 bits(4ms).
•The CRC is optional in ShockBurst™ mode, and is not used in Directmode.
•
8 or 16 bits length•
The CRC is removed from the received output data in ShockBurst™ RX.

Table 18 Data package description

1

Suggestions for the use of addresses in ShockBurst™: In general more bits in the address gives lessfalse detection, which in the end may give lower data packet loss.
A. The address made by (5, 4, 3, or 2) equal bytes are not recommended because it in general will
make the packet-error-rate increase.
B. Addresses where the level shift only one time (i.e. 000FFFFFFF) could often be detected in noisethat may give a false detection, which again may give raised packet-error-rate.
Direct mode will be dependent on the software used in the MCU, but it is recommended to have thesame restrictions on addresses for this mode.
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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

IMPORTANT TIMING DATA
The following timing applies for operation of nRF2401A.
nRF2401A Timing InformationnRF2401A timingMax.

PWR_DWN Î Configuration mode
PWR_DWNÎ Active mode (RX/TX)
ST_BY Î TX ShockBurst™
ST_BY Î TX Direct Mode
ST_BY Î RX mode
Minimum delay from CS to data.
Minimum delay from CE to data.
Minimum delay from DR1/2 to clk.
Maximum delay from clk to data.
Delay between edges
Setup time
Hold time
Delay to finish internal GFSK data
Minimum input clock highSet-up of data in Direct Mode
Minimum clock high in Direct Mode
Minimum clock low in Direct Mode
Time on air, TX Direct mode

3ms
3ms
195µs
202µs
202µs

Min.

5µs
5µs
50ns
50ns
50ns
500ns
500ns
1/data rate
500ns
50ns
300ns
230ns
4ms

Name
Tpd2cfgm
Tpd2a
Tsby2txSB
Tsby2txDM
Tsby2rx
Tcs2data
Tce2data
Tdr2clkTclk2data
Td
Ts
Th
Tfd
Thmin
Tsdm
Thdm
Tldm
ToaDM

Table 19 Operational timing of nRF2401A
When the nRF2401A is in power down it must always settle in stand by for 3ms
before it can enter configuration or one of the active modes.
PWR_UP
CS
CE
CLK1
DATA

Tpd2cfgm

Figure 12 Timing diagram for power down (or VDD off) to configuration modefor nRF2401A.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver
PWR_UP
CS
CE
CLK1
DATA

Tpd2a

Figure 13 Power down (or VDD off) to active mode
Note that the configuration word will be lost when VDD is turned off and that thedevice then must be configured before going to one of the active modes. If the device
is configured one can go directly from power down to the wanted active mode.
Note:
CE and CS may not be high at the same time. Setting one or the other decides
whether configuration or active mode is entered.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

Configuration mode timing
When one or more of the bits in the configuration word needs to be changed thefollowing timing apply.
t=0

PWR_UP
CS
CE
CLK1
DATA

Td

CS
CE

Thmin

CLK1
MSB
Tcs2data

DATA

Ts

Th

Figure 14 Timing diagram for configuration of nRF2401A
If configuration mode is entered from power down, CS can be set high after Tpd2sby
as shown in Figure 12.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

ShockBurst™ Mode timing
ShockBurst™ TX:
t=0

PWR_UP
CS
CE
CLK1
DATA
.

ANT1/ANT2
Tsby2txSB

Td

Toa

CS
THmin

CE
CLK1

Tce2data

DATA
Ts

Th

Figure 15 Timing of ShockBurst™ in TX
The package length and the data rate give the delay Toa (time on air), as shown in theequation.
TOA = 1 / datarate ⋅ (# databits + 1)

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

ShockBurst™ RX:
t=0

PWR_UPCS
CE
DR1/2

CLK1/2
DATA/DOUT2.

ANT1/ANT2
Td

Tsby2rx

CE
DR1/2

Thmin

CLK1/2

Tclk2data

Td

Tdr2clk

DATA/
DOUT2

Figure 16 Timing of ShockBurst™ in RX
The CE may be kept high during downloading of data, but the cost is higher current
consumption (18mA) and the benefit is short start-up time (200µs) when DR1 goeslow.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

Direct Mode
Direct Mode TX:
t=0

PWR_UP
CS
CE
CLK1
DATA
ANT1/ANT2
Td

Tsby2txDM

ToaDM

Tfd

Figure 17 Timing of direct mode TX
In TX direct mode the input data will be sampled by nRF2401A and therefore noclock is needed. The clock must be stable at low level during transmission due tonoise considerations. The exact delay Tsby2txDM is given by the equation:
Tsby 2txDM = 194us + 1 / FXO ⋅ 14 + 2.25us

The maximum length of a package (ToaDM) over all voltages and temperatures is
4ms. This is limited by frequency drift in the transmitter and is independent of data
rate and frequency channel.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

Direct Mode RX:
t=0

PWR_UP
CS
CE
CLK1/2
DATA/DOUT2
ANT1/ANT2
Td

Tsby2rx

CE

Thdm

Tldm

CLK1/2
DATA/DOUT2
Tsdm

Figure 18 Timing of direct mode RX
Tsby2rx describes the delay from the positive edge of CE to start detection of(demodulating) incoming data.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

PERIPHERAL RF INFORMATION
Antenna output
The ANT1 & ANT2 output pins provide a balanced RF output to the antenna. The
pins must have a DC path to VDD, either via a RF choke or via the center point in a
dipole antenna. The load impedance seen between the ANT1/ANT2 outputs should bein the range 200-700Ω. A load of 100Ω+j175Ω is recommended for maximum output
power (0dBm). Lower load impedance (for instance 50 Ω) can be obtained by fitting asimple matching network.
Output Power adjustment
Power setting bits ofconfiguring word

RF output power

DC current
consumption

11
0 dBm ±3dB
13.0 mA
10-5 dBm ±3dB
10.5 mA
01-10 dBm ±3dB
9.4 mA00-20 dBm ±3dB
8.8 mA
Conditions: VDD = 3.0V, VSS = 0V, TA = 27ºC, Load impedance = 100Ω+j175Ω.

Table 20 RF output power setting for the nRF2401A.

Crystal Specification
Tolerance includes initially accuracy and tolerance over temperature and aging.
Frequency

CL

ESR

C0max

Tolerance

4
8
12
16
20

12pF
12pF
12pF
12pF
12pF

150 Ω
100 Ω
100 Ω
100 Ω
100 Ω

7.0pF
7.0pF
7.0pF
7.0pF
7.0pF

±30ppm±30ppm±30ppm±30ppm±30ppmTable 21 Crystal specification of the nRF2401A
To achieve a crystal oscillator solution with low power consumption and fast start-up
time, it is recommended to specify the crystal with a low value of crystal load
capacitance. Specifying CL=12pF is OK, but it is possible to use up to 16pF.
Specifying a lower value of crystal parallel equivalent capacitance, C0 will also work,
but this can increase the price of the crystal itself. Typically C0=1.5pF at a crystal
specified for C0max=7.0pF.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

Sharing crystal with micro controller.
When using a micro controller to drive the crystal reference input XC1 of thenRF2401A transceiver some rules must be followed.
Crystal parameters:
When the micro controller drives the nRF2401A clock input, the requirement of load
capacitance CL is set by the micro controller only. The frequency accuracy of 30 ppm
is still required to get a functional radio link. The nRF2401A will load the crystal by
0.5pF at XC1 in addition to the PBC routing.
Input crystal amplitude & Current consumption
The input signal should not have amplitudes exceeding any rail voltage, but any DCvoltage within this is OK. Exceeding rail voltage will excite the ESD structure and theradio performance is degraded below specification. If testing the nRF2401A with a
RF source with no DC offset as the reference source, the input signal will go below
the ground level, which is not acceptable.

XO_OUT

Buffer:Sine tofull swing

Amplitudecontrolledcurrent source

Current starved
inverter:
XOSC core
Vdd

Vdd

Vss

Vss

ESD

ESD
XC1

Figure 19

XC2

Principle of crystal oscillator

It is recommended to use a DC-block before the XC1 pin so that the internal ESD
structures will self bias the XC1 voltage .
The nRF2401A crystal oscillator is amplitude regulated. To achieve low current
consumption and also good signal-to-noise ratio, it is recommended to use an input
signal larger than 0.4 V-peak. The needed input swing is independent of the crystal
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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiverfrequency. When clocking the nRF2401A externally, XC2 is not used and can be left
as an open pin.
Frequency Reference MCU
In direct mode there is a requirement on the accuracy of the data rate. For the receiver
to detect the incoming data and recover the clock, the data rate must be within±200ppm, given that the data is "random", i.e. there is a statistical calculation on how
often a preamble like sequence is present in the data. The clock is synchronized forany preamble detection, be it a dedicated preamble or part of the data stream.
PCB layout and de-coupling guidelines
A well-designed PCB is necessary to achieve good RF performance. Keep in mind
that a poor layout may lead to loss of performance, or even functionality, if due care is
not taken. A fully qualified RF-layout for the nRF2401A and its surrounding
components, including matching networks, can be downloaded fromwww.nordicsemi.no.

A PCB with a minimum of two layers including a ground plane is recommended for
optimum performance. The nRF2401A DC supply voltage should be de-coupled as
close as possible to the VDD pins with high performance RF capacitors, see Table 22.
It is preferable to mount a large surface mount capacitor (e.g. 4.7µF tantalum) inparallel with the smaller value capacitors. The nRF2401A supply voltage should be
filtered and routed separately from the supply voltages of any digital circuitry.
Long power supply lines on the PCB should be avoided. All device grounds, VDD
connections and VDD bypass capacitors must be connected as close as possible to thenRF2401A IC. For a PCB with a topside RF ground plane, the VSS pins should beconnected directly to the ground plane. For a PCB with a bottom ground plane, thebest technique is to have via holes as close as possible to the VSS pads. One via holeshould be used for each VSS pin.
Full swing digital data or control signals should not be routed close to the crystal or
the power supply lines.

Nordic Semiconductor ASA
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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

APPLICATION EXAMPLEnRF2401A with single ended matching network
xxx

VDD
C5
1nF

R2
22K

1
2
3
4
5
6

L4

nRF2401

CE
DR2
CLK2
DOUT2
CS
DR1

C9
1.0pF

18
17
16
15
14
13

VSS
VDD
VSS_PA
ANT2
ANT1
VDD_PA

5.6nH
C10

C11

2.2pF

4.7pF

L3
5.6nH

L1
3.3nH

RF I/O

xxx

L2
C4
2.2nF

CLK1
DATA
DVDD
VSS
XC2
XC1

xxx

PWR_UP
CE
DR2
CLK2
DOUT2
CS
DR1
CLK1
DATA

VDD
PWR_UP
VSS
VDD
VSS
IREF

24
23
22
21
20
19

C6
10nF

C3
4.7pF

10nH
C8
1.0pF

7
8
9
10
11
12

U1
nRF2401
QFN24/5X5

X1

C7
33nF

16 MHz
R1
1M
C1
22pF

C2
22pF

xxx

Figure 20 nRF2401A schematic for RF layouts with single end 50Ω antenna
Component
C1
C2
C3
C4
C5
C6
C7
R1
R2
U1
X1
L1
L2
L3
L4
C8
C9
C10
C11

Description
Capacitor ceramic, 50V, NPO
Capacitor ceramic, 50V, NPO
Capacitor ceramic, 50V, NPO
Capacitor ceramic, 50V, X7R
Capacitor ceramic, 50V, X7R
Capacitor ceramic, 50V, X7R
Capacitor ceramic, 50V, X7R
Resistor
ResistornRF2401A transceiver
Crystal, CL = 12pF,
ESR < 100 ohm
Inductor, wire wound 2)
Inductor, wire wound 2)
Inductor, wire wound 2)
Inductor, wire wound 2)
Ceramic capacitor, 50V, NP0
Ceramic capacitor, 50V, NP0
Ceramic capacitor, 50V, NP0
Ceramic capacitor, 50V, NP0

Size

Value

Toleranc
e

Units

0603
0603
0603
0603
0603
0603
0603
0603
0603
QFN24 / 5x5
LxWxH =
4.0x2.5x0.8
0603
0603
0603
0603
0603
0603
0603
0603

22
22
4.7
2.2
1.0
10
33
1.0
22
nRF2401A
161)

±5%
±5%
±5%
±10%
±10%
±10%
±10%
±1%
±1%

pF
pF
pF
nF
nF
nF
nF
MΩ
kΩ

+/- 30 ppm

MHz

3.3
10
5.6
5.6
1.0
1.0
2.2
4.7

± 5%
± 5%
± 5%
± 5%
± 0.1 pF
± 0.1 pF
± 0.25 pF± 0.25 pF

nH
nH
nH
nH
pF
pF
pF
pF

Table 22 Recommended components (BOM) in nRF2401A with antenna matching
network
1)

nRF2401A can operate at several crystal frequencies, please refer to page 31.
Wire wound inductors are recommended, other can be used if their self-resonant frequency (SFR) is> 2.7 GHz
2)

Nordic Semiconductor ASA
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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

PCB layout example

Figure 21 shows a PCB layout example for the application schematic in Figure 20.
A double-sided FR-4 board of 1.6mm thickness is used. This PCB has a ground planeon the bottom layer. Additionally, there are ground areas on the component side of theboard to ensure sufficient grounding of critical components. A large number of via
holes connect the top layer ground areas to the bottom layer ground plane.

No components in bottom layer
Top silk screen

Bottom view

Top view

Figure 21 nRF2401A RF layout with single ended connection to 50Ω antenna and0603 size passive components

Nordic Semiconductor ASA
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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

DEFINITIONS
Data sheet status
Objective product specification
Preliminary productspecification
Product specification

This data sheet contains target specifications for product development.
This data sheet contains preliminary data; supplementary data may be
published from Nordic Semiconductor ASA later.
This data sheet contains final product specifications. Nordic Semiconductor
ASA reserves the right to make changes at any time without notice in order toimprove design and supply the best possible product.

Limiting values
Stress above one or more of the limiting values may cause permanent damage to the device. These are stressratings only and operation of the device at these or at any other conditions above those given in theSpecifications sections of the specification is not implied. Exposure to limiting values for extended periods may
affect device reliability.

Application information
Where application information is given, it is advisory and does not form part of the specification.

Table 23. Definitions
Nordic Semiconductor ASA reserves the right to make changes without further noticeto the product to improve reliability, function or design. Nordic Semiconductor ASA
does not assume any liability arising out of the application or use of any product or
circuits described herein.

LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems
where malfunction of these products can reasonably be expected to result in personal
injury. Nordic Semiconductor ASA customers using or selling these products for use
in such applications do so at their own risk and agree to fully indemnify Nordic
Semiconductor ASA for any damages resulting from such improper use or sale.

Product Specification: Revision Date: 23.12.2004.
Data sheet order code: 231204-nRF2401A or 231204-nRF2401AG
All rights reserved ®. Reproduction in whole or in part is prohibited without the priorwritten permission of the copyright holder.

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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

YOUR NOTESNordic Semiconductor ASA
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PRODUCT SPECIFICATIONnRF2401A Single Chip 2.4 GHz Radio Transceiver

Nordic Semiconductor ASA – World Wide Distributors

For Your nearest dealer, please see http://www.nordicsemi.no

Main Office:
Vestre Rosten 81, N-7075 Tiller, Norway
Phone: +47 72 89 89 00, Fax: +47 72 89 89 89
Visit the Nordic Semiconductor ASA website at http://www.nordicsemi.no

Nordic Semiconductor ASA
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