Automotive Ethernet
ESD Protection
Nexperia offers the first true OPEN Alliance compliant
ESD Protection with outstanding signal integrity

To take the next step in automotive connectivity and electrification, high-speed andhigh-bandwidth Automotive Ethernet is required. Industry leaders collaborate within
the OPEN Alliance SIG to encourage Ethernet adoption in cars. But with more advanced
electrical designs, discrete ESD Protection is becoming ever more essential.
Nexperia is the first in offering a fully compliant 10 Base T1s and 100/1000BASE-T1 OPENAlliance Ethernet ESD Protection with improved diode capacitance of 0.45 pF (max),ensuring outstanding signal integrity.
Key Features

Key Applications› Fully 10 Base T1s and 100/1000BASE-T1

ESD protection for in-vehicle network lines
In-automotive environments

OPEN Alliance compliant› Low capacitance down to < 0.45 pF› ESD protection up to 30 kV (IEC 61000-4-2, contact)› ESD robustness 15 kV at 1000 discharges› High trigger voltage: Vt1 = 100 V min› Available in various package options› AEC-Q101 qualified / automotive grade› OPEN Alliance 10 Base T1s and 100/1000BASE-T1 Ethernetwww.nexperia.com/ESDprotection/automotive-ethernet

Available package options:

DFN1006D-2

DFN1006(BD)-2

SOT23

SOT143B

SOT457

1.0 x 0.6 x 0.37

1.0 x 0.6 x 0.48

2.9 x 1.3 x 1.0

2.9 x 1.3 x 1.0

2.9 x 1.5 x 1.0

Cline typ (pF)

Cline max (pF)

IPPM max (µA)

Types in bold represent the new products

ESD rating max(kV) [1]Vtrigger min(V)Main Application

VRWM (V)

Number ofprotected lines

Automotive Ethernet Product Portfolio

1.5

1.8

2.3

Configuration Type

100BASE-T1
1000BASE-T124100300.91.22.3---Size (mm)PESD1ETH1GLS-Q
11Package

2

PESD1ETH1GXLS-Q

Sym045

DFN1006BD-2(SOD882BD)

1.0 x 0.6 x 0.48

PESD2ETH1G-T
11.1

1.3

2.3

PESD2ETH1GXT-Q

32.9 x 1.3 x 1.0

2100BASE-T12----8----121.8---

8

1.31.5-

PESD2ETH100-T

mse213

PESD2ETH-X

41SOT23

2.9 x 1.3 x 1.0
23

PESD2ETH-AX006aaa482

5I/O1 16 I/O1

GND 25 VBUS

I/O2 34 I/O2PESD2ETH-D.9 x 1.5 x 1.0-

1222.3--100.4

0.55

2.5

PESD5V0F1BL-

100.40.55

2.5

PESD5V0F1BLD

brb182

SOT143B

PESD2ETH-AD

10/100/1000 Mbit/s
ESD Protection at the PHY

SOT457

DFN1006-2(SOD882)

1.0 x 0.6 x 0.48

5.5

11

DFN1006D-2(SOD882D)

1.0 x 0.6 x 0.37

2Sym045

PESD1ETH10L-Q
10 base T1s* In development,
to be released in Q3 2024

24100300.35

0.45

10 BASE-T1s
OR
100 BASE-T1OR
1000 BASE-T1
transceivercommonmode choke100 nF
BI_DA+

100 nF
BI_DAaccording
to OPENalliance21 kΩ / 1.5kΩ for 10
BASE-T1s1 kΩ / 1.5kΩ for 10
BASE-T1s100 kΩ

4.7 nF

1ESD protection
device3Figure 1: Arrangement of ESD suppression device within the
100/1000BASE-T1 MDI interface, OPEN Alliance SIG (2020) SPDT
in Power Amplifier Application, and 10 Base T1s TC14 implemetation
specification (2023)

1.0 x 0.6 x 0.48

2PESD1ETH10LS-Q

OPEN Alliance and ESD protection placement
The OPEN Alliance (One-Pair Ether-Net) Special InterestGroup (SIG) is a non-profit alliance of mainly automotive
industry and technology providers collaborating toencourage wide scale adoption of Ethernet-based networks
as the standard in automotive networking applications.
One key goal is to enable the deployment of the existingIEEE 10 BASE T1s/ 100BASE-T1 and1000BASE-T1 physicallayer specifications with complementing specifications forconformance and interoperability.

DFN1006-2(SOD882)

DFN1006D-2(SOD882)

1.0 x 0.6 x 0.37

Discrete ESD protection devices play a crucial role when it
comes to ensuring high system level robustness and to fulfill
specific requirements. In previous automotive Ethernet
implementations, PHY vendors recommended to place a
discrete ESD protection device between the CMC and thePHY, if required.
When there is either no ESD protection or it is locatedcloser to the PHY, the energy of ESD strikes would pass theCM termination, DC Block and CMC. If the ESD protection
device is placed right at the connector, it not only protects
the PHY but also the common-mode choke (CMC) and thepassives. At this position, the energy of ESD pulses can
immediately be directed to ground. The OPEN Alliancerecommends placement of ESD protection directly at theconnector. This change in topology however requires acompletely different kind of ESD protection.
According to the OPEN Alliance specifications, for the direct
placement of ESD protection at the connector a high trigger
voltage (Vt >100V) is required. The high trigger voltage
should account for any additional coupling voltages becauseof the use of unshielded twisted pairs used in the 10 Base
T1s and the 100/1000 Base T1 networks.

Multi-Gigabit Ethernet and Flip-Chip LGA Packages
Going beyond the industry standard Open Alliance Ethernet
10, 100, and 1000 BaseT-1, there have been further efforts
to provide higher connectivity with higher data bandwidths
for automotive applications. Multi-Gigabit Ethernet refers
to solutions aimed at supporting higher data rates of 2.5, 5,
and 10 Gbps. It is widely adopted in automobile applications
to accommodate data-intensive requirements. To enable
the reliability and performance of the Ethernet PHY,
it is recommended to use an ESD protection device toprevent any damage to the electrical components used,including the PHY but also passive components such ascommon mode chokes, resistors, and capacitors.

Key Features and benefits

Applications› Ultra-low capacitance: Cd <0.25 pF› Deep snap-back combined with dynamic› Automotive Multi-Gigabit Ethernet› Automotive Infotainment: A/V monitors, display, cameras› High-Speed networks: USB 3.2, HDMI 2.0› Low-Voltage Differential Signaling (LVDS) automotive.

To meet the signal integrity needs of such high datarates, Nexperia is introducing the Flip Chip LGA packages.
These Flip-Chip LGA packages have minimal parasitic
components such as no bond wires or copper leadframes, therefore resulting in high performance andgood signal integrity while fulfilling all automotive
quality and reliability requirements.

resistance down to 0.35 Ω› ESD protection robustness up to 15 kV (IEC61000-4-2)› Available in Flip Chip Land Grid Array (FC-LGA) packages
DFN1006L-2, DFN1006LD-2 and DFN1006LD-2:
DFN1006LD-2, DFN1006LD-3 with side wettableflanks for AOI› Very good RF, a signal integrity and clamping performance
optimized for high-speed networks› Part of the Nexperia TrEOS Protection family› Qualified according to AEC-Q101 / automotive grade
Flip-chip LGA package comparison
Insertion Loss of PESD5V0H1xxx-Q Family
0DFN1006BD-2
10.3GHz-3-6DFN1006LD-215GHz-9-12DFN1006LD-3
16GHz-15051015202530

Frequency (GHz)

Figure 2: Package performance comparison: Flip-Chip LGA versus a conventional lead-frame package with the same size.

The conventional lead-frame based packages withbond wires have additional parasitic inductances andcapacitances which add an overhead to the signal integrity
performance of an ESD protection device. The Flip-Chip
LGA packages on the other hand have been specificallydesigned to remove most of these additional parasitic
elements while still enabling automotive level quality withside wettable flanks for AOI capability.

The performance improvement can be seen in the figure
above. The 2-pin SOD882LD FC-LGA package offers around
5 GHz bandwidth improvement while the 3 pin SOT8079LD
package offers a performance boost of up to 6 GHz incomparison to the conventional 2-pin SOD882BD package.
This performance improvement is, as mentioned before,
because of the minimal parasitic components in the
Flip-Chip LGA packages.

Flip-Chip LGA package overview
The flip-chip LGA package is designed for automotive applications and offers superior RF performancecompared to conventional DFN packages of the same size. Minimizing the metal features in the package
design result in an ultra-low packet impedance.

DFN1006LD-2

DFN1006L-2

DFN1006LD-3

1 x 0.6 x 0.45

1 x 0.6 x 0.45

1 x 0.6 x 0.45

Schematic of Multi-Gig Ethernet

CMC

Tx
or
Rx

ESD1

Connector

Tx
or
Rx

Option 2: Behind DC caps

Connector

Option 1: Before DC caps

CMCESD2

aaa-033481

Figure 3: Placement options of ESD protection for Multi-Gigabit Ethernet and high-speed video links

In the figure above, a typical block diagram of a Multi-gigabit
ethernet and highspeed video-links can be seen. There are
two possible options for the placement of an ESD protection
device i.e. either directly at the connector side or at the PHY
side behind the DC caps.
If an ESD protection is placed directly at the connector, ahigher VRWM is required to be able to withstand a short tobattery condition. However, if the ESD protection is placed
closer to the PHY behind the DC caps, the VRWM needs to belower and must be matched to the breakdown behaviour of
the PHY internal ESD protection circuitry.

Nexperia’s product selection for ESD1Matching the ESD protection to PHY internal ESD protection
allows for a timely triggering of the external ESD protection
device therefore taking in the energy of an ESD pulse andblocking it from going to the PHY and causing damage.
Nexperia offers a broad portfolio to protect either
configuration. All devices have a very low capacitance, anoutstanding signal integrity performance and a high ESD
robustness to ensure a smooth operation of the protectedcircuit while enabling a robust ESD protection.

Nexperia’s product selection for ESD2Device

Package

VRWM

CD typVESD

PESD5V0F1BL-Q

DFN1006-2

5V

0.4 pF

10 kV

DevicePackage

VRWM

CD typVESD

PESD5V0F1BLD-Q

DFN1006D-2

5V

0.4 pF

10 kV

PESDxVF1BL-Q

DFN1006-2

18-32 V0.3 pF

10 kV

PESD4USBxTx-Q

DFN2510x3.3/5

0.3 pF

15 kV

PESDxVF1BLS-Q

DFN1006BD-2

18-32 V0.3 pF

10 kV

PESD5V0C1BLS-Q

DFN1006BD-2

5V

0.3 pF

15 kV

PESDxVF2BLG-Q

FC-LGA DFN1006LDx*

18-32 V0.3 pF

10 kV

PESD5V0HxBLG-Q

FC-LGA DFN1006LDx*5V

0.3 pF

15 kV* In 2 and 3 pin FC-LGA 1.0x0.6mm footprint packages –DFN1006L-2, DFN1006LD-2 and DFN1006LD-3* I n 2 and 3 pin FC-LGA 1.0x0.6mm footprint packages –DFN1006L-2, DFN1006LD-2 and DFN1006LD-3© 2024 Nexperia B.V.
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Date of release:
March 2024