Analog to Digital Conversion
ADC TYPES

Analog-to-Digital Converters (ADCs) transform ananalog voltage to a binary number (a series of 1’s and0’s), and then eventually to a digital number (base 10)
for reading on a meter, monitor, or chart. The numberof binary digits (bits) that represents the digital number
determines the ADC resolution. However, the digital
number is only an approximation of the true value ofthe analog voltage at a particular instant because thevoltage can only be represented (digitally) in discrete
steps. How closely the digital number approximates
the analog value also depends on the ADC resolution.
A mathematical relationship conveniently shows
how the number of bits an ADC handles determines
its specific theoretical resolution: An n-bit ADC hasna resolution of one part in 2 . For example, a 12-bit
ADC has a resolution of one part in 4,096, where
212 = 4,096. Thus, a 12-bit ADC with a maximum
input of 10 VDC can resolve the measurement into
10 VDC/4096 = 0.00244 VDC = 2.44 mV. Similarly, forthe same 0 to 10 VDC range, a 16-bit ADC resolution
is 10/216 = 10/65,536 = 0.153 mV. The resolution isusually specified with respect to the full-range readingof the ADC, not with respect to the measured value
at any particular instant.

at 1) or 1/4 full scale (if the MSB reset to zero). The
comparator once more compares the DAC output tothe input signal and the second bit either remains on(sets to 1) if the DAC output is lower than the input
signal, or resets to zero if the DAC output is higher
than the input signal. The third MSB is then compared
the same way and the process continues in order ofdescending bit weight until the LSB is compared. At
the end of the process, the output register contains
the digital code representing the analog input signal.
Successive approximation ADCs are relatively slow
because the comparisons run serially, and the ADC
must pause at each step to set the DAC and wait
for its output to settle. However, conversion rates
easily can reach over 1 MHz. Also, 12 and 16-bit
successive-approximation ADCs are relatively
inexpensive, which accounts for their wide use inmany PC-based data acquisition systems.

Successive-Approximation ADC

DAC

Successive-Approximation ADCs

A successive-approximation converter, Figure 2.01,
is composed of a digital-to-analog converter (DAC),
a single comparator, and some control logic andregisters. When the analog voltage to be measured
is present at the input to the comparator, the system
control logic initially sets all bits to zero. Then the
DAC’s most significant bit (MSB) is set to 1, which
forces the DAC output to 1/2 of full scale (in the caseof a 10-V full-scale system, the DAC outputs 5.0 V).
The comparator then compares the analog output of
the DAC to the input signal, and if the DAC output islower than the input signal, (the signal is greater than
1/2 full scale), the MSB remains set at 1. If the DAC
output is higher than the input signal, the MSB resets
Figure(2.02)
to zero. Next, the second MSB
with a2.01
weightof 1/4 offull scale turns on (sets to 1) and forces the output of
the DAC to either 3/4 full scale (if the MSB remained

Comparator
Vinput–+Controllogic &
registers

Digitaloutputs

Fig. 2.01. Interestingly, this ADC uses a digital-toanalog converter and a comparator. The logic sets
the DAC to zero and starts counting up, setting eachfollowing bit until it reaches the value of the measured input voltage. The conversion is then finishedand the final number is stored in the register.

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Voltage-to-Frequency ADC
Voltage-to-frequency
converter
Digitalpulse train

Discharge Times
Timingcircuitry

Pulse
counterI ∝ Vinput
Vcapacitor

Vin

Dual-Slope ADC Integration and

Digitaloutputs

Fig. 2.02. Voltage-to-frequency converters reject noise welland frequently are used for measuring slow signals or those innoisy environments.

Fixed discharge
current

VinputTi
Integrationtime

Voltage-to-Frequency ADCs

Vref

Td

=

Ti
Td

Discharge
time

Fig. 2.03. Dual-slope integrating ADCs provide high-resolution measurements with excellent noise rejection. They integrate upward from an unknown voltage and then integrate
downward with a known source voltage. They are more accurate than single slope ADCs because component errors are
washed out during the de-integration period.

Voltage-to-frequency ADCs convert the analog input voltage toa pulse train with the frequency proportional to the amplitudeof the input. (See Figure 2.02.) The pulses are counted over a
fixed period to determine the frequency, and the pulse counter
output, in turn, represents the digital voltage.

Figure 2.03 (2.04)

Voltage-to-frequency converters inherently have a high noise
rejection characteristic, because the input signal is effectively
integrated over the counting interval. Voltage-to-frequency
conversion is commonly used to convert slow and noisy signals.
Voltage-to-frequency ADCs are also widely used for remotesensing in noisy environments. The input voltage is converted
to a frequency at the remote location and the digital pulse train
is transmitted over a pair of wires to the counter. This eliminates
noise that can be introduced in the transmission lines of ananalog signal over a relatively long distance.

they have a single-bit DAC, but they can obtain high-resolution
measurements using oversampling techniques. Although the ADC
works best with low-bandwidth signals (a few kHz), it typicallyhas better noise rejection than many others, and users can set
the integration time (albeit below 100 samples/sec).
Sigma-delta ADCs also require few external components.
They can accept low-level signals without much input-signal
conditioning circuitry for many applications, and they don’t
require trimming or calibration components because of the
DAC’s architecture. The ADCs also contain a digital filter, whichlets them work at a high oversampling rate without a separate
anti-aliasing filter at the input. Sigma-delta ADCs come in 16
to 24-bit resolution, and they are economical for most dataacquisition and instrument applications.

Integrating ADCs: Dual Slope

A number of ADCs use integrating techniques, which measure the timeneeded to charge or discharge a capacitor in order to determine theinput voltage. A widely used technique, called dual-slope integration, is
illustrated in Figure 2.03. It charges a capacitor over a fixed period witha current proportional to the input voltage. Then, the time required
to discharge the same capacitor under a constant current determines
the value of the input voltage. The technique is relatively accurate andstable because it depends on the ratio of rise time to fall time, not on
the absolute value of the capacitor or other components whose values
change over temperature and time.

Sigma-Delta ADC
Vin

Integrating the ADC input over an interval reduces the effect ofnoise pickup at the ac line frequency when the integration time
is matched to a multiple of the ac period. For this reason, it isoften used in precision digital multimeters and panel meters.
Although 20-bit accuracy is common, it has a relatively slow
conversion rate, such as 60 Hz maximum, and slower for ADCs
that integrate over multiples of the line frequency.

∑

Vs

Integrator

VIO

–

VDAC
VDAC
VDAC

V CO

+Vref

1

–Vref

Sigma-Delta ADCs

0

+

DAC

Vout
to digital
VCO filter

VCO

Vref

Fig. 2.04. Integrating converters such as the sigma-delta
ADC have both high resolution and exceptional noise rejection. They work particularly well for low-bandwidth measurements and reject high-frequency noise as well as 50/60 Hz
interference.

A sigma-delta ADC is another type of integrating ADC. It contains
an integrator, a DAC, a comparator, and a summing junction. (SeeFigure 2.04.) Like the dual-slope ADC, it’s often used in digital
multimeters, panel meters, and data acquisition boards. Sigmadelta converters are relatively inexpensive primarily because

2
Figure 2.04
(2.06)
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Sigma-Delta ADC With Digital Filter and
Decimator Stage
Single-bit
data stream
Vin

SigmaDelta
converter

Modulator loop
frequency = 2 MHz

Table of ADC Attributes

Multiple-bit
data stream

Digitallow-pass
filterOutputDecimation data
stage

ADC Type

TypicalResolution

TypicalConversion
Rate*/Frequency

Sigma-Delta

16–24 bit

1 sps–128 ksps

Successive Approximation

8–16 bit

10 ksps–2 Msps

Voltage-to-Frequency

8–12 bit

1 Hz–4 MHz**

Integrating

12–24 bit

1 sps–1 ksps*** sps = samples per second** With line cycle rejection

Output data
rate = 2 kHz

Fig. 2.06. Table of ADC attributes

Fig. 2.05. Sigma-delta ADCs are well suited to high-resolution
acquisition because they use oversampling and often combine
an analog modulator, a digital filter, and a decimator stage.
The low-pass digital filter converts the analog modulator output
to a digital signal for processing by the decimator.

losing information. This technique provides more stable readings.
(Refer to the table in Figure 2.06 for ADC comparisons.)

Figure 2.06 (2.04)

ACCURACY AND RESOLUTION

Accuracy is one of the most critical factors to consider when
specifying an ADC for test and measurement applications.
Unfortunately, it’s often confused with resolution, and althoughrelated, they are distinctly different. Both topics are discussed
in this section in some detail, as well as their relationship tocalibration, linearity, missing codes, and noise.

The principle of operation can be understood from the diagram.
The input voltage Vin sums algebraically with the output voltageof the DAC, and the integrator adds the summing point output
Vs to a value it stored previously. When the integrator output
is equal to or greater than zero, the comparator output switches
to logic one, and when the integrator output is less than zero,
the comparator switches to logic zero. The DAC modulates the
feedback loop, which continually adjusts the output of the comparator to equal the analog input and maintain the integrator
output at zero. The DAC keeps the integrator’s output near thereference voltage level. Through a series of iterations, the output
signal becomes a one-bit data stream (at a high sample rate) that
feeds a digital filter. The digital filter averages the series of logic
ones and zeros, determines the bandwidth and settling time,and outputs multiple-bit data. The digital low-pass filter thenfeeds the decimation filter, which in turn, decreases the sample
rate of the multi-bit data stream by a factor of two for each stage
within the filter. For example, a seven-stage filter can provide asample-rate reduction of 128.

Accuracy vs. Resolution

Every ADC measurement contains a variety of unavoidable, independent errors that influence its accuracy. When σi represents
each independent error, the total error can be shown as:
This equation includes a variety of errors such as sensor anomalies,

σtotal =Σ i σi 2

noise, amplifier gain and offset, ADC quantization (resolution
error), and other factors.

Quantization Error

Improved Accuracy

In a theoretically perfect ADC, any particular analog voltage measured should be represented by a unique digital code, accurate to
an infinite number of digits. (See Figure 2.07A.) But in a real ADC,
small but finite gaps exist between one digital number and a consecutive digital number, and the amount depends on the smallest
quantum value that the ADC can resolve. In the case of the 12-bit
converter covering a 10 VDC range, for example, that quantum
value is 2.44 mV, the LSB. In other words, the input analog voltage range is partitioned into a discrete number of values that theconverter can measure, which is also the ADC’s resolution. The
quantization error in this case is specified to be no more than halfof the least significant bit (LSB). For the 12-bit ADC, the error is±1.22 mV (0.0122%). Such ADC errors are typically specified inthree ways: the error in LSBs, the voltage error for a specified range,
and the % of reading error. Most ADCs are not as accurate as their
specified resolution, however, because other errors contribute tothe overall error such as gain, linearity, missing codes, and offset.
(See Figures 2.07B, C, D, and E, respectively). Nonetheless, theaccuracy of a good ADC should approach its specified resolution.

The digital filter shown in Figure 2.05 inherently improves the
ADC’s accuracy for ac signals in two ways. First, when the input
signal varies (sine wave input) and the system samples the signal
at several times the Nyquist value (refer to page 17), the integrator
becomes a low-pass filter for the input signal, and a high-pass filter
for the quantization noise. The digital filter’s averaging function
then lowers the noise floor even further, and combined withthe decimation filter, the data stream frequency at the output isreduced. For example, the modulator
loopfrequency could be inEquation
2.01
the MHz region, but the output data would be in the kHz region.
Second, the digital filter can be notched at 60 Hz to eliminate
power line frequency interference.
The output data rate from the decimation filter is lower than theinitial sample rate but still meets the Nyquist requirement by saving
certain samples and eliminating others. As long as the output data
rate is at least two times the bandwidth of the signal, the decimation factor or ratio M can be any integer value. For example, if the
input is sampled at fs, the output data rate can be fs/M without

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Common ADC Errors
A

Ideal

7

7

6

ADC Output

ADC Output

6

B

Gain error

5
4
3
2

5
4
3
2

1

1

0

0

0

2

4

6

Input volts
7

8

10

Missing code

C

5
4
3
2
1

0

2

4

6

8

Input volts

D
7

6

0

10

0

2

6

8

4

6

Input volts

8

10

E

Offset error

ADC Output

ADC Output

6

5
4
3
2

5
4
3
2
1

1
0

Linearity error

6

ADC Output

7

0

2

4

6

Input volts

8

0

10

0

2

4

Input volts

10

Fig. 2.07. The straight line in each graph represents the analog input voltage and the perfect output voltage reading from an ADC
with infinite resolution. The step function in Graph A shows the ideal response for a 3-bit ADC. Graphs B, C, D, and E show theeffect on ADC output from the various identified errors.

Figure07 (2.05)
When
an 2.ADC
manufacturer provides calibration procedures,
offset and gain errors usually can be reduced to negligible levels,
however, linearity and missing-code errors are more difficult or
impossible to reduce.

In many measurements, the input voltage represents only thephysical quantity under test. Consequently, system accuracy
might be improved if the complete measurement system iscalibrated rather than its individual parts. For example, consider aload cell with output specified under a given load and excitation
voltage. Calibrating individual parts means that the ADC, loadcell, and excitation source accuracy tolerances are all added
together. With this approach, the error sources of each part areadded together and generate a total error that is greater thanthe error that can be achieved simply by calibrating the systemwith a known precision load and obtaining a direct relationshipbetween the input load and ADC output.

ADC Accuracy vs. System Accuracy
Calibration

ADCs may be calibrated with hardware, software, or a combinationof the two. Calibration in this case means adjusting the gain andoffset of an ADC channel to obtain the specified input-to-output
transfer function. In a hardware configuration, for example, theinstrumentation amplifier driving the ADC has its offset andgain adjusted with trim pots, and changing the ADC’s reference
voltage changes its gain. In hardware/software calibrations, thesoftware instructs DACs to null offsets and set full-scale voltages.
Lastly, in a software calibration, correction factors are stored in
nonvolatile memory in the data acquisition system or in thecomputer and are used to calculate the correct digital value basedon the readings from the ADC.

Linearity

ADCs are factory calibrated before being shipped, but time andoperating temperature can change the settings. ADCs need to berecalibrated usually after six months to a year, and possibly more
often for ADCs with resolutions of 16 bits or more. Calibration
procedures vary, but all usually require a stable reference source
and an indicating meter of (at least three times) greater accuracy
than the device being calibrated. Offset is typically set to zerowith zero input, and the gain is set to full scale with the precise,full-scale voltage applied to the input.

Missing Codes

When the input voltage and the ADC output readings deviate
from the diagonal line (representing infinite resolution) more than
the ideal step function shown in Figure 2.07A, the ADC error isnearly impossible to eliminate by calibration. The diagonal line
represents an ideal, infinite-resolution relationship between input
and output. This type of ADC error is called a nonlinearity error.
Nonlinearities in a calibrated ADC produce the largest errors near
the middle of the input range. As a rule of thumb, nonlinearity
in a good ADC should be one LSB or less.

A quality ADC should generate an accurate output for any
input voltage within its resolution, that is, it should not skip
any successive digital codes. But some ADCs cannot produce anaccurate digital output for a specific analog input. Figure 2.07D,

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Histogram
Bin with most samples
represents the input signalof 2.50 VDCHistogram shape
approximates a Gaussian
distribution caused bywhite noise mixed
with dc input voltage
Number of samples

Bins with samples
caused by noise

0

1019

1020

1021

1022

1023

1024

1025

1026

1027

1028

1029

4095

Total number of bins = 4096
FSR

Fig. 2.08. The histogram illustrates how 12-bit ADC samples in a set were distributed among the various codes for a 2.5V measurement in a FSR (full-scale range) of 10V. Most codes intended for the 1024 bin representing 2.5V actually ended up there, but others
fell under a Gaussian distribution due to white noise content.

to ground terminals at different physical locations. Slight differences in the actual potential of each ground point generate acurrent flow from one device to the other. This current, which
often flows through the low potential lead of a pair of measurement wires generates a voltage drop that appears as noise andmeasurement inaccuracy at the signal conditioner or ADC input.
When at least one device can be isolated, such as the transducer,
then the offending ground path is open, no current flows, andthe noise or inaccuracy is eliminated. Optical isolators, specialtransformers, and differential input operational amplifiers at
the signal conditioner or ADC input can provide this isolation.

for example, shows that a particular 3-bit ADC does not provide
an output representing the number four for any input voltage.
This type of error affects both the accuracy and the resolution
Figure 2.08of the ADC.

Noise

The cost of an ADC is usually proportional to its accuracy, number of bits, and stability. But even the most expensive ADC cancompromise accuracy when excessive electrical noise interfereswith the measured signal, whether that signal is in millivolts ormuch larger.
For example, many ADCs that reside on cards and plug into a
PC expansion bus can encounter excessive electrical noise that
seriously affects their accuracy, repeatability, and stability. But
an ADC does not have to be connected directly to the bus within
the computer. An ADC mounted in an external enclosure often
solves the problem. It can communicate with the computer overan IEEE 488 bus, Ethernet, serial port, or parallel port.

ADC NOISE HISTOGRAMSADC manufacturers frequently verify their device’s accuracy(effect of non-linearities) by running a code density test. They
apply a highly accurate sine wave signal (precision amplitudeand frequency) to the device and using a histogram for analysis, generate a distribution of digital codes at the output of theconverter. A perfect ADC would produce only one vertical bar in
the histogram for the specified input frequency and amplitude
because it measured only one value for every sample. But becauseof the ADC’s inherent non-linearities, it produces a distributionof bars on either side representing digital words sorted into different code bins. Each bin is labeled for a single digital output
code and it contains the count of its occurrence, or the numberof times that code showed up in the output. (See Figure 2.08.)

When there is no choice but to locate an ADC inside the computer, however, check its noise level. Connecting the ADC’s
input terminal to the signal common terminal should produce
an output of zero volts. If it still reads a value when shorted, thenoise is being generated on the circuit card and will interfere withthe desired input signal. More critical diagnostics are necessary
when using an external power supply because noise also can arise
from both the power supply and the input leads.

nWhen n represents the ADC’s bit resolution, 2 bins are required.
n
The width of each code bin should be FSR/2 where FSR is thefull-scale range of the ADC. The probability density function
may be determined from this data. A large number of samples
must be taken, depending on the ADC’s bit size, for the histogram test to be meaningful. The more bits the ADC contains,
the higher the number of samples required, which could be as
much as 500,000 samples.

Noise Reduction and Measurement Accuracy

One technique for reducing noise and ensuring measurement
accuracy is to eliminate ground loops, that is, current flowing
in the ground connection between different devices. Groundloops often occur when two or more devices in a system, suchas a measurement instrument and a transducer, are connected

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ENOB: EFFECTIVE NUMBER OF BITS

channels. Although ENOB provides a good benchmark of thesystems capability and accuracy, it is not a specification; it is not
a replacement for SNR and other error specifications provided by
the manufacturer. However, systems may be compared with ENOB
tests when all are measured under the same set of conditions.

Although an ADC’s accuracy is crucial to a data acquisition
system’s accuracy, it’s not the final word. A widely used andpractical way of determining overall measurement accuracy isaccomplished with what’s called an Effective Number of Bits
(ENOB) test. The ENOB may very well demonstrate that theactual system measurement accuracy is something less than the
ADC bit accuracy specifications. For example, an ADC may be
specified as a 16-bit device, but the results of a specific type ofstandard test may show that its performance is actually closer
to an ideal 13-bit system. However, 13 bits may be more thanadequate for the application.

ADC OUTPUT AVERAGING BENEFITS
Improved Accuracy
A paradox that arises from averaging the output of an integratingtype ADC is that the measurement system theoretically canobtain higher accuracy for a signal embedded in noise than asignal free of noise. How this can be true comes from the way asignal is mathematically averaged. For example, with a single DC
signal, averaging the output always provides the same result with
no apparent change in accuracy (not considering the affects ofcalibration). But for a varying input signal, such as a sine wave, alarge number of samples yield a Gaussian distribution which canbe accurately defined with a more precisely established peak for
the wave. But the samples must not all cluster around a specificportion of the sampled wave. To get a true distribution, the ADC
must sample at a slower rate than the fluctuations and be outof synch with them. This technique finds a general average, nota local average. Thus, in this way signal averaging increases thesystem’s measurement resolution.

The ENOB test takes into account all the circuitry from input
terminals to the data output, which includes the effects of the
ADC, multiplexer, and other analog and digital circuits on themeasurement accuracy. It also includes the signal-to-noise ratio,
SNR, or the effect of any noise signals induced into the systemfrom any source.

The ENOB Test
The ENOB test evaluates the data acquisition system as it performs
in a real-world application when used with the manufacturers
recommended cables, connectors, and connections. It considers
the front end of the data acquisition system: the ADC, multiplexer,
programmable gain amplifier, and sample-and-hold amplifiers. Allof these circuits affect the digitized output. Any non-linearities,
noise, distortion, and other anomalies that sneak into the front
end can reduce the system’s accuracy, and it’s not enough to test
only one channel in a multi-channel system. Some errors creep
up from the effect of one channel on another through cross talk.

More Stable Readings
Some systems actually introduce a random noise signal called
dither into an otherwise clean ADC input to take advantage ofthe averaging function for increasing accuracy and signal stability.
The technique also enables an ADC with a smaller number of bits
to obtain the resolution of an ADC with more bits without losing accuracy. Each signal sweep must capture a different random
value at each point in time. Then the theoretical ADC average
from this distribution will remain at zero over a sufficiently large
sample window. For example, if 16 values are averaged, then it
has 16 times more possible values than the direct non-averaged
output. This technique increases the effective ADC resolution
by 4 bits. The noise makes it work.

To measure the ENOB, set up a precision sine-wave signal generator and connect it’s output to the input of one analog input
channel. The generator itself should produce little noise anddistortion. Set the signal generator output amplitude to justunder the maximum specified input range of the board. Set
the generator to the maximum frequency that the system is
specified to measure. Next, ground the input terminals of theadjacent channel. Run the system at its maximum rated speed.
Sample the test signal and then the grounded input. Capture1024 samples on each input and run the samples through an
FFT algorithm to compute the ENOB.

ADC signal averaging is so important a technique that it is usedon digital recordings. In the early days of digital audio recording
development, systems lacked ADC output averaging. As a result,a musical note would decay into an annoying buzz because not
all bits in the ADC were enabled. The output waveforms weredistorted and the ear could not filter it out, but ADC signal
averaging totally eliminated the problem.

The test measures the effects of slewing, harmonic distortion,
analog circuits, ADC accuracy, noise pickup, channel crosstalk, integral and differential non-linearity, and offset between

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Analog to Digital Solutions
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High-speed multifunction boards• Up to 8 analog inputs• 1 MS/s sampling• 12-, 14-, or 16-bit resolution• 16-bit resolution• Up to 200 kS/s sampling• Up to 64 analog inputs• Digital I/O, counters/timers• 24 digital I/O, 4 counters• Up to 2 analog outputs• Up to 4 analog outputs• Included software and drivers• Included software and drivers

Low-cost, high-speed, 12-bit modules

High-speed, multifunction modules• 1 MS/s sampling• 1 MS/s sampling• 8 analog inputs• Measure voltage or thermocouples• 16 digital I/O, counters/timers• 16-bit resolution• Up to 4 analog outputs• Up to 64 analog inputs• Included software and drivers• 24 digital I/O, 4 counters/timers

USB-1208, 1408, 1608 Series

USB-2500 Series

USB-1208HS Series

USB-1616HS Series• Up to 4 analog outputs• Included software and drivers

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