PCI-DAS6034, PCI-DAS6035,
and PCI-DAS6036

Specifications

Document Revision 1.3, October, 2023
© Copyright 2023, Measurement Computing CorporationSpecifications
Typical for 25 °C unless otherwise specified.
Specifications in italic text are guaranteed by design.

Analog inputs
A/D converter
Resolution
Number of channels
Input ranges
A/D pacing

Burst mode
A/D gate sources
A/D gating modes
A/D trigger sources
A/D triggering modes

ADC pacer out
RAM buffer size
Data transfer
DMA modes
Configuration memory(see Note 1)
Streaming-to-disk rate
Note 1:

Successive approximation type, min 200 kS/s conversion rate.
16 bits, 1-in-65536
16 single ended /8 differential, software selectable±10 V, ±5 V, ±500 mV, ±50 mV, software selectable
Internal counter – ASIC. Software selectable time base:▪ Internal 40 MHz, 50 ppm stability▪ External source via AUXIN<5:0>, Software selectable.
External convert strobe: A/D CONVERT
Software paced
Software selectable option, burst rate = 5 µS.
External digital: A/D GATE
External digital: Programmable, active high or active low, level or edge
External digital: A/D START TRIGGER
A/D STOP TRIGGERExternal digital: Software-configurable for rising or falling edge.
Pre-/Post-trigger: Unlimited number of pre-trigger samples, 16 Meg post-trigger
samples.
Available at user connector: A/D PACER OUT
8 K samples
DMA
Programmed I/ODemand or non-demand using scatter gather.
Up to 8 K elements in the queue. Programmable channel, gain, and offset.
200 kS/s, system dependent

Mixing high gains (±500 mV, ±50 mV) with low gains (±10 V, ±5 V) within the channel-gain
queue is not supported.

Accuracy
200 kS/s sampling rate, single channel operation and a 15-minute warm-up. Accuracies listed are formeasurements made following an internal calibration. They are valid for operational temperatures within ±1 °C
of internal calibration temperature and ±10 °C of factory calibration temperature. Calibrator test source highside tied to channel 0 high and low side tied to channel 0 low. Low-level ground is tied to channel 0 low at theuser connector.
Table 1. Absolute accuracy specifications
Range

Absolute Accuracy

±10 V
±5 V
±500 mV±50 mV±10.2 LSB
±10.9 LSB
±19.7 LSB
±40.6 LSB

PCI-DAS6034, PCI-DAS6035, and PCI-DAS6036

Specifications

Table 2. Absolute accuracy components specifications - all values are (±)
Range% ofReading

Offset(µV)

Averaged Noise +Quantization (µV)1

Temp Drift(%/DegC)

Absolute Accuracy
at FS (mV)

±10 V
±5 V
±500 mV±50 mV

0.02390.02620.04670.0685

531
27454
21.2

18085
12.3
6.54

0.001
0.001
0.001
0.001

3.10
1.67
0.30
0.062

1

Averaged measurements assume averaging of 100 single-channel readings.

Each PCI-DAS6034, PCI-DAS6035, and PCI-DAS6036 is tested at the factory to assure the board’s overall
error does not exceed accuracy limits described in Table 1.
Table 3. Differential non-linearity specifications
All ranges±0.5 LSB typ±1.0 LSB max

System throughput
Condition

Calibration Coefficients

ADC Rate (max)

1. Single channel, single input range
2. Multiple channel, single input range
3. Single channel, multiple input ranges

Per specified range
Per specified range
Default to value for cbAInScan() range parameter

200 kS/s
200 kS/s
200 kS/s

Note 2:For conditions 1-2 above, specified accuracy is maintained at rated throughput. Condition 3
applies a calibration coefficient which corresponds to the range value selected in cbAInScan().
This coefficient remains unchanged throughout the scan. Increased settling times may occur
during gain-switching operations.

Settling time
Settling time is defined as the time required for a channel to settle to within a specified accuracy in response toa full-scale (FS) step. Two channels are scanned at the specified rate. A –FS DC signal is presented tochannel 1; a +FS DC signal is presented to channel 0.
Condition

Same range to same range

Range

±10 V
±5 V
±500 mV±50 mV

Accuracy±0.0031%(±2.0 LSB)

±0.0062%(±4.0 LSB)

5 µS max
5 µS max
5 µS typ****
5 µS typ

PCI-DAS6034, PCI-DAS6035, and PCI-DAS6036

Specifications

Parametrics
Max working voltage(signal + common-mode)
CMRR @ 60 Hz±11 V

Small signal bandwidth, all ranges
Input coupling
Input impedance
Input bias current
Input offset current
Absolute maximum input voltage

Crosstalk±10 V range:
85 dB±5 V range:
85 dB±500 mV range: 93 dB±50 mV range: 93 dB
413 kHz
DC100 GOhm in normal operation.
2 kOhm typ in powered off or overload condition.
±200 pA±100 pA±25 V powered on, ±15 V powered off.
Protected inputs:▪ CH<15:0> IN▪ AISENSE
Adjacent channels: -75 dB
All other channels: -90 dB

Noise performance
Table 4 summarizes the noise performance for the PCI-DAS6036/6035/6034. Noise distribution is determinedby gathering 50 K samples with inputs tied to ground at the user connector. Samples are gathered at themaximum specified single-channel-sampling rate. This specification applies to both single-ended anddifferential modes of operation.
Table 4. Analog input noise performance specifications
Range

Typical Counts

LSBrms±10 V±5 V±500 mV±50 mV

771145

1.2
1.2
2.0
5.6

PCI-DAS6034, PCI-DAS6035, and PCI-DAS6036

Specifications

Analog outputs (PCI-DAS6036 & PCI-DAS6035 only)
PCI-DAS6035

PCI-DAS6036

D/A converter typeResolution
Number of channels
Voltage range
Monotonicity
DNL
Slew rate
Settling time
(full scale step)
Noise
Glitch energy

Double-buffered, multiplying
12-bits, 1-in-4096
2 voltage output±10 V
12-bits, guaranteed monotonic±1 LSB max
10 V/µs min
10 µs to ±0.5 LSB accuracy

Double-buffered, multiplying
16 bits, 1-in-65536
2 voltage output±10 V
16-bits, guaranteed monotonic±1 LSB max
15 V/µs min
5 µs to ±1.0 LSB accuracy

200 µVrms, DC to 1 MHz BW
24 mV @ 2 µS duration, mid-scale.

Current drive
Output short-circuit
duration
Output coupling
Output impedancePower up and reset±5 mA
Indefinite @ 25 mA

110 uVrms, DC to 400 kHz BW
10 mV @ 1 µS duration,
mid-scale±5 mA
Indefinite @ 25 mA

DC
0.1 ohms max
DACs cleared to 0 volts ±200 mV max

DC
0.1 ohms max
DACs cleared to 0 volts ±21 mV max

Table 5. Analog output absolute accuracy specifications
ProductRange

Absolute Accuracy

PCI-DAS6035
PCI-DAS6036

±10 V
±10 V

±1.7 LSB±7.9 LSB
Table 6. Absolute Accuracy Components

ProductRange% ofReading

Offset(mV)

Temp Drift(%/DegC)

Absolute Accuracy atFS (mV)

PCI-DAS6035
PCI-DAS6036

±10 V
±10 V

±0.022±0.013±5.93±1.10±0.0005±0.0005±8.127±2.417

Each PCI-DAS6035 and PCI-DAS6036 is tested at the factory to assure the board’s overall error does notexceed the absolute accuracy specification listed in Table 5.
Table 7. Relative accuracy specifications
ProductRange

Relative Accuracy

PCI-DAS6035
PCI-DAS6036

±10 V
±10 V

±0.3 LSB, typical-±0.5 LSB, max±2.0 LSB, max

Relative accuracy is defined as the measured deviation from a straight line drawn between measured endpointsof the transfer function.

PCI-DAS6034, PCI-DAS6035, and PCI-DAS6036

Specifications

Analog output pacing and triggering
DAC pacing(software programmable)

DAC gate source(software programmable)
DAC gating modes
DAC trigger sources
DAC triggering modes
DAC pacer out
RAM buffer size
Data transfer

DMA modes
Waveform generation throughput

Internal counter – ASIC. Selectable time base:▪ Internal 40 MHz, 50 ppm stability.
▪ External source via AUXIN<5:0>, software selectable.
External convert strobe: D/A UPDATE
Software paced
External digital: D/A START TRIGGER
Software gatedExternal digital: Programmable, active high or active low, level or edge
External digital: D/A START TRIGGER
Software triggered
External digital: Software-configurable for rising or falling edge.
Available at user connector: D/A PACER OUT
16 K samples
DMA
Programmed I/OUpdate DACs individually or simultaneously, software
Selectable.
Demand or non-demand using scatter gather.
10 kS/s max per channel, 2 channels simultaneous

Analog input / output calibration
Recommended warm-up timeCalibration
Onboard calibration referenceCalibration interval

15 minutes
Auto-calibration, calibration factors for each range stored on board in nonvolatile RAM.
DC Level: 10.000 V± 5 mv. Actual measured values stored in EEPROM.
Tempco: 5 ppm/°C max, 2 ppm/°C typicalLong-term stability: 15 ppm, T = 1000 hrs, non-cumulative
1 yearDigital input / output
Digital type
Number of I/O
Configuration

Input high voltage
Input low voltage
Output high voltage (IOH = -32 mA)
Output low voltage (IOL = 32 mA)
Data transfer
Power-up / reset state

Discrete, 5V/TTL compatible
88 bits, independently programmable for input or output. All pins pulled up to+5 V via 47 K resistors (default). Positions available for pull-down to ground.
Hardware selectable via solder gap.
2.0 V min, 7.0 V absolute max
0.8 V max, –0.5 V absolute min
3.80 V min, 4.20V typ
0.55 V max, 0.22 V typ
Programmed I/O
Input mode (high impedance)

Specifications

PCI-DAS6034, PCI-DAS6035, and PCI-DAS6036

Interrupts
Interrupts
Interrupt enable
ADC interrupt sources(software programmable)

DAC interrupt sources(software programmable)

PCI INTA# - mapped to IRQn via PCI BIOS at boot-time
Programmable through PLX9080
DAQ_ACTIVE: Interrupt is generated when a DAQ sequence is active.
DAQ_STOP:Interrupt is generated when A/D Stop Trigger In isdetected.
DAQ_DONE:Interrupt is generated when a DAQ sequence completes.
DAQ_FIFO_1/4_FULL: Interrupt is generated when ADC FIFO is ¼ full.
DAQ_SINGLE: Interrupt is generated after each conversion completes.
DAQ_EOSCAN: Interrupt is generated after the last channel is converted inmulti-channel scans.
DAQ_EOSEQ: Interrupt is generated after each interval delay duringmulti-channel scans.
DAC_ACTIVE: Interrupt is generated when DAC waveform circuitry isactive.
DAC_DONE:Interrupt is generated when a DAC sequence completes.
DAC_FIFO_1/4_EMPTY:Interrupt is generated DAC FIFO is ¼ empty.
DAC_HIGH_CHANNEL:
Interrupt is generated when the DAC high channel output
is updated.

Counters
User counter type
Number of channels
Resolution
Compatibility
CTRn base clock source(software selectable)
Internal 10 MHz clock source stability
Counter n gate
Counter n output
Clock input frequency
High pulse width (clock input)
Low pulse width (clock input)
Gate width highGate width low
Input low voltage
Input high voltage
Output low voltage
Output high voltage

82C54
216-bits
5V/TTLInternal 10 MHz, internal 100 KHz, or external connector (CTRn CLK)50 ppmAvailable at connector (CTRn GATE)
Available at connector (CTRn OUT)
10 MHz max
15 ns min
25 ns min
25 ns min
25 ns min
0.8 V max
2.0 V min
0.4 V max
3.0 V min

PCI-DAS6034, PCI-DAS6035, and PCI-DAS6036

Specifications

Configurable AUXIN<5:0>, AUXOUT<2:0> external trigger/clocks
The PCI-DAS6036/6035/6034 provides nine user-configurable trigger/clock pins available at the 100-pin I/Oconnector. Of these, six are configurable as inputs while three are configurable as outputs.
AUXIN<5:0> sources(software selectable)

AUXOUT<2:0> sources(software selectable)

Default selections:Compatibility
Edge-sensitive polarity
Level-sensitive polarity
Minimum input pulse width

A/D CONVERT:
A/D TIMEBASE IN:
A/D START TRIGGER:
A/D STOP TRIGGER:
A/D PACER GATE:
D/A START TRIGGER
D/A UPDATE:
D/A TIMEBASE IN:
STARTSCAN:
SSH:

External ADC convert strobe
External ADC pacer timebase
ADC Start Trigger
ADC Stop Trigger
External ADC gate
DAC trigger/gate
DAC update strobe
External DAC pacer timebase
A pulse indicating start of conversion
Active signal that terminates at the start of the lastconversion in a scan.
Indicates end of scan
ADC convert pulse
Delayed version of ADC convert
CTR1 clock source
D/A update pulse
CTR2 clock source
ADC Start Trigger Out
ADC Stop Trigger Out
DAC Start Trigger Out
A/D CONVERT
A/D START TRIGGER
A/D STOP TRIGGER
D/A UPDATE
D/A START TRIGGER
A/D PACER GATE
D/A UPDATE
A/D CONVERTSCANCLK

A/D STOP:
A/D CONVERT:SCANCLK:CTR1 CLK:
D/A UPDATE:CTR2 CLK:
A/D START TRIGGER:
A/D STOP TRIGGER:
D/A START TRIGGER:
AUXIN0:
AUXIN1:
AUXIN2:
AUXIN3:
AUXIN4:
AUXIN5:
AUXOUT0:
AUXOUT1:
AUXOUT2:
5V/TTL
Rising/falling, software selectable
Active high/active low, software selectable
37.5nsDAQ-Sync inter-board triggers/clocksThe DAQ-Sync bus provides inter-board triggering and synchronization capability. Five trigger/strobe I/O pins
and one clock I/O pin are provided on a 14-pin header. The DAQ-Sync signals use dedicated pins. Only thedirection may be set.
DAQ-Sync Signals:

DS A/D START TRIGGER
DS A/D STOP TRIGGER
DS A/D CONVERTDS D/A UPDATEDS D/A START TRIGGERSYNC CLK

PCI-DAS6034, PCI-DAS6035, and PCI-DAS6036

Specifications

Power consumption+5 V+5 V available at I/O connector

0.9 A typical, 1.1 A max. Does not include power consumed through theI/O connector.
1 A max, protected with a resettable fuse

Environmental
Operating temperature range
Storage temperature range
Humidity

0 to 55 °C-20 to 70 °C
0 to 90% non-condensing

Mechanical
Card dimensions

PCI half card: 174.4 mm (L) x 100.6 mm (W) x 11.65 mm (H)DAQ-Sync connector and pin outConnector typeCompatible cable

14-pin right-angle 100 mil box header
MCC p/n: CDS-14-x, 14-pin ribbon cable.
x = number of boards (2 - 5)

Pin1234567891011121314Signal NameDS A/D START TRIGGER
GND
DS A/D STOP TRIGGER
GND
DS A/D CONVERTGND
DS D/A UPDATEGND
DS D/A START TRIGGER
GND
RESERVEDGND
SYNC CLK
GND

Main connector and pin out
Connector typeCompatible cables

Compatible accessory products(with the C100HD50-x cable)

Compatible accessory products(with the C100MMS-x cable)

Shielded SCSI 100 D-type
C100HD50-x, unshielded ribbon cable.
x = 3 or 6 feet
C100MMS-x, shielded round cable.
x = 1, 2 or 3 meters
ISO-RACK16/P
ISO-DA02/P (PCI-DAS6036/6035 only)
BNC-16SE
BNC-16DI
CIO-MINI50
CIO-TERM100
SCB-50
SCB-100

PCI-DAS6034, PCI-DAS6035, and PCI-DAS6036

Specifications

8-channel differential mode pin outPin
1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950Signal Name
LLGND
CH0 IN HI
CH0 IN LO
CH1 IN HI
CH1 IN LO
CH2 IN HI
CH2 IN LO
CH3 IN HI
CH3 IN LO
CH4 IN HI
CH4 IN LO
CH5 IN HI
CH5 IN LO
CH6 IN HI
CH6 IN LOCH7 IN HI
CH7 IN LO
LLGNDn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cAISENSED/A OUT 0*
D/A GND*
D/A OUT1*PC +5 V
AUXOUT0 / D/A PACER OUT
AUXOUT1 / A/D PACER OUT
AUXOUT2 / SCANCLKAUXIN0 / A/D CONVERTn/c
AUXIN1 / A/D START TRIGGER
AUXIN2 / A/D STOP TRIGGER
AUXIN3 / D/A UPDATEAUXIN4 / D/A START TRIGGER
AUXIN5 / A/D PACER GATE
GND

* = n/c on PCI-DAS6034

Pin515253545556575859606162
636465666768
69707172737475
7677787980
8182
838485868788899091929394
95
96979899
100

Signal Namen/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/c
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
DIO6
DIO7
CTR1 CLK
CTR1 GATE
CTR1 OUTGND
CTR2 CLK
CTR2 GATECTR2 OUT
GNDPCI-DAS6034, PCI-DAS6035, and PCI-DAS6036

Specifications

16-channel single-ended modePin1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950Signal Name
LLGND
CH0 IN
CH8 IN
CH1 IN
CH9 INCH2 IN
CH10 IN
CH3 IN
CH11 IN
CH4 IN
CH12 IN
CH5 IN
CH13 IN
CH6 IN
CH14 IN
CH7 IN
CH15 IN
LLGND
n/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cAISENSE
D/A OUT 0*
D/A GND*
D/A OUT1*PC +5 V
AUXOUT0 / D/A PACER OUT
AUXOUT1 / A/D PACER OUT
AUXOUT2 / SCANCLKAUXIN0 / A/D CONVERTn/c
AUXIN1 / A/D START TRIGGER
AUXIN2 / A/D STOP TRIGGER
AUXIN3 / D/A UPDATEAUXIN4 / D/A START TRIGGER
AUXIN5 / A/D PACER GATE
GND

* = n/c on PCI-DAS6034

Pin51
52535455
5657585960616263646566676869707172737475767778798081828384858687888990919293949596979899
100Signal Namen/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/cn/c
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
DIO6
DIO7
CTR1 CLK
CTR1 GATE
CTR1 OUTGND
CTR2 CLK
CTR2 GATECTR2 OUT
GND

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Norton, Massachusetts 02766(508) 946-5100
Fax: (508) 946-9500
E-mail: info@mccdaq.com
www.mccdaq.com
PCI-DAS603x-spec.docx