DBK17

4-Channel Simultaneous Sample and Hold CardOverview ...... 1
Simultaneous Sample and Hold ...... 2
Hardware Setup ...... 2
Card Connection ...... 2
Card Configuration ...... 2
CE Compliance ...... 3
DaqBook/100 Series & /200 Series and DaqBoard [ISA type] Configuration ...... 4
DaqBook/2000 Series and DaqBoard/2000 Series Configuration ...... 4

Software Setup ...... 4
DBK17 – Specifications ...... 5
Reference Notes:
o Chapter 2 includes pinouts for P1, P2, P3, and P4. Refer to pinouts applicable to yoursystem, as needed.
o In regard to calculating system power requirements, refer to DBK Basics located near
the front of this manual.

Overview
Each DBK17 simultaneous sample-and-hold (SSH) card provides 4 channels of voltage input to aLogBook or a Daq device system. Each of the 16 analog input channels can accept four DBK17 cards fora maximum of 256 analog input channels. The simultaneous sample-hold function is activated at thebeginning of each channel scan and freezes all signals present on DBK17 inputs for the duration of thescan, allowing for non-skewed readings of all channels.
A DBK17 channel should never be the first channel in a scan due to timing of theSSH line.
DBK17 features an instrumentation amplifier for each channel, with switch-selected gains of×1, ×10, ×100, ×200 and ×500. A socket is provided for a user-selected gain resistor for custom gain
selection instead of the unity gain (×1) setting.
Four separate sample-hold stages follow the 4 input stages. The outputs are connected to a 4-channel
multiplexer stage. The enabled-output MUX allows up to 4 DBK17s to share a common analog input
channel.
Input can be connected to a channel’s BNC connector or terminal block. The differential inputs areprovided with switchable100 KΩ bias resistors to analog common. User gain can be set to any value
between unity and ×500 by installing a resistor in the user-location of each channel.

DBK17 Block Diagram
DBK Option Cards and Modules

879895

DBK17, pg. 1

Simultaneous Sample and HoldSome applications require every channel in a scan group to be read at the same instant, as opposed to being
read with a delay, e.g., 10 µs between channels. Simultaneous Sample and Hold (SSH) is a means ofobtaining such instantaneous data on multiple channels while avoiding time-skew problems.
A sample case in which SSH is desirable:
A performance analysis of an engine is a classic example of a case in which SSH is desirable. In ourengine analysis example data is gathered on the following parameters:
••
•
•
•
•

•

cylinder pressure
cylinder temperature
piston strain
piston stroke position
valve positionengine rpm
vibration

For a more exact correlation of the data, it needs to be obtained at the same instant, without time-skew. Byusing SSH each input signal continuously passes through an instrumentation amplifier and into a sampleand-hold stage. When the sample enable line goes high, each channel’s sample-and-hold stage will
“freeze” the current analog value. The values for all channels are separately “latched” within 50 ns of eachother. The signals are held [in a stable condition] while the multiplexer switches through all channels andsends the signals [one-by-one] to the acquisition device. At the device, the ADC digitizes each reading.
The resulting data is a snapshot of conditions at a selected instant although the multiplexing and analog-todigital conversions are spread out over a longer interval. The simultaneous sample and hold circuit allows
you to gather up to 256 simultaneous samples via sixty-four DBK17s.

Hardware Setup
Card Connection
The DBK17 is equipped with BNC connectors and terminal block connectors access to each of the four
differential analog inputs. Note that the terminal block is a connection-option to the BNC connector.

Card Configuration
Factory Defaults•

100K bias resistors – Enabled•

SSH — Enabled. No disable option.

•Gain – x1

Input Termination

OPEN

1 2 3 4 5 6 7 8Terminal
Block+ _SW5

DBK17 provides two 100 KΩ bias resistors foreach analog input. For balanced 200 KΩ input
impedance, both resistors should be switched in.
An 8-position DIP switch (SW5) can selectivelyengage the bias resistors. The input circuit andswitch positions are shown in the figure. Theswitches must be in the closed position to engage
the termination resistors. For unbalanced highinput, only the (-) resistor should be used. Ifneither resistor is used, some external bias current
path is required.

44+33+
22+
11+

N+-100 kΩ
AA

Input Impedance/Termination

DBK17, pg. 2879895

DBK Option Cards and Modules

Examples of Bias Resistor Selection Options

Gain Settings
On the card, each channel has a gain-set switch and holes for gain resistors labeled
RG1 to RG4. The figure at the right shows gain values for switch settings 0 to 4,
with 0 being equal to x1 and 4 being equal to x500. If a custom gain is desired,
the switch is set to position 0 and a gain resistor must be mounted and soldered
onto the card. The value of the gain resistor is determined by the formula:
RGAIN = [40,000 / (Gain -1)] - 50 ΩAddress Configuration
As many as four DBK17s can be connected to each analog channel. With sixteenchannels (and four inputs per DBK17) 256 inputs are possible. Since this is adaisy-chain interface, each card must have a unique address (channel and cardnumber). Note that the default setting for SW6 is Card 1.
To configure the card, locate the 16 × 2-pin header (labeled J1) near the front ofthe board. The 16 jumper locations on this header are labeled CH0 throughCH15. Place the jumper on the channel you wish to use. Only one jumper isused on a single card. Four cards in the daisy-chain can have the same channel
number as long as their card number is unique.
Set switch SW6 for each of four DBK17s on a single channel. Verify that only
one card in the system is set to a particular channel and card number.

CE Compliance
Reference Notes:
Should your data acquisition system need to comply with CE standards, refer tothe CE Compliance section of the Signal Management chapter.

DBK Option Cards and Modules879895

DBK17, pg. 3

DaqBook/100 Series & /200 Series and DaqBoard [ISA type] Configuration
Use of the DBK17 requires setting jumpers in DaqBook/100 Series & /200 Series devices andISA-Type DaqBoards.
1.

If not using auxiliary power, ensure that the JP1 jumper is in the expanded analog mode (see figure).
Note:
These jumpers do not
apply to /2000 Series
devices.

Jumpers on DaqBook/100 Series, /200 Series, & ISA-Type DaqBoards
Note: The JP1 default position (above figure) is necessary to power the interface circuitry of the DBK17via the internal +15 VDC power supply. See the following CAUTION regarding JP1.

CAUTION
If using auxiliary power, for example a DBK32A or a DBK33, you must remove
both JP1 jumpers. Refer to Power Requirements in the DBK Basics section and tothe DBK32A and DBK33 sections as applicable.
2. Place the DaqBook/100 Series or DaqBook/200 Series device’s JP2 jumper in the SSH position.

CAUTION
Do not use an external voltage reference for DAC1. Applying an external voltage
reference for DAC1 when using SSH output will result in equipment damage due toa conflict on P1, pin #26.
3. For DaqBook/100, /112 and /120 only, ensure that the JP4 jumper is in single-ended mode.

DaqBook/2000 Series and DaqBoard/2000 Series Configuration
No hardware configurations are required for the DaqBook/2000 Series or DaqBoard/2000 Series devices.

Software Setup
Reference Notes:
o DaqView users - Refer to chapter 3, DBK Setup in DaqView.
o LogView users - Refer to chapter 4, DBK Setup in LogView.

DBK17, pg. 4879895DBK Option Cards and Modules

DBK17 – Specifications
Name/Function: Simultaneous Sample-Hold Card
Number of Channels: 4Input Connections: 4 BNC connectors, 4 screw-terminal sets
Output Connector: DB37 male, which mates with P1 using CA-37-x
cable
Number of Cards Addressable: 64
Input Type: Differential
Voltage Input Ranges:
0 to ±5000 mVDC
0 to ±500 mVDC
0 to ±50 mVDC
0 to ±25 mVDC
0 to ±10 mVDC
Input Amplifier Slew Rate: 12 V/µs minimum
Acquisition Time:
0.6 µs (10 V excursion to 0.1%)
0.7 µs (10 V excursion to 0.01%)
Channel-to-Channel Aperture Uncertainty: 50 ns
Output Droop Rate: 0.1 µV/µsInput Gains: ×1, ×10, ×100, ×200, ×500 & User-Set
Input Offset Voltage: 500 µV + 5000/G maximum (nullable)
Input Offset Drift: ±5 + 100/G µV/°C maximum
Input Bias Current: 100 pA maximum
Input Offset Currents: 50 pA maximum
12
Input Impedance: 5 × 10 parallel with 6 pF
Switchable Bias Resistors: 100 KΩ (each to analog common)

DBK Option Cards and Modules

879895Gain Errors:
0.04% @ ×1
0.1% @ ×10
0.2% @ ×100
0.4% @ ×200
1.0% @ ×500
Gain vs Temperature:
×1 @ ±20 ppm/°C×10 @ ±20 ppm/°C
×100 @ ±40 ppm/°C
×200 @ ±60 ppm/°C
×500 @ ±100 ppm/°C
Non-Linearity:
×1 to ±0.015% full-scale
×10 to ±0.015% full-scale
×100 to ±0.025% full-scale
×200 to ±0.025% full-scale
×500 to ±0.045% full-scale
Common-Mode Rejection Ratio(CMRR):
70 dB minimum @ ×1
87 dB minimum @ ×10
100 dB minimum @ ×100
100 dB minimum @ ×200
100 dB minimum @ ×500

DBK17, pg. 5

DBK17, pg. 6879895

DBK Option Cards and Modules