PCIM-DAS16JR/16

Specifications

Document Revision 1.0, February, 2010
© Copyright 2010, Measurement Computing Corporation

Specifications
Typical for 25 °C unless otherwise specified.
Specifications in italic text are guaranteed by design.

Power consumption+5V quiescent+5V available at 37-pin I/O connector

500 mA typical, 750 mA max. Does not include the current
consumed through 37-pin I/O connector.
1 A max, protected with re-settable fuse

Analog input
A/D converter typeResolution
Number of channels
Input ranges
 Gain is software selectable Unipolar / bipolar polarity is software selectable
A/D Pacing (software programmable)

A/D Trigger(only available when internal pacing selected,
software enable/disable)
A/D Gate (only available when internal pacing
selected, software enable/disable)
Simultaneous Sample and Hold trigger

Burst mode
Data transfer

Interrupt
Interrupt enable
Interrupt polarity
Interrupt sources(software programmable)

A/D conversion timeThroughput
Input coupling
Input bandwidth (all ranges)
Common mode range
CMRR @ 60 Hz
Recommended warm-up time

LTC1605ACSW
16 bits
16 single-ended / 8 differential, switch selectable±10 V, ±5 V, ±2.5 V, ±1.25 V
0 to 10 V, 0 to 5 V, 0 to 2.5 V, 0 to 1.25 VInternal counter - 82C54.
Positive or negative edge, jumper selectable.
External source (pin 25),
Positive or negative edge, software selectable.
Software polled
External edge trigger (pin 25),
Positive or negative edge, software selectable.
External gate (pin 25),
High or Low level, software selectable.
TTL output (pin 26)
Logic 0 = Hold, Logic 1 = Sample
Compatible with CIO-SSH16
Software selectable option, burst interval = 10 µS
From 1024 sample FIFO via interrupt w/ REPINSWInterrupt
Software polled
INTA# - mapped to IRQn via PCI BIOS at boot-time
Programmable through PLX9030
Active high level or active low level, programmable through
PLX9030
 End of conversion
 FIFO not Empty
 End of Burst End of Acquisition
 FIFO Half Full
10 µs max.
100 kS/s
DC325 kHz
±10 V min.
-100 dB typ., -80 dB min
15 minutes

1

PCIM-DAS16JR/16

Specifications

Input bias current
Input impedance
Absolute maximum input voltage±3 nA max.
10 M Ohms min.
+55/-40V fault protected via input mux.

Accuracy
Typical accuracy
Absolute accuracy
Accuracy components
Gain Error
Offset Error
PGA linearity error
Integral Linearity Error
Differential Linearity Error±2.3 LSB±5.0 LSB
Trimmable by potentiometer to 0
Trimmable by potentiometer to 0
±1.3 LSB typ., ±10.0 LSB max.
±0.5 LSB typ., ±3.0 LSB max.
±0.5 LSB typ., ±2.0 LSB max.

Each PCIM-DAS16JR/16 is tested at the factory to ensure the board’s overall accuracy error does not exceed±5 LSB. Total board error is a combination of gain, offset, differential linearity and integral linearity error. The
theoretical absolute accuracy of the board may be calculated by summing these component errors. Worst caseerror is realized only in the unlikely event that each of the component errors are at their maximum level, andcausing error in the same direction.

Analog input drift
Range

Analog Input Full-Scale
Gain drift

Analog Input Zero drift

Overall Analog Input drift±10.00 V±5.000 V±2.500 V±1.250 V
0 - 10.00 V
0 - 5.000 V
0 - 2.500 V
0 - 1.250 V

2.2 LSB/°C max.
2.2 LSB/°C max.
2.2 LSB/°C max.
2.2 LSB/°C max.
4.1 LSB/°C max.
4.1 LSB/°C max.
4.1 LSB/°C max.
4.1 LSB/°C max.

1.8 LSB/°C max.
1.9 LSB/°C max.
2.0 LSB/°C max.
2.3 LSB/°C max.
1.9 LSB/°C max.
2.1 LSB/°C max.
2.4 LSB/°C max.
3.0 LSB/°C max.

4.0 LSB/°C max.
4.1 LSB/°C max.
4.2 LSB/°C max.
4.5 LSB/°C max.
6.0 LSB/°C max.
6.2 LSB/°C max.
6.5 LSB/°C max.
7.1 LSB/°C max.

Absolute error change per °C temperature change is a combination of the gain and offset drift of manycomponents. The theoretical worst case error of the board may be calculated by summing these component
errors. Worst case error is realized only in the unlikely event that each of the component errors are at theirmaximum level, and are causing error in the same direction.

2

PCIM-DAS16JR/16

Specifications

Noise performance
The following table summarizes the worst case noise performance for the PCIM-DAS16JR/16. Noise
distribution is determined by gathering 50000 samples with inputs tied to ground at the PCIM-DAS16JR/16
main connector. Data represents both single-ended and differential modes of operation.
RangeLSBrms

Typical Counts±10.00 V±5.000 V±2.500 V±1.250 V
0 - 10.00 V
0 - 5.000 V
0 - 2.500 V
0 - 1.250 V

1.30
1.30
1.30
1.30
1.80
1.80
1.80
1.80

1212
12131515
15
16

Settling time
Settling time is defined here as the time required for a channel to settle to within a specified accuracy inresponse to a full-scale (FS) step. Two channels are scanned at a specified rate with a –FS DC signal presented
to channel 1 and a +FS DC signal presented to channel 0.
Condition

Same range tosame range

Range

Accuracy±0.00076%(±4 LSB)±0.0015%(±8 LSB)±0.0061%(±16 LSB)

±10 V
±5 V
±2.5 V±1.25 V

Typ.
Typ.
Typ.
Typ.

400 µS
100 µS
60 µS
50 µS

100 µS
20 µS
12 µS
10 µS

10 µS
10 µS
10 µS

0 to 10 V
0 to 5 V
0 to 2 V
0 to 1.25 V

Typ.
Typ.
Typ.
Typ.

400 µS
100 µS60 µS
50 µS

100 µS
20 µS
12 µS
10 µS

10 µS
10 µS
10 µS

Digital input / output
Main connector
Digital output type
Digital input type
Number of I/OConfiguration
Output high voltage
Output low voltage
Input high voltage
Input low voltage
Data transfer
Power-up / reset state

5V/TTL compatible
5V/TTL compatible, pulled to logic high via 10 K resistor network
84 fixed input, 4 fixed output
3.8 volts min. @ -32 mA
0.55 volts max. @ 32 mA
2.0 volts min., 7 volts absolute max.
0.8 volts max., -0.5 volts absolute min.
Programmed I/O
DIG OUT [3:0] - TTL logic low state3

PCIM-DAS16JR/16

Specifications

CounterCounter type
Configuration
Counter 1 source(software selectable)
Counter 1 gate
Counter 1 output
Counter 2 source(jumper selectable at P2)
Counter 2 gate
(software enable/disable)
Counter 2 output
Counter 3 source
Counter 3 gate
(software enable/disable)
Counter 3 output
Clock input frequency
High pulse width (clock input)
Low pulse width (clock input)
Gate width highGate width lowInput highInput low
Output highOutput low
Crystal oscillator frequency
Frequency accuracy

82C54
3 down counters, 16-bits each External source from main connector (pin 21*)
 100 kHz internal source
External gate from main connector (pin 24*)
Available at main connector (pin 2)
 Internal 1 MHz
 Internal 10 MHz
External source from main connector (pin 25*)
Internal only, chained to counter 3 source
Counter 2 output
External source from main connector (pin 25*)
Available at main connector (pin 20).
Programmable as ADC Pacer clock.
10 MHz max.
30 ns min.
50 ns min.
50 ns min.
50 ns min.
2.0 volts min., 5.5 volts absolute max.
0.8 volts max., -0.5 volts absolute min.
3.0 volts min. @ -2.5 mA
0.4 volts max. @ 2.5 mA
10 MHz50 ppm* Pins 21, 24, and 25 are pulled to logic high via 10 K resistors.

Environmental
Operating temperature range
Storage temperature range
Humidity

0 to 70 °C-40 to 100 °C
0 to 95% non-condensing

Mechanical
Card dimensions
Form factor

PCI half card: 136.5 mm (L) x 106.9 mm (W) x 11.65 mm (H)Universal PCI keying. Compatible with 3.3 V/5 V 32-bit, 33 MHz back planes.

Main connector and pin out
Connector type
Connector compatibility
Compatible accessory productsCompatible cables

37-pin male "D" connector
Identical to the CIO-DAS16JR/16 connector
CIO-MINI37
CIO-SCB37
CIO-SSH-16
C37FF-x
C37FFS-x

4

PCIM-DAS16JR/16

Specifications

8-channel differential mode pin outPin12345678910111213141516171819Signal Name+5V PC BUS POWER
CTR 1 OUTDIG OUT 3
DIG OUT 1
DIG IN 3
DIG IN 1
DIG GNDNCNC
NC
CH7 LO
CH6 LO
CH5 LO
CH4 LO
CH3 LO
CH2 LO
CH1 LOCH0 LOAGND

Pin202122232425262728293031323334353637Signal NameCTR 3 OUT
CTR 1 CLOCK INDIG OUT 2DIG OUT 0DIG IN 2 / CTR1 GATEDIG IN 0 / EXT TRIG / EXT PACER / EXT GATE
SS&H OUTNCAGND
AGND
CH7 HIGH
CH6 HIGH
CH5 HIGH
CH4 HIGH
CH3 HIGH
CH2 HIGH
CH1 HIGH
CH0 HIGH

16-channel single-ended mode pin out
Pin12345678910111213141516171819Signal Name+5V PC BUS POWER
CTR 1 OUTDIG OUT 3
DIG OUT 1DIG IN 3DIG IN 1
DIG GNDNCNC
NCCH15 HIGH
CH14 HIGH
CH13 HIGH
CH12 HIGH
CH11 HIGH
CH10 HIGH
CH9 HIGH
CH8 HIGH
AGND

Pin202122232425262728293031323334353637Signal NameCTR 3 OUT
CTR 1 CLOCK INDIG OUT 2DIG OUT 0DIG IN 2 / CTR1 GATEDIG IN 0 / EXT TRIG / EXT PACER / EXT GATE
SS&H OUT
NC
AGND
AGND
CH7 HIGH
CH6 HIGH
CH5 HIGH
CH4 HIGH
CH3 HIGH
CH2 HIGH
CH1 HIGH
CHO HIGH5Measurement Computing Corporation
10 Commerce Way
Suite 1008
Norton, Massachusetts 02766(508) 946-5100
Fax: (508) 946-9500
E-mail: info@mccdaq.com
www.mccdaq.com
PCIM-DAS16JR_16-spec.doc