JEITA LPB相互設計セミナー

相互設計の課題とソリューション
～なぜ我々はLPBを始めたのか? ～2012/3/14
JEITA LPB相互設計ワーキンググループ

1Copyright©2012 JEITA/EDA/LPB All Rights ReservedWhy we need LPB format?
Working with LPB format.
SOMETHIN’

ELSEC-Format
G-Format
R-Format
N-Format
M-Format

JEITA LPB 20122

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Why we need LPB format?

We need a something forthe communication.
SOMETHIN’SOMETHIN’

ELSE
ELSE
C-Format
C-Format
G-Format
R-Format
N-Format
M-Format
LPB 2012
2012
JEITA LPB
3Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the communication.

System designer

I need a new LSI
for my product4Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the communication.

LSI designer

System designer

The architect of
this LSI is .....
Picture(Visio)
DQ[0:8]CK/N

RST

ADR[0:8]
TST
SIG[0:16]

FB
5Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the communication.
LSI designer
System designer
Our requirements
are ....

Text (WORD)
Body size : 15mm^2Voltage : 1.5V
Clock frequency : 3Mhz
Power consumption : 1.2mW
Needs impedance matching for ...
6Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the communication.

System designer

LSI designer

How is this package?

Picture (Power Point)
Number of layer is ..
Package thickness is ..
Ball pitch is .

7Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the communication.

LSI designer

System designer
Picture(Visio)
DQ[0:8]
CK/N
RST

FB

ADR[0:8]

TST
SIG[0:16]

Text (WORD)
Body size : 15mm^2Voltage : 1.5V
Clock frequency : 3Mhz
Power consumption : 1.2mW
Needs impedance matching for ...

We are using many documents forthe communication.
Picture(Power Point)
Number of layer is ..
Package thickness is ..
Ball pitch is .

8Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the communication.

System designer

LSI designer

Swap the A1 pin andthe B5 pin.

E-mail without documents
maintenance.
9

Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the communication.
LSI designer

System designer

I would like to confirm.
Is A1 this ?

?

???

FAX without documents
maintenance.
10Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the communication.

LSI designer

System designer
Picture (Visio)
DQ[0:8]

Text ADR[0:8](WORD)
CK/N
Picture(Visio)
Body size : 15mm^2Voltage TST: 1.5V
SIG[0:16]
Clockfrequency : 3Mhz
FB ADR[0:8]Power consumption : 1.2mW
CK/N
impedance matching
BodyNeeds
size: 15mm^2TST
for :...1.5V
RST Voltage

RST
DQ[0:8]

Text (WORD)

Picture(Power Point)
Picture(PowerPoint)
FB

SIG[0:16]
Clockfrequency : 3Mhz
Power consumption : 1.2mW
Needs impedance matchingNumber of layer is ..
for ...
Number of layer is ..Package thickness is ..

We spend many times forthe communication.
Ball
Package thickness is.. pitch is .
Ball pitch is .

11Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the communication.
LSI designer

System designer

DQ[0:8]

We were looking for the format.
But we could not find it.
CK/N

RSTFB

ADR[0:8]

TST
SIG[0:16]

Body size : 15mm^2Voltage : 1.5V
Clock frequency : 3Mhz
Power consumption : 1.2mW
Needs impedance matchingfor ...

"We have to communicate
with one document"
12Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the communication.

PCB

LSI

Gerber
DXF
etc...

VHDL
DEF
GDS
etc...

All formats are used to define theinside of object.
13

Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the communication.
SystemPackage

GerberEDIF
DXF
etc...

Gerber
DXF
etc...

LSI

Verilog
VHDL
DEF
GDS
etc...

need a soothing
use toThe We
somethingis LPB toC-Format.
definethe boundary.
We call theboundary
as a socket.
14

Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the communication.
LSI designer
System designer

LPB C-Format
DQ[0:8]
CK/NADR[0:8]
TST
RST
SIG[0:16]

FB

Body size : 15mm^2Voltage : 1.5V
Clock frequency :LPB C-Format
C is component or communication

15

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Why we need LPB format?

We need a something
between EDA tools.
SOMETHIN’ELSE

G-Format

JEITA LPB 2012
16Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something between EDA tools.

Modeling

DO NOTENTERCADArtwork
17

Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something between EDA tools.

Why we need toredraw it formodeling ?

18Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something between EDA tools.

Why is theunnecessarylayer contained?
Modeling

CAD
Artwork

19

Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something between EDA tools.
Modeling

LPB G-Format

CAD
Artwork

LPB G-Format
G is geometry
20

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Why we need LPB format?

We need a somethingfor the reference.
SOMETHIN’

ELSE

R-Format
JEITA LPB 2012
21

Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the reference.
Package vendor

Could you sendme a design rule?

22Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the reference.

Package vendor
Picture (PDF)

Sheet (Excel)

Data Book23

Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the reference.

Picture (PDF)
Which one is thebest for my project?

Sheet (Excel)

Data Book
It is difficult to compare thembecause the rules are defined bydifferent form.
24

Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the reference.
Package vendor

I have same questions.
How many space isrequired ....

We have to spend long time tounderstand the design rule.
25

Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the reference.

Why I needs to enter same rulefor every tools?

Design Rule

The data entry methods arenot same.

26

Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the reference.

Hey rule is changed.
Here is new one.

sigh...

Design Rule

We forget a re-setup.
27

Copyright©2012 JEITA/EDA/LPB All Rights ReservedWe need something for the reference.
Package vendor

LPB R-Format

LPB R-Format
R is rule

28

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Why we need LPB format?

N-Format
N is netlist.
SOMETHIN’M-Format
M is management.

ELSE

N-Format
M-Format

JEITA LPB 201229

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.

30

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
System designer
DQ[0:8]CK/N ADR[0:8]
TST
RST
SIG[0:16]
FB

I need a new LSI
for my product31

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
System designer
DQ[0:8]<module name="NEWLSI type="LIS">
ADR[0:8]
CK/N<socket inst="IO">
TST<port name=DQ[0]/>
RST
SIG[0:16]<port name=DQ[1]/>FB:</socket></module>

I need a new LSI
for my product32

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
System designer

その他

レギュレーターチップA（コントローラー）

チップB（メモリー）

8本データ

その他

Core：1.2V
その他GPIO：3.3V
I/O：1.5V

クロック（差動)800MHz
Core：1.2V
I/O：1.5V
4本アドレス

8本データ

Hum.. According to thisfloorplan, the body size of
new LSI should be ....
33

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
System designer<shape><rectangle id="BodySizeOfNEWLSI" width=".." height="..."/></shape>:<module name="NEWLSI type="PKG"
shape_id="BodySizeOfNEWLSI"><socket inst="IO"><port name=DQ[0]/><port name=DQ[1]/>:</socket>
floorplan, the body size of</module>
その他

レギュレーターチップA（コントローラー）

チップB（メモリー）

8本データ

その他

Core：1.2V
その他GPIO：3.3V
I/O：1.5V

クロック（差動)800MHz
Core：1.2V
I/O：1.5V
4本アドレス

8本データ

Hum.. According to thisnew LSI should be ....

34

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
System designer

Hum.. according to presimulation, this line needs
impedance matching...

35

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
<shape>Systemdesigner<rectangle
id="BodySizeOfNEWLSI"
width=".." height="..."/></shape>:<module name="NEWLSI type="PKG"
shape_id="BodySizeOfNEWLSI"><socket inst="IO"><port name=DQ[0]/><port name=DQ[1]/>:</socket><constraint>
Hum.. according to pre<impedance port_name="DQ[0]" type="single" typ="50"/>
simulation, this line needs:</constraint>
impedance matching...
</module>

36

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
LSI designer

System designer

Here is the specification of
new LSI.

LPB C-Format<shape><rectangle id="BodySizeOfNEWLSI" width=".." height="..."/></shape>:<module name="NEWLSI type="PKG"
shape_id="BodySizeOfNEWLSI"><socket inst="IO"><port name=DQ[0]/><port name=DQ[1]/>:</socket><constraint><impedance port_nae="DQ[0]" type="single" typ="50"/>:</constraint></module>

37

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
LSI designer

This package is thebest for this project.
38

Copyright©2012 JEITA/EDA/LPB All Rights Reserved<circle id"BallSize" diameter="..."/></shape> with LPB Format.
Working<padstack_def><padstack id="BallPad" type="BALL_PAD"><ref_shape shape_id="BallSize" layer="BOTTOM"/></padstack>Package designer</padstack_def>:<module name="NEWLSI" type="PKG" shape_id="BodySizeOfNEWLSI"><socket inst="IO"><default><port_shape padstack_id="BallPad" /></default><port name=DQ[0]/><port name=DQ[1]/>:<port id="A1" x=".." y=".."/><port id="A2" x=".." y=".."/>:</socket><constraint><impedance port_nae="DQ[0]" type="single" typ="50"/>:</constraint></module>

This type of package isbest for this project.

39

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
Chip Layout engineer

LSI designer

How is this padplacement ?

40

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
<shape>:Chip designer</shape>
Package designer<padstack_def>:</padstack_def> How is this pad:placement ?
<module name="NEWLSI type=“LSI"
shape_id="DieSize"><socket inst="IO"><default><port_shape padstack_id="Pad" /></default><port id="P1" name="DQ_0" x=".." y=".."/><port id="P2" name="DQ_1" x=".." y=".."/>:</socket></module>
41

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
System designer

How is this package?

LPB C-Format<shape><rectangle id="BodySizeOfNEWLSI" width=".." height="..."/><circle id"BallSize" diameter="..."/></shape><padstack_def><padstack id="BallPad" type="BALL_PAD"><ref_shape shape_id="BallSize" layer="BOTTOM"/></padstack></padstack_def>:<module name="NEWLSI" type="PKG" shape_id="BodySizeOfNEWLSI"><socket inst="IO"><default><port_shape padstack_id="BallPad" /></default><port name=DQ[0]/><port name=DQ[1]/>:<port id="A1" x=".." y=".."/><port id="A2" x=".." y=".."/>:</socket><constraint><impedance port_nae="DQ[0]" type="single" typ="50"/>:</constraint></module>

42

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
System designer<shape><rectangle id="BodySizeOfNEWLSI" width=".." height="..."/><circle id"BallSize" diameter="..."/></shape><padstack_def><padstack id="BallPad" type="BALL_PAD"><ref_shape shape_id="BallSize" layer="BOTTOM"/></padstack></padstack_def>:<module name="NEWLSI" type="PKG" shape_id="BodySizeOfNEWLSI"><socket inst="IO"><default><port_shape padstack_id="BallPad" /></default><port name=DQ[0]/><port name=DQ[1]/>:<port id="A1" x=".." y=".."/><port id="A2" x=".." y=".."/>:</socket><constraint><impedance port_nae="DQ[0]" type="single" typ="50"/>:</constraint></module>

LPB C-Format

Re-build the package symbol using
the C-Format.
43

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
System designer

Consider the net assignment topackage pin.
44Copyright©2012 JEITA/EDA/LPB All Rights Reserved

<shape><rectangle id="BodySizeOfNEWLSI" width=".." height="..."/><circle id"BallSize" diameter="..."/></shape><padstack_def>
System designer<padstack id="BallPad" type="BALL_PAD"><ref_shape shape_id="BallSize" layer="BOTTOM"/></padstack></padstack_def>:<module name="NEWLSI" type="PKG"
shape_id="BodySizeOfNEWLSI"><socket inst="IO"><default><port_shape padstack_id="BallPad" /></default><port name=DQ[0] id="A1" x=".." y=".."/><port
name=DQ[1]id="B2"y=".." />Considerthenet x=".."
assignment
to:package pin.
</socket><constraint><impedance port_nae="DQ[0]" type="single" typ="50"/>
45:
Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
LSI designer

System designer

Could you design thepackage using this pin
assignment ?

LPB C-Format<shape><rectangle id="BodySizeOfNEWLSI" width=".." height="..."/><circle id"BallSize" diameter="..."/></shape><padstack_def><padstack id="BallPad" type="BALL_PAD"><ref_shape shape_id="BallSize" layer="BOTTOM"/></padstack></padstack_def>:<module name="NEWLSI" type="PKG" shape_id="BodySizeOfNEWLSI"><socket inst="IO"><default><port_shape padstack_id="BallPad" /></default><port name=DQ[0] id="A1" x=".." y=".."/><port name=DQ[1] id="B2" x=".." y=".." />:</socket><constraint><impedance port_nae="DQ[0]" type="single" typ="50"/>:</constraint></module>

46

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
LSI designer

LPB C-Format<shape><rectangle id="BodySizeOfNEWLSI" width=".." height="..."/><circle id"BallSize" diameter="..."/></shape><padstack_def><padstack id="BallPad" type="BALL_PAD"><ref_shape shape_id="BallSize" layer="BOTTOM"/></padstack></padstack_def>:<module name="NEWLSI" type="PKG" shape_id="BodySizeOfNEWLSI"><socket inst="IO"><default><port_shape padstack_id="BallPad" /></default><port name=DQ[0] id="A1" x=".." y=".."/><port name=DQ[1] id="B2" x=".." y=".." />:</socket><constraint><impedance port_nae="DQ[0]" type="single" typ="50"/>:</constraint></module>

Read pin assignment from C-Format.
47

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
LSI designer

It was troubled.
Wiring is impossible.

Consider trace routing in thepackage.
48

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
Chip Layout engineer

LSI designer

Could you change thepad location ?

LPB C-Format

49

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
<shape>:</shape>
Chipdesigner
Package designer<padstack_def>:</padstack_def>
Could you change the:locationtype="LSI"of PAD?
<module name="NEWLSI
shape_id="DieSize"><socket inst="IO"><default><port_shape padstack_id="Pad" /></default><port id="P11" name="DQ_0" x=".." y=".."/><port id="P22" name="DQ_1" x=".." y=".."/>:</socket></module>

LPB C-Format

50

Copyright©2012 JEITA/EDA/LPB All Rights ReservedWorking with LPB Format.
LSI designer

System designer

Could you change thepin location?

LPB C-Format

51

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.

System: designer

Package designer<module name="NEWLSI" type="PKG"
shape_id="BodySizeOfNEWLSI">
Could you change the<socket inst="IO">
locationofPIN?
<default><port_shape padstack_id="BallPad" /></default><port name=DQ[0]x=".." y=".."/>LPB id="D1"
C-Format<port name=DQ[1] id="A2" x=".." y=".." />:</socket>:</module>

52Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.

…………………
……Physical design almost finished.
Now we are in verification stage.

53

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
LSI designer

System designer

Could you giveme a package
Model?

54

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
LSI designer

Modeling
CADArtwork
LPB G-Format

55

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.
A B

C D1234Modelingsubckt top i1 i2 i3
R1 r1 1 5 1e6
r2 1 2 1e4
c1 1 4 0.1u
vdd 7 0 dc 5:56

Copyright©2012 JEITA/EDA/LPB All Rights Reservedshape_id="BodySizeOfNEWLSI">
inst="IO">
Working<socketwith LPB
Format.
<default><port_shape padstack_id="BallPad" /></default>
A B C DModeling<port name=DQ[0] id="D1" x=".." y=".."/>
1 <port name=DQ[1] id="A2" x=".." y=".." />:2</socket>
3:4 </module><reference reffile="NEWLSI.sp"
format="SPICE">
subckt top i1 i2 i3
R1 r1 1 5 1e6<connect pirt_name="D1>
r2 1 2 1e4<spice:ref_port
subckt="top" portid="3"/></connect>c1 1 4 0.1u
vdd 7 0 dc 5<connect pin_name="A2">:<spice:ref_port subckt="top" portid="1"/></connect>:</reference>
57

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

Working with LPB Format.

LSI designer

System designer

Here is a package modeland C-Format.
Modeling

LPB C-Format
subckt top i1 i2 i3
R1 r1 1 5 1e6:
58

Copyright©2012 JEITA/EDA/LPB All Rights Reservedまとめ / 相互設計の課題とソリューション

課題
相互設計 ： 異文化同士の交流• コミュニケーションをもっとスムーズにしたい異文化間交流には、定められたプロトコルが必要• 意思の疎通を円滑に・・・• 解析・モデリングツールを設計の道具に・・・

ソリューション
コミュニケーションのためにフォーマットを統一
LPB M/N/C/G/R-Format

皆様のご協力を願います59

Copyright©2012 JEITA/EDA/LPB All Rights Reserved

END

60

Copyright©2012 JEITA/EDA/LPB All Rights Reserved