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CORPORATE HEADQUARTERS
140 Caspian Court
Sunnyvale, CA 94089-1000
408-542-0500
FAX: 408-542-0503
URL: http://www.sandisk.com

SanDisk® Corporation general policy does not recommend the use of its products in life support applications where in a failure
or malfunction of the product may directly threaten life or injury. Per SanDisk Terms and Conditions of Sale, the user of SanDisk
products in life support applications assumes all risk of such use and indemnifies SanDisk against all damages.
The information in this manual is subject to change without notice.
SanDisk Corporation shall not be liable for technical or editorial errors or omissions contained herein; nor for incidental orconsequential damages resulting from the furnishing, performance, or use of this material.
All parts of the SanDisk MultiMediaCard documentation are protected by copyright law and all rights are reserved. This
documentation may not, in whole or in part, be copied, photocopied, reproduced, translated, or reduced to any electro nic
medium or machine-readable form without prior consent, in writing, from SanDisk Corporation.
SanDisk and the SanDisk logo are registered trademarks of SanDisk Corporation.
Product names mentioned herein are for identification purposes only and may be trademarks and/or registered trademarks of
their respective companies.
© 2002 SanDisk Corporation. All rights reserved.
SanDisk products are covered or licensed under one or more of the following U.S. Patent Nos. 5,070,032; 5,095,344; 5,168,465;
5,172,338; 5,198,380; 5,200,959; 5,268,318; 5,268,870; 5,272,669; 5,418,752; 5,602,987. Other U.S. and foreign patents
awarded and pending.
Lit. No. 80-13-00089 Rev. 5.1 8/2002

Printed in U.S.A.

Revision History• Revisions dated before 1/98—Initial release and general changes.
• Revision dated 1/98—General editorial changes, manual reorganized, technical changes to reflect support of MultiMediaCard
Specification version 1.3, new timing diagrams added. Pin 6 definition ch anged in SPI mode from SPI select to VSS2 (supply
voltage ground).
• Revision dated 4/98—Changes reflect support of MultiMediaCard Specification version 1.4, updated timing for Multiple Write
with no Busy, updated SPI command class definition, added Erro r Protection section, changed operating temperature
specification to -25° to 85°C.
• Revision dated 4/28/98—Updated C_SIZE and C_SIZE_MULT field definitions.
• Revision 1 dated 4/99—Added 32 MB MultiMediaCard, general technical and editorial changes, added power up section.
• Revision 2 dated 4/2000—Changed mechanical specification drawing, clarified system performance specifications, editorialchanges.
• Revision 3 dated 7/2001—Manual reformatted, new capacities and specifications added. Changes reflect support ofMultiMediaCard Specification, version 2.11.
• Revision 4 dated 11/2001—Manual reformatted, minor editorial changes. Changes reflect support of MultiMediaCard
Specification, version 2.2.
• Revision 5 dated 6/2002—Minor editorial and technical changes.
• Revision 5.1 dated 7/2002—Minor editorial and technical changes.

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MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

Table of Contents
1. Introduction to the MultiMediaCard .............................................................................................................1-1
1.1. Scope...........................................................................................................................................1-2
1.2. Product Models............................................................................................................................1-2
1.3. System Features ...........................................................................................................................1-2
1.4. MultiMediaCard Standard ...........................................................................................................1-3
1.5. Functional Description.................................................................................................................1-3
1.5.1. Flash Technology Independence.........................................................................................1-4
1.5.2. Defect and Error Management ...........................................................................................1-4
1.5.3. Endurance..........................................................................................................................1-4
1.5.4. Automatic Sleep Mode .......................................................................................................1-5
1.5.5. Hot Insertion ......................................................................................................................1-5
1.5.6. MultiMediaCard Mode.......................................................................................................1-5
1.5.6.1. MultiMediaCard Standard Compliance..............................................................1-5
1.5.6.2. Negotiating Operation Conditions .....................................................................1-5
1.5.7. Card Acquisition and Identification....................................................................................1-5
1.5.7.1. Card Status........................................................................................................1-6
1.5.7.2. Memory Array Partitioning................................................................................1-6
1.5.7.3. Read and Write Operations................................................................................1-8
1.5.7.4. Data Protection in the Flash Card ......................................................................1-9
1.5.7.5. Erase .................................................................................................................1-9
1.5.7.6. Write Protection ................................................................................................1-9
1.5.7.7. Copy Bit ............................................................................................................1-9
1.5.7.8. The CSD Register..............................................................................................1-9
1.5.8. SPI Mode ...........................................................................................................................1-10
1.5.8.1. Negotiating Operating Conditions .....................................................................1-10
1.5.8.2. Card Acquisition and Identification ...................................................................1-10
1.5.8.3. Card Status........................................................................................................1-10
1.5.8.4. Memory Array Partitioning................................................................................1-10
1.5.8.5. Read and Write Operations................................................................................1-11
1.5.8.6. Data Transfer Rate ............................................................................................1-11
1.5.8.7. Data Protection in the MultiMediaCard .............................................................1-11
1.5.8.8. Erase .................................................................................................................1-11
1.5.8.9. Write Protection ................................................................................................1-11
2. Product Specifications ..................................................................................................................................2-1
2.1. System Environmental Specifications...........................................................................................2-1
2.2. Typical System Power Requirements............................................................................................2-1
2.3. System Performance.....................................................................................................................2-2
2.4. System Reliability and Maintenance.............................................................................................2-2
2.5. Physical Specifications.................................................................................................................2-2
3. MultiMediaCard Interface Description .........................................................................................................3-1
3.1. Physical Description ....................................................................................................................3-1
3.1.1. Pin Assignments in MultiMediaCard Mode........................................................................3-1
3.1.2. Pin Assignments in SPI Mode ............................................................................................3-1
3.2. MultiMediaCard Bus Topology....................................................................................................3-2
3.2.1. Power Protection ................................................................................................................3-3
3.3. SPI Bus Topology ........................................................................................................................3-3
3.3.1. Power Protection ................................................................................................................3-4
3.4. Electrical Interface.......................................................................................................................3-4
3.4.1. Power-up............................................................................................................................3-4
3.4.2. Bus Operating Conditions ..................................................................................................3-6

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3.4.3. Bus Signal Levels...............................................................................................................3-7
3.4.4. Open-Drain Mode Bus Signal Level ...................................................................................3-7
3.4.5. Push-pull Mode Bus Signal Level.......................................................................................3-7
3.4.6. Bus Timing ........................................................................................................................3-8
3.5. MultiMediaCard Registers ...........................................................................................................3-9
3.5.1. Operating Conditions Register (OCR) ................................................................................3-9
3.5.2. Card Identification (CID) Register .....................................................................................3-10
3.5.3. Card Specific Data (CSD) Register.....................................................................................3-11
3.5.4. Status Register ...................................................................................................................3-17
3.5.5. Relative Card Address (RCA) Register ...............................................................................3-19
3.5.6. MultiMediaCard Registers in SPI Mode .............................................................................3-19
3.6. File System Format ......................................................................................................................3-19
4. MultiMediaCard Protocol Description ..........................................................................................................4-1
4.1. Card Identification Mode .............................................................................................................4-2
4.1.1. Reset ..................................................................................................................................4-2
4.1.2. Operating Voltage Range Validation ..................................................................................4-3
4.1.3. Card Identification Process.................................................................................................4-3
4.2. Data Transfer Mode.....................................................................................................................4-4
4.2.1. Data Read Format ..............................................................................................................4-5
4.2.2. Data Write Format .............................................................................................................4-6
4.2.3. CSD Programming.............................................................................................................4-7
4.2.4. Erase..................................................................................................................................4-7
4.2.5. Write Protect Management.................................................................................................4-7
4.2.6. Card Lock/Unlock Operation..............................................................................................4-8
4.2.6.1. Setting the Password..........................................................................................4-9
4.2.6.2. Reset the Password ............................................................................................4-9
4.2.6.3. Locking a Card..................................................................................................4-9
4.2.6.4. Unlocking the Card ...........................................................................................4-10
4.2.6.5. Forcing Erase ....................................................................................................4-10
4.3. Clock Control ..............................................................................................................................4-11
4.4. Cyclic Redundancy Codes (CRC) .................................................................................................4-11
4.5. Error Conditions..........................................................................................................................4-13
4.5.1. CRC and Illegal Command ................................................................................................4-13
4.5.2. Read, Write and Erase Time-out Conditions.......................................................................4-13
4.6. Commands...................................................................................................................................4-14
4.6.1. Command Types ................................................................................................................4-14
4.6.2. Command Format ..............................................................................................................4-14
4.6.3. Command Classes..............................................................................................................4-14
4.6.4. Detailed Command Description..........................................................................................4-15
4.7. Card State Transition Tables........................................................................................................4-18
4.8. Responses ....................................................................................................................................4-20
4.8.1. Data Response....................................................................................................................4-21
4.9. Timings .......................................................................................................................................4-21
4.9.1. Command and Response ....................................................................................................4-22
4.9.2. Data Read ..........................................................................................................................4-23
4.9.3. Data Write .........................................................................................................................4-23
4.9.4. Timing Values ...................................................................................................................4-25

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5. SPI Mode .....................................................................................................................................................5-1
5.1. SPI Interface Concept ..................................................................................................................5-1
5.2. SPI Bus Topology ........................................................................................................................5-1
5.3. MultiMediaCard Registers in SPI Mode.......................................................................................5-3
5.4. SPI Bus Protocol ..........................................................................................................................5-3
5.4.1. Mode Selection ..................................................................................................................5-3
5.4.2. Bus Transfer Protection......................................................................................................5-4
5.4.3. Data Read ..........................................................................................................................5-4
5.4.4. Data Write .........................................................................................................................5-6
5.4.5. Erase and Write Protect Management.................................................................................5-7
5.4.6. Read CID/CSD Registers ...................................................................................................5-7
5.4.7. Reset Sequence...................................................................................................................5-8
5.4.8. Clock Control.....................................................................................................................5-8
5.4.9. Error Conditions ................................................................................................................5-8
5.4.9.1. CRC and Illegal Command................................................................................5-9
5.4.9.2. Read, Write and Erase Time-out Conditions ......................................................5-9
5.4.9.3. Read Ahead in Multiple Block Read Operation ..................................................5-9
5.4.10. Memory Array Partitioning ..............................................................................................5-9
5.4.11. Card Lock/Unlock Operation............................................................................................5-10
5.5. SPI Mode Transaction Packets.....................................................................................................5-10
5.5.1. Command Format ..............................................................................................................5-10
5.5.1.1. Command Classes .............................................................................................5-10
5.5.1.2. Detailed Command Description .........................................................................5-11
5.5.2. Responses ..........................................................................................................................5-13
5.5.2.1. Format R1 .........................................................................................................5-13
5.5.2.2. Format R1b .......................................................................................................5-14
5.5.2.3. Busy ..................................................................................................................5-14
5.5.2.4. Format R2 .........................................................................................................5-14
5.5.3. Format R3..........................................................................................................................5-15
5.5.3.1. Data Response ...................................................................................................5-15
5.5.4. Data Tokens.......................................................................................................................5-16
5.5.5. Data Error Token ...............................................................................................................5-16
5.5.6. Clearing Status Bits ...........................................................................................................5-17
5.6. Card Registers .............................................................................................................................5-18
5.7. SPI Bus Timing Diagrams ...........................................................................................................5-18
5.7.1. Command/Response...........................................................................................................5-18
5.7.1.1. Host Command to Card Response—Card is Ready.............................................5-18
5.7.1.2. Host Command to Card Response—Card is Busy ..............................................5-19
5.7.1.3. Card Response to Host Command ......................................................................5-19
5.7.2. Data Read ..........................................................................................................................5-19
5.7.2.1. Single Block Read .............................................................................................5-19
5.7.2.2. Multiple Block Read- Stop Transmission is Sent Between Blocks ......................5-19
5.7.2.3. Multiple Block Read-Stop Transmission is Sent Within a Block ........................5-20
5.7.2.4. Reading the CSD Register .................................................................................5-20
5.7.3. Data Write .........................................................................................................................5-20
5.7.3.1. Single Block Write ............................................................................................5-20
5.7.3.2. Multiple Block Write.........................................................................................5-21
5.7.4. Timing Values ...................................................................................................................5-21
5.8. SPI Electrical Interface ................................................................................................................5-22
5.9. SPI Bus Operating Conditions .....................................................................................................5-22
5.10. Bus Timing................................................................................................................................5-22

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Appendix A. Ordering Information ..................................................................................................................A-1
Appendix B. Technical Support Services ..........................................................................................................B-1
Appendix C. SanDisk Worldwide Sales Offices ................................................................................................C-1
Appendix D. Limited Warranty........................................................................................................................D-1

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1. Introduction to the MultiMediaCard
The SanDisk MultiMediaCard is a very small, removable flash storage device, designed specifically for storage
applications that put a premium on small form factor, low power and low cost. Flash is the ideal storage medium forportable, battery-powered devices. It features low power consumption and is non-volatile, requiring no power tomaintain the stored data. It also has a wide operating range for temperature, shock and vibration.
The MultiMediaCard is well suited to meet the needs of small, low power, electronic devices. With a form factor of
32mm by 24mm and 1.4mm thick, MultiMediaCards are expected to be used in a wide variety of portable devices
like mobile phones, pagers and voice recorders. This ultra-small form factor is part of a new, emerging, proposed
open standard.
To support this wide range of applications, the MultiMediaCard protocol, a high performance seven pin serialinterface, is designed for maximum scalability and configurability. All device and interface configuration data (suchas maximum frequency, card identification, etc.) are stored on the card.
The MultiMediaCard interface allows for easy integration into any design, regardless of microprocessor used. For
compatibility with existing controllers, the MultiMediaCard offers, in addition to the MultiMediaCard interface, analternate communication protocol, which is based on the Serial Peripheral Interface (SPI) standard.
The MultiMediaCard provides up to 128 million bytes of memory using SanDisk Flash memory chips, which were
designed by SanDisk especially for use in mass storage applications. In addition to the mass storage specific flash
memory chip, the MultiMediaCard includes an on-card intelligent controller which manages interface protocols anddata storage and retrieval, as well as Error Correction Code (ECC) algorithms, defect handling and diagnostics,
power management and clock control.

MultiMediaCard/SPI
Interface

SanDisk
SingleChipController

Data
In/OutControl

Data
Flash
Modules

SanDisk MultiMediaCard

Figure 1-1. MultiMediaCard Block Diagram

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Introduction to the MultiMediaCard

1.1. Scope
This document describes the key features and specifications of the MultiMediaCard, as well as the information
required to interface this product to a host system.

1.2. Product Models
The MultiMediaCard is available in the capacities shown in Table 1-1.
Table 1-1. MultiMediaCard Capacities
Model No.

Capacities

SDMB-16

16 MB

SDMB-32

32 MB

SDMJ-64

64 MB

SDMJ-128

128 MBSDMB = Binary NAND technology.
SDMJ = Multi Level Cell (MLC) NAND technology.

1.3. System Features
The MultiMediaCard Association Standard features are as follows:
•
•
•
•
•

•
•
•
•
•
•

1-2

Up to 128 Mbytes of data storage.
MultiMediaCard protocol compatible.
Supports SPI Mode.
Targeted for portable and stationary applications.
Voltage range:−
Communication: 2.0-3.6V−
Memory Access: 2.7-3.6V
Maximum data rate with up to 10 cards.
Correction of memory field errors.
Built-in write protection features (permanent and temporary).
Pre-erase mechanism.
Variable clock rate 0-20 Mhz.
Multiple cards stackable on a single physical bus.

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Introduction to the MultiMediaCard

The performance of the communication channel is described in Table 1-2.
Table 1-2. MultiMediaCard/SPI Comparison
MultiMediaCard

SPI

Three-wire serial data bus (Clock, command, data).

Three-wire serial data bus (Clock, dataIn, dataOut) + card
specific CS signal.

Up to 64k cards addressable by the bus protocol .

Card selection via a hardware CS signal.

Easy card identification.

Not available.

Error-protected data transfer.

Optional. A non-protected data transfer mode is available.

Sequential and single/multiple block oriented data transfer .

Single/Multiple block read/write*.

* Multiple sector Read/Write in SPI mode was approved by the MMCA and is included in MMCA system standard rev 3.1.

1.4. MultiMediaCard Standard
MultiMediaCards are fully compatible with the MultiMediaCard standard specification listed below:
The MultiMediaCard System Specification, Version 2.2
This specification may be obtained from:
MultiMediaCard Association
19672 Stevens Creek Blvd., Suite 404
Cupertino, CA 95014-2465
USA
Phone: 408-253-0441
Fax: 408-253-8811
Email: prophet2@mmca.org
http://www.mmca.org

1.5. Functional Description
SanDisk MultiMediaCards contain a high level, intelligent subsystem as shown in the block diagram, Figure 1-1.
This intelligent (microprocessor) subsystem provides many capabilities not found in other types of memory cards.
These capabilities include:••••

Host independence from details of erasing and programming flash memory.
Sophisticated system for managing defects (analogous to systems found in magnetic disk drives).
Sophisticated system for error recovery including a powerful error correction code (ECC).
Power management for low power operation.

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Introduction to the MultiMediaCard

1.5.1. Flash Technology Independence
The 512 byte sector size of the MultiMediaCard is the same as that in an IDE magnetic disk drive. To write or read a
sector (or multiple sectors), the host computer software simply issues a Read or Write command to theMultiMediaCard. This command contains the address. The host software then waits for the command to complete.
The host software does not get involved in the details of how the flash memory is erased, programmed or read. Thisis extremely important as flash devices are expected to get more and more complex in the future. Because theMultiMediaCard uses an intelligent on-board controller, the host system software will not require changing as new
flash memory evolves. In other words, systems that support the MultiMediaCard today will be able to access future
SanDisk MultiMediaCards built with new flash technology without having to update or change host software.

1.5.2. Defect and Error Management
MultiMediaCards contain a sophisticated defect and error management system. This system is analogous to thesystems found in magnetic disk drives and in many cases offers enhancements. For instance, disk drives do not
typically perform a read after write to confirm the data is written correctly because of the performance penalty thatwould be incurred. MultiMediaCards do a read after write under margin conditions to verify that the data is writtencorrectly. In the rare case that a bit is found to be defective, MultiMediaCards replace this bad bit with a spare bitwithin the sector header. If necessary, MultiMediaCards will even replace the entire sector with a spare sector. Thisis completely transparent to the host and does not consume any user data space.
The MultiMediaCard’s soft error rate specification is much better than the magnetic disk drive specification. In theextremely rare case a read error does occur, MultiMediaCards have innovative algorithms to recover the data. This issimilar to using retries on a disk drive but is much more sophisticated. The last line of defense is to employ apowerful ECC to correct the data. If ECC is used to recover data, defective bits are replaced with spare bits to ensure
they do not cause any future problems.
These defect and error management systems coupled with the solid-state construction give MultiMediaCards
unparalleled reliability.

1.5.3. Endurance
SanDisk MultiMediaCards have a typical endurance specification for each sector of 100,000 writes (reading a
logical sector is unlimited). This far exceeds what is needed in nearly all applications of MultiMediaCards. For
example, even very heavy use of the MultiMediaCard in cellular phones, personal communicators, pagers and voicerecorders will use only a fraction of the total endurance over the typical device’s lifetime. For instance, it would takeover 34 years to wear out an area on the MultiMediaCard on which a file of any size (from 512 bytes to maximum
capacity) was rewritten 3 times per hour, 8 hours a day, 365 days per year.
With typical applications the endurance limit is not of any practical concern to the vast majority of users.

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Introduction to the MultiMediaCard

1.5.4. Automatic Sleep Mode
A unique feature of the SanDisk MultiMediaCard (and other SanDisk products) is automatic entrance and exit fromsleep mode. Upon completion of an operation, the MultiMediaCard will enter the sleep mode to conserve power if
no further commands are received within 5msec. The host does not have to take any action for this to occur. In most
systems, the MultiMediaCard is in sleep mode except when the host is accessing it, thus conserving power.
When the host is ready to access the MultiMediaCard and it is in sleep mode, any command issued to theMultiMediaCard will cause it to exit sleep and respond.

1.5.5. Hot Insertion
Support for hot insertion will be required on the host, but will be supported through the connector. Connector
manufacturers will provide connectors that have power pins long enough to be powered before contact is made withthe other pins. Please see connector data sheets for more details. This approach is similar to that used in PCMCIA toallow for hot insertion. This applies to both MultiMediaCard and SPI modes.

1.5.6. MultiMediaCard Mode
The following sections provide valuable information on the MultiMediaCard mode.
1.5.6.1. MultiMediaCard Standard Compliance
The MultiMediaCard is fully compliant with MultiMediaCard Standard Specification, version 2.2. The structure of
the Card Specific Data (CSD) register is compliant with CSD structure version 2.2.
1.5.6.2. Negotiating Operation Conditions
The MultiMediaCard supports the operation condition verification sequence defined in the MultiMediaCard
standard specifications. Should the MultiMediaCard host define an operating voltage range, which is not supportedby the MultiMediaCard it will put itself in an inactive state and ignore any bus communication. The only way to get
the card out of the inactive state is by powering it down and up again.
In addition, the host can explicitly send the card to the inactive state by using the GO_INACTIVE_STATE
command.

1.5.7. Card Acquisition and Identification
The MultiMediaCard bus is a single master (MultiMediaCard host) and multi-slaves (cards) bus. The host can querythe bus and find out how many cards of which type are currently connected. The MultiMediaCard’s CID register is
pre-programmed with a unique card identification number that is used during the acquisition and identification
procedure.

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Introduction to the MultiMediaCard

In addition, the MultiMediaCard host can read the card’s CID register using the READ_CID MultiMediaCard
command. The CID register is programmed during the MultiMediaCard testing and formatting procedure, on the
manufacturing floor. The MultiMediaCard host can only read this register and not write to it.

1.5.7.1. Card Status
MultiMediaCard status is stored in a 32-bit status register which is sent as the data field in the card response to hostcommands. The Status register provides information about the card’s current state and completion codes for the last
host command.
The card status can be explicitly read (polled) with the SEND_STATUS command.
1.5.7.2. Memory Array Partitioning
Although the MultiMediaCard memory space is byte addressable with addresses ranging from 0 to the last byte, it is
not a simple byte array but divided into several structures.
Memory bytes are grouped into 512 byte blocks called sectors. Every block can be read, written and erased
individually.
Sectors are grouped into erase groups of 16 or 32 sectors depending on card size. Any combination of sectors within
one group, or any combination of erase groups can be erased in a single erase command. A write command
implicitly erases the memory before writing new data into it. An explicit erase command can be used for pre-erasing
memory, which will speed up the next write operation.
Erase groups are grouped into Write Protect Groups (WPG) of 32 erase groups. The write/erase access to each WPG
can be limited individually. A diagram of the memory structure hierarchy is shown in Figure 1-2.
The number of various memory structures, for the different MultiMediaCards are summarized in Table 1-3. The last(highest in address) WPG will be smaller and contain less than 32 erase groups.

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Introduction to the MultiMediaCard

WP Group N

WP Group 1

Write Protect Group 0

Erase Group 1

Erase Group m

Sector n

Sector 0

Erase Group 0

Sector n

Sector 2

Sector 1: Bytes 512 - 1,023

Sector 0: Bytes 0 - 511

Figure 1-2. Memory Array Partitioning
Table 1-3. Memory Array Structures Summary
Structure

NOTE:

SDMB-16

SDMB-32

SDMJ-64

SDMJ-128

Bytes

16 MB

32 MB

64 MB

128 MB

Sector31,36062,720125,440

250,880

Erase Group Size [sectors]

32

32

32

32

Number of Erase Groups

980

1,960

3,920

7,840

Write Protect Group Size [erase groups]

32

32

32

32

Number of Write Protect Groups

31

62

123

245

All measurements are in units per card.

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Introduction to the MultiMediaCard

1.5.7.3. Read and Write Operations
The MultiMediaCard supports two read/write modes as shown in Figure 1-3.

Single Block Mode
MemorySectors

MemorySectors

MemorySectors

Start
Address(Read)

Misalignment Error
MemorySectors

MemorySectors

Start
Address(Write)MemorySectors

MemorySectors

Start
Address(Read/Write)

Multiple Block Mode
MemorySectors

MemorySectors

MemorySectors

MemorySectors

MemorySectors

Write
Start
Address

MemorySectors

MemorySectors

Read
Stop

Start

Stop

Figure 1-3. Data Transfer Formats
Single Block ModeIn this mode, the host reads or writes one data block in a pre-specified length. The data block transmission isprotected with 16-bit CRC, which is generated by the sending unit and checked by the receiving unit.
The block length for read operations is limited by the device sector size (512 bytes) , but can be as small as a single
byte. Misalignment is not allowed. Every data block must be con tained in a single physical sector.
The block length for write operations must be identical to the sector size and the start address aligned to a sector
boundary.
Multiple Block Mode
This mode is similar to the single block mode, but the host can read/write multiple data blocks (all have the samelength), which will be stored or retrieved from contiguous memory addresses starting at the address specified in thecommand.
The operation is terminated with a stop transmission command. Misalignment and block length restrictions apply tomultiple blocks as well, and are identical to the single block read/write operations.

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Introduction to the MultiMediaCard

1.5.7.4. Data Protection in the Flash Card
Every sector is protected with an Error Correction Code (ECC). The ECC is generated (in the memory card) when
the sectors are written and validated when the data is read. If defects are found, the data is corrected prior totransmission to the host.

1.5.7.5. Erase
The smallest erasable unit in the MultiMediaCard is a sector. In order to speed up the erase procedure, multiple
sectors can be erased at the same time. The erase operation is divided into two stages:
Tagging—Selecting the Sectors for Erasing. To facilitate selection, a first command with the starting address isfollowed by a second command with the final address, and all sectors within this range will be selected for erase.
Erasing—Starting the Erase Process. The sectors are grouped into erase groups of 16 or 32 sectors. Tagging canaddress sectors or erase groups. Either an arbitrary set of sectors within a single erase group, or an arbitrary selectionof erase groups may be erased at one time, but not both together. That is, the unit of measure for determining anerase is either a sector or an erase group. If sectors are tagged, then all selected sectors must lie within the sameerase group. Tagging and erasing sectors must follow a strict command sequence.
1.5.7.6. Write Protection
Two card level write protection options are available: permanent and temporary. Both can be set using the
PROGRAM_CSD command (see section 4.2.3). The permanent write protect bit, once set, cannot be cleared. Thisfeature is implemented in the MultiMediaCard controller firmware and not with a physical OTP cell.

1.5.7.7. Copy Bit
The content of a MultiMediaCard can be marked as an original or a copy using the copy bit in the CSD register.
Once the Copy bit is set (marked as a copy) it cannot be cleared. The Copy bit of the MultiMediaCard is
programmed (during test and formatting on the manufacturing floor) as a copy. The MultiMediaCard can bepurchased with the copy bit set (copy) or cleared, indicating the card is a master. This feature is implemented in theMultiMediaCard controller firmware and not with a physical OTP cell.

1.5.7.8. The CSD Register
All the configuration information of the MultiMediaCard is stored in the CSD register. The MSB bytes of theregister contain manufacturer data. The two least significant bytes contain the host controlled data: the card Copy
and write protection, the user file format indication, and the user ECC register.
The host can read the CSD register and alter the host-controlled data bytes using the SEND_CSD and
PROGRAM_CSD commands (see section 4.2.3).

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

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Introduction to the MultiMediaCard

1.5.8. SPI Mode
The SPI mode is a secondary communication protocol for MultiMediaCards. This mode is a subset of theMultiMediaCard protocol, designed to communicate with an SPI channel, commonly found in Motorola’s (andlately a few other vendors’) microcontrollers.

1.5.8.1. Negotiating Operating Conditions
The operating condition negotiation function of the MultiMediaCard bus is not supported in SPI mode. The hostmust work within the valid voltage range (2.7 to 3.6) volts of the card.

1.5.8.2. Card Acquisition and Identification
The card acquisition and identification function of the MultiMediaCard bus is not supported in SPI mode. The hostmust know the number of cards currently connected on the bus. Specific card selection is done via the CS signal.

1.5.8.3. Card Status
In SPI mode only 16 bits (containing the errors relevant to SPI mode) can be read out of the MultiMediaCard status
register.

1.5.8.4. Memory Array Partitioning
Memory partitioning in SPI mode is equivalent to MultiMediaCard mode. All read and write commands are byte
addressable.

1-10

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Introduction to the MultiMediaCard

1.5.8.5. Read and Write Operations
The SPI mode, as defined in the MMCA Standard, version 2.2, supports only single block read/write. Additionally,
the SanDisk MultiMediaCard supports a multiple block read/write that was approved by the MMCA and will be
included in a future MultiMediaCard System Specification.
1.5.8.6. Data Transfer Rate
Same as for the MultiMediaCard mode when the card is operating in single block read/write mode.
1.5.8.7. Data Protection in the MultiMediaCard
Same as for the MultiMediaCard mode.
1.5.8.8. Erase
Same as in MultiMediaCard mode.
1.5.8.9. Write Protection
Same as in MultiMediaCard mode.

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Introduction to the MultiMediaCard

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1-12MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

2. Product Specifications
For all the following specifications, values are defined at ambient temperature and nominal supply voltage unlessotherwise stated.

2.1. System Environmental Specifications
Table 2-1. System Environment Specifications
Temperature

Operating: -25° C to 85° C
Non-Operating: -40° C to 85° C

Humidity

Operating: 8% to 95%, non-condensing
Non-Operating: 8% to 95%, non-condensing

ESD Protection

Contact Pads: ± 4kV, Human body model according to ANSIEOS/ESD-S5.1-1998
Non Contact Pad Area: ± 8kV (coupling plane discharge)± 15kV (air discharge)
Human body model per IEC61000-4-2

Acoustic Noise:

0 dB

Vibration

Operating: 15 G peak to peak max.
Non-Operating: 15 G peak to peak max.

Shock

Operating: 1,000 G max.
Non-Operating: 1,000 G max.

Altitude (relative to sea level)

Operating: 80,000 feet max.
Non-Operating: 80,000 feet max.

2.2. Typical System Power Requirements
Table 2-2. System Power Requirements
Operation

@3.6V

@2.7V

Read

25

20

Write

35

25

Sleep

50µ A (typical)
150µ A (max)

40µ A (typical)
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Product Specifications

2.3. System Performance
Table 2-3. System Performance
TypicalMaximum

Block Read Access Time
Binary Products
MLC Products

1.5msec
10msec15msec100msec

24msec40msec240msec
400msec

CMD1 to Ready (after power up)

50msec500msec

Sleep to Ready

1msec

2msec

Block Write Access Time
Binary Products
MLC Products

NOTES: All values quoted are under the following conditions:
1) Voltage range: 2.7 V to 3.6 V.
2) Temperature range: -25° C to 85° C.
3) Are independent of the MultiMediaCard clock frequency.

2.4. System Reliability and Maintenance
Table 2-4. System Reliability and MaintenanceMTBF> 1,000,000 hours

Preventive Maintenance

None

Data Reliability<1 non-recoverable error in 1014 bits read

Endurance

100,000 write/erase cycles (typical)

2.5. Physical Specifications
Table 2-5 lists the physical specifications and Figure 2-1 shows MultiMediaCard physical dimensions.
Table 2-5. Physical Specifications

2-2

Weight

1.5 g. maximum

Length32mm ± 0.1mm

Width24mm ± 0.08mm

Thickness

1.4mm ± 0.1mm

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

Product Specifications

0.2

1.4 ± 0.1

32.0 ± 0.1
4.5 min.
1.2 max.

0.00
3.10 max.
5.60 max.
8.10 max.
10.60 max.
13.10 max.
15.60 max.
18.10 max.

4.65 min.
7.15 min.
9.65 min.
24.00 ± 0.08

12.15 min.
14.65 min.
17.15 min.
19.65 min.
4.0 ± 0.1

4.0 ± 0.1
2 x R0.5 ± 0.1

3 x R1.0 ± 0.1

All dimensions are in millimeters.

Figure 2-1. MultiMediaCard Dimensions

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3. MultiMediaCard Interface Description
3.1. Physical Description
The MultiMediaCard has seven exposed contacts on one side (see Figure 2-1). The host is connected to theMultiMediaCard using a seven-pin connector.

3.1.1. Pin Assignments in MultiMediaCard Mode

Table 3-1. MultiMediaCard Pad Definition
Pin #

Name

Type*

MultiMediaCard Description

1

RSV

NC

Not Connected or Always ‘1’

2

CMD

I/O/PP/OD

Command/Response

3

VSS1

S

Supply voltage ground

4

VDD

S

Supply voltage

5

CLK

I

Clock

6

VSS2

S

Supply voltage ground7

DAT[0]

I/O/PP

Data 0* S=power supply; I=input; O=output; PP=push-pull; OD=open-drain; NC=not connected.

3.1.2. Pin Assignments in SPI Mode

Table 3-2. SPI Pad Definition
Pin #

Name

Type*

SPI Description

1

CS

I

Chip Select (Active low)

2

DataInI

Host to Card Commands and Data

3

VSS1

S

Supply Voltage Ground

4

VDD

S

Supply Voltage

5

CLK

I

Clock

6

VSS2

S

Supply Voltage Ground

7

DataOutO

Card to Host Data and Status* S=power supply; I=input; O=output.

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MultiMediaCard Interface Description

3.2. MultiMediaCard Bus Topology
The MultiMediaCard bus has three communication lines and four supply lines (see Figure 3-1):
•
•
•
•
•

CMD—Command is a bi-directional signal. Host and card drivers are operating in two modes, open
drain and push pull.
DAT—Data is a bi-directional signal. Host and card drivers are operating in push pull mode.
CLK—Clock is a host to card signal. CLK operates in push pull mode.
VDD—VDD is the power supply line for all cards.
VSS[1:2]—VSS are two ground lines.

ROD

R DAT

R CMD
CMD
DAT
CLK
C1

C2

C3
1

2

3

4

5

6

7

CBUS = max (C1 , C 2, C3 )MultiMediaCard
Host

MultiMediaCard

Figure 3-1. Bus Circuitry Diagram
The ROD is switched on and off by the host synchronously to the open-drain and push-pull mode transitions. R DAT
and RCMD are pull-up resistors protecting the CMD and the DAT line against bus floating when no card is inserted orwhen all card drivers are in a hi-impedance mode.
A constant current source can replace the ROD in order to achieve better performance (constant slopes for the signal
rising and falling edges). If the host does not allow the switchable R OD implementation, a fix RCMD can be used.
Consequently the maximum operating frequency in the open drain mode has to be reduced in this case.
Hot Insertion/Removal
Hot insertion and removal are allowed. The SanDisk MultiMediaCard will not be damaged by inserting or removing
it into the MultiMediaCard bus even when the power is up:

3-2•

The inserted card will be properly reset also when CLK carries a clock frequency f PP.

•

Data transfer failures induced by removal/insertion should be detected by the bus master using the
CRC codes that suffix every bus transaction.

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONMultiMediaCard Interface Description

3.2.1. Power Protection
Cards can be inserted/removed into/from the bus without damage. If one of the supply pins (VDD or VSS) is notconnected properly, then the current is drawn through a data line to supply the card.
If the hot insertion feature is implemented in the host, then the host has to withstand a shortcut between VDD and VSS
without damage.

3.3. SPI Bus Topology
The MultiMediaCard SPI interface is compatible with SPI hosts available on the market. As with any other SPI
device, the MultiMediaCard SPI channel consists of the following four signals:••••

CS—Host to card Chip Select signal.
CLK—Host to card clock signal.
DataIn—Host to card data signal.
DataOut—Card to host data signal.

Another SPI common characteristic, which is implemented in the MultiMediaCard as well, is byte transfers. All data
tokens are multiples of 8-bit bytes and are always byte-aligned to the CS signal. The SPI standard defines thephysical link only and not the complete data transfer protocol. The MultiMediaCard uses a subset of theMultiMediaCard protocol and command set.
The MultiMediaCard identification and addressing algorithms are replaced by a hardware Chip Select (CS) signal.
There are no broadcast commands. A card (slave) is selected for every command, by asserting (active low) the CS
signal (see Figure 3-2).
The CS signal must be continuously active for the duration of the SPI transaction (command, response and data).
The only exception is card programming time. At this time, the host can de-assert the CS signal without affecting the
programming process.
The bi-directional CMD and DAT lines are replaced by unidirectional dataIn and dataOut signals. This preventscommand execution while data is being read or written and, therefore, eliminates sequential and multi block
read/write operations. Only single block read/write is supported by the SPI channel.

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MultiMediaCard Interface Description

Power
SupplySPI Bus
MasterCS
CS

SPI Bus (CLK, DataIN, DataOut)

SPI
Card

SPI
Card

Figure 3-2. MultiMediaCard Bus System

3.3.1. Power Protection
Same as for MultiMediaCard mode.

3.4. Electrical Interface
The following sections provide valuable information on the electrical interface.
3.4.1. Power-up
The power up of the MultiMediaCard bus is handled locally in each MultiMediaCard and in the bus master.
Figure 3-3 shows a power-up diagram.

3-4

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONMultiMediaCard Interface Description

Logic working level
Supply voltage
VDD max
Bus master supply voltage

Memory fieldworking
voltage
range.

Card logic working
voltage range

V DD mintime
Power up time

Supply ramp up time

Initialization sequence
Initialization delay:
The maximum of
1 msec, 74 clock cycles
and supply ramp up timeFirst CMD1 to card is ready.

CMD1

NCC

CMD1

NCC

CMD1

NCC

CMD2

Optional repetitions of CMD1
until no cards are responding
with busy bit set.

Figure 3-3. Power-up Diagram
After power-up, including hot insertion (inserting a card when the bus is operating), the MultiMediaCard enters the
Idle State. During this state, the MultiMediaCard ignores all bus transactions until CMD1 is received.
CMD1 is a special synchronization command used to negotiate the operation voltage range and to poll the cards
until they are out of their power-up sequence. Besides the operation voltage profile of the cards, the response to
CMD1 contains a busy flag, indicating that the card is still working on its power -up procedure and is not ready for
identification. This bit informs the host that at least one card is not ready. The host has to wait (and continue to poll
the cards) until this bit is cleared. The MultiMediaCard shall complete its initialization procedure within 500msec.
Getting individual cards, as well as the whole MultiMediaCard system, out of Idle State is up to the responsibility ofthe bus master. Since the power-up time and the supply ramp up time depend on application parameters such as the
maximum number of MultiMediaCards, the bus length and the power supply unit, the host must ensure that thepower is built up to the operating level (the same level which will be specified in CMD1) before CMD1 istransmitted.
After power-up, the host starts the clock and sends the initializing sequence on the CMD line. This sequence is acontiguous stream of logical ones. The sequence length is the maximum of 1msec, 74 clocks or the supply ramp up
time. The additional ten clocks (beyond the 64 clocks after which the card should be ready for communication) areprovided to eliminate power-up synchronization problems.

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MultiMediaCard Interface Description

3.4.2. Bus Operating Conditions
SPI Mode bus operating conditions are identical to MultiMediaCard Mode bus operating conditions. The CS (chipselect) signal timing is identical to the input signal timing (see Figure 3-5).
Table 3-3. Bus Operating Conditions
GeneralParameter

SymbolPeak voltage on all lines

Min.

Max.

Unit

-0.5

3.6

V

10

µA

10

µA

RemarkAll Inputs
Input Leakage Current-10
All Outputs

Output Leakage Current-10Power supply voltage
Parameter

Symbol

Min.

Max.

Unit

VDD

2.0

3.6

V

Supply voltage

RemarkSupply voltage differentials (VSS1, VSS2)
-0.5
0.5
V
The current consumption of any card during the power-up procedure must not exceed 10 mA.

CapacitanceParameter

SymbolVDD capacitanceMin.

C (VDD)

Max.

Unit

3.0

µF

RemarkBus Signal Line Load
The total capacitance CL of each line of the MultiMediaCard bus is the sum of the bus master capacitance CHOST,
the bus capacitance CBUS itself, and the capacitance CCARD of each card connected to this line:
CL = CHOST + CBUS + N CCARD
Where N is the number of connected cards. Given the requirement that the sum of the host and bus capacitances notexceed 30 pF for up to 10 cards, and 40 pF for up to 30 cards, the values in Table 3-4 must not be exceeded.
Table 3-4. Host and Bus Capacities
Parameter

Symbol

Min.

Max.

Unit

RemarkPull-up resistance

RCMD
RDAT

50

100

kΩ

To prevent bus floating

Bus signal line capacitance

CL

250

pF

fPP # 5 MHz, 30 cards

Bus signal line capacitance

CL

100

pF

fPP # 20 MHz, 10 cards

Single card capacitance

CCARD

7

pF

16

nH

Maximum signal line inductance

3-6

fPP # 20 MHz

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONMultiMediaCard Interface Description

3.4.3. Bus Signal Levels
Since the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage (seeFigure 3-4).

AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
V

VDD

Input
High
Level

Output
High
Level

VOH
VIH

Undefined

VIL

Input
Low
Level

Output
Low
Level

VOL

VSS

t

Figure 3-4. Bus Signal Levels

3.4.4. Open-Drain Mode Bus Signal Level

Table 3-5. Open Drain Mode Bus Signal Level
Parameter

SymbolMin.

Output HIGH voltage

VOH

VDD-0.2

Output LOW voltage

VOL

Max.

0.3

Unit

Conditions

V

IOH = -100 µA

V

IOL = 2 mA

The input levels are identical with the push-pull mode bus signal levels.

3.4.5. Push-pull Mode Bus Signal Level
To meet the requirements of the JEDEC specification JESD8-1A, the card input and output voltages shall be within
the specified ranges in Table 3-6 for any VDD of the allowed voltage range.
Table 3-6. Push-Pull Mode Bus Signal Level
Parameter

SymbolMin.

Output HIGH voltage

VOH

0.75∗VDD

Output LOW voltage

VOL

Input HIGH voltage

VIH

Input LOW voltage

VIL

Max.

Unit

Conditions

V

IOH=-100 µA@VDD (min.)

0.125∗VDD

V

IOL=100 µA@VDD (min.)

0.625∗VDD

VDD + 0.3

V

VSS-0.3

0.25∗VDD

V

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MultiMediaCard Interface Description

3.4.6. Bus Timing
SanDisk’s MultiMediaCards clock data in on the rising edge and out on the falling edge.
TPP

t WL

tWH

VIH
Clock
VIL

t TLH

t THL

tIH

VIH
Input

VIL
t ISU
VOH
Output
VOL
tOH

NOTE:

t OSU

Data in the shaded areas is not valid.

Figure 3-5. Timing Diagram Data Input/Output Referenced to Clock
Table 3-7. Bus Timing
Parameter

Symbol

Min.

Max.

Unit

RemarkClock CLK (All values are referred to min. (VIH) and max. (VIL)

3-8

Clock Frequency Data Transfer Mode (PP)

fPP

0

20

MHz

CL •100 pF(10 cards)

Clock Frequency Identification Mode (OD)

fOD

0

400

kHz

CL •250 pF(30 cards)

Clock Low Time

tWL

10

ns

CL •100 pF(10 cards)

Clock High Time

tWH

10

ns

CL •100 pF(10 cards)

Clock Rise Time

tTLH

10

ns

CL •100 pF(10 cards)

Clock Fall Time

tTHL

10

ns

CL •100 pF(10 cards)

Clock Low Time

tWL

50

ns

CL •250 pF(30 cards)

Clock High Time

tWH

50

ns

CL •250 pF(30 cards)

Clock Rise Time

tTLH

50

ns

CL •250 pF(30 cards)

Clock Fall Time

tTHL

50

ns

CL •250 pF(30 cards)

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONMultiMediaCard Interface Description

Parameter

Symbol

Min.

Max.

Unit

RemarkInputs CMD, DAT (referenced to CLK)
Input set-up time

tISU

3

ns

Input hold time

tIH

3

ns

Outputs CMD, DAT (referenced to CLK)
Output set-up time

tOSU

5

ns

Output hold time

tOH

5

ns

3.5. MultiMediaCard Registers
There is a set of six registers within the card interface. The OCR, CID and CSD registers carry the card
configuration information. The RCA register holds the card-relative communication address for the current session.

3.5.1. Operating Conditions Register (OCR)
The 32-bit OCR register stores the VDD voltage profile of the card. The MultiMediaCard is capable of executing thevoltage recognition procedure (CMD1) with any standard MultiMediaCard host using operating voltages from 2 to
3.6 Volts.
Accessing the data in the memory array, however, requires 2.7 to 3.6 Volts. The OCR shows the voltage range inwhich the card data can be accessed. Table 3-8 lists the OCR Register definitions and Table 3-9 describes the
structure of the OCR register.
Table 3-8. OCR Register Definition
OCR BitVDD Voltage Window

0-7

Reserved

82.0-2.19

2.1-2.2

10

2.2-2.3

11

2.3-2.412

2.4-2.513

2.5-2.614

2.6-2.715

2.7-2.8

16

2.8-2.917

2.9-3.018

3.0-3.1

19

3.1-3.220

3.2-3.3

21

3.3-3.422

3.4-3.523

3.5-3.6

24-30

Reserved

31

Card power up status bit (busy)

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MultiMediaCard Interface Description

The level coding of the OCR register is as follows:••

Restricted voltage windows=LOW
Card busy=LOW (bit 31)

The least significant 31 bits are constant and will be set as described in Figure 3-6. If bit 32 (the busy bit) is set, it
informs the host that the card power up procedure is finished.

24
00h

16

8

FFh

80h

0
00h
Reserved
Operating
Voltage Range
2.7 – 3.6 volt
Reserved
Busy Bit

Figure 3-6. OCR Structure

3.5.2. Card Identification (CID) Register
The CID register is 16 bytes long and contains a unique card identification number as listed in Table 3-9. It is
programmed during card manufacturing and cannot be changed by MultiMediaCard hosts.
Table 3-9. CID Fields
Name

Type

Width

CID—Slice

CID—Value

Manufacturer ID (MID)

Binary8[127:120]

0x02

The manufacturer IDs are controlled andassigned by the MultiMediaCard
Association.

OEM/Application ID (OID)

Binary16[119:104]0x0000Identifies the card OEM and/or the card
contents. The OID is assigned by the
MMCA. This field may be specificallyconfigured for OEM customers.

Product Name (PNM)

String48[103:56]

See Note 1

6 ASCII characters long

Product Revision (PRV)BCD

8[55:48]

See Note 2

Two binary coded decimal digits

Serial Number (PSN)

Binary32[47:16]

Manufacturing Date Code
(MDT)

BCD

8

[15:8]

See Note 3

Manufacturing date—mm/yy(offset from 1997)

CRC7 checksum (CRC)

Binary7[7:1]

See Note 4

Calculated

Not used, always ‘1’

1

[0:0]

NOTE 1: Model Name
SDMB-16
SDMB-32
SDMJ-64
SDMJ-128

Name in CD Field
SDM016
SDM032
SDM064
SDM1283-10

Comments

32 Bits unsigned integer

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONMultiMediaCard Interface Description

NOTE 2: The product revision is composed of two Binary Coded Decimal (BCD) digits, four bits each, representing an “n.m”
revision number. The “n” is the most significant nibble and the “m” is the least significant nibble.Example: The PRV
binary value filed for product revision “6.2” will be: 0110 0010.
NOTE 3: As an example, this field value for a March 2001 manufacturing date will be: 0011 0100.
NOTE 4: The CRC Checksum is computed by the following formula:
CRC Calculation: G(x)=x7+3+1
M(x)=(MID-MSB)*x119+...+(CIN-LSB)*x0
CRC[6...0]=Remainder[(M(x)*x7)/G(x)]3.5.3. Card Specific Data (CSD) Register
The CSD register contains all the configuration information required in order to access the card data.
In the table below, the Cell Type column defines the CSD field as Read only (R), One Time Programmable (R/W)
or erasable (R/W/E). This table shows, for each field, the value in “real world” units and coded according to the
CSD structure. The Model Dependent column marks (with a check mark—√) the CSD fields that are model
dependent.
Table 3-10. CSD Register
Field

Width
[bits]Cell
Type

CSD-slice

CSD
Value

CSD
Code

CSD_STRUCTURE

2

R[127:126]

V1.2

1

CSD Structure

SPEC_VERS

4

R[125:122]

V2.2

2

MultiMediaCard Specification
Version-2

R[121:120]00Reserved

88

RR[119:112][119:112]

1.5msec
10msec0x0F
0x0F

Data Read Access-Time-1
Data Read Access-Time-1

NSAC

8

R

[111:104]00Data Read Access-Time-2 in
CLK Cycles (NSAC*100)

TRAN_SPEED

8

R[103:96]

20MHz

0x2A

Max. Data Transfer Rate

CCC

12

R

[95:84]

See note1

0x0F5

Card Command Classes

READ_BL_LEN

4

R[83:80]512

9Max. Read Data Block Length

READ_BL_PARTIAL

1

R[79:79]Yes

1Partial Blocks for Read
AllowedWRITE_BLK_MISALIGN

1

R[78:78]No

0

Write Block Misalignment

READ_BLK_MISALIGN

1

R[77:77]No

0

Read Block Misalignment

DSR_IMP1

R[76:76]No

0

DSR Implemented

-

2

R

[75:74]00

Reserved

C_SIZE12

R[73:62]

VDD_R_CURR_MIN

3

R[61:59]60mA

6Max. Read Current @VDD Min.

VDD_R_CURR_MAX

3

R[58:56]80mA

6Max. Read Current @VDD

Model
Dep.

Description

TAAC
BinaryMLC

1)√

Device Size (C_SIZE)

This SanDisk product does not support the following classes: I/O, application specific, stream write, and stream
read.

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MultiMediaCard Interface Description

Field

Width
[bits]Cell
Type

CSD-slice

CSD
Value

CSD
Code

Description

Model
Dep.
Max.

VDD_W_CURR_MIN

3

R[55:53]60mA

6Max. Write Current @VDD Min.

VDD_W_CURR_MAX

3

R[52:50]80mA

6Max. Write Current @VDD
Max.

C_SIZE_MULT

3

R[49:47]

SECTOR_SIZE

5

R[46:42]ERASE_GRP_SIZE

5

R[41:37]

WP_GRP_SIZE

5

R[36:32]32

0x1F

Write Protect Group Size

WP_GRP_ENABLE

1

R[31:31]Yes

1Write Protect Group Enable

DEFAULT_ECC

2

R[30:29]None

0Manufacturer Default ECC

R2W_FACTOR

3

R[28:26]

1:4

2

Read to Write Speed Factor

WRITE_BL_LEN

4

R[25:22]512

9Max. Write Data Block Length

WRITE_BL_PARTIAL

1

R[21:21]No

0Partial Blocks for Write
Allowed-

5R[20:16]00

Reserved

FILE_FORMAT_GRP

1

R/W[15:15]00Indicates File Format of
Selected Group

COPY

1

R/W

[14:14]Copy

1

Copy Flag (OTP)

PERM_WRITE_PROTECT

1

R/W[13:13]No

0

Permanent Write Protection

TMP_WRITE_PROTECT

1

R/W/E

[12:12]No0

Temporary Write Protection

FILE_FORMAT

2

R/W[11:10]00File Format of Card

ECC

2

R/W/E

[9:8]

None

0

ECC Code

CRC

7

R/W/E

[7:1]

-

1

-

[0:0]

√
1

0

Erase Sector Size

√

√
1

1

Device Size Multiplier(C_SIZE_MULT)

Erase Group Size

CRC
Not Used, Always ‘1’

The following sections describe the CSD fields and the relevant data types. If not explicitly defined otherwise, all bit
strings are interpreted as binary coded numbers starting with the left bit first.
CSD_STRUCTURE—Describes the version of the CSD structure.
Table 3-11. CSD Register Structure
CSD_STRUCTURE

CSD Structure Version

Valid for MultiMediaCard Protocol Version

0

CSD version No. 1.0

MultiMediaCard protocol version 1.0-1.2

1

CSD version No. 1.1

MultiMediaCard protocol version 1.4-2.2

2—3

Reserved

Reserved

MMC_PROT—Defines the MultiMediaCard protocol version supported by the card. It includes the definition of
the command set and the card responses. The card identification procedure is compatible for all protocol versions.

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Table 3-12. MultiMediaCard Protocol Version
SPEC_VERS

MultiMediaCard Protocol Version

0

MultiMediaCard protocol version 1.0-1.2

1MultiMediaCard protocol version 1.4

2

MultiMediaCard protocol version 2.0-2.2

3-15

Reserved

TAAC—Defines the asynchronous part (relative to the MultiMediaCard clock (CLK)) of the read access time.
Table 3-13. TAAC Access Time Definition
Code

TAAC Bit
Position
2:0

time exponent
0=1ns, 1=10ns, 2=100ns, 3=1µ ms, 4=10µ ms, 5=100µ ms,
6=1ms, 7=10ms

6:3

time mantissa
0=Reserved, 1=1.0, 2=1.2, 3=1.3, 4=1.5, 5=2.0, 6=2.5, 7=3.0,
8=3.5, 9=4.0, A=4.5, B=5.0, C=5.5, D=6.0, E=7.0, F=8.0

7

Reserved

NSAC—Defines the worst case for the clock dependent factor of the data access time. The unit for NSAC is 100
clock cycles. Therefore, the maximal value for the clock dependent part of the read access time is 25.5k clock
cycles.
The total read access time NAC as expressed in the Table 5-12 is the sum of TAAC and NSAC. It has to be computedby the host for the actual clock rate. The read access time should be interpreted as a typical delay for the first data bitof a data block or stream from the end bit on the read comm ands.
TRAN_SPEED—Table 3-14 defines the maximum data transfer rate TRAN_SPEED.
Table 3-14. Maximum Data Transfer Rate Definition
TRAN_SPEED Bit
2:0

Code
transfer rate exponent
0=100kbit/s, 1=1Mbit/s, 2=10Mbit/s, 3=100Mbit/s, 4...
7=Reserved

6:3

time mantissa
0=Reserved, 1=1.0, 2=1.2, 3=1.3, 4=1.5, 5=2.0, 6=2.5, 7=3.0,
8=3.5, 9=4.0, A=4.5, B=5.0, C=5.5, D=6.0, E=7.0, F=8.0

7

Reserved

CCC—The MultiMediaCard command set is divided into subsets (command classes). The card command classregister CCC defines which command classes are supported by this card. A value of ‘1’ in a CCC bit means that thecorresponding command class is supported. For command class definition refer to Table 5-5.

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MultiMediaCard Interface Description

Table 3-15. Supported Card Command Classes
CCC BitSupported Card Command Class

0class 01

class 1......

11

class 11

READ_BL_LEN—The data block length is computed as 2 READ_BL_LEN. The block length might therefore be in therange 1, 2, 4...2048 bytes.
Table 3-16. Data Block Length
READ_BL_LEN

Block Length020 = 1 Byte

1

21 = 2 Bytes......
11

211 = 2048 Bytes

12-15

Reserved

READ_BL_PARTIAL—Defines whether partial block sizes can be used in block read commands.
READ_BL_PARTIAL=0 means that only the READ_BL_LEN block size can be used for block-oriented datatransfers.
READ_BL_PARTIAL=1 means that smaller blocks can be used as well. The minimum block size will be equal tominimum addressable unit (one byte)
WRITE_BLK_MISALIGN—Defines if the data block to be written by one command can be spread over morethan one physical block of the memory device. The size of the memory block is defined in WRITE_BL_LEN.
WRITE_BLK_MISALIGN=0 signals that crossing physical block boundaries is invalid.
WRITE_BLK_MISALIGN=1 signals that crossing physical block boundaries is allowed.
READ_BLK_MISALIGN—Defines if the data block to be read by one command can be spread over more than
one physical block of the memory device. The size of the memory block is defined in READ_BL_LEN.
READ_BLK_MISALIGN=0 signals that crossing physical block boundaries is invalid.
READ_BLK_MISALIGN=1 signals that crossing physical block boundaries is allowed.
DSR_IMP—Defines if the configurable driver stage is integrated on the card. If set, a driver stage register (DSR)
must be implemented also.

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Table 3-17. DSR Implementation Code Table
DSR_IMPDSR Type0

no DSR implemented

1

DSR implemented

C_SIZE (Device Size)—This parameter is used to compute the card capacity. The memory capacity of the card iscomputed from the entries C_SIZE, C_SIZE_MULT and READ_BL_LEN as follows:
memory capacity = BLOCKNR * BLOCK_LEN
Where:BLOCKNR = (C_SIZE+1) * MULT
MULT = 2C_SIZE_MULT+2
BLOCK_LEN = 2READ_BL_LEN(C_SIZE_MULT < 8)
(READ_BL_LEN < 12)

Therefore, the maximum capacity that can be coded is 4096*512*2048 = 4 GBytes. Example: A four MByte cardwith BLOCK_LEN = 512 can be coded with C_SIZE_MULT = 0 and C_SIZE = 2047.
VDD_R_CURR_MIN, VDD_W_CURR_MIN—The minimum values for read and write currents on VDD power
supply are coded as in Table 3-18.
Table 3-18. VDD Minimum Current Consumption
VDD_R_CURR_MIN
VDD_W_CURR_MIN

Code For Current Consumption @ V DD

2:0

0=0.5mA; 1=1mA; 2=5mA; 3=10mA; 4=25mA; 5=35mA;
6=60mA; 7=100mA

VDD_R_CURR_MAX, VDD_W_CURR_MAX—The maximum values for read and write currents on VDD
power supply are coded as in Table 3-19.
Table 3-19. VDD Maximum Current Consumption
VDD_R_CURR_MAX
VDD_W_CURR_MAX

Code For Current Consumption @ V DD

2:0

0=1mA; 1=5mA; 2=10mA; 3=25mA; 4=35mA; 5=45mA;
6=80mA; 7=200mA

C_SIZE_MULT (Device Size Multiplier)—This parameter is used for coding a factor MULT for computing thetotal device size (see ‘C_SIZE’). The factor MULT is defined as 2 C_SIZE_MULT+2.
Table 3-20. Multiply Factor For The Device Size
C_SIZE_MULT
0
1
2
3
4
5
6
7

MULT
22 = 423 = 824 = 16
25 = 32
26 = 64
27 = 128
28 = 256
29 = 512

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SECTOR_SIZE—The size of an erasable sector. The content of this register is a 5-bit binary coded value, defining
the number of write blocks (see WRITE_BL_LEN). The actual size is computed by increasing this number by one.
A value of zero means 1 write block, 31 means 32 blocks.
ERASE_GRP_SIZE—The size of an erasable group. The contents of this register is a 5-bit binary coded value,
defining the number of sectors (see SECTOR_SIZE). The actual size is computed by increasing this number by one.
A value of zero means 1 sector, 31 means 32 sectors.
WP_GRP_SIZE—The size of a write protected group. The contents of this register is a 5-bit binary coded value,
defining the number of Erase Groups (see ERASE_GRP_SIZE). The actual size is computed by increasing thisnumber by one. A value of zero means 1 erase group, 31 means 32 erase groups.
WP_GRP_ENABLE—A value of ‘0’ means no group write protection possible.
DEFAULT_ECC—Set by the card manufacturer. It defines the ECC code that is recommended for use. The fielddefinition is the same as for the ECC field described later.
R2W_FACTOR—Defines the typical block program time as a multiple of the read access time. Table 3-21 defines
the field format.
Table 3-21. R2W_FACTOR
R2W_FACTOR

Multiples of Read Access Time

0

1

1

2 (write half as fast as read)

2

4

3

8

4

16

5

32

6, 7

Reserved

WRITE_BL_LEN—Block length for write operations. See READ_BL_LEN for field coding.
WRITE_BL_PARTIAL—Defines whether partial block sizes can be used in block write commands.
WRITE_BL_PARTIAL=‘0’ means that only the WRITE_BL_LEN block size can be used for block oriented data
write.
WRITE_BL_PARTIAL=‘1’ means that smaller blocks can be used as well. The minimum block size is one byte.
FILE_FORMAT_GROUP—Indicates the selected group of file formats. This field is read-only for ROM. The
usage of this field is shown in Table 4-18.
COPY—This bit marks the card as an original (‘0’) or non-original (‘1’). Once set to non-original, this bit cannot be
reset to original. The definition of “original” and “non-original” is application dependent and changes no cardcharacteristics.
PERM_WRITE_PROTECT—Permanently protects the whole card content against overwriting or erasing (allwrite and erase commands for this card are permanently disabled). The default value is ‘0’, i.e., not permanently
write protected.

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TMP_WRITE_PROTECT—Temporarily protects the whole card content from being overwritten or erased (allwrite and erase commands for this card are temporarily disabled). This bit can be set and reset. The default value is‘0’, i.e., not write protected.
FILE_FORMAT—Indicates the file format on the card. This field is read-only for ROM. The following formats
are defined.
Table 3-22. FILE_FORMATFILE_FORMAT_GRP FILE_FORMAT

Type

0

0

Hard disk-like file system with partition table

01

DOS FAT (floppy-like) with boot sector only (no partition table)

02

Universal File Format

03

Others/Unknown

10, 1, 2, 3

Reserved

ECC—Defines the ECC code that was used for storing data on the card. This field is used by the host (orapplication) to decode the user data. Table 3-23 defines the field format.
Table 3-23. ECC TypeECCECC Type

Maximum Number Of Correctable Bits Per Block0none (default)

none

1

BCH (542,512)

3

2-3

Reserved-

CRC—The CRC field carries the check sum for the CSD contents. The checksum has to be recalculated by the hostfor any CSD modification. The default corresponds to the initial CSD contents.

3.5.4. Status Register
The MultiMediaCard Status register structure is defined in the following table. The Type and Clear-Condition fields
in the table are coded as follows:
Type:
•
•
•
•

E—Error bit.
S—Status bit.
R—Detected and set for the actual command response.
X—Detected and set during command execution. The host must poll the card by sending statuscommand in order to read these bits.

Clear Condition:•••

A—According to the card current state.
B—Always related to the previous command. Reception of a valid command will clear it (with a delayof one command).
C—Clear by read.

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MultiMediaCard Interface Description

Table 3-24. Status Register
Bits

Identifier

Type

Value

31

OUT_OF_RANGEER30

ADDRESS_ERROR

ERX‘0’= no error‘1’= error‘0’= no error‘1’= error

29

BLOCK_LEN_ERRORER

28

ERASE_SEQ_ERROR

ER

27

ERASE_PARAM

EX26

WP_VIOLATION

ERX

25-24
23

21-20

Not applicable. This bit is always set to ‘0’.
COM_CRC_ERROR
ER‘0’= no error‘1’= error
ILLEGAL_COMMAND
ER‘0’= no error‘1’= error
Not applicable. This bit is always set to ‘0’.

19

ERROR

17
16

Not applicable. This bit is always set to ‘0’.
CID/CSD_OVERWRITE
ERX‘0’= no error‘1’= error

15

WP_ERASE_SKIP

14
13

Not applicable. This bit is always set to ‘0’.
ERASE_RESET
SR‘0’= cleared‘1’= set

12-9

CURRENT_STATESX

8READY_FOR_DATA

SX

7-0

Reserved. Always set to ‘0’.

22

3-18

ERX

SX

‘0’= no error‘1’= error‘0’= no error‘1’= error‘0’= no error‘1’= error‘0’= not protected‘1’= protected‘0’= no error‘1’= error‘0’= not protected‘1’= protected

0 = idle
1 = ready2 = ident
3 = stby
4 = tran
5 = data
6 = rcv
7 = prg
8 = dis9-15 = Reserved‘0’= not ready‘1’= ready

Description
The commands argument was out ofallowed range for this card.
A misaligned address, which did notmatch the block length was used in thecommand.
The transferred block length is not valid.

Clear
Condition
CCC

An error in the sequence of erasecommands occurred.
An invalid selection, sectors or groups, forerase.
The command tried to write a write
protected block.

C

The CRC check of the previous command
failed.
Command not legal for the current state.

B

C
C

B

A general or an unknown error occurred
during the operation.

C

Can be one of the following errors:- The CID register has been alreadywritten and cannot be overwritten.
- The read only section of the CSD
does not match the card content.
- An attempt to reverse the copy (set as
original) or permanent WP (unprotect)bits was made.

C

Only partial address space was erased
due to existing WP blocks.

C

An erase sequence was cleared before
executing because an out of erase
sequence command was received.
The state of the card when the command
was received. If the command execution
causes a state change, it will be visible tothe host in the response to the next
command. The four bits are interpreted asa binary coded number between 0 and
15.

C

Corresponds to buffer empty signaling on
the bus. (RDY/BSY)

A

B

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3.5.5. Relative Card Address (RCA) Register
The 16-bit RCA register carries the card address assigned by the host during the card identification. This address isused for the addressed host-card communication after the card identification procedure. The default value of the
RCA register is 0x0001. The value 0x0000 is reserved to set all cards in Stand-by State with CMD7.

3.5.6. MultiMediaCard Registers in SPI Mode
In SPI mode, only the MultiMediaCard CSD and CID registers are accessible. Their format is identical to the format
in the MultiMediaCard mode. However, a few fields are irrelevant in SPI mode.
In SPI mode, the card status register has a different, shorter format as well. Refer to the SPI Protocol section for
more details.
Table 3-25. MultiMediaCard Registers in SPI Mode
Name

Available in SPI
Mode

Width
(Bytes)Description

CID

Yes

16

Card identification data (serial number, manufacturer ID , etc.).

RCA

No

DSR

No

CSD

Yes

16

Card specific data, information about the card operation conditions.

OCR

No

3.6. File System Format
SanDisk MultiMediaCards are formatted with a “hard disk-like” partitioned DOS FAT file system.
Similar to hard disks in PCs, the first data block of the memory consists of a partition table. Thus, using the same
notation as for hard disks, i.e., partitioning the memory field into logical sectors of 512 bytes each, the first sector isreserved for this partition table. Table 3-26 shows how the data in this sector is structured.
Table 3-26. Partition Table for Hard Disk-like File System
Byte Position

Length (bytes)

Entry Description

Value/Range

0x0

446

Consistency Check Routine

0x1be

16

Partition Table Entry(See below.)

0x1ce

16

Partition Table Entry(See below.)

0x1de

16

Partition Table Entry(See below.)

0x1ee

16

Partition Table Entry(See below.)

0x1fe

1

Signature’0x55’

0x1ff

1

Signature’0xaa’

Every partition entry consists of the fields listed in Table 3-27.

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MultiMediaCard Interface Description

Table 3-27. Partition Entry Description
Byte Position

Length (Bytes)

Entry Description

Value/Range

0x01

Boot Descriptor

0x00 (Non-bootable Device),
0x80 (Bootable Device)

0x1

3First Partition Sector

Address of First Sector

0x4

1File System Descriptor

0 = Empty
1 = DOS 12-bit FAT < 16 MB
4 = DOS 16-bit FAT < 32 MB
5 = Extended DOS
6 = DOS 16-bit FAT >= 32 MB
0x10-0xff = Free for other File Systems*

0x5

3

Last Partition Sector

Address of Last Sector

0x8

4First Sector Position Relative to
Beginning of Device

Number of First Sector (Linear Address)

0xc

4

Number of Sectors in Partition

Between one and Maximum Number ofSectors on Device

The descriptors marked by an asterisk are not used in DOS systems. Every DOS partition is based on a 12-bit, 16-bit
FAT or VFAT respectively. All sector numbers are stored in Little-Endian format (least significant byte first). The
start and end addresses of the partition are given in terms of heads, tracks and sectors, and can therefore be ignored
for the MultiMediaCard, since the position of the partition can be determined by the last two entries.
The boot sector is described in Table 3-28.
Table 3-28. Boot Sector Configuration

3-20

Byte Position

Length(Bytes)Entry Description

Value/Range

0x03

Jump Command

0xeb 0xXX 0x90

0x38OEM Name

XXX

0xb

2

Bytes/Sector

512

0xd

1

Sectors/Cluster

XXX (range: 1—64)

0xe

2Reserved Sectors (Number of reserved sectors at
the beginning of the media including the bootsector.)

1

0x10

1

Number of FATs

2

0x11

2

Number of Root Directory Entries

512

0x13

2

Number of Sectors on MediaXXX (Depends on card capacity, if the media
has more than 65535 sectors, this field is zeroand the ‘number of total sectors’ is set.)

0x15

1

Media Descriptor

0xf8 (Hard Disk)

0x16

2

Sectors/FAT

XXX

0x18

2

Sectors/Track

32 (No Meaning)

0x1a

2

Number of Heads

2 (No Meaning)

0x1c

4

Number of Hidden Sectors

0

0x20

4

Number of Total Sectors

XXX (Depends on Capacity)

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Byte Position

Length(Bytes)Entry Description

Value/Range

0x24

1

Drive Number

0x80

0x25

1

Reserved

0

0x26

1

Extended Boot Signature

0x29

0x27

4

Volume ID or Serial Number

XXX

0x2b

11

Volume LabelXXX (ASCII characters padded with blanks if
less than 11 characters.)

0x36

8

File System TypeXXX (ASCII characters identifying the filesystem type FAT12 or FAT16.)

0x3e

448

Load Program Code

XXX

0x1fe

1

Signature

0x55

0x1ff

1

Signature0xaa

All ‘X’ entries are denoting card dependent or non-fixed values. The number of sectors per track and the number ofheads are meaningless for the MultiMediaCard and can be ignored.

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4. MultiMediaCard Protocol Description
All communication between the host and MultiMediaCards is controlled by the host (master). The host sends thefollowing two types of commands:•

Broadcast Commands—Broadcast commands are intended for all MultiMediaCards. Some of thesecommands require a response.

•

Addressed (Point-to-Point) Commands—Addressed commands are sent to the addressed
MultiMediaCard and cause a response from this card.

A general overview of the command flow is shown in Figure 4-1 for the Card Identification Mode and in Figure 4-2
for the Data Transfer Mode. The commands are listed in the command tables (Tables 4-3 through 4-11). The
dependencies between the current MultiMediaCard state, received command and following state are listed inTable 4-11. In the following sections, the different card operation modes will be described first. Thereafter, therestrictions for controlling the clock signal are defined. All MultiMediaCard commands together with thecorresponding responses, state transitions, error conditions and timings are presented in the following sections.
Three operation modes are defined for MultiMediaCards:•

Card Identification Mode—The host will be in card identification mode after reset and while it islooking for new cards on the bus. MultiMediaCards will be in this mode after reset until the SET_RCA
command (CMD3) is received.

•

Interrupt Mode—The Interrupt Mode option defined in the MultiMediaCard Standard is not
implemented on the SanDisk MultiMediaCard.
Data Transfer Mode—MultiMediaCards will enter data transfer mode once an RCA is assigned tothem. The host will enter data transfer mode after identifying all the MultiMediaCards on the bus.

•

Table 4-1 shows the dependencies between bus modes, operation modes and card states. Each state in theMultiMediaCard state diagram (Figures 4-1 and 4-2) is associated with one bus mode and one operation mode.
Table 4-1. Bus Modes Overview
Card State
Inactive State

Operation Mode

Bus Mode

Inactive

Idle State
Ready State

Card Identification Mode

Open-Drain

Data Transfer Mode

Push-Pull

Identification State
Stand-by State
Transfer State
Sending-data State
Receive-data State
Programming State
Disconnect State

If a command with improper CRC was received, it is ignored. If there was a command execution (e.g., continuous
data read) the card continues in the operation until it gets a correct host command.

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MultiMediaCard Protocol Description

4.1. Card Identification ModeAll the data communication in the Card Identification Mode uses only the command line (CMD).

Figure 4-1. MultiMediaCard State Diagram (Card Identification Mode)

4.1.1. Reset
GO_IDLE_STATE (CMD0) is the software reset command and sets all MultiMediaCards to Idle State regardless ofthe current card state. MultiMediaCards in Inactive State are not affected by this command.
After power-on by the host, all MultiMediaCards are in Idle State, including the cards that were in Inactive State.
Note that at least 74 clock cycles are required prior to starting bus communication.
After power-on or CMD0, all MultiMediaCards’ output bus drivers are in a high-impedance state. The host drives
the bus at the identification clock rate f OD (generated by a push-pull driver stage).

4-2

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4.1.2. Operating Voltage Range Validation
The MultiMediaCard standard requires that all MultiMediaCards will be able to establish communication with thehost using any operating voltage between VDD-min and VDD-max. However, during data transfer minimum andmaximum values for VDD are defined in the CSD and may not cover the whole range. MultiMediaCard hosts are
expected to read the card’s CSD register and select proper VDD values or reject the card.
MultiMediaCards that store the CID and CSD data in the payload memory can communicate this information only
under data-transfer VDD conditions. This means if host and card have non-compatible VDD ranges, the card will not
be able to complete the identification cycle, nor to send CSD data.
SEND_OP_COND (CMD1) is designed to provide MultiMediaCard hosts with a mechanism to identify and rejectcards that do not match the host’s desired V DD range. This is accomplished by the host sending the required VDD
voltage window as the operand of this command. MultiMediaCards that cannot perform data transfer in the specified
range must discard themselves from further bus operations and go into Inactive State. All other MultiMe diaCards
will respond concurrently (same method as card identification) sending back their VDD range. The wired-or result of
the response will show all voltage ranges which some of the cards do not support.
By omitting the voltage range in the command, the host can query the MultiMediaCard stack and determine if there
are any non-compatibilities before sending out-of-range cards into the Inactive State. Bus query should be used if
the host can select a common voltage range or wants to notify the application of non usable cards in the stack.
The busy bit in the CMD1 response can be used by a card to tell the host that it is still working on its power-up/reset
procedure (e.g., downloading the register information from memory field) and is not ready yet for communication.
In this case the host must repeat CMD1 until the busy bit is cleared.
During the initialization procedure, the host is not allowed to change the OCR values. Changes in the OCR content
will be ignored by the MultiMediaCard. If there is a real change in the operating conditions the host must reset thecard stack (using CMD0) and begin the initialization procedure once more.
GO_INACTIVE_STATE (CMD15) can also be used to send an addressed MultiMediaCard into the Inactive State.
This command is used when the host explicitly wants to deactivate a card (e.g., host is changing V DD into a range
which is known to be not supported by this card).

4.1.3. Card Identification Process
The host starts the card identification process in open-drain mode with the identification clock rate fOD. The open
drain driver stages on the CMD line allow parallel card operation during card identification.
After the bus is activated and a valid operation condition is obtained, the host then asks all cards for their uniquecard identification (CID) number with the broadcast command ALL_SEND_CID (CMD2). All remaining
unidentified cards (i.e., those which are in Ready State) simultaneously start sending their CID numbers serially,
while bit-wise monitoring their outgoing bit stream. Those cards, whose outgoing CID bits do not match thecorresponding bits on the command line in any one of the bit periods, stop sending their CID immediately and must
wait for the next identification cycle (cards stay in the Ready State). Since CID numbers are unique for each
MultiMediaCard, there should be only one card that successfully sends its full CID-number to the host. This cardthen goes into Identification State. The host issues CMD3, (SET_RELATIVE_ADDR) to assign this card a relative
address (RCA), which is shorter than CID and which will be used to address the card in future data transfer mode
communication (typically with a higher clock rate than fOD). Once the RCA is received the card transfers to theStand-by State and does not react to further identification cycles. The MultiMediaCard also switches its output
drivers from open-drain to push-pull.

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MultiMediaCard Protocol Description

The host repeats the identification process as long as it receives a response (CID) to its identification co mmand(CMD2). When no MultiMediaCard responds to this command, all cards have been identified. The time-out
condition to recognize completion is the absence of a start bit for more than 5 clock periods after sending CMD2.

4.2. Data Transfer Mode
When all cards are in Stand-by State communication over the CMD and DAT lines will be in push-pull mode. Until
the content of all CSD registers is known by the host, the fPP clock rate must remain at fOD because some cards may
have operating frequency restrictions. The host issues SEND_CSD (CMD9) to obtain the CSD register (e.g., ECC
type, block length, card storage capacity, maximum clock rate).

CMD3

Card Identification Mode

CMD15

Data Transfer
ModeInterrupt
Mode

CMD0

From all States in Data
Transfer Mode
Sending Data
State (data)

CMD13
Wait-IRQ
State (irqq)

No State Transition in
Data Transfer Mode

CMD40

CMD7
Any start bit
detected on
the busStand-byState (stby)

CMD7

CMD4,
9, 10

"operation
complete"

CMD28,
29, 38Transfer State(tran)CMD11,
17, 18, 30

CMD16,
32...37

CMD20, 24,
25, 26, 27, 42"operation
complete"
CMD24, 25

CMD7
Disconnect
State (dis)CMD12,"operation
complete"

Programming
State (prg)Receive Data
State (rcv)

CMD12 or"transfer
end"

CMD7

Figure 4-2. MultiMediaCard State Diagram (Data Transfer Mode)

4-4

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CMD7 is used to select one MultiMediaCard and place it in the Transfer State. Only one MultiMediaCard can be in
the Transfer State at a given time. If a previously selected MultiMediaCard is in the Transfer State, its connection
with the host is released and it will move back to the Stand -by State. When CMD7 is issued with the reserved
relative card address “0x0000,” all cards transfer back to Stand -by State. This command is used to identify newcards without resetting other already acquired cards. MultiMediaCards that already have an RCA do not respond to
the identification command flow in this state.
All data communication in the Data Transfer Mode is point-to point between the host and the selected
MultiMediaCard (using addressed commands). All addressed commands are acknowledged with a response on the
CMD line.
The relationship between the various data transfer modes is summarized in the card state diagram Figure 4-2, and in
the following paragraphs:•

All data read commands may be aborted any time by the stop command (CMD12). The data transfer
will terminate and the MultiMediaCard will return to the Transfer State. The read commands are: block
read (CMD17), multiple block read (CMD18) and send write protect (CMD30).

•

All data write commands can be aborted any time by the stop command (CMD12). The write
commands must be stopped prior to deselecting the MultiMediaCard by CMD7. The write commands
are: block write (CMD24 and CMD25), write CID (CMD26), and write CSD (CMD27).
As soon as the data transfer is completed, the MultiMediaCard will exit the data write state and move
either to the Programming State (transfer is successful) or Transfer State (transfer failed).

•
•
•

•

•
•
•

•
•

If a block write operation is stopped and the block length and CRC of the last block are valid, the data
will be programmed.
The MultiMediaCard may provide buffering for block write. This means that the next block can besent to the card while the previous is being programmed. If all write buffers are full, and as long as theMultiMediaCard is in Programming State (see MultiMediaCard state diagram Figure 5-2), the DATline will be kept low.
There is no buffering option for write CSD, write CID, write protection and erase. This means thatwhile the MultiMediaCard is busy servicing any one of these commands, no other data transfer
commands will be accepted. DAT line will be kept low as long as the MultiMediaCard is busy and in
the Programming State.
Parameter set commands are not allowed while the MultiMediaCard is programming. Parameter set
commands are: set block length (CMD16), and erase tagging/untagging (CMD32-37).
Read commands are not allowed while the MultiMediaCard is programming.
Moving another MultiMediaCard from Stand-by to Transfer State (using CMD7) will not terminate a
programming operation. The MultiMediaCard will switch to the Disconnect State and will release theDAT line.
A MultiMediaCard can be reselected while in the Disconnect State, using CMD7. In this case theMultiMediaCard will move to the Programming State and reactivate the busy indication.
Resetting a MultiMediaCard (using CMD0 or CMD15) will terminate any pending or active
programming operation. This may destroy the data contents on the MultiMediaCard. It is up to thehost’s responsibility to prevent this.

4.2.1. Data Read Format
The DAT bus line is high when no data is transmitted. A transmitted data block consists of a start bit (LOW),
followed by a continuous data stream. The data stream contains the net payload data (and error correction bits if an
off-card ECC is used). The data stream ends with an end bit (HIGH). The data transmission is synchronous to theclock signal.

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MultiMediaCard Protocol Description

The payload for block oriented data transfer is preserved by a CRC check sum. The generator polynomial is astandard CCITT polynomial:
x16+x12+x5+1.
The code is a shortened BCH code with d=4 and is used for payload length of up to 2048 Bytes.
Block readThe basic unit of data transfer is a block whose maximum size is defined in the CSD (READ_BL_LEN). Smaller
blocks whose starting and ending address are wholly contained within one physical block (as defined by
READ_BL_LEN) may also be transmitted. A CRC is appended to the end of each block ensuring data transfer
integrity. CMD17 (READ_SINGLE_BLOCK) starts a block read and after a complete transfer the card goes back toTransfer State. CMD18 (READ_MULTIPLE_BLOCK) starts a transfer of several consecutive blocks. Blocks will
be continuously transferred until a stop command is issued.
If the host uses partial blocks whose accumulated length is not block aligned, the card will, at the beginning of thefirst misaligned block, detect a block misalignment error, set the ADDRES S_ERROR error bit in the status register,abort transmission and wait (in the Data State) for a stop command.

4.2.2. Data Write Format
The data transfer format is similar to the data read format. For block-oriented write data transfer, the CRC check bits
are added to each data block. The card performs a CRC check for each such received data block prior to a write
operation. (The polynomial is the same one used for a read operation.) By this mechanism, writing of erroneouslytransferred data can be prevented.
Block write
Block write (CMD24—27) means that one or more blocks of data are transferred from the host to the card with a
CRC appended to the end of each block by the host. If the CRC fails, the card will indicate the failure on the DATline (see below); the transferred data will be discarded and not written, and all further transmitted blocks (in multiple
block write mode) will be ignored.
If the host uses partial blocks whose accumulated length is not block aligned, the card will detect the block
misalignment error and abort programming before the beginning of the first misaligned block. The card will set the
ADDRESS_ERROR error bit in the status register, and while ignoring all further data transfer, wait (in theReceiveData-State) for a stop command.
The write operation will also be aborted if the host tries to write over a write -protected area. In this case, however,the card will set the WP_VIOLATION bit.
After receiving a block of data and completing the CRC check, the card will begin programming and hold the DATline low if its write buffer is full and unable to accept new data from a new WRITE_BLOCK command. The host
may poll the status of the card with a SEND_STATUS command at any time, and the card will respond with its
status. The status bit READY_FOR_DATA indicates whether the MultiMediaCard can accept new data or whether
the write process is still in progress. The host may deselect the card by issuing CMD7 (to select a different card),
which will place the card in the Disconnect State and release the DAT line without interrupting the write operation.
When reselecting the card, it will reactivate busy indication by pulling DAT to low if programming is still inprogress and write buffer is unavailable.

1)

4-6

All upper case names are defined in the CSD.

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4.2.3. CSD Programming
Programming of the CSD register does not require a previous block length setting. After sending CMD27 andgetting the R1 response, send the start bit=0, the modified CSD register = 16Bytes, the CRC16 = 2Bytes, and theend bit = 1. Only the least significant 16 bits [15:0] of the CSD can be changed by the host. The rest of the CSD
register content must match the card CSD. If the card detects a content inconsistency between the old and new CSD
register, it will not reprogram the CSD. This is done to ensure validity of the CRC field of the CSD register.
Bits [7:1] are the CRC7 of bits [127:8] of the CSD register , which should be recalculated once the CSD register ischanged. After calculating CRC7, the CRC16 should also be calculated for all of the CSD register, [127:0].

4.2.4. Erase
It is desirable to erase many sectors simultaneously in order to enhance the data throughput. Identification of these
sectors is accomplished with the TAG_* commands. Either an arbitrary set of sectors within a single erase group or
an arbitrary selection of erase groups may be erased at one time, but not both together. That is, the unit of measurefor determining an erase is either a sector or an erase group, but if a sector, all selected sectors must lie within thesame erase group. To facilitate selection, a first command with the starting address is followed by a second
command with the final address, and all sectors within this range will be selected for erase. After a range is selected,
an individual sector (or group) within that range can be removed using the UNTAG command.
The host must adhere to the following command sequence: TAG_SECTOR_START, TAG_SECTOR_END,
UNTAG_SECTOR (up to 16 untag sector commands can be sent for one erase cycle) and ERASE (o r the same
sequence for group tagging). The following exception conditions are detected by the MultiMediaCard:•

An erase or tag/untag command is received out of sequence. The card will set the
ERASE_SEQ_ERROR error bit in the status register and reset the whole sequence.

•

An out of sequence command (except SEND_STATUS) is received. The card will set the
ERASE_RESET status bit in the status register, reset the erase sequence and execute the lastcommand.

If the erase range includes write protected sectors, they will be left intact and only the non-protected sectors will beerased. The WP_ERASE_SKIP status bit in the status register will be set.
The address field in the tag commands is a sector or a group address in byte units. The card will ignore all LSBs
below the group or sector size.
The number of untag commands (CMD34 and CMD37) which are used in a sequence is limited up to 16.
As described above for block write, the MultiMediaCard will indicate that an erase is in progress by holding DAT
low.

4.2.5. Write Protect Management
Card data may be protected against either erase or write by the write protection features. The entire card may bepermanently write protected by the manufacturer or content provider by setting the permanent or temporary write
protect bits in the CSD. Portions of the data may also be protected (in units of WP_GRP_SIZE sectors as specified
in the CSD). The SET_WRITE_PROT command sets the write protection of the addressed write-protect group, andthe CLR_WRITE_PROT command clears the write protection of the addressed write-protect group.

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MultiMediaCard Protocol Description

The SEND_WRITE_PROT command is similar to a single block read command. The card will send a data blockcontaining 32 write protection bits (representing 32 write protect groups starting at the specified address) followedby 16 CRC bits. The address field in the write protect commands is a group address in byte units. The card will
ignore all LSBs below the group size.

4.2.6. Card Lock/Unlock Operation
The password protection feature enables the host to lock a card while providing a password, which later will be used
for unlocking the card. The password and its size is kept in an 128 bit PWD and 8 bit PWD_LEN registers,
respectively. These registers are non-volatile so that a power cycle will not erase them.
Locked cards respond to (and execute) all commands in the "basic" command class (class 0) and “lock card”
command class. Thus the host is allowed to reset, initialize, select, query for status, etc., but not to access data on thecard. If the password was previously set (the value of PWD_LEN is not‘0’) will be locked automatically after poweron.
Similar to the existing CSD and CID register write commands the lock/unlock command is available in "transfer
state" only. This means that it does not include an address argument and the card has to be selected before using it.
The card lock/unlock command has the structure and bus transaction type of a regular single block write command.
The transferred data block includes all the required information of the command (password setting mode, PWD
itself, card lock/unlock etc.). Table 4-2 describes the structure of the command data block.
Table 4-2. Lock Card Data Structure
Byte #

Bit 7

0

Bit 6

Bit 5

Reserved

1

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

ERASE

LOCK_UNLOCK

CLR_PWDSET_PWDPWD_LEN

2
Password Data…
PWD_LEN + 1

ERASE:‘1’ Defines Forced Erase Operation (all other bits shall be ‘0’) and only the cmd
byte is sent.
LOCK/UNLOCK: ‘1’ = Locks the card. ‘0’ = Unlock the card (note that it is valid to set this bit
together with SET_PWD but it is not allowed to set it together with CLR_PWD).
CLR_PWD:‘1’ = Clears PWD.
SET_PWD:‘1’ = Set new password to PWD
PWD_LEN:
Defines the following password length (in byt es).
PWD:
The password (new or currently used depending on the command).
The data block size shall be defined by the host before it sends the card lock/unlock command. This will allow
different password sizes.

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4.2.6.1. Setting the Password
The sequence for setting the password is as follows:
1.
2.

3.

4.

Select a card (CMD7), if not previously selected already.
Define the block length (CMD16), given by the 8bit card lock/unlock mode, the 8 bits password size(in bytes), and the number of bytes of the new password. In case that a password replacement is done,
then the block size shall consider that both passwords, the old and the new one, are sent with thecommand.
Send Card Lock/Unlock command with the appropriate data block size on the data line including 16bit CRC. The data block shall indicate the mode (SET_PWD), the length (PWD_LEN) and thepassword itself. In case that a password replacement is done, then the length value (PWD_LEN) shall
include both passwords, the old and the new one, and the PWD field shall include the old password(currently used) followed by the new password.
In case that the sent old password is not correct (not equal in size and content) then
LOCK_UNLOCK_FAILED error bit will be set in the status register and the old password does notchange. In case that PWD matches the sent old password then the given new password and its size will
be saved in the PWD and PWD_LEN fields, respectively. Note that the password length register(PWD_LEN) indicates if a password is currently set. When it equals ‘0’ there is no password set. If thevalue of PWD_LEN is not equal to zero the card will lock itself after power up. It is possible to lockthe card immediately in the current power session by setting the LOCK/UNLOCK bit (while setting
the password) or sending additional command for card lock.

4.2.6.2. Reset the Password
The sequence for resetting the password is as follows:
1.
2.
3.

Select a card (CMD7), if not previously selected already.
Define the block length (CMD16), given by the 8-bit card lock/unlock mode, the 8-bit password size(in bytes), and the number of bytes of the currently used password.
Send the card lock/unlock command with the appropriate data block size on the data line including 16bit CRC. The data block shall indicate the mode CLR_PWD, the length (PWD_LEN) and thepassword (PWD) itself (LOCK/UNLOCK bit is don’t care). If the PWD and PWD_LEN content matchthe sent password and its size, then the content of the PWD register is cleared and PWD_LEN is set to
0. If the password is not correct then the LOCK_UNLOCK_FAILED error bit will be set in the status
register.

4.2.6.3. Locking a Card
The sequence for locking a card is as follows:
1.
2.
3.

Select a card (CMD7), if not previously selected already.
Define the block length (CMD16), given by the 8-bit card lock/unlock mode, the 8-bit password size(in bytes), and the number of bytes of the currently used password.
Send the card lock/unlock command with the appropriate data block size on the data line including
16-bit CRC. The data block shall indicate the mode LOCK, the length (PWD_LEN) and the password(PWD) itself.

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MultiMediaCard Protocol Description

If the PWD content equals to the sent password then the card will be locked and the card-locked status bit will be set
in the status register. If the password is not correct then LOCK_UNLOCK_FAILED error bit will be set in the status
register. Note that it is possible to set the password and to lock the card in the same sequence. In such case the hostshall perform all the required steps for setting the password (as described above) including the bit LOCK set while
the new password command is sent. If the password was previously set (PWD_LEN is not ‘0’), then the card will belocked automatically after power on reset.
An attempt to lock a locked card or to lock a card that does not have a password will fail and the
LOCK_UNLOCK_FAILED error bit will be set in the status register.

4.2.6.4. Unlocking the Card
The sequence for unlocking a card is as follows:
1.
2.
3.

Select a card (CMD7), if not previously selected already.
Define the block length (CMD16), given by the 8-bit card lock/unlock mode, the 8-bit password size(in bytes), and the number of bytes of the currently used password.
Send the card lock/unlock command with the appropriate data block size on the data line including 16bit CRC. The data block shall indicate the mode UNLOCK, the length (PWD_LEN) and the password(PWD) itself.

If the PWD content equals to the sent password then the card will be unlocked and the card-locked status bit will becleared in the status register. If the password is not correct then the LOCK_UNLOCK_FAILED error bit will be set
in the status register.
Note that the unlocking is done only for the current power session. As long as the PWD is not cleared the card will
be locked automatically on the next power up. The only way to unlock the card is by clearing the password.
An attempt to unlock an unlocked card will fail and LOCK_UNLOCK_FAILED error bit will be set in the status
register.

4.2.6.5. Forcing Erase
In case the user forgot the password (the PWD content) it is possible to erase all the card data content along with the
PWD content. This operation is called Forced Erase:1.
2.

Select a card (CMD7), if not previously selected already.
Define the block length (CMD16) to 1 byte (8-bit card lock/unlock command). Send the card
lock/unlock command with the appropriate data block of one byte on the data line including 16-bit
CRC. The data block shall indicate the mode ERASE (the ERASE bit shall be the only bit set).

If the ERASE bit is not the only bit in the data field then the LOCK_UNLOCK_FAILED error bit will be set in thestatus register and the erase request is rejected. If the command was accepted then ALL THE CARD CONTENTWILL BE ERASED including the PWD and PWD_LEN register content and the locked card will get unlocked.
An attempt to force erase on an unlocked card will fail and LOCK_UNLOCK_FAILED error bit will be set in thestatus register.

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4.3. Clock Control
The MultiMediaCard bus clock signal can be used by the MultiMediaCard host to set the cards to energy saving
mode or to control the data flow (to avoid under-run or over-run conditions) on the bus. The host is allowed to lower
the clock frequency or shut it down.
There are a few restrictions the MultiMediaCard host must follow:•••

The bus frequency can be changed at any time (under the restrictions of maximum data transfer
frequency, defined by the MultiMediaCard and the identification frequency).
It is an obvious requirement that the clock must be running for the MultiMediaCard to output data or
response tokens. After the last MultiMediaCard bus transaction, the host is required, to provide eight(8) clock cycles for the card to complete the operation before shutting down the clock. Following is alist of various MultiMediaCard bus transactions:−
A command with no response—eight clocks after the host command end bit.
−
A command with response—eight clocks after the card response end bit.
−
A read data transaction—eight clocks after the end bit of the last data block.
−A write data transaction—eight clocks after the CRC status token.
The host is allowed to shut down the clock of a “busy” card. The MultiMediaCard will complete theprogramming operation regardless of the host clock. However, the host must provide a clock edge forthe card to turn off its busy signal. Without a clock edge the MultiMediaCard (unless previously
disconnected by a deselect command -CMD7) will force the DAT line down, permanently.

4.4. Cyclic Redundancy Codes (CRC)
The CRC is intended for protecting MultiMediaCard commands, responses and data transfer against transmission
errors on the MultiMediaCard bus. One CRC is generated for every command and checked for every response on the
CMD line. For data blocks, one CRC per transferred block is generated. The CRC is generated and checked as
described in the following.
CRC7—The CRC7 check is used for all commands, for all responses except type R3, and for the CSD and CID
registers. The CRC7 is a 7-bit value and is computed as follows:
generator polynomial: G(x) = x7 + x3 + 1.
M(x) = (first bit) * x n + (second bit) * x n-1 +...+ (last bit) * x0
CRC[6...0] = Remainder [(M(x) * x7) / G(x)]All CRC registers are initialized to zero. The first bit is the most significant bit of the corresponding bit string (of thecommand, response, CID or CSD). The degree n of the polynomial is the number of CRC protected bits decreased
by one. The number of bits to be protected is 40 for commands and responses (n = 39), and 120 for the CSD and
CID (n = 119).

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MultiMediaCard Protocol Description

Figure 4-3. CRC7 Generator/Checker
CRC16—The CRC16 is used for payload protection in block transfer mode. The CRC check sum is a 16 -bit value
and is computed as follows:
generator polynomial G(x) = x16 + x12 +x5 +1
M(x) = (first bit) * xn + (second bit)* xn-1 +...+ (last bit) * x0
CRC[15...0] = Remainder [(M(x) * x16 )/G(x)]All CRC registers are initialized to zero. The first bit is the first data bit of the corresponding block. The degree n of
the polynomial denotes the number of bits of the data block decreased b y one. For example, n = 4,095 for a block
length of 512 bytes. The generator polynomial G(x) is a standard CCITT polynomial. The code has a minimal
distance d=4 and is used for a payload length of up to 2,048 bytes (n < 16,383).

Figure 4-4. CRC16 Generator/Checker

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4.5. Error Conditions
The following sections provide valuable information on error conditions.
4.5.1. CRC and Illegal Command
All commands are protected by CRC (cyclic redundancy check) bits. If the addressed MultiMediaCard’s CRC check
fails, the card does not respond and the command is not executed. The MultiMediaCard does not change its state,
and COM_CRC_ERROR bit is set in the status register.
Similarly, if an illegal command has been received, a MultiMediaCard shall not change its state, shall not respondand shall set the ILLEGAL_COMMAND error bit in the status register. Only the non -erroneous state branches areshown in the state diagrams (Figure 5-1 and Figure 5-2). Table 5-13 contains a complete state transition description.
There are different kinds of illegal commands:•••

Commands that belong to classes not supported by the MultiMediaCard (e.g., I/O command CMD39).
Commands not allowed in the current state (e.g., CMD2 in Transfer State).
Commands that are not defined (e.g., CMD6).

4.5.2. Read, Write and Erase Time-out Conditions
The times after which a time-out condition for read/write/erase operations occurs are (card independent) 10 times
longer than the typical access/program times for these operations given below. A card shall complete the commandwithin this time period, or give up and return an error message. If the host does not get a response within the definedtime-out it should assume the card is not going to respond any more and try to recover (e.g., reset the card, power
cycle, reject). The typical access and program times are defined as follows:
Read
The read access time is defined as the sum of the two times given by the CSD parameters TAAC and NSAC. These
card parameters define the typical delay between the end bit of the read command and the start bit of the data block.
Write
The R2W_FACTOR field in the CSD is used to calculate the typical block program time obtained by multiplying
the read access time by this factor. It applies to all write/erase commands (e.g., SET(CLEAR)_WRITE_PROTECT,PROGRAM_CSD(CID) and the block write commands).
Erase
The duration of an erase command will be (order of magnitude) the number of sectors to be erased multiplied by theblock write delay.

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MultiMediaCard Protocol Description

4.6. Commands
The following sections provide valuable information on commands.
4.6.1. Command Types
There are four kinds of commands defined on the MultiMediaCard bus:•

Broadcast commands (bc)—Sent on CMD, no response.

•

Broadcast commands with response (bcr)—Sent on CMD, response (all cards simultaneously) on
CMD.
Addressed (point-to-point) commands (ac)—Sent on CMD, response on CMD.

••

Addressed (point-to-point) data transfer commands (adtc)—Sent on CMD, response on CMD, datatransfer on DAT.

The command transmission always starts with the MSB.

4.6.2. Command Format(Command length 48 bits, 2.4 µs @ 20 MHz)01

bit 5...bit 0

bit 31...bit 0

bit 6...bit 0

1

start bithostcommandargument

CRC71

end bitCommands and arguments are listed in Tables 4-4 through 4-10.
7-bit CRC Calculation: G(x) = x 7 + x3 + 1
M(x) = (start bit)∗x39 + (host bit)∗x38 +...+ (last bit before CRC)∗x0
CRC[6...0] = Remainder[(M(x)∗x7)/G(x)]4.6.3. Command Classes
The command set of the MultiMediaCard is divided into several classes (refer to Table 4-3). Each class supports a
set of MultiMediaCard functions. The supported Card Command Classes (CCC) are coded as a parameter in the card
specific data (CSD) register of each card, providing the host with information on how to access the card.

1)

4-14

7-bit Cyclic Redundancy Check.

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Table 4-3. Card Command Classes (CCCs) (0 through 20)
Class Description

Card Command
Class (CCC)

Supported Commands
0

1

2

3

4

7

9 10 11 12 13 15 16 17 18 20

+

+

+

+

+

+

+

Class 0

Basic

+

+

+

+

Class 2Block Read+Class 4Block Write+

Class 5Erase

Class 6

Write-Protection

Class 7Lock CardClass 8

Application Specific 2

Class 9I/O Mode1

Class 10-11

Reserved++

Table 4-4. Card Command Classes (CCCs) (24 through 56)
Card Command Class Description
Class (CCC)

Supported Commands
24 25 26 27 28 29 30 32 33 34 35 36 37 38 39 40 42 55 56

Class 0

Basic

Class 2Block ReadClass 4Block Write

Class 5Erase

Class 6

Write-Protection

Class 7Lock CardClass 8

Application SpecificClass 9I/O ModeClass 10-11

Reserved

+

+

+

+
+
+

+

+

+

+

+

+

+

+
+
+
+

+

+

4.6.4. Detailed Command Description
All future reserved commands have to be 48-bits long, their responses have to be also 48-bits long or they might also
have no response.
Tables 4-5 through 4-13 define in detail the MultiMediaCard bus commands.

1)

Application specific and I/O mode classes are not supported by the SanDisk MultiMediaCard.

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MultiMediaCard Protocol Description

Table 4-5. Basic Commands (Class 0 And Class 1)
Cmd Index

Type

Argument

Resp

Abbreviation

Command Description

CMD0

bc

[31:0] don’t cares*-

GO_IDLE_STATE

Resets all cards to Idle State.

CMD1

bcr

[31:0] OCR
without busy

R3

SEND_OP_COND

Asks all cards in idle state to send their operation
conditions register content in the response on the
CMD line.

CMD2

bcr

[31:0] don’t cares*

R2

ALL_SEND_CID

Asks all cards to send their CID numbers on the
CMD line.

CMD3

ac

[31:16] RCA[15:0] don’t cares*

R1

SET_RELATIVE_ADDRAssigns relative address to the card.

CMD41

Not Supported

CMD5

Reserved

CMD6
CMD7

Reservedac[31:16] RCA[15:0] don’t cares*

R1
(only
from theselected
card)

SELECT/DESELECT_CARD

Command toggles a card between the Stand-by
and Transfer states or between the Programmingand Disconnect state.
In both cases the card is selected by its own
relative address and deselected by any otheraddress; address 0 deselects all.

CMD8

Reserved

CMD9ac[31:16] RCA[15:0] don’t cares*

R2

SEND_CSD

Addressed card sends its card-specific data (CSD)
on the CMD line.

CMD10

ac

[31:16] RCA[15:0] don’t cares*

R2

SEND_CID

Addressed card sends its card identification (CID)on the CMD line.

CMD11

Not Supported

CMD12

ac

[31:0] don’t cares*

R1b2

STOP_TRANSMISSION

Terminates a multiple block read/write operation.

CMD13

ac

[31:16] RCA[15:0] don’t cares*

R1

SEND_STATUS

Addressed card sends its status register.

CMD14

Reserved[31:16] RCA
GO_INACTIVE_STATE[15:0] don’t cares** The bit places must be filled but the value is irrelevant.
CMD15

ac

Sets the card to inactive state.

Table 4-6. Block Read Commands (Class 2)
Cmd Index

Type

Argument

Resp

CMD16

ac

[31:0] block length

R1

SET_BLOCKLEN

Selects a block length (in bytes) for all following
block commands (read and write). 3

CMD17

adtc

[31:0] data address

R1

READ_SINGLE_BLOCK

Reads a block of the size selected by the
SET_BLOCKLEN command. 4

CMD18

adtc

[31:0] data address

R1

READ_MULTIPLE_BLOCK

Continuously send blocks of data until interrupted
by a stop or a new read command.

CMD19

1)
2)
3)
4)

4-16

Abbreviation

Command Description

Reserved

The DSR option (as well as the SET_DSR command) is not supported by the SanDisk MultiMediaCard.
The card may become busy after this command. Refer to Figure 5 -18 for more details.
The default block length is as specified in the CSD (512 bytes). A set block length of less than 512 bytes willcause a write error. The only valid write set block length is 512 bytes. CMD16 is not mandatory if the default is
accepted.
The data transferred must not cross a physical block boundary.

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONMultiMediaCard Protocol Description

Table 4-7. Block Write Commands (Class 4)
Cmd Index

Type

Argument

Resp

Abbreviation

CMD24

Adtc

[31:0] data address

R1

WRITE_BLOCK

Writes a block of the size selected by the
SET_BLOCKLEN command. 1

CMD25

Adtc

[31:0] data address

R1

WRITE_MULTIPLE_
BLOCK

Continuously writes blocks of data until a
STOP_TRANSMISSION follows.

CMD26

Command Description

Not Applicable

CMD27
Adtc [31:0] don’t cares*
R1
PROGRAM_CSD* The bit places must be filled but the value is irrelevant.

Programming of the programmable bits of the CSD.

Table 4-8. Write Protection (Class 6)
Cmd Index

Type

Argument

Resp

Abbreviation

CMD28

Ac

[31:0] data address

R1b

SET_WRITE_PROT

If the card has write protection features, thiscommand sets the write protection bit of theaddressed group. The properties of write
protection are coded in the card -specific data
(WP_GRP_SIZE).

CMD29

ac

[31:0] data address

R1b

CLR_WRITE_PROT

If the card provides write protection features, thiscommand clears the write protection bit of theaddressed group.

[31:0] write protect
data address

R1

SEND_WRITE_PROT

If the card provides write protection features, thiscommand asks the card to send the status of thewrite protection bits.

CMD30

CMD31

Command Description

Reserved

Table 4-9. Erase Commands (Class 5)
Cmd Index

Type

CMD32

ac

CMD33

Argument

Resp

Abbreviation

Command Description[31:0] data
address

R1

TAG_SECTOR_START

Sets the address of the first sector of the erase
group.

ac[31:0] data
address

R1

TAG_SECTOR_END

Sets the address of the last se ctor in acontinuous range within the selected erase
group, or the address of a single sector to be
selected for erase.

CMD34

ac

[31:0] data
address

R1

UNTAG_SECTOR

Removes one previously selected sector fromthe erase selection.

CMD35

ac

[31:0] data
addressR1

TAG_ERASE_GROUP_START

Sets the address of the first erase group withina range to be selected for erase.

CMD36

ac

[31:0] data
addressR1

TAG_ERASE_GROUP_END

Sets the address of the last erase group withina continuous range to be erased.

CMD37

ac

[31:0] data
address

R1

UNTAG_ERASE_GROUP

Removes one previously selected erase groupfrom the erase selection.

CMD38

ac

[31:0] don’t cares*

R1b

ERASE

Erases all previously selected sectors or erase
groups.

* The bit places must be filled but the value is irrelevant.

1)

All data blocks are responded to with a data response token followed by a busy signal. The data transferred
must not cross a physical block boundary.

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MultiMediaCard Protocol Description

Table 4-10. I/O Mode Commands (Class 9)
Cmd Index

Type

Argument

Resp

CMD39
CMD40

Abbreviation

Command Description

MMCA Optional Command, currently not supported.

CMD41* The bit places must be filled but the value is irrelevant.

Reserved

Table 4-11. Lock Card Commands (Class 7)
Cmd Index

Type

Argument

Resp

CMD42

adtc

[31:0] stuff bits

R1b

CMD43 ….
CMD54

Abbreviation

Command Description

LOCK_UNLOCK

Used to set/reset the password or lock/unlock thecard. The size of the data block is set by the
SET_BLOCK_LEN command.

MMCA Optional Command, currently not supported.

Table 4-12. Application Specific Commands (Class 8)
Cmd Index

Type

Argument

Resp

CMD55 ….
CMD56

Abbreviation

Command Description

MMCA Optional Command, currently not supported.

4.7. Card State Transition Tables
Table 4-13 defines the MultiMediaCard state transitions in dependency of the received command.
Table 4-13. Card State Transition Table
Current State
idle

ready

ident

stby

tran

command

data

rcv

prg

dis

ina

irq

Changes toclass independent
CRC error

-

-

-

-

-

-

-

-

-

-

stby

command not supported

-

-

-

-

-

-

-

-

-

-

stby

CMD0

idle

idle

idle

idle

idle

idle

idle

idle

idle

-

stby

CMD1, card VDD range
compatible

ready

-

-

-

-

-

-

-

-

-

stby

CMD1, card is busy

idle

-

-

-

-

-

-

-

-

-

stby

CMD1, card VDD range notcompatible

ina

-

-

-

-

-

-

-

-

-

stby

CMD2, card wins bus

-

ident

-

-

-

-

-

-

-

-

stby

CMD2, card loses bus

-

ready

-

-

-

-

-

-

-

-

stby

CMD3

-

-

stby

-

-

-

-

-

-

-

stby

Class 0

CMD4

4-18

Not supported

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONMultiMediaCard Protocol Description

Current State
idle

ready

ident

stby

tran

data

rcv

prg

dis

ina

irq

CMD7, card is addressed

-

-

-

tran

-

-

-

-

prg

-

stby

CMD7, card is not addressed

-

-

-

-

stby

stby

-

dis

-

-

stby

CMD9

-

-

-

stby

-

-

-

-

-

-

stby

CMD10

-

-

-

stby

-

-

-

-

-

-

stby

CMD12

-

-

-

-

-

tran

prg

-

-

-

stby

CMD13

-

-

-

stby

tran

data

rcv

prg

dis

-

stby

CMD15

-

-

-

ina

ina

ina

ina

ina

ina

-

stby

Class 1
CMD11

Not supported
Class 2

CMD16

-

-

-

-

tran

-

-

-

-

-

stby

CMD17

-

-

-

-

data

-

-

-

-

-

stby

CMD18

-

-

-

-

data

-

-

-

-

-

stby

Class 3
CMD20

Not supported
Class 4

CMD16

See class 2

CMD24

-

-

-

-

rcv

-

-

rcv

-

-

stby

CMD25

-

-

-

-

rcv

-

-

rcv

-

-

stby

CMD26

-

-

-

-

rcv

-

-

-

-

-

stby

CMD27

-

-

-

-

rcv

-

-

-

-

-

stby

CMD28

-

-

-

prg

-

-

-

-

-

stby

CMD29

-

-

-

prg

-

-

-

-

-

stby

CMD30

-

-

-

data

-

-

-

-

-

stby

Class 6Class 5

MMCA Optional Command, currently not supported

CMD32

-

-

-

tran

-

-

-

-

-

stby

CMD33

-

-

-

-

tran

-

-

-

-

-

stby

CMD34

-

-

-

-

tran

-

-

-

-

-

stby

CMD35

-

-

-

-

tran

-

-

-

-

-

stby

CMD36

-

-

-

-

tran

-

-

-

-

-

stby

CMD37

-

-

-

-

tran

-

-

-

-

-

stby

CMD38

-

-

-

-

prg

-

-

-

-

-

stby

-

-

-

-

stby

Class 7CMD42-Class 8

-

-

rcv

-

MMCA Optional Command, currently not supported

CMD-55MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

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MultiMediaCard Protocol Description

Current State
idle

ready

ident

stby

tran

data

CMC-56; RD/WR = 0

MMCA Optional Command, currently not supported

CMD-56; RD/WR = 1

MMCA Optional Command, currently not supported

Class 9MMCA Optional Command, currently not supported

rcv

prg

dis

ina

irq

CMD39, CMD40
Class 10-11

MMCA Optional Command, currently not supported

CMD41...CMD59
CMD60...CMD63

Reserved
Reserved for manufacturer

4.8. Responses
All responses are sent via the CMD line. The response transmission always starts with the MSB. The response
length depends on the response type.
A response always starts with a start bit (always ‘0’), followed by the bit indicating the direction of transmission(card = ‘0’). A value denoted by ‘x’ in the tables below indicates a variable entry. All responses except for the typeR3 (see below) are protected by a CRC. Every response is terminated by the end bit (always ‘1’).
There are five types of responses. Their formats are defined as follows:
R1 (standard response): response length 48 bit.
Bits 45:40 indicate the index of the command that is responded to. The status of the card is coded in 32 bits.
Bit Position

47

46[45:40][39:8][7:1]

0

Width (bits)

1

1

6

32

7

1

Value

‘0’

‘0’

x

x

x

‘1’

Description

start bittransmission bit

command index

card status

CRC7

end bit

R1b is identical to R1 with the additional busy signaling via the data.
R2 (CID, CSD register): response length 136 bits.
The content of the CID register is sent as a response to CMD2 and CMD10. The content of the CSD register is sent
as a response to CMD9. Only bits [127...1] of the CID and CSD are transferred, bit [0] of these registers is replacedby the end bit of the response.

4-20

Bit Position

135

134

[133:128][127:1]0

Width (bits)

1

1

6

127

1

Value

‘0’

‘0’

‘111111’x‘1’

Description

start bittransmission bit

Reserved

CID or CSD register incl. internal CRC7

end bitMultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONMultiMediaCard Protocol Description

R3 (OCR register): response length 48 bits.
The contents of the OCR register is sent as a response to CMD1.
Bit Position

47

46[45:40][39:8][7:1]

0

Width (bits)

1

1

6

32

7

1

Value

‘0’

‘0’

‘111111’x‘1111111’‘1’

Description

start bittransmission bit

Reserved

OCR register

Reservedend bitResponses R4 and R5 are not supported.

4.8.1. Data Response
When a data block or the CSD register is written to the card, it will be acknowledged by a CRC Status response.
CRC Status response is 5 bits long and has the following format:[Start bit = 0 | CRC Status 3 bits | End bit = 1]
The CRC Status bits may be:‘010’ or ‘00101 including the Start and End bits’—Data accepted.
‘101’ or ‘01011 including the Start and End bits’—Data rejected due to a CRC error.

4.9. Timings
All timing diagrams use the schematics and abbreviations in Table 4-13.
Table 4-14. Timing Diagram Symbols
S

Start Bit (= 0)T

Transmitter Bit (Host = 1, Card = 0)P

One-cycle Pull-up (= 1)E

End Bit (=1)

ZHigh Impedance State (-> = 1)

D

Data Bits*

Repeater

CRC

Cyclic Redundancy Check Bits (7 Bits)
Card Active
Host Active

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MultiMediaCard Protocol Description

4.9.1. Command and Response
Card Identification and Card Operation Conditions Timing —The card identification (CMD2) and card
operation conditions (CMD1) timing are processed in the open-drain mode. The card response to the host command
starts after exactly NID clock cycles.
<----Host Command---->
CMD

S T

Content

CRC<-NID Cycles->E Z******<----CID or OCR--->ZS T

Content

Z

Z

Z

Figure 4-5. Identification Timing (Card Identification Mode)
The minimum delay between the host command and card response is NCR clock cycles. This timing diagram isrelevant for host command CMD3.
<----Host Command---->
CMD

S T

Content

CRC<-NCR Cycles->E Z******<--------Response--------->Z

S T

Content

CRC

E Z

Z

Z

Figure 4-6. Command Response Timing (Identification Mode)
There is just one Z bit period followed by P bits pushed up by the responding card. This timing diagram is relevant
for all responded host commands except CMD1, 2, 3.
<----Host Command---->
CMD

S T

Content

CRC<-NCR Cycles->
E Z

Z

P

***

<--------Response--------->P S TContent

CRC

E Z

Z

Z

Figure 4-7. Command Response Timing (Data Transfer Mode)
Last Card Response—Next Host Command Timing—After receiving the last card response, the host can start thenext command transmission after at least NRC clock cycles. This timing is relevant for any host command.
<--------Response-------->
CMD

S T

Content

CRC<-NRC Cycles->E Z******<----Host Command----->Z

S T

Content

CRC

E

Figure 4-8. Timing Response End to Next CMD Start (Data Transfer Mode)
Last Host Command—Next Host Command Timing Diagram—After the last command has been sent, the hostcan continue sending the next command after at least NCC clock periods. This timing is relevant for any hostcommand that does not have a response.
<----- Host Command ---->
CMD

S T

Content

CRC<-NCC Cycles ->E Z******<---- Host Command ----->Z

S T

Content

CRC

E

Figure 4-9. Timing CMDn End to CMDn+1 Start (All Modes)
In the case where the CMDn command was a last acquisition command with no further response by any card, then
the next CMDn+1 command is allowed to follow after at least NCC +136 (the length of the R2 response) clock
periods.

4-22

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONMultiMediaCard Protocol Description

4.9.2. Data Read
Single Block Read—The host selects one card for data read operation by CMD7, and sets the valid block length forblock oriented data transfer by CMD16. The basic bus timing for a read operation is given in Figure 4-10. The
sequence starts with a single block read command (CMD17), which specifies the start address in the argument field.
The response is sent on the CMD line as usual.
<-----Host Command----->
CMD

S T

Content<-NCR Cycles->CRC E Z Z P * * *<--------Response--------->P S T<--------NAC Cycles------->
DAT

Z Z Z

****

Z Z Z Z Z Z P**********

Content

CRC E<- Read Data->
P S D D D ***Figure 4-10. Transfer of Single Block Read
Data transmission from the card starts after the access time delay NAC beginning from the end bit of the readcommand. After the last data bit, the CRC check bits are suffixed to allow the host to check for transmission errors.
Multiple Block Read—In multiple block read mode, the card sends a continuous flow of data blocks following theinitial host read command. The data flow is terminated by a stop transmission command (CMD12). Figure 4-11
describes the timing of the data blocks and Figure 4-12 the response to a stop command. The data transmission stops
two clock cycles after the end bit of the stop command.
<--Host command-->
CMD S T content
CRC
DAT Z Z Z * * * * Z Z Z<-NCR cycles-><---Response--->Z Z P * P S T content CRC E Z Z P P P P P P P P P P P P P<--NAC Cycles--><--Read Data--><--NAC Cycles--><--Read Data-->Z Z Z P ******* P S D D D ***** D E P*******P S D D D D DEFigure 4-11. Timing of Multiple Block Read Command

CMD<-----Host command-----><-NCR cycles-><--------Response--------->
S T
content
CRC E Z Z P * * * P S T
content
CRC E

DAT

D D D

********

D D D E Z Z********************

Figure 4-12. Timing of Stop Command (CMD12, Data Transfer Mode)

4.9.3. Data Write
Single Block Write—The host selects one card for a data write operation by CMD7. The host sets the valid block
length for block-oriented data transfer by CMD16.
The basic bus timing for a write operation is given in Figure 4-13. The sequence starts with a single block write
command (CMD24), which determines (in the argument field) the start address. It is responded to by the card on the
CMD line as usual. The data transfer from the host starts NWR clock cycles after the card response was received.
The data is suffixed with CRC check bits to allow the card to check it for transmission errors. The card sends backthe CRC check result as a CRC status token on the data line. In the case of transmission error, the card sends anegative CRC status (‘101’). In the case of non-erroneous transmission, the card sends a positive CRC status (‘010’)
and starts the data programming procedure.

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

4-23

MultiMediaCard Protocol Description<-Host cmnd-><-NCR-><---Card Response--->CMD
E Z Z P * P S T content CRC E Z Z P*******************P P P P P P P P<--NWR--><--Write Data-->
CRC Status<--Busy-->DAT
Z Z*******Z Z Z * * * Z Z Z Z P*P S content CRC E Z Z S
StatusE S L*L E Z

Figure 4-13. Timing of Block Write Command
If the MultiMediaCard does not have a free data receive buffer, the card indicates this condition by pulling down thedata line to LOW. The card stops pulling down the data line as soon as at least one receive buffer for the defined
data transfer block length becomes free. This signaling does not give any information about the data write statusthat
must be polled by the host.
Multiple Block Write—In multiple block write mode, the card expects continuous flow of data blocks following
the initial host write command. The data flow is terminated by a stop transmission command (CMD12).Figure 4-14
describes the timing of the data blocks with and without card busy signal.
<-CardRsp->CMD
E Z Z P ******************* P P P P P ********************** P P P P P P P P P<-NWR-> <--Write Data-->
CRC Status <-NWR-> <--Write Data-->
CRC Status <-Busy-> <-NWR->DATZ Z P*P S Data+CRC E Z Z S Status E Z P*P S Data+CRC E Z Z S Status E S L*L E Z P*P

Figure 4-14. Timing of Multiple Block Write Command
In write mode, the stop transmission command works similarly to the stop transmission command in the read mode.
Figures 4-15 through to 4-18 describe the timing of the stop command in different card states.
<-NCR Cycles-><---Card Response--->Z P
P* ****PS T Content CRC E<--Card is Programming-->
D D D D D D D D D D E Z Z S L********************CMD S T
DAT<-Host cmnd->
Content
CRC E Z<-Host cmnd->
S T
E Z

Z

Z

content
Z Z Z Z Z

Figure 4-15. Stop Transmission During Data Transfer from the Host
The card will treat a data block as successfully received and ready for programming only if the CRC data of theblock was validated and the CRC status token sent back to the host. Figure 4-16 is an example of an interrupted (bya host stop command) attempt to transmit the CRC status block. The sequence is identical to all other stoptransmission examples. The end bit of the host command is followed, on the data line, with one more data bit, end
bit and two Z clock for switching the bus direction. The received data block, in this case is considered incomplete
and will not be programmed.
<-Host cmnd-><-NCR Cycles-><---Card Response--->CMD S T
Content
CRC E Z Z P P * * * P S T Content CRC E<-Data Block-><-CRC Status 1-><--Card is Programming-->DAT D D D D D Z Z SCRCE Z Z S L****************<-Host cmnd->
S T
content
E

Z Z Z ZZZ Z

Z

Figure 4-16. Stop Transmission During CRC Status Transfer from the Card
All previous examples dealt with the scenario of the host stopping the data transmission during an active datatransfer. The following two diagrams describe a scenario of receiving the stop transmission between data blocks. In
the first example the card is busy programming the last block while in the second the card is idle. However, there arestill unprogrammed data blocks in the input buffers. These blocks are being programmed as soon as the stoptransmission command is received and the card activates the busy signal.
<-Host cmnd->
1)

4-24

<-NCR Cycles-><---Card Response---><-Host cmnd->

The card CRC status response was interrupted by the host.

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONMultiMediaCard Protocol Description

CMD S T
DATS L

Content

CRC

E Z

Z

P P * * * P S T Content CRC E<--Card is Programming-->************************************************

S
L

E

Z Z Z

T

content
Z

Z

Z Z

Z

Figure 4-17. Stop Transmission Received After Last Data Block , Card is Busy Programming

CMD S T
DATZ<-Host cmnd->
Content
CRC
Z Z Z

Z

Z

Z

<-NCR Cycles-><---Card Response--->Z P P * * * P S T Content CRC E<--Card is Programming-->
Z Z Z S L ******************** L E

E ZZ<-Host cmnd->
S T
content
Z Z Z ZZZ Z

Z

Figure 4-18. Stop Transmission Received After Last Data Block, Card Becomes Busy
Erase, Set and Clear Write Protect Timing—The host must first tag the sectors to erase using the tag commands(CMD32—CMD37). The erase command (CMD38), once issued, will erase all tagged sectors. Similarly, set andclear write protect commands start a programming operation as well. The card will signal “busy” (by pulling theDAT line low) for the duration of the erase or programming operation. The bus transaction timings are described in
Figure 4-18.

4.9.4. Timing Values
Table 4-15 defines all timing values.
Table 4-15. Timing Values
NCR

Min

Max

Unit

2

64

Clock Cycles

NID

5

5

Clock Cycles

NAC

2[10 * ((TAAC*f) + (100*NSAC)) ]**Clock Cycles

NRC

8

-

Clock Cycles

NCC

8

-

Clock Cycles

2-

Clock Cycles

NWR** Where f is the clock frequency.

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

4-25

MultiMediaCard Protocol Description

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4-26

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

5. SPI Mode
The SPI mode is a secondary, optional communication protocol, which is offered by MultiMediaCards. This mode isa subset of the MultiMediaCard protocol, designed to communicate with an SPI channel, commonly found in some
vendors’ microcontrollers. The interface is selected during the first reset command after power up (CMD0) andcannot be changed once the part is powered on.
The SPI standard defines the physical link only, and not the complete data transfer protocol. MultiMediaCard SPI
implementation uses a subset of the MultiMediaCard protocol and command set. It is intended to be used by systems
that require a small number of cards (typically one) and have lower data transfer rates (compared to MultiMediaCard
protocol based systems). From the application point of view, the advantage of the SPI mode is the capability ofusing an off-the-shelf host, hence reducing the design-in effort to a minimum. The disadvantage is the loss of
performance with SPI mode as compared to MultiMediaCard mode (lower data transfer rate, fewer cards, hardware
CS per card, etc.).

5.1. SPI Interface Concept
The SPI is a general purpose synchronous serial interface originally found on certain Motorola microcontrollers. A
virtually identical interface can now be found on some other microcontrollers as well.
The MultiMediaCard SPI interface is compatible with SPI hosts available on the market. As in any other SPI device,
the MultiMediaCard SPI channel consists of the following four signals:••••

CS—Host to card Chip Select signal.
CLK—Host to card clock signal
DataIn—Host to card data signal.
DataOut—Card to host data signal.

Byte transfers are another common SPI characteristic. They are implemented in the card as well. All data tokens are
multiples of bytes (8-bit) and always byte aligned to the CS signal.

5.2. SPI Bus Topology
The card identification and addressing methods are replaced by a hardware Chip Select (CS) signal. There are no
broadcast commands. For every command, a card (slave) is selected by asserting (active low) the CS signal. See thefollowing figure.
The CS signal must be continuously active for the duration of the SPI transaction (command, response and data).
The only exception occurs during card programming when the host can de-assert the CS signal without affecting the
programming process.
The bi-directional CMD and DAT lines are replaced by unidirectional dataIn and dataOut signals. This eliminates
the ability of executing commands while data is being read or written and, therefore, makes the sequential and multi
block read/write operations obsolete. Only single block read/write commands are supported by the SPI channel.
The SPI interface uses the same seven signals as the standard MultiMediaCard bus (Figure 5-1).

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

5-1

SPI ModePower
SupplySPI Bus
MasterCS
CS

SPI Bus (CLK, DataIN, DataOut)

SPI
Card

SPI
Card

Figure 5-1. MultiMediaCard Bus System

Table 5-1. SPI Interface Pin Configuration
MultiMediaCard Mode

Pin #

1)

5-2

SPI Mode

Name

Type1

Description

Name

1

RSV

NC

Reserved for future use

CS

I

Chip Select (neg true)

2

CMD

I/O/PP/OD

Command/Response

DI

I/PP

Data In

3

VSS1

S

Supply voltage ground

VSS

S

Supply voltage ground

4

VDD

S

Supply voltage

VDD

S

Supply voltage

5

CLK

I

Clock

SCLK

I

Clock

6

VSS2

S

Supply voltage ground

VSS2

S

Supply voltage ground

7

DAT

I/O/PP

Data

DO

O/PP

Data OutType

Description

S: power supply; I: input; O: output; PP: push-pull; OD: open-drain; NC: Not connected (or logical high).

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONSPI Mode

5.3. MultiMediaCard Registers in SPI Mode
The register usage in SPI mode is summarized in Table 5-2. Most of them are inaccessible.
Table 5-2. MultiMediaCard Registers in SPI Mode
Name

Available in
SPI mode

Width[Bytes]Description

CID

Yes

16

Card identification data (serial number, manufacturer ID, etc.).

RCA

No

DSR

No

CSD

Yes

16

Card-specific data, information about the card operation conditions.

OCR

Yes

32

Operation condition register.

5.4. SPI Bus Protocol
While the MultiMediaCard channel is based on command and data bit streams, which are initiated by a start bit andterminated by a stop, bit, the SPI channel is byte oriented. Every command or data block is built of 8 -bit bytes and isbyte aligned to the CS signal (i.e., the length is a multiple of 8 clock cycles).
Similar to the MultiMediaCard protocol, SPI messages consist of command, response and data-block tokens. All
communication between host and cards is controlled by the host (master). The host starts every bus transaction byasserting the CS signal low.
The response behavior in SPI mode differs from MultiMediaCard mode in the following three aspects:•••

The selected card always responds to the command.
Additional (8, 16 and 40 bit) response structures are used.
When the card encounters a data retrieval problem, it will respond with an error response (which
replaces the expected data block) rather than by a time -out, as in the MultiMediaCard mode.

Only single and multiple1 block read/write operations are supported in SPI mode (sequential mode is not supported).
In addition to the command response, every data block sent to the card during write operations will be responded towith a special data response token. A data block may be as big as one card sector and as small as a single byte.
Partial block read/write operations are enabled by card options specified in the CSD register.

5.4.1. Mode Selection
The MultiMediaCard wakes up in MultiMediaCard mode. It will enter SPI mode if the CS signal is asserted(negative) during the reception of the reset command (CMD0). Selecting SPI mode is not restricted to Idle state (thestate the card enters after power up) only. Every time the card receives CMD0, including while in Inactive state, CS
signal is sampled.
1)

Multiple sector Read/Write in SPI mode was approved by the MMCA and is included in MMCA system standard
rev 3.1.

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

5-3

SPI Mode

If the card recognizes that MultiMediaCard mode is required (CS signal is high), it will not respond to the command
and remain in MultiMediaCard mode. If SPI mode is required (CS signal is low), the card will switch to SPI andrespond with the SPI mode R1 response.
The only way to return to MultiMediaCard mode is by a power cycle (turning the power off and on). In SPI mode,
the MultiMediaCard protocol state machine is not observed. All of the MultiMediaCard commands supported in SPI
mode are always available.

5.4.2. Bus Transfer Protection
Every MultiMediaCard token transferred on the bus is protected by CRC bits. In SPI mode, the MultiMediaCard
offers a non-protected mode, which enables systems built with reliable data links to exclude the hardware or
firmware required for implementing the CRC generation and verification functions.
In the non-protected mode, the CRC bits of the command, response and data tokens are still required in the tokens.
However, they are defined as ‘don’t care’ for the transmitter and ignored by the receiver.
The SPI interface is initialized in the non-protected mode. However, the RESET command (CMD0), which is used
to switch the card to SPI mode, is received by the card while in MultiMediaCard mode and, therefore, must have avalid CRC field.
Since CMD0 has no arguments, the content of all the fields, including the CRC field, are constants and need not becalculated in run time. A valid reset command is:
0x40, 0x0, 0x0, 0x0, 0x0, 0x95
The host can turn the CRC option on and off using the CRC_ON_OFF command (CMD59).

5.4.3. Data Read
SPI mode supports single and multiple1 block read operations. The main difference between SPI andMultiMediaCard modes is that the data and the response are both transmitted to the host on the DataOut signal.
Therefore, the card response to the STOP_COMMAND may cut-short and replace the last data block.

From
Host to
C ard

DataInDataOut

Data from
Card to HostFrom
C ard to
Host

Next
CommandCommandC ommandR esponse

Data Block CRC

Figure 5-2. Single Block Read Operation

1)

Multiple sector Read/Write in SPI mode was approved by the MMCA and is included in MMCA system standard
rev 3.1.

5-4

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONSPI Mode

Fromhost tocard(s)DataInDataOut

Stop
Transmission
CommandFrom
card tohost

Data fromcard to hostCommandCommand

Response

Data blockcrc

Data blockcrc

Data block

Response

Figure 5-3. Multiple Block Read Operation
The basic unit of data transfer is a block whose maximum size is defined in the CSD (READ_BL_LEN). If
READ_BL_PARTIAL is set, smaller blocks whose starting and ending address are entirely contained within one
physical block (as defined by READ_BL_LEN) may also be transmitted. A CRC is appended to the end of eachblock ensuring data transfer integrity. CMD17 (READ_SIN GLE_BLOCK) initiates a single block read. CMD18(READ_MULTIPLE_BLOCK) starts a transfer of several consecutive blocks. The number of blocks for themultiple block read operation is not defined. The card will continuously transfer data blocks until a stoptransmission command is received.
In case of a data retrieval error (for example out of range, address misalignment, internal error, etc.), the card will
not transmit any data. Instead a special data error token will be sent to the host, as opposed to MultiMediaCard mode
where the card times out. Figure 5-4 shows a single block read operation, which terminates with an error token
rather than a data block.
From
Host to
Card

DataInDataOut

From
Card to
Host

Data Error Tokenfrom Card to Host

Command

Next
CommandCommand
Response

Data Error

Figure 5-4. Read Operation—Data Error
The multiple block read operation can be terminated the same way by the error token replacing a data block
anywhere in the sequence. The host must then abort the operation by sending the Stop Transmission command.
If the host sends a Stop Transmission command out of the valid sequence, it will be responded to as an illegal
command.
If the host uses partial blocks whose accumulated length is not block aligned and block misalignment is not allowed,
the card detects a block misalignment error condition at the beginning of the first misaligned block(ADDRESS_ERROR error bit is set in the data error token).

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

5-5

SPI Mode

5.4.4. Data Write
SPI mode supports single block and multiple1 block write commands. Upon reception of a valid write command(CMD24 or CMD25), the card will respond with a response token and will wait for a data block to be sent from thehost. CRC suffix, block length and start address restrictions are (with the exception of the CSD parameter
WRITE_BL_PARTIAL controlling the partial block write option) identical to the read operation. If a CRC error is
detected it will be reported in the data-response token and the data block will not be programmed.

From
Host to
Card

DataInFrom
Card to
Host

Start
Block
Token

Command

DataOut

Data From
Host to Card

Data
Responseand Busy
From Card

Command

Data Block
Data_
Response

Response

New Commandfrom Host

Busy

Figure 5-5. Single Block Write Operation
Every data block has a ‘Start Block’ token prefix (one byte). After a data block has been received, the card will
respond with a data-response token. If the data block has been received without errors, it will be programmed. Aslong as the card is busy programming, a continuous stream of busy tokens will be sent to the host (effectively
holding the DataOut line low).
In the Multiple Block Write operation the Stop Transmission will be done by sending a ‘Stop Tran’ token instead of‘Start Block’ token at the beginning of the next block.

From
Host to
Card

DataInDataOut

From
Card to
Host

Start
Block
Token

Data From
Host to Card

Data
Responseand Busy
From Card

Data
Block

Data
Block

Command

Response

Stop
Tran
Token

Data From
Host to Card

Data_
Response

Busy

Data_
Response

Busy

Busy

Figure 5-6. Multiple Block Write Operation
The number of blocks for the write multiple block operation is not defined. The card will continuously accept andprogram data blocks until a ‘Stop Tran’ token is received.

1)

Multiple sector Read/Write in SPI mode was approved by the MMCA and is included in MMCA system standard
rev 3.1.

5-6

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONSPI Mode

If the card detects a CRC error or a programming error (e.g., write protect violation, out of range, address
misalignment, internal error) during a multiple block write operation, it will report the failure in the data-response
token and ignore any further incoming data blocks. The host must then abort the operation by sending the ‘Stop
Tran’ token.
If the host uses partial blocks whose accumulated length is not block aligned and block misalignment is not allowed(CSD parameter WRITE_BLK_MISALIGN is not set), the card detects the block misalignment error before thebeginning of the first misaligned blo ck and responds with an error indication in the data response token, ignoring
any further incoming data blocks. The host must then abort the operation by sending the ‘Stop Tran’ token.
Once the programming operation is completed (either successfully or with an error), the host must check the resultsof the programming (or the cause of the error if already reported in the data-response token) using the
SEND_STATUS command (CMD13).
While the card is busy, resetting the CS signal will not terminate the programming process. The card will release the
DataOut line (tri-state) and continue with programming. If the card is reselected before the programming is finished,
the DataOut line will be forced back to low and all commands will be rejected.
Resetting a card (using CMD0) will terminate any pending or active programming operations. This may destroy thedata formats on the card. It is the responsibility of the host to prevent it.

5.4.5. Erase and Write Protect Management
The erase and write protect management procedures in SPI mode are identical to those in MultiMediaCard mode.
While the card is erasing or changing the write protection bits of the predefined write protect groups list, it will be ina busy state and hold the DataOut line low. Figure 5-7 illustrates a ‘no data’ bus transaction with and without busy
signaling.
From
Host to
Card

DataInFrom
Card toHost

Command

DataOut

From
Host to
Card

From
Card toHost

Command

Response

Response

Busy

Figure 5-7. ‘No data’ Operations

5.4.6. Read CID/CSD Registers
Unlike the MultiMediaCard protocol, where the register content is sent as a command response, reading the contentsof the CSD and CID registers in SPI mode is a simple read-block transaction. The card will respond with a standard
response token followed by a data block of 16 bytes suffixed with a 16-bit CRC.
The data time out for the CSD command cannot be sent to the card TAAC since this value is stored in the CSD.
Therefore, the standard response time-out value (NCR) is used for read latency of the CSD register.

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

5-7

SPI Mode

5.4.7. Reset Sequence
The MultiMediaCard requires a defined reset sequence. After power on reset or CMD0 (software reset), the card
enters an idle state. In this state, the only legal host commands are CMD1 (SEND_OP_COND) and CMD58(READ_OCR).
The host must poll the card (by repeatedly sending CMD1) until the ‘in-idle-state’ bit in the card response indicates(by being set to 0) that the card has completed its initialization processes and is ready for the next command.
In SPI mode, as opposed to MultiMediaCard mode, CMD1 has no operands and does not return the contents of the
OCR register. Instead, the host may use CMD58 (available in SPI mode only) to read the OCR register.
Furthermore, it is the host’s responsibility to refrain from accessing cards that do not support its voltage range.
The usage of CMD58 is not restricted to the initializing phase only, but can be issued at any time. The host must poll
the card (by repeatedly sending CMD1) until the ‘in-idle-state’ bit in the card response indicates (by being set to 0)
that the card has completed its initialization processes and is ready for the next command.

5.4.8. Clock Control
The SPI bus clock signal can be used by the SPI host to set the cards to energy saving mode or to control the data
flow (to avoid under-run or over-run conditions) on the bus. The host is allowed to change the clock frequency or
shut it down.
There are a few restrictions the SPI host must follow:•

The bus frequency can be changed at any time under the restrictions of maximum data transfer
frequency, defined by the MultiMediaCards.

•

The clock must be running for the MultiMediaCard to output data or response tokens. After the last
SPI bus transaction, the host is required to provide eight clock cycles for the card to complete theoperation before shutting down the clock. Throughout this eight clock period, the state of the CS signal
is irrelevant. It can be asserted or de-asserted. Following is a list of the various SPI bus transactions:−
A command/response sequence—eight clocks after the card response end bit. The CS signal canbe asserted or de-asserted during these eight clock cycles.
−
A read data transaction—eight clocks after the end bit of the last data block.
−A write data transaction—eight clocks after the CRC status token.

•

The host is allowed to shut down the clock of a busy card. The MultiMediaCard will complete the programming operation regardless of the host clock. However, the host must provide a clock edge for thecard to turn off its busy signal. Without a clock edge, the MultiMediaCard (unless previously
disconnected by de-asserting the CS signal) will force the dataOut line down, permanently.

5.4.9. Error Conditions
The following sections provides valuable information on error commands.

5-8

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONSPI Mode

5.4.9.1. CRC and Illegal Command
All commands are optionally protected by CRC (cyclic redundancy check) bits. If the addressed MultiMediaCard’s
CRC check fails, the COM_CRC_ERROR bit will be set in the card's response. Similarly, if an illegal command has
been received, the ILLEGAL_COMMAND bit will be set in the card’s response.
There are different kinds of illegal commands:•••

Commands that belong to classes not supported by the MultiMediaCard (such as interrupt and I/O
commands).
Commands not allowed in SPI mode.
Commands that are not defined (for example, CMD6).

5.4.9.2. Read, Write and Erase Time-out Conditions
The time period after which a time-out condition for read/write/erase operations occurs is ten times longer than the
typical access/program times for these operations given below (card independent). A card shall complete thecommand within this time period, or give up and return an error message. If the host does not get a response within
the defined time-out, it should assume the card is not going to respond any more and try to recover (that is, reset thecard, power cycle, reject, etc.).
The typical access and program times are defined as follows:•

Read—The read access time is defined as the sum of the two times given by the CSD parameters
TAAC and NSAC. These card parameters define the typical delay between the end bit of the readcommand and the start bit of the data block. This number is card dependent.

•

Write—The R2W_FACTOR field in the CSD is used to calculate the typical block program time
obtained by multiplying the read access time by this factor. It applies to all write/erase commands(such as SET(CLEAR)_WRITE_PROTECT, PROGRAM_CSD(CID) and block write commands).
Erase—The duration of an erase command will be (order of magnitude) the number of sectors to beerased multiplied by the block write delay.

•

5.4.9.3. Read Ahead in Multiple Block Read Operation
In Multiple Block read operations, in order to improve read performance, the card may fetch data from the memory
array, ahead of the host. In this case, when the host is reading the last addresses of the memory, the card attempts tofetch data beyond the last physical memory address and generates an OUT_OF_RANGE error. Therefore, even if
the host times the Stop Transmission command to stop the card immediately after the last byte of data was read, thecard may already have generated the error, which will show in the response to the Stop Transmission command. The
host should ignore this error.

5.4.10. Memory Array Partitioning
Same as for MultiMediaCard mode.

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

5-9

SPI Mode

5.4.11. Card Lock/Unlock Operation
Same as for MultiMediaCard mode.

5.5. SPI Mode Transaction Packets
The following sections provide valuable information on Transaction Packets in SPI Mode.
5.5.1. Command Format
All the MultiMediaCard commands are six bytes long. The command transmission always starts with the left bit of
the bit string corresponding to the command code word. All commands are protected by a CRC. The commands andarguments are listed in Table 5-3.
Table 5-3. Command Format
Bit Position

47

46[45:40][39:8][7:1]

0

Width (bits)

1

1

6

32

7

1

Value

‘0’

‘1’

x

x

x

ë1í

start bittransmission bit

command index

argument

CRC7

end bitDescription

5.5.1.1. Command Classes
As in MultiMediaCard mode, the SPI commands are divided into several classes (refer to Table 5-4). Each class
supports a set of card functions. A MultiMediaCard will support the same set of optional command classes in bothcommunication modes. (There is only one command class table in the CSD register.) The available commandclasses, and the supported commands for a specific class, however, are different in the MultiMediaCard and the SPI
communication modes.

5-10MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONSPI Mode

Table 5-4. Command Classes in SPI ModeClass Description

Card CMD Class(CCC)

Supported Commands
0 1 9 10 12 13 16 17 18 23 24 25 27 28 29 30 35 36 38 42 55 56 58 59

class 0Basic

+ + + +

class 1

Not supported in SPI

class 2Block readclass 3

Not supported in SPI

class 4Block write

class 5

Eraseclass 61

Write-protection

class 7Lock Cardclass 8

Application specificclass 9Not supported in SPI

class 10-11

Reserved

+

+

+ +

+ + + ++

+ + + +
+ + +
+ + +
+
+ +

5.5.1.2. Detailed Command Description
The following table provides a detailed description of the SPI mode commands. The responses are defined in
Section 5.5.1.1. Table 5-5 lists all MultiMediaCard commands. A ‘yes’ in the SPI mode column indicates that thecommand is supported in SPI mode. With these restrictions, the command class description in the CSD is still valid.
If a command does not require an argument, the value of this field should be set to zero. The reserved SPI mode
commands are also reserved in MultiMediaCard mode.
The binary code of a command is defined by the mnemonic symbol. As an example, the content of the commandindex field is (binary) ‘000000’ for CMD0 and ‘100111’ for CMD39.
Table 5-5. Commands and Arguments
CMD
INDEX

Argument

SPI
Mode

Resp

Abbreviation

Command Description

CMD0

Yes

None

R1

GO_IDLE_STATE

Resets the MultiMediaCard.

CMD1

Yes

None

R1

SEND_OP_COND

Activates the card’s initialization process.

CMD2

No

CMD3

No

CMD4

No

CMD5

Reserved

CMD6

Reserved

CMD7
CMD8

No
Reserved

1) Application specific and I/O command classes are not supported.

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

5-11

SPI Mode

CMD
INDEX

Argument

SPI
Mode

Resp

Abbreviation

Command Description

CMD9

Yes

None

R1

SEND_CSD

Asks the selected card to send its card-specific data(CSD).

CMD10

Yes

None

R1

SEND_CID

Asks the selected card to send its card identification(CID).

CMD11

No

CMD12

Yes

None

R1

STOP_ TRANSMISSION

Stop transmission on multiple block read.

CMD13

Yes

None

R2

SEND_STATUS

Asks the selected card to send its status register.

CMD14

Reserved

CMD15

No

CMD16

Yes

[31:0] block length

R1

SET_BLOCKLEN

Selects a block length (in bytes) for all following blockcommands (read and write). 1

CMD17

Yes

[31:0] data address

R1

READ_SINGLE_ BLOCK

Reads a block of the size selected by the
SET_BLOCKLEN command. 2

CMD18

Yes

[31:0] data address

R1

READ_MULTIPL E_BLOCK Continuously transfers data blocks from card to hostuntil interrupted by a Stop command or the requested
number of data blocks transmitted.

CMD19

Reserved

CMD20

No

CMD21 ...
CMD23

Reserved

CMD24

Yes

[31:0] data address

R1

WRITE_BLOCK

Writes a block of the size selected b y the
SET_BLOCKLEN command. 3

CMD25

Yes

[31:0] data address

R1

WRITE_MULTIPLE_BLOCK

Continuously writes blocks of data until a ‘Stop Tran’
Token or the requested number of blocks received.

CMD26

No

CMD27

Yes

None

R1

PROGRAM_CSD

Programming of the programmable bits of the CSD.

CMD28

Yes

[31:0] data address

R1b4 SET_WRITE_PROT

If the card has write protection features, thiscommand sets the write protection bit of theaddressed group. The properties of write protection
are coded in the card specific data (WP_GRP_SIZE).

CMD29

Yes

[31:0] data address

R1b CLR_WRITE_PROT

If the card has write protection features, thiscommand clears the write protection bit of theaddressed group.

CMD30

Yes

[31:0] write protect
data address

R1

If the card has write protection features, thiscommand asks the card to send the status of thewrite protection bits.5

1)
2)
3)
4)
5)

5-12

SEND_WRITE_ PROTThe default block length is as specified in the CSD.
The data transferred must not cross a physical block boundary unless READ_BLK_MISALIGN is set in the CSD.
The data transferred must not cross a physical block boundary unless WRITE_BLK_MISALIGN is set in the
CSD.
R1b: R1 response with an optional trailing busy signal.
32 write protection bits (representing 32 write protect groups starting at the specified address) followed by 16
CRC bits are transferred in a payload format via the data line. The last (least significant) bit of the protection bits
corresponds to the first addressed group. If the addresses of the last groups are outside the valid range, thenthe corresponding write protection bits are set to zero.

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONSPI Mode

CMD
INDEX

Argument

SPI
Mode

Resp

Abbreviation

CMD31

Command Description

Reserved

CMD32

Yes

[31:0] data address

R1

TAG_SECTOR_ START

Sets the address of the first sector of the erase
group.

CMD33

Yes[31:0] data address

R1

TAG_SECTOR_ END

Sets the address of the last sector in a continuous
range within the selected erase group, or the addressof a single sector to be selected for erase.

CMD34

Yes

[31:0] data address

R1

UNTAG_SECTOR

Removes one previously selected sector from theerase selection.

CMD35

Yes

[31:0] data address

R1

TAG_ERASE_GROUP_START

Sets the address of the first erase group within arange to be selected for erase.

CMD36

Yes

[31:0] data address

R1

TAG_ERASE_GROUP_END

Sets the address of the last erase group within acontinuous range to be selected for erase.

CMD37

Yes

[31:0] data address

R1

UNTAG_ERASE_
GROUP

Removes one previously selected erase group fromthe erase selection.

CMD38

Yes

[31:0] stuff bits

R1b ERASE

CMD39

No

CMD40

No

CMD41
CMD42

Erases all previously selected sectors.

Reserved
Yes[31:0] stuff bits

R1b LOCK_UNLOCK

CMD43 ...
CMD54

Used to set/reset the password or lock/unlock thecard. The size of the Data Block is defined by the
SET_BLOCK_LEN command.

Reserved

CMD55

Yes

This optional MMCA command is not supported in the SanDisk MultiMediaCard.

CMD56

Yes

This optional MMCA command is not supported in the SanDisk MultiMediaCard.

CMD57

Reserved

CMD58

Yes

None

R3

READ_OCR

Reads the OCR register of a card.

CMD59

Yes

[31:1] stuff bits
[0:0] CRC option

R1

CRC_ON_OFF

Turns the CRC option on or off. A ‘1’ in the CRC
option bit will turn the option on, a ‘0’ will turn it off.

CMD60…
CMD63

No

5.5.2. Responses
There are several types of response tokens. As with MultiMediaCard mode, all are transmitted MSB first.
5.5.2.1. Format R1
This response token is sent by the card after every command, with the exception of SEND_STATUS commands. It
is one byte long, and the MSB is always set to zero. The other bits are error indications, an error being signaled by a‘1.’ The structure of the R1 format is given in Figure 5-8. The meaning of the flags is defined as follows:

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

5-13

SPI Mode•

Idle state—The card is in idle state and running the initializing process.

•

Erase reset—An erase sequence was cleared before executing because an out of erase sequencecommand was received.
Illegal command—An illegal command code was detected.
Communication CRC error—The CRC check of the last command failed.
Erase sequence error—An error occurred in the sequence of erase commands.

•
•
•
•
•

Address error—A misaligned address, which did not match the block length, was used in thecommand.
Parameter error—The command’s argument (for example, address, block length) was out of theallowed range for this card.
700
In Idle State
Erase Reset
Illegal Command
Com CRC Error
Erase_Seq_Error
Address Error
Parameter Error

Figure 5-8. R1 Response Format

5.5.2.2. Format R1b
This response token is identical to the R1 format with the optional addition of the busy signal.
5.5.2.3. Busy
The busy signal token can be any number of bytes. A zero value indicates that the card is busy. A non-zero value
indicates that the card is ready for the next command.
5.5.2.4. Format R2
This response token is two bytes long and sent as a response to the SEND_STATUS command. The format is given
in Figure 5-9.
The first byte is identical to the response R1. The content of the second byte is described as fol lows:
•

•
•
•

5-14

Out of range|csd_overwrite—This status bit has two functions. It is set if the command argument wasout of its valid range, or if the host is trying to change the ROM section or reverse the copy bit (set as
original) or permanent WP bit (un-protect) of the CSD register.
Erase param—An invalid selection, sectors or groups, for erase.
Write protect violation—The command tried to write a write-protected block.
Card ECC failed—Card internal ECC was applied but failed to correct the data.

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONSPI Mode

•
•
•

•

7

CC error—Internal card controller error.
Error—A general or an unknown error occurred during the operation.
Write protect erase skip|lock/unlock command failed—This status bit has two functions. It is set
when the host attempts to erase a write-protected sector or if a sequence or password error occurred
during a card lock/unlock operation.
Card is locked—This bit is set when the card is locked by the user. It is reset when it is unlocked.
Byte 1

0 7

Byte 200Card is Locked
WP Erase Skip, Lock/Unlock Cmd Failed
Error
CC Error
Card ECC Failed
WP Violation
Erase ParamOut of Range, CSD_Overwrite
In Idle State
Erase Reset
Illegal Command
Com CRC Error
Erase Sequence Error
Address Error
Parameter Error

Figure 5-9. R2 Response Format

5.5.3. Format R3
This response token is sent by the card when a READ_OCR command is received. The response length is 5 bytes.
The structure of the first (MSB) byte is identical to response type R1. The other four bytes contain the OCR register.
32 31

39
0

0

R1

OCR
Figure 5-10. R3 Response Format

5.5.3.1. Data Response
Every data block written to the card will be acknowledged by a data response token. It is one byte long and has theformat in Figure 5-11.
7

6

x

x

0
x

0

Status1

Figure 5-11. Data Response Format

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5-15

SPI Mode

The status bits are defined as follows:•••‘010’—Data accepted.
‘101’—Data rejected due to a CRC error.
‘110’—Data rejected due to a Write error.

In case of any error (CRC or Write Error) during a Write Multiple Block operation, the host aborts the operation
using the ‘Stop Tran’ token. In case of a Write Error (response ‘110’) the host should send CMD13(SEND_STATUS) in order to get the cause of the write problem.

5.5.4. Data Tokens
Read and write commands have data transfers associated with them. Data is being transmitted or received via data
tokens. All data bytes are transmitted MSB first. Data tokens are 4 to (N + 3) bytes long (where N is the data block
length set using the SET_BLOCK_LENGTH command) and have the following format:•

First byte:
Table 5-6. Format of the Start Data Block Token
Token Type••Transaction Type7

Bit Position

0

Start BlockSingle Block Read1 1 1 1 1 1 1 0

Start BlockMultiple Block Read1 1 1 1 1 1 1 0

Start BlockSingle Block Write

1 1 1 1 1 1 1 0

Start BlockMultiple Block Write

1 1 1 1 1 1 0 0

Stop Tran

Multiple Block Write

1 1 1 1 1 1 0 1

Bytes 2—(N + 1): User data
Last two bytes—16 bit CRC

5.5.5. Data Error Token
If a read operation fails and the card cannot provide the required data, it will send a data error token instead. This
token is one byte long and has the format in Figure 5-12.
7
0 0 0

0

Error
CC Error
Card ECC Failed
Out of Range
Card is Locked
Figure 5-12. Data Error Token
The four least significant bits (LSB) are the same error bits as in the response format R2.

5-16

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONSPI Mode

5.5.6. Clearing Status Bits
As described in the previous paragraphs, in SPI mode, status bits are reported to the host in three different for mats:
response R1, response R2 and data error token (the same bits may exist in multiple response types, such as Card
ECC failed).
As in MultiMediaCard mode, error bits are cleared when read by the host, regardless of the response format. State
indicators are either cleared by reading or in accordance with the card state. Table 5-7 summarizes the set and clear
conditions for the various status bits.
Table 5-7. SPI Mode Status Bits
Identifier

Included in
Resp.

Type1

Value

Description

Clear
Cond2

Out of range

R2 DataErr

ERX

0 = no error 1 = error

The command argument was out of the allowed
range for this card.

C

Address error

R1 R2

ERX

0 = no error 1 = error

An address that did not match the block length
was used in the command.

C

Erase sequence error

R1 R2

ER

0 = no error 1 = error

An error in the sequence of erase com mands
occurred.

C

Erase param

R2

EX

0 = no error 1 = error

An error in the parameters of the erasecommand sequence.

C

Parameter error

R1 R2

ERX

0 = no error 1 = error

An error in the parameters of the command.

C

WP violation

R2

ERX

0 = not protected
1 = protected

Attempt to program a write-protected block.

C

Com CRC error

R1 R2

ER

0 = no error 1 = error

The CRC check of the previous command
failed.

C

Illegal command

R1 R2

ER

0 = no error 1 = error

Command not legal for the card state.

C

Card ECC failed

R2 DataEr

EX

0 = success
1 = failure

Card internal ECC was applied but failed tocorrect the data.

C

CC errorR2 DataEr

ERX

0 = no error 1 = error

Internal card controller error.

C

Error

R2 DataEr

ERX

0 = no error
1 = error

A general or an unknown error occurred during
the operation.

C

WP erase skip

R2

SX

0 = not protected
1 = protected

Only partial address space was erased due toexisting write protected blocks.

C

Lock/Unlock cmd
failedR2

EX

0 = no error
1 = error

Sequence or password error during card
lock/unlock operation.

C

Card is locked

R2 DataEr

SX

0 = card is not locked
1 = card is locked

Card is locked by a user password.

A

Erase reset

R1 R2

SR

0 = cleared
1 = setAn erase sequence was cleared before
executing because an out of erase sequencecommand was received.

C

In Idle state

R1 R2

SR

0 = Card is ready
1 = Card is in idle state

The card enters the idle state after a power up
or reset command. It will exit this state andbecome ready upon completion of its

A

1)
2)

Type: E = error bit; S = state bit; R = detected and set for the actual response; X = detected and set duringcommand execution (the host must poll the card by issuing the status command in order to read these bits).
Clear Condition: A = according to the card current state; C = clear by read.

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5-17

SPI Mode

Identifier

Included in
Resp.

Type1

Value

Description

Clear
Cond2

initialization procedures.
CSD overwrite

R2EX

0 = no error
1 = error

The host is trying to change the ROM section,or is trying to reverse the copy bit (set as
original) or permanent WP bit (un-protect) of
the CSD register.

C

5.6. Card Registers
In SPI mode, only the OCR, CSD and CID registers are accessible. Their format is identical to the format in theMultiMediaCard mode. However, a few fields are irrelevant in SPI mode.

5.7. SPI Bus Timing Diagrams
All timing diagrams use the schematics and abbreviations in Table 5-8.
Table 5-8. Timing Diagram Abbreviations
H

Signal is high (logical ‘1’

L

Signal is low (logical ‘0’)X

Don’t care (Undefined Value)

Z

High impedance state (-> = 1)*

Repeater

Busy

Busy token

CommandCommand token

Response

Response token

Data Block

Data token

All timing values are defined in Table 5-9. The host must keep the clock running for at least N CR clock cycles after
receiving the card response. This restriction applies to both command and data response tokens.

5.7.1. Command/Response
The following sections provide valuable information on commands and responses.
5.7.1.1. Host Command to Card Response—Card is Ready
The following timing diagram describes the basic command response (no data) SPI transaction.
CS
DataIN

5-18

H H L L L*******************<-NCS->X X H H H H 6 Bytes Command H H H H H***************<-NCR->

L L L L H H H H<-NEC->H H H H X X X X

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONSPI Mode

DataOut Z Z Z H H H H * * * * * * * * H H H H H

1 or 2 Bytes Response

H H H H H H Z Z

Figure 5-13. Timing Diagram of Command/Response Transaction, Card is Ready

5.7.1.2. Host Command to Card Response—Card is Busy
The following timing diagram describes the command response transaction for commands when the card response isof type R1b (for example SET_WRITE_PROT and ERASE). When the card is signaling busy, the host may deselect it by raising the CS at any time. The card will release the DataOut line one clock after the CS going high. To
check if the card is still busy, it needs to be re -selected by asserting the CS signal (set to low). The card will resume
the busy signal (pulling DataOut low) one clock after the falling edge of CS.
H L L L*******************
L L L L H H H L L L L L L H H<-NCS-><-NEC-><-NDS-><-NEC->
DataIN X H H H H 6 Bytes Command H H H H H H H H H H H H H X X X H H H H H H X X<-NCR->Busy
L Z Z Z Busy H H H H Z
DataOut Z Z H H H H * * * * * * * * H H H H Card Response

CS

Figure 5-14. Timing Diagram of Command/Response Transaction, Card is Busy
Card Response to Host Command
CS

L L L L L*******************H H H H H H ************* H H H H<-NCR->
DataOut H H H H H 1 or 2 Bytes Response H H H H

DataINL L H H H H

6 Bytes Command

H H H H X X X*****************H H H H H Z Z

Figure 5-15. Timing Diagram: Card Response to the Next Host Command

5.7.2. Data Read
The following sections provide valuable information on the Data Read function.
5.7.2.1. Single Block Read
CS
DataINH L L L<-NCS->X H H H H****************************
Read Command

DataOut Z Z H H H H********

L L L H H H H<-NEC->H H H X X X X

H H H H H*************************<-NCR-><-NAC->H H H H Card Response H H H H Data Block H H H H Z Z Z

Figure 5-16. Timing Diagram: Single Block Read Transaction

5.7.2.2. Multiple Block Read- Stop Transmission is Sent Between Blocks
CS
DataINH L L*******************<-NCS->X H H H Read Command H H H H * * * * * * * * * * * * * * * * * * *MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

L

L

L

L L

H H Stop Command H H H H H H H

5-19

SPI Mode<-NCR-><-NAC-><-NAC-><-NCR->

DataOut Z Z H H H * * * * * * * * H H H Card Resp H H H Data Block H H H Data Block H H H H Card Resp
Figure 5-17. Timing Diagram: Multiple Block Transaction, Stop Transmission Does Not Overlap Data
The timing for de-asserting the CS signal after the last card response is identical to a standard command/responsetransaction as described in Figure 5-13.
Multiple Block Read-Stop Transmission is Sent Within a BlockCS
DataIN

H L L<-NCS->X H H H Read Command H H H H<-NCR->**************************************

L L L L L
H H H Stop Command H H H H H H H H H H<-NAC->

DataOut Z Z H H H * * * * * * * * H H H Card Resp H H H

Data Block<-NAC->
H H H

Data

<-NCR->X X H * * H Card Resp

Figure 5-18. Timing diagram: Multiple Block Transaction, Stop Transmission Overlaps Data
The Stop Transmission command may be sent asynchronously to the data transmitted out of the card and may
overlap the data block. In this case the card will stop sending the data and transmit the response token as well. The
delay between command and response is standard NCR Clocks. The first byte, however, is not guaranteed to be all set
to ‘1.’ The card is allowed up to two clocks to stop data transmission.
The timing for de-asserting the CS signal after the last card response is identical to a standard command/responsetransaction as described in Figure 5-13.

5.7.2.4. Reading the CSD Register
The following timing diagram describes the SEND_CSD command bus transaction. The time -out values between
the response and the data block is N CX, since the NAC is still unknown.
H L L L*******************<-NCS->*******************
DataIN X H H H H Read Command H H H H H<-NCR-><-NCX->
Card Resp
H H H H
Data Block
DataOut Z Z H H H H * * * * * * * * H H H H

CS

L

L L H H H H<-NEC->H H H X X X X
HH

H H Z Z Z

Figure 5-19. Timing diagram: Read CSD Register

5.7.3. Data Write
The following sections provide valuable information for the Data Write function.
5.7.3.1. Single Block Write
The host may de-select a card by raising the CS at any time during the card busy period. (Refer to the given timing
diagram.) The card will release the DataOut line one clock after the CS going high. To check if the card is still busy,
it needs to be re-selected by asserting the CS signal (set to low). The card will resume the busy signal (pulling
DataOut low) one clock cycle after the falling edge of CS.

5-20

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATIONSPI Mode

H L*******************
L L L L L L L L H H H L L L L<-NCS-><-NWR-><-NEC-> <-NDS->
DataIN X H H H Write Command H H H H H H H H H H Data Block H H H H H H X X X H H H H<-NCR->
DataOut Z Z H H H * * * * * * * H H H Card Resp H H H H H H H Data Resp Busy L Z Z Z Busy H

CS

Figure 5-20. Timing Diagram: Single Block Write

5.7.3.2. Multiple Block Write
The timing of the multiple block write transaction starting from the command up to the first data block is identical to
the single block write. Figure 5-21 describes the timing between the data blocks of a multiple block write
transaction. Timing of the ‘Stop Tran’ token is identical to a standard data block. After the ‘Stop Tran’ token is
received by the card, the data on the DataOut line is undefined for one byte (NBR), after which a Busy token may
appear. The host may de-select and re-select the card during every busy period between the data blocks. Timing for
toggling the CS signal is identical to the Single block write transaction.
CS

L

DataINH

Data Block*******************<-NWR->H H H H H H H H H H

DataOut H H H H H Data Resp

Busy

L

L L L L L

L L L L L L L L L L L L L L<-NWR->
Data Block H H H H H H H H H H Stop Tran H H H H H<-NBR->H H H H H H H Data Resp
Busy H H H H H H X X X Busy

Figure 5-21. Timing Diagram: Multiple Block Write

5.7.4. Timing Values

Table 5-9. Timing Values
Min

Max

Unit

NCS

0

-

8 clock cycles

NCR

1

8

8 clock cycles

NCX

0

8

8 clock cycles

NRC

1

-

8 clock cycles

NAC

1[ 10*((TAAC*f )+(100*NSAC))]*1/8 **8 clock cycles

NWR

1

-

8 clock cycles

NEC

0

-

8 clock cycles

NDS

0

-

8 clock cycles

NBR

1

1

8 clock cycles** Where f is the clock frequency

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5-21

SPI Mode

5.8. SPI Electrical Interface
Identical to MultiMediaCard mode with the exception of the programmable card output drivers option, which is notsupported in SPI mode.

5.9. SPI Bus Operating Conditions
Identical to MultiMediaCard mode.

5.10. Bus Timing
Identical to MultiMediaCard mode. The timing of the CS signal is the same as any other card input.

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Appendix A. Ordering Information
To order SanDisk products directly from SanDisk, call 408 -542-0595.

MultiMediaCard
SDMB-16
SDMB-32
SDMJ-64
SDMJ-128

16 MB
32 MB
64 MB
128 MB

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

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Ordering Information

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MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

Appendix B. Technical Support Services
Direct SanDisk Technical Support
Call SanDisk Applications Engineering at 408-542-0405 for technical support.

SanDisk Worldwide Web Site
Internet users can obtain technical support and product information along with SanDisk news and much more fromthe SanDisk Worldwide Web Site, 24 hours a day, seven days a week. The SanDisk Worldwide Web Site isfrequently updated. Visit this site often to obtain the most up-to-date information on SanDisk products andapplications. The SanDisk Web Site URL is http://www.sandisk.com.

MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

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Technical Support Services

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MultiMediaCard Product Manual, Rev. 5.1 © 2002 SANDISK CORPORATION

Appendix C. SanDisk Worldwide Sales Offices
SanDisk Corporate
Headquarters

U.S. Retail Sales Offices

140 Caspian Court
Sunnyvale, CA 94089
Tel: 408-542-0500
Fax: 408-542-0503
http://www.sandisk.com

Americas
10 Flagstone
Trabuco Canyon, CA 92679
Tel: 949-589-8351
Fax: 949-589-8364

U.S. Industrial/OEM Sales
Offices
Northwest
8 Corporate Park, Suite 300
Irvine, CA 92606
Tel: 949-442-8370
Fax: 949-442-8371
Southwest & Mexico
140 Caspian Court
Sunnyvale, CA 94089
Tel: 760-736-8000
Fax: 408-542-0403
North Central &South America
101 Southhall Lane Suite 400
Maitland, FL 32751
Tel: 407-667-4880
Fax: 407-667-4834
North East & South East USA
620 Herndon Pkwy. Suite 200
Herndon, VA 22070
Tel: 703-481-9828
Fax: 703-437-9215

Retail Account Sales
32500 Mills Rd.
Avon, OH 44011
Tel: 440-327-0490
Fax: 440-327-0295

International Retail Sales
Offices
European Retail Sales
Wilhelminastraat 102011 VM Haarlem
The Netherlands
Tel: 31-23-5514226
Fax: 31-23-5348625
Southern European Retail Sales
Centre Hoche Condorcet
3 Rue Condorcet—B.P. 991263 Juvisy Sur Orge Cedex
FranceTel: 33-169-12-16-04
Fax: 33-169-12-16-24
Japan Retail Sales
Umeda-Shinmichi Bldg. 10F
1-1-5 Dojima, Kita-ku
Osaka 530-0003
Tel: 81-6-6343-6480
Fax: 81-6-6343-6481

To order SanDisk products directly from SanDisk, call 408-542-0595.

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Appendix D. Limited Warranty
I. WARRANTY STATEMENT
SanDisk warrants its products to be free of any defects in materials or workmanship that would prevent them from functioning
properly for one year from the date of purchase. This express warranty is extended by SanDisk Corporation.
II. GENERAL PROVISIONSThis warranty sets forth the full extent of SanDisk’s responsibilities regarding the SanDisk MultiMediaCard. In satisfaction of its
obligations hereunder, SanDisk, at its sole option, will repair, replace or refund the purchase price of the product.
NOTWITHSTANDING ANYTHING ELSE IN THIS LIMITED WARRANTY OR OTHERWISE, THE EXPRESSWARRANTIES AND OBLIGATIONS OF SELLER AS SET FORTH IN THIS LIMITED WARRANTY, ARE IN LIEU OF,
AND BUYER EXPRESSLY WAIVES ALL OTHER OBLIGATIONS, GUARANTIES AND WARRANTIES OF ANY KIND,
WHETHER EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION, ANY IMPLIED WARRANTY OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR INFRINGEMENT, TOGETHER WITH ANY
LIABILITY OF SELLER UNDER ANY CONTRACT, NEGLIGENCE, STRICT LIABILITY OR OTHER LEGAL OR
EQUITABLE THEORY FOR LOSS OF USE, REVENUE, OR PROFIT OR OTHER INCIDENTAL OR CONSEQUENTIAL
DAMAGES, INCLUDING WITHOUT LIMITATION PHYSICAL INJURY OR DEATH, PROPERTY DAMAGE, LOST
DATA, OR COSTS OF PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES. IN NO EVENTSHALL THE SELLER BE LIABLE FOR DAMAGES IN EXCESS OF THE PURCHASE PRICE OF THE PRODUCT,ARISING OUT OF THE USE OR INABILITY TO USE SUCH PRODUCT, TO THE FULL EXTENT SUCH MAY BE
DISCLAIMED BY LAW.
SanDisk’s products are not warranted to operate without failure. Accordingly, in any use of products in life support systems orother applications where failure could cause injury or loss of life, the products should only be incorporated in systems designedwith appropriate redundancy, fault tolerant or back-up features.
III. WHAT THIS WARRANTY COVERSFor products found to be defective within one year of purchase, SanDisk will have the option of repairing or replacing thedefective product, if the following conditions are met:A.

A warranty registration card for each defective product was submitted and is on file at SanDisk. If not, a warranty
registration card must accompany each returned defective product. This card is included in each product’s originalretail package.

B.

The defective product is returned to SanDisk for failure analysis as soon as possible after the failure occurs.

C.

An incident card filled out by the user, explaining the conditions of usage and the nature of the failure,accompanies each returned defective product.

D.

No evidence is found of abuse or operation of products not in accordance with the published specifications, or ofexceeding storage or maximum ratings or operating conditions.

All failing products returned to SanDisk under the provisions of this limited warranty shall be tested to the product’s functional
and performance specifications. Upon confirmation of failure, each product will be analyzed, by whatever means necessary, todetermine the root cause of failure. If the root cause of failure is found to be not covered by the above provisions, then the
product will be returned to the customer with a report indicating why the failure was not covered under the warranty.
This warranty does not cover defects, malfunctions, performance failures or damages to the unit resulting from use in other thanits normal and customary manner, misuse, accident or neglect; or improper alterations or repairs.
SanDisk reserves the right to repair or replace, at its discretion, any product returned by its customers, even ifsuch product is notcovered under warranty, but is under no obligation to do so.

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Limited Warranty

SanDisk may, at its discretion, ship repaired or rebuilt products identified in the same way as new products, provided such cards
meet or exceed the same published specifications as new products. Concurrently, SanDisk also reserves the right to market any
products, whether new, repaired, or rebuilt, under different specifications and product designations if such products do not meetthe original product’s specifications.
IV. RECEIVING WARRANTY SERVICE
According to SanDisk’s warranty procedure, defective product should be returned only with prior authorization from SanDisk
Corporation. Please contact SanDisk’s Customer Service department at 408-542-0595 with the following information: productmodel number and description, serial numbers, nature of defect, conditions of use, proof of purchase and purchase date. If
approved, SanDisk will issue a Return Material Authorization or Product Repair Authorization number. Ship the defectiv e
product to:
SanDisk Corporation
Attn: RMA Returns(Reference RMA or PRA #)140 Caspian Court
Sunnyvale, CA 94089
V. STATE LAW RIGHTSSOME STATES DO NOT ALLOW THE EXCLUSION OR LIMITATION OF INCIDENTAL OR
CONSEQUENTIAL DAMAGES, OR LIMITATION ON HOW LONG AN IMPLIED WARRANTY LASTS, SO
THE ABOVE LIMITATIONS OR EXCLUSIONS MAY NOT APPLY TO YOU. This warranty gives you specificrights and you may also have other rights that vary from state to state.

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