Everywhere
The Road Ahead
Mark Himelstein
CTO, RISC-V International
RISC-V Day Japan 2023
June 2023

Overview● RISC-V Overview● Why People Use RISC-V● Embedded● Portability● Embedded & Real Time ISA Extensions● SW ecosystem

Thedeﬁnitionof open
computing
is RISC-V

RISC-V is the most proliﬁcand open Instruction Set
Architecture in history●●●RISC-V is inevitable
RISC-V enables the bestprocessors
RISC-V is rapidly building thestrongest ecosystem

10s of Billions of RISC-V cores
deployed for proﬁt!

Open Source HW or Open Standard?
● We are oﬃcially an Open Standard HW ISA Architecture● We are an Open Standard that works heavily with Open Source
upstream projects (LINUX, GCC, LLVM, etc.)● We don’t do reference implementations● Our work product are speciﬁcations with support from Golden
Models and Basic Tests

5

Unlike Open Source Software …
● Proprietary Custom Extensions are Encouraged and Welcome● Products don’t just include the ISA, they can do custom
implementations/extensions of/to the ISA● Copyleft is a non-sequitur● No restrictions on how the speciﬁcation can be used
○ Only restrictions on brandingWhy RISC-V?
● Flexibility● Cost● Ecosystem● Our position in History● EDA Renaissance● Pride of Ownership

Portability● Uniﬁed common standard and a robust Software Ecosystem● A robust economy around systems and software is reliant onportability● Application & Runtime Software○○ProﬁlesAPI (e.g. POSIX)● Operation Systems○○○

Platforms
Supervisor Execution Environment (SEE)
ProﬁlesProﬁlesBases

Public Name 1

Name 2

RV32I
RV64I

RVI[20]

RVA20

RVA22

RVA23

RV32I
RV64I

RV64I

RV64I

RV64I

LoadStoreJumpsBranches
Add
Subtract
LogicalOn years
released, this
only has a
Mandatory
Base

VectorBitmanip
Scalar Crypto
FP16
Priv 1.12
Hypervisor
CacheVector Crypto
PtrMasking
BFloat16
Zcompressed
Priv 1.13

RVI20U32
RVI20U64

All othercompatible
ratiﬁedextensions are
optional

RVA20U64
RVA20S64

Mul/Div
Atomics
Compressed
Float
DoublePriv 1.11
MemRegions
Fences
VirtualMem
MAJOR

●
●

RVA22U64
RVA22S64

AndroidFeatures

MAJOR

Only a subset of extensions are listed above and it is not an exhaustive list
Some extensions may be optional or non-proﬁle in one proﬁle and be mandatory in anotherFuture

More proﬁle types:
RVB, RVM
RV128
Matrix Ops
SPMP/IOPMPCFICHERIGPU
48/64 bit instructions

Platforms
Applications & Libs & Runtimes✔
ProfilespsA
BI

Systems Software (OS, Hypervisor, etc.)✔Platform
Runtime Services✔Boot Runtime
Services✔SOC Platform Hardware
The platform deﬁnition consists of items with a ✔

✔Security
Platform
ServicesISA Extensions Targeted at Embedded and Real Time
●Extensions: Fast Interrupts, Compressed Instructions (plus Zc*), FP ininteger registers, Multiply without divide, Vector for embedded, S mode
timer access, S mode w/o MMU, Wait on reservation set, Pause Hint,
Physical Memory Protection, Scalar Crypto●Proﬁle Families: RVI, RVB, RVM●Bases: RV32I, RV32E, RV64E

What We Have Done This Year
● Ratiﬁed ISA Speciﬁcations○

Proﬁles, Code Size Reduction● Ratiﬁed Fast Tracks○

Counters, Total Store Ordering, RV32E/RV64E, Non Temporal Hints● Documentation○

Unpriv in Asciidoc, Asciidoc Priv draft● New Task Groups & Special Interest Groups○

Debug, Trace, and Performance Monitoring (DTPM) TG , Graphics SIG, RISC-V Common
Software Interface (RVM-CSI) SIG, Vector (SIMD) SIG, Control Transfer Records TG

What’s Coming Soon?
●Proﬁles○●Platforms
○

●ISA
○

●

Advanced Interrupts, QOS Register Interface, Control Transfer Records, Debug, Fast Interrupts, I/D Synch, Priv 1.13, Shadow
Stacks/Landing Pads, Vector Crypto, Vector FP16
CAS, BFloat16, Conditional Ops, Counter Mode FIltering, HW PTE A/D, Maybe Ops, Additional Scalar FP, Counter Delegation,Non-ISA○●

Portability for Systems Software (PRS, BRS, Platform Security, SOC HW, Proﬁles)

ISA Fast Tracks○●RVA23, RVI23, RVB23, RVM23, BOD committee on comprehensive ACTs & Certiﬁcation

IOMMU, Conﬁdential VM extension, IOPMP, Nexus Trace,Documentation○○○

Full time RVI DOC Architect/Writer approved
BOD committee on dev experience (content & UX)
Glossary, Navigation

Software Ecosystem

This is our number one priority

Accelerating the Rich RISC-V Ecosystem
Security

HPC

AI / ML

Cloud - Data Center - Storage - Networking

Consumer - IoT - Automotive

MobileApplications
WRF

OpenBLASBLIS FFTW

Libraries

AMR

CSI-NNInfrastructureRuntimes
OSHypervisor
BootBBL

Design Tools + Compilers

Ecosystem Standards, upstream / support common tools
gprof

TinyEMUSPIKE

SpartaSAIL

Security model,
IOMMU, Industry SIGs

ISA Extensions,
Proﬁles, Platforms

SAIL

GoldenModel

ISA

Architecture
Tests

Attributes: Debuggable, Secure, Performant,
Reliable/Serviceable/Diagnosable

Implementation
RTL

DV

Design & Microarchitecture

SiliconSoft IP
Training Academia
Research Services

Android● Google Support○ Tier 1● Google Requirements○ Engagement with RISC-V○ Likely in 2024
○ Much is underway● Lifetime can be 10 years

Software Ecosystem Resources●Foundational Software Status for each extensions●Draft spreadsheet of software on RISC-V status (140+ being tracked)○Hired RVI Software Ecosystem Director. First task is a comprehensive one stop
clearinghouse of RISC-V commercial and open source software status●RISC-V Ecosystem Landscape●RISC-V Exchange (100s)●A new Linux Foundation Project named RISE to accelerate opensource software development on RISC-V

Join RISC-V
Change theWorld!

Questions