Reduction of Input Current Harmonics based onSpace Vector Modulation for Three-level
Inverter with varied Power Factor
Koroku Nishizawa*, Jun-ichi Itoh*, Akihiro Odaka**, Akio Toba**, and Hidetoshi Umida*** Department of Electrical, Electronics and Information Engineering, Nagaoka University of Technology, Japan** Fuji Electric Co., Ltd., Japan
Abstract—This paper presents a novel space vector
modulation (SVM) which reduces current harmonics flowing
through a DC-link capacitor of a three-level inverter
employed for three-phase motor drive systems. In order toreduce the input current harmonics, the space vectors are
selected to minimize the difference between the instantaneous
value and the average value of the input current by using themagnitude relationships of the output currents. Furthermore,by determining the sector of the proposed SVM from thesemagnitude relations, the input current harmonics are
reduced even when the load power factor changes. The
experimental verification clarifies that the proposed SVM
reduces the input current harmonics by 24.6% at the power
factor of 0.866 and the modulation index of 0.7.
Index Terms—Space vector modulation, Three-level
voltage source inverter, Input current harmonics, DC-link
capacitor.

I. INTRODUCTION
Recently, three-level voltage source inverters (3LVSIs)
are increasingly employed for motor drive systems [1].
3LVSIs are possible to reduce output voltage harmonics
compared to two-level voltage source inverters (2LVSIs)
without increasing switching frequency [2]. Consequently,
harmonic loss generated in a load motor can be reduced byapplying 3LVSIs to motor drive systems as DC-AC
converter [3].
Generally, electrolytic capacitors are used as thesmoothing capacitor in the DC part of 3LVSI. However,electrolyte easily deteriorates as a result of an exothermic
reaction caused by influx of the inverter input current
harmonics. Thus, the lifetime of these electrolytic
capacitors are critical problem for the lifetime of whole
motor drive systems. It is possible to extend the lifetime ofthese electrolytic capacitors by reducing the inverter input
current harmonics.
Heretofore, the modulation method decreases theleakage current of 3LVSIs for PV systems by reducing
neutral-point voltage ripple [4]. This modulation method
is also possible to reduce the input current harmonics of
3LVSIs only when the load power factor is around unity.
Thus, this modulation method cannot be applied to themotor drive systems, the power factor variation of whichis considerably wide.
This paper presents a novel space vector modulation(SVM) which reduces the switching-frequency-orderharmonics included in the input current of 3LVSI over all
range of the load power factor. The proposed SVM reduces

the input current harmonics of 3LVSIs by selecting space
vectors in order to minimize the difference between the
instantaneous value and the average value of the input
current of 3LVSI based on the magnitude relationships ofthe three-phase output currents. The proposed SVM
reduces the input current harmonics of 3LVSIs even when
the load power factor becomes low by determining thesectors of the proposed SVM from the combination of thethree-phase output current’s polarities. The reason is thatthe instantaneous value of the inverter input current
depends on the magnitude relationships of the three-phase
output currents. Finally, the effectiveness of the proposed
SVM is confirmed by simulation and experiment with an
induction motor.
II. SPACE VECTOR MODULATION TO REDUCEINPUT CURRENT HARMONICS
A. Conventional Three-Level SVM
Fig. 1 shows a T-type 3LVSI. In general, there are two
types of 3LVSIs: neutral point clamped (NPC) inverter andT-type inverter. The T-type 3LVSI is considered in thispaper because the number of devices in the current path isreduced compared to the NPC inverter, resulting in low
conduction losses. It is noted that the modulation methods
described below do not depend on the circuit topology of
3LVSI.
Table I shows the relationships between the switching
function and the phase voltage of 3LVSI. The switching
function of T-type 3LVSI are defined as
1, (Snj : ON)
snj  , ( j  1,2,3,4)
0, (Snj : OFF)(1)

where, n is the output phase and j is the number of switch.
Three switching states and three-level phase voltages areavailable in 3LVSIs.
The output currents of the inverter at steady state areexpressed as iu  I m cos    

 



 iv  I m cos    
3 


 


iw  I m cos     3 




(2)

where, Im is the maximum value of the output current, θ isthe phase angle, and φ is the load power factor angle.
Fig. 2 shows the principle of the conventional threelevel SVM. In particular, there are nineteen space vectors(V0 ~ V18). The  plane where 3LVSI can generate theoutput voltage is divided into six sectors (sector I ~ VI) in
every 60 degrees of the voltage reference vector’s phaseangle. The voltage reference vector can be expressed withthe modulation index (m) and the phase angle as below.

V  m
*idc.in.P

Cdcp

ty
t
t
Vin*  Vin*  x Vx  Vy  z Vz
Ts
Ts
Ts

Cdcn

Sw3

+ Edc

(6)

nu ,v ,w

Since the input side of three-phase VSI operates at sixfold fundamental frequency, the rms value of the inverter
input current over a sixth of the fundamental period is
calculated as

iw
Sv2

W

Sw2

idc.in.N

Fig. 1. T-type three-level voltage source inverter.
TABLE ISWITCHING STATES OF THREE-LEVEL VSI
SwitchingstateVphase [V]P (+)+ Edc /2

1

0

1

0

0

0

0

0

1

1

N (-)

- Edc /2

0

1

0

1

III
V3

V2

II

[0 + -][+ + -]

V9

V8

V13

[- + 0][0 + 0][- 0 -][+ + 0][0 0 -]

V0

V7

V10

[- + +]

Switching functions (n = u, v, w)
sn1
sn2
sn3
sn4

[- + -]

V15
V
IV 4

V14

Sector I

V16

V11[+ 0 -]
V*

2

V1

I

[+ - -]

3

V0



4

[0 0 +][- - 0][+ 0 +][0 - 0]

V5

V17

V6

[0 - +]



V7

1
V* *
Vin

V1

6

5

V18

V12

[- 0 +][- - +]

V13

V8[0 + +] [+ + +] [0 0 0] [+ 0 0][- 0 0][0 - -][- - -][+ - 0]V12

V18

I ~ VI : Conventional sector
1 ~ 6 : Subsector
 : Phase angle of V* : Phase angle of inner vector Vin*[+ - +]

VI

Fig. 2. Conventional three-level SVM.
VI

iDC.in.P

iu

iDC.in . N   sn 2  in  .

Sw4

V

2

Ts  t x  t y  t znu ,v ,w

iv

Su2

(5)

iDC.in .P   sn1  in 

vuv

Sv4

V

B. Evaluation for Input Current Harmonics
Fig. 3 shows the instantaneous waveform of the input
current with the conventional SVM. The sampling timing
is carried out when the voltage reference vector occurs in
sector I and subsector 1 shown as Fig. 2.
Fig. 4 shows the waveforms of the voltage references
and the output currents at unity power factor. The
instantaneous values of P-side and N-side input current of
the T-type 3LVSI are calculated from the switching
functions and the output currents as

iu
U

Sv3

(4)

where, tx, ty, tz are the on duty of each selected space
vectors and x, y, z express the number of each selected
space vector [5].

Sw1

2

(3)

where, γ is the phase angle of the inner vector and i is thenumber of sector where the inner vector exists. Each sectorof the conventional SVM is also divided into six
subsectors (subsector 1 ~ 6) in every 60 degrees of thephase angle of the inner vector. Furthermore, three space
vectors surrounding the subsector where the inner vector
exists are selected to generate the voltage reference vector.
The inner vector sampled in each control period (Ts) is
generated by synthesizing these three time-averaged space
vectors Vx, Vy, Vz as

Sv1

Edc

Each sector of the conventional three-level SVM can be
regarded as the space vector diagram of the two-level
SVM. Thus, three-level SVM can be applied in the same
way as two-level SVM by defining an inner vector (V*in)shown as right part in Fig. 2. The inner vector can beobtained by decomposing the voltage reference vector by
the equivalent zero vector of two-level SVM in each sector(e.g. V7 in the sector I) as
Vin*  Vin*   V *  V6i

Su4 Su1

Su3+ Edc

iDC.inSector
I

iu

II

III

IV

V

vu*

vv*

vw*

iu

iv

iw

0
iv
iw

0

iu

-iDC.in

iDC.in.N

iv+iw
=-iu

V7

V1 V13 V7 V13 V1

V7[0--] [+--] [+0-] [+00] [+0-][+--] [0--]

0

Ts

F



A

B

C

D

E

Fig. 3. Instantaneous waveform
Fig. 4. Waveforms of voltage
of input current with conventional references and output current
SVM.
at unity power factor.

iDC.in.RMS 



1

 
i
  2 
T
3

3
0

tk

k x, y ,zs

2
DC .in . P ,k


2

 iDC
.in . N ,k d

(7)



where, tk is the on duty of the selected space vector and
iDC.in.P,k, iDC.in.N,k are the instantaneous values of P-side andN-side input current of the T-type 3LVSI when theselected space vector is applied.

Then, the average value of the inverter input current
over a sixth of the fundamental period can be calculated
asiDC .in 


3





tk

 
i
  
T30k  x, y, z

DC .in . P , k

s


d



(8)

2
2
iC . RMS  iDC.in . RMS  iDC .in .

(9)

It is understood from (7) that the rms value of the inverter
input current changes according to the choice of the space
vectors. On the other hand, it is understood from (8) thatthe average value of the inverter input current does notdepend on the choice of the space vectors, but only
depends on the modulation index and the load power
factor. In other words, the average value of the inverter
input current is constant regardless of the choice of thespace vectors. Therefore, by selecting the space vectors inorder to minimize the rms value of the inverter input
current, the rms value of the smoothing capacitor current
is also minimized. In order to analyze the optimized
vector patterns for the minimum rms value of the inverter
input current, the rms value of the inverter input current
over a control period named as the instantaneous rms
value, derived from (7) as following, is used [7].



1 Ts 22
iDC .in .P  iDC.in . N dt
2Ts 0 2T itk

k x, y,z2
DC .in . P ,kiDC.in.P

iu

iDC.in[+ + 0] V
8[0 0 -]

iu

iu+iv
iu+iw

V13
[+ 0 -]

V*

V0

2
 iDC
.in . N ,k



(10)

s

Note that the value of (10) is independent from theswitching period because the ratio between the on duty ofeach space vector and the switching period (tk/Ts) does notchange even when the switching frequency is changed.
Therefore, the rms value of the inverter input current is
independent from the switching frequency.
C. Proposed Input Current Harmonics Reduction
MethodFig. 5 shows an example of the instantaneous waveformof the inverter input current with the optimized vector
pattern for the minimum instantaneous rms value of theinverter input current when iu is positive and iv and iw arenegative. Fig. 5(a) and 5(b) are the examples of the
optimized vector pattern for the minimum instantaneousrms value of the inverter input current and theinstantaneous waveform of the input current at thatmoment, respectively. The time integral of the difference
between the instantaneous values and the average value ofboth side input current as shown by the gray areas in Fig.
5(b) with the space vectors V2, V13, V18 becomes smaller
compared to Fig. 3 in which the conventional SVM isapplied. The smaller these areas are, the smaller the

V1

iv
iw

[+ - -]

iv+iw
=-iu

V18

[+ 0 +][0 - 0]iDC.in.N

iu-iDC.in
V12

The rms value of the current flowing into thesmoothing capacitor can be calculated by using (7) and (8)as [6]

[+ + -]

03m  I m cos .
4

iDC .in .RMS (Ts ) V2[+ - 0]V2 V13

V18

V13 V2[++-][+0-][+-0][+0-][++-]

V6 [+ - +]Ts(a) One example of optimized
vector pattern (V2, V13, V18).

(b) Waveform of input current.

Fig. 5. Instantaneous waveform of input current with the optimized vector
pattern for minimum instantaneous rms value of inverter input current
when iu is positive and iv and iw are negative.

V2

V8

V13
j

V0

b f h
a c
d
e g i

k n
l
m

V12

V18

V1

Area

VectorArea

Vectora

V8-V0-V12h

V2-V13-V6b

V2-V8-V12i

V2-V18-V6c

V8-V0-V6j

V2-V13-V18

d

V2-V0-V12k

V13-V1-V6e

V8-V12-V6l

V2-V1-V18

f

V2-V8-V6m

V13-V18-V6g

V2-V12-V6n

V13-V1-V18

V6
Fig. 6. Proposed vector patterns to minimize rms value of 3LVSI input
current when iu is positive and iv and iw are negative.

instantaneous rms value of inverter input current becomes[8]. As a result, the rms value of the current flowing into
the smoothing capacitor can be also reduced by selecting
these space vectors. In the high modulation index region
shown as the green area in Fig. 5(a), the space vectors
which can reduce the instantaneous rms value of theinverter input current are V2, V13, V1, V18 and V6.
Consequently, the rms value of the inverter input current
becomes the minimum by selecting three space vectors
from these five space vectors in the high modulation index
region. On the other hand, in the low modulation index
region shown as the purple area in Fig. 5(a), the rms value
becomes the minimum by selecting three space vector
from V2, V8, V0, V12 and V6.
Fig. 6 shows the proposed vector patterns to minimize
the rms value of the inverter input current when iu ispositive and iv and iw are negative. Three space vectors
which are the closest to the voltage reference vector are
selected for the modulation from these five space vectors
which minimize the rms value of the inverter input current.
Moreover, the proposed SVM can control the dc rippleof the neutral-point voltage of 3LVSI. In the proposed
vector pattern, at least one output phase is connected to theneutral point of the 3LVSI at any control period. Thus, byapplying offset to the voltage references, the difference
between the capacitor voltages of the top and bottomsmoothing capacitors can still be reduced.

D. Adapting to Variation of Load Power Factor
Table 2 shows the proposed sector definitions to deal
with the variation of the load power factor. The sectors of
the proposed SVM (A ~ F) are determined by the
combination of the polarities of the inverter output
currents.
Fig. 7 shows the proposed SVM to minimize the rms
value of the 3LVSI input current in low load power factor.
The proposed vector patterns shown in Fig. 6 are effective
to minimize the rms value of 3LVSI input current only
when iu is positive and iv and iw are negative, i.e. theproposed sector A. When the load power factor changes
and the magnitude relationships of the output currentschanges, it is necessary to deal with that change in orderto still be able to minimize the rms value of the 3LVSI
input current. In the proposed SVM, by determining thesector from the magnitude relationships of the output
currents shown as Table 2, the vector patterns in which therms value of the 3LVSI input current is minimum at thatmoment can be applied corresponding to the load power
factor change. Note that the detection of the load power
factor is unnecessary. In particular, the sectors of the
proposed SVM shift corresponding to the load power
factor angle (φ) shown as Fig. 7. When the load power
factor becomes smaller than 0.5 (φ > 30 degrees), there areareas which cannot be modulated by the proposed vector
pattern to minimize the rms value of the 3LVSI input
current and expressed as the shaded areas in Fig. 7. Hence,the conventional SVM is applied in these areas and the
proposed vector patterns are applied in other area in thecase of the low power factor.

The performances of the conventional and proposed
SVM are verified in experiment. The switching frequencyof the T-type 3LVSI is 10 kHz. In the experiment, a threephase induction motor (200 V, 1.5 kW, 1500 r/min,
MVK8097A, Fuji Electric Co., Ltd.) is used as a test
motor. Besides, the load power factor is varied from 0.259
to 0.866, i.e. the case of driving mode, by controlling thetorque reference of a load motor.
A. Input Current Harmonic Analysis
In this paper, the input current harmonics of 3LVSI isevaluated as IDC.in(p.u.), which is the rms value of the 3LVSI
input current (IDC.in.RMS) normalized by the maximum
value of the output current (Im).

 1


iDC .in ,k k 1  2

l

A
B
C
D
E
F

P
P
N
N
N
P

III
V3
V15

N
P
P
P
N
N

V14
V9

N
N
N
P
P
P

V2

B V8

II

Conventional SVM

V13

Proposed SVM

A
C

V
IV 4

V10
V16

DV11
V5

V1

V7

V0
V12
E
V17

V6

V

I

F
V18

VI

I ~ VI : Conventional sector
A ~ F : Proposed sector

Fig. 7. Proposed three-level SVM when load power factor changes.
SectorI

IV
II IIIV VI

iDC.in.P [10 A/div.]0

vuv [250 V/div.]
0III. EXPERIMENTAL VERIFICATIONSI
1
I DC.in (p.u.)  DC.in .RMS 
Im
Im

TABLE II
SWITHING STATES OF THREE-LEVEL VSI
Current polarity(P: Positive, N: Negative)
Sectoriu
iv
iw

iu [10 A/div.]
0[10 ms/div.](a) Conventional SVM.
E F
C D
B
A

SectoriDC.in.P [10 A/div.]0

vuv [250 V/div.]0

iu [10 A/div.]

2

(11)

where, k is harmonic order and iDC.in,k is k-ordercomponent of the input current harmonics. The
fundamental component of the input current harmonics is
50 Hz at rated load. The harmonic components of the input
current up to 20th-order of the switching frequency, i.e. up
to l-order component of the input current harmonics, areconsidered in this calculation.
Fig. 8 shows the experimental waveforms of the driving
test for the three-phase induction motor at the power factor

0[10 ms/div.](b) Proposed SVM.
Fig. 8. Experimental waveforms at cosφ = 0.866, m = 0.7: Sector, output
line voltage, P-side input current, and U-phase output line current.

of 0.866 and the modulation index of 0.7. Fig. 8(a) and 8(b)shows the experimental waveforms with the conventional
SVM and proposed SVM, respectively. When the load
power factor is high, the applying ratio of the proposed
SVM is also high. In particular, the proposed SVM areB. Output Current Harmonic Analysis
Fig. 11 shows the total harmonic distortion (THD) of
the U-phase output line current at the load power factor of
0.866. THD of the output line current is calculated as

IDC.in(p.u.) [p.u.]

Input current [%]Input current [%]applied at all time at the load power factor of 0.866. It is100
32.3 %
IDC.in(p.u.) = 0.421 [p.u.]confirmed from Fig. 8 that the width of the step change in
the input current is reduced by applying the proposed
10
SVM. On the other hand, the distortion of the U-phase1
output line current with the proposed SVM is slightly
higher than the one with the conventional SVM.
0.1
Fig. 9 shows the frequency analysis results of the
3LVSI input current at the load power factor of 0.866 and0.01
the modulation index of 0.7 (under the same conditions as
Fig. 8). Fig. 9(a) and 9(b) are the results with the0.001
conventional SVM and proposed SVM, respectively.
10
100
1000
10000
100000100% of the vertical axis implies the maximum value ofFrequency [Hz]the output line current, i.e. 6A under this condition. When(a) Conventional SVM.
the conventional SVM is applied, the 3LVSI input current
100
includes large switching frequency-order harmonic
IDC.in(p.u.) = 0.318 [p.u.]
component, the value of which is 32.3%. By applying the11.7 %
10
proposed SVM, the switching frequency-order harmoniccomponent is reduced by 11.7%.
1Fig. 10 shows the simulation and experimental resultsof the analysis of the input current harmonic with the0.1
conventional SVM and the proposed SVM. At the power
factor of 0.866, i.e. when the load power factor is high, the
0.01
value of IDC.in(p.u.) is reduced by 24.6% by applying the
proposed SVM compared to the case with the0.001
conventional SVM. Besides, at the power factor of 0.259,
10
100
1000
10000
100000i.e. when the load power factor is low, the value ofFrequency [Hz]IDC.in(p.u.) is reduced by 6.55% at most by applying the(b) Proposed SVM.
proposed SVM compared to the case with theconventional SVM. It is also confirmed from this results Fig. 9. Frequency analysis results of 3LVSI input current at cos φ = 0.866,
that as the load power factor becomes smaller, the input m = 0.7 (under the same conditions as Fig. 8). Fundamental frequency is
30 Hz. 100% of vertical axis is the maximum value of output current (6 A).
current harmonics-reduction effect diminishes because theapplying ratio of the proposed SVM is low. Furthermore,
0.50
cos φ = 0.866
Lines : Sim. results
the experimental results of IDC.in(p.u.) almost agree with the
Plots : Exp. results(φ = 30 deg.)
simulation results. These results confirm that the proposed
0.40
SVM can reduce the 3LVSI input current harmonics at
0.30
any load power factor.
cos φ = 0.259(φ = 75 deg.)

0.20

cos φ = 0.707(φ = 45 deg.)

0.10
0.00

 i 

0.0

40

THD 

k 2

i1

0.2

2
k

1.0

1.2

(a) Conventional SVM.

(12)
0.50

Lines : Sim. results
Plots : Exp. results

0.40

IDC.in(p.u.) [p.u.]

where, ik is k-order component of the output line current
harmonics and i1 is the fundamental component of theoutput line current harmonics, the rated value of which is
50Hz. THD of the U-phase output line current increases
in 2.32 times at most by applying the proposed SVM. In
the conventional SVM, three space vectors, the tips ofwhich are the closest to the tip of the voltage reference
vector, are selected for modulation. Note that the rms line
current ripple can be calculated by using the time integralof the error voltage vector between the applied voltage andreference voltage [9]. Consequently, the conventional
SVM is the modulation scheme which achieves low
output harmonic. On the other hand, in the proposed
SVM, three space vectors, the tips of which are located far

0.4
0.6
0.8
Modulation index m [-]cos φ = 0.866(φ = 30 deg.)

0.30
0.20

cos φ = 0.707(φ = 45 deg.)cos φ = 0.259(φ = 75 deg.)

0.10
0.00
0.0

0.2

0.4
0.6
0.8
Modulation index m [-]

1.0

1.2

(b) Proposed SVM.
Fig. 10. Simulation and experimental results of input current harmonics.

IV. CONCLUSIONSIn this paper, the novel SVM to reduce the input current
harmonics of the 3LVSIs in case that the power factor
varies was proposed. This method contributed to the long
lifetime of the smoothing capacitor in the motor drive
systems. The 3LVSI input current harmonics was reduced
by selecting the space vectors to minimize the error
between the instantaneous value of the input current andaverage value by using the magnitude relationships of theoutput currents. By determining the sector of the proposed
SVM from these magnitude relationships, the 3LVSI input
current harmonics were reduced even when the load power
factor changed.
The effectiveness of the proposed SVM was confirmedby experiments with the induction motor. The
experimental results confirmed that the input current
harmonics was reduced by 24.6% by applying the
proposed SVM. Moreover, it was also confirmed that the
input current harmonics was reduced over all range of thepower factor. Meanwhile, THD of the output line current
deteriorated by applying the proposed SVM because of theselection of the space vectors to reduce the input current
harmonics. However, the increase of the output line
current harmonics with the proposed SVM can be simply
solved by increasing the switching frequency.

10

cos φ = 0.866(φ = 30 deg.)

8

THD of iu [%]from the tip of the voltage reference vector, are selected tominimize the instantaneous rms value of the 3LVSI input
current. As a result, THD of the output line current
deteriorates when the proposed SVM is applied. However,
the increase of the output line current harmonics with theproposed SVM can be simply solved by increasing
switching frequency, i.e. shortening the integral time ofthe error voltage vector between the applied voltage andreference voltage. Meanwhile, the rms value of the 3LVSI
input current is independent from the switching period,
which implies that the increase in the switching frequency
has no influences on the 3LVSI input current harmonics.

Proposed SVM (fsw = 10 kHz)6
4

2
Conventional SVM (fsw = 10 kHz)

0
0.0

0.2

0.4
0.6
0.8
Modulation index m [-]

1.0

1.2

Fig. 11. Total harmonic distortion of output line current with each SVM
at power factor of 0.866. fsw is switching frequency.

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IA-17, no. 5, pp. 518-523 (1981).
[3] D. Sato, J. Itoh, “Improvement of the Electric Energy
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