A Novel Single-phase Buck PFC AC-DC Converter
using an Active Buffer
Yoshiya Ohnuma and Jun-ichi Itoh
Department of Electrical Engineering
Nagaoka University of Technology
1603-1 Kamitomioka-cho Nagaoka, Japan
itoh@vos.nagaokaut.ac.jp
Abstract— The present paper discusses a new circuit
configuration and a new control method for a single-phase ACDC converter with power factor correction (PFC) and a power
pulsation decoupling function. The proposed converter canachieve low total harmonic distortion (THD) on the input
current and the power pulsation decoupling function between
the input and output side, which allows low output voltage
ripple even on a small output energy buffer at the same timeusing an active buffer. Therefore, the proposed converter does
not require large smoothing capacitors or large smoothing
inductors. The buffering energy is stored by a small capacitor,
which controls the capacitor voltage variation through theactive buffer. In the present paper, the fundamental operationsof the proposed converter are investigated experimentally. The
experimental results reveal that the input current THD is
1.44%, the rate of the output voltage ripple is 6.33%, and the
input power factor (P.F.) is over 99%. In addition, a maximum
efficiency of over 96% is obtained for a 750-W prototype
converter.

I.

INTRODUCTION

Single-phase AC-DC converters are widely required in
power supplies for home appliances, electric trains, andbattery chargers. One of the important requirements for theconverters is to provide low input current harmonics in order
to meet various standards, such as IEEE 519 or IEC 610003-2 (JIS 61000-3-2). Therefore, a number of power factor
correction (PFC) converters and control methods have been
investigated [1]-[8]. The simplest configuration of an ACDC converter with PFC function consists of a diode rectifier
and a chopper circuit. There are into two types of chopper
circuit: boost chopper circuits and buck chopper circuits.
Boost-chopper-type single-phase AC-DC converters requirea large smoothing capacitor to decouple the power pulsation
generated with twice the power supply frequency. In contrast,
buck-chopper-type single-phase AC-DC converters require alarge smoothing inductor at the DC link part for the same
reason. Since the energy storage density of an inductor issmaller than that of a capacitor, the buck-chopper-typesingle-phase AC-DC converters are larger than the boostchopper-type single-phase AC-DC converters. In order toreduce the inductance value of the smoothing inductor, anumber of strategies, such as power pulsation decoupling
methods, have been proposed [14]-[19]. These topologies
reveal the possibility of reducing the inductance value of thesmoothing inductor by storing the power pulsation in a subcapacitor with an additional circuit. However, the additional
circuit requires more switches, diodes, and other inductors.
Consequently, the additional circuit increases the total power
consumption.
The present paper proposes a new single-phase buck PFC
AC-DC converter with a power pulsation decoupling
function. The proposed converter is constructed based on abuck-type PFC AC-DC converter topology using an active
buffer [20], which is composed of two switches and a small
capacitor. In other words, the proposed converter can control
a sinusoidal input current and can also control the low-output
DC voltage ripple without a large inductor or a large
capacitor. The values of the active buffer capacitor can be
reduced by controlling the capacitor voltage variation,
allowing for the use of small capacitors such as film
capacitors or laminated ceramic capacitors. Therefore, theproposed converter is smaller than those conventional
converters.
The remainder of the present paper is organized asfollows. First, the circuit topology and the configuration of
the proposed converter are described. Second, the control
strategy of the proposed converter is explained. The passive
component used to decouple the power pulsation is thendiscussed. The fundamental operation and validity of the
proposed converter are confirmed experimentally,
demonstrating that the input and output current waveforms
have few harmonic distortions.
II.

CIRCUIT TOPOLOGY

Figure 1 shows the circuit configuration of theconventional buck-chopper-type single-phase AC-DC
converter. The conventional converter can be a low-cost
structure because this converter requires only one switching
device and five diodes. However, the buck PFC converterfails to provide a sinusoidal waveform for the input current at
the zero crossings of the input voltage, i.e., during the period
when the input voltage is lower than the output voltage, thetotal harmonic distortion (THD) of the input current and theoutput voltage ripple become higher because of the
discontinuous current of the smoothing inductor. Therefore,a large smoothing inductor is required in order to obtain a
low-THD input current and a low-ripple output DC voltage.
Figure 2 shows the circuit configuration of the proposed
converter. The buffer circuit consists of two switching
devices (SWa, SWb), a diode, and a small capacitor. The power
pulsation generated with twice the power supply frequency isabsorbed by the active buffer capacitor Cdc. The passive
components of the converter without Cdc are only required at
the input and output filter in order to eliminate the switchingfrequency. In the present paper, a high-speed switching
device MOSFET is selected in order to reduce the filter size.
Figure 3 illustrates the switching pattern of the proposed
circuit. The current pass does not occur from the rectifier tothe active buffer capacitor through the switch SWa because
the active buffer capacitor voltage must be higher than the
input voltage. Therefore, assuming that the output inductor
current is maintained constant, the current passes of the
proposed converter have four modes based on the switchingpattern. In mode 1, the output power is directly supplied by
input single-phase source. The buffer power is controlled bymode 2 and 3. In mode 2, the buffer capacitor is discharged.
In contrast, in mode 3, the buffer capacitor is charged. Mode
4 is a pass mode of the output inductor current. Thus, theproposed converter performs the function of a buck chopper(mode 1, mode 4) and the buffering function of the power
pulsation (mode 2, mode 3).
III.

CONTROL STRATEGY

Fig. 1. Circuit configuration of the conventional converter

Fig. 2. Circuit configuration of the proposed converter

Fig. 3. Switching pattern of each mode

A. Principle of power pulsation compensation
Figure 4 depicts the principle of power pulsationcompensation. When both the input voltage vin and the input
current iin have sinusoidal waveforms, the instantaneous
input power pin is expressed as follws;
pin = VINp I INp sin 2 (ωt ),1
1= V INp I INp − V INp I INp cos (2ωt )
2
2

(1)

where VINp is the peak amplitude of input voltage, IINp is thepeak amplitude of the input current, and ω is the input
angular frequency.
Base on (1), a power pulsation with twice the input
frequency appears in the input power. In order to decouple
this power pulsation, the buffer circuit instantaneous powerpbuf is required, as given byp buf =

1
V INp I INp cos (2ωt ) ,2(2)

Fig. 4. Compensation principle of the power pulsation

where the polarity of pbuf is defined as positive when thebuffer capacitor discharges. The mean power of the buffer
circuit is zero because the buffer capacitor absorbs only thepower pulsation.
Consequently, the instantaneous output power pout will be
constant:
1
pout = VINp I INp = VOUT I L .
2(3)

B. Control approach
The proposed converter is controlled by four modes asshown in Figure 2. Therefore, assuming that the output
inductor current IL is continuous, the rectifier current irec andthe capacitor current ic can be expressed as⎡irec ⎤ ⎡ d mode1⎢ ⎥=⎢⎣ ic ⎦ ⎣d mode2

d mode3 ⎤⎥ ⋅ IL ,− d mode3 ⎦(5)In order to obtain a sinusoidal input current, irec is
constrained as follows:
irec = I INp sin(ωt ) .

(6)

Therefore, dmode1 is controlled by the following equation,
based on (4) and (6):d mode1 =

I INp
IL

sin(ωt ) − d mode3

VINp I INp
2vc

cos(2ωt ) ,(8)where vc is the capacitor instantaneous voltage. Substituting(8) into (4) yields
d mode2 − d mode3 = dtempo =VINp I INp
2vc I Lcos(2ωt ) ,mode 3 is selected. Therefore, dmode2 and dmode3 are calculated
as follows:⎧, d tempo ≥ 0⎧d tempo⎪d mode2 = ⎨, d tempo ≤ 0⎪⎩0.
⎨⎧− d tempo , d tempo ≤ 0⎪⎪d mode3 = ⎨ 0, d tempo ≥ 0
⎩
⎩

(9)

where dtemp is defined as dmode2 – dmode3. When the capacitor
current ic is positive, i.e., when dtempo is positive, mode 2 isselected in order to discharge the capacitor. In contrast, in thecapacitor current ic is negative, i.e., when dtempo is negative,(10)

The ratio of IIN to IL can be obtained as follows based on
(3):
I INp

(7)

where dmode3 is determined in order to decouple the power
pulsation of the input power supply. The capacitor current ic
should be controlled as follows, based on (2), in order tocompensate the power pulsation:
ic =Table 1. Pulse transform table(4)

where dmode1 through dmode4 are the duty ratios of therespective modes. The duty ratios are constrained by thecontinuous current (IL), as follows:d mode1 + d mode2 + d mode3 + d mode4 = 1

Fig. 5. Commands, a carrier pattern, and switching patterns(discharge mode)

IL

=2

VOUT
VINp

(11)

By substituting (11) into (7) and (9), we obtain*d mode1 = 2

VOUTsin(ωt ) − d mode3 ,VINp*

d mode2 − d mode3 = d tempo =VOUTcos(2ωt ) .
vc

(12)

(13)

Note that Vout is usually used as a command to control theconverter. Thus, Vout is replaced by the voltage command
VOUT*. Finally, these duty ratios are given by (5), (10), (12),and (13) using VINp, ω, vc, and VOUT*.
C. Maximum output voltage of the proposed converter
In the control algorithm, all duty ratios should be positive,
and the sum of the duty ratios should be one as shown in (5).
By substituting (12) into (5), dmode4 can be described as

2

VCmin −

pout

ωCdc

{sin(2θ ) −1}
Fig. 6. Control block diagram of the proposed converter.

*Vd mode4 = 1 − ( 2 OUT sin(ωt ) + d mode2 ) .
VINp

(14)

Based on the above equation, in order to obtain a positive
value of dmode4, the value in brackets should approach to one.
When ωt is π/2, the value in brackets becomes a maximum.
Therefore, we can obtain the following inequality:0 ≤ 1− 2*

VOUT ≤

VOUT
V INp

V INp

*

(15)

2

Thus, the maximum output voltage of the proposed converter
is limited to half the peak amplitude of the input voltage.
D. Pulse generation method
Figure 5 shows three commands, which are obtained by
duties, a carrier pattern, and switching patterns. Since thetransition from mode 1 to mode 4 immediately increases thenumber of switching times, there is a transition throughmode 2 or mode 3. Therefore, three commands are calculated
as dmode1, dmode1 + dmode2, and dmode1 + dmode3. Commands arecompared to a triangular carrier, so as to obtain comparison
signals s1, s2, and s3 as shown in Figure 5. The comparison
signals are converted into gate switching signals using Table
1.
This method enables switching patterns to be achieved
based on the required ratios of each duty and the required
transition pattern. Note that the proposed converter has anadvantage in that it is not necessary to consider the dead-timeor the overlap-time for gate signals because all of theswitching patterns are used.
Figure 6 shows a control block diagram of the proposed
circuit. Based on (5), (10), (12), and (13), the duty ratio
commands are calculated using the detected single-phasevoltage vin, capacitor voltage vc, output inductor current il,
command of the output voltage Vout*, minimum voltage ofthe active buffer capacitor Vcmin*, and capacitance of theactive buffer capacitor Cdc. The gate pulses are given as
shown Figure 5 and Table 1. Note that the capacitor voltage
is controlled by a PI controller. The method for capacitor
voltage control is described in the next section.

E. Control method of the capacitor voltage
Practically speaking, the capacitor voltage does notmatch the theoretical value due to the voltage error resulting
from the on-state drop of the power device. Thus, thecapacitor voltage is controlled by the PI regulator to thetheoretical value.
The capacitor power (capacitor voltage times capacitor
current) corresponds to (2). Therefore, the theoretical valueof the capacitor voltage can be obtained as follows:tt

1∫ v i dt = ∫ 2 V I
t0c c

INp INpt02vc = vc0 −cos(2ωt )dt

pout{sin(2ωt ) − sin(2ωt0 )}
ωC dc

,

(16)

where, vc0 and t0 are the initial capacitor voltage and theinitial time of integration. The output power is obtained by
the output voltage command Vout* and the output inductor
current il. Substituting the minimum capacitor voltage VCmin
into the initial capacitor voltage vc0, we obtain the following:2

vc = VCmin −

pout

ωC dc

{sin (2ωt ) − 1}(17)

The value obtained by subtracting the detected value
from the theoretical value of the capacitor is fed into the PI
regulator, and the output of the PI regulator is then added tothe duties, as shown in Figure 6.
IV.

PASSIVE COMPONENTS

In this section, we discuss the passive components, which
decouple the power pulsation. If the output power is constant,then the electric storage energy of the passive component
needed in order to compensate for the power pulsation Wr is
obtained from (2). Thus, the maximum storage energy in a
passive component is given byπ / ( 4ω )1
VINp I INp ∫cos(2ωt )dt−π / ( 4ω )2,
VINp I INp
p
=
= out
2ω
ω

Wr =

(18)

Equation (18) indicates that the storage energy in thepassive component is determined by the output power andthe input angular frequency. When this energy is stored by
the capacitor, the following equation holds:
Wr =

1
1
2
2
CVCmax − CVCmin
2
2
,

(19)

where VCmax and VCmin are the maximum and minimum
voltages, respectively, of the capacitor. Therefore, therequired capacitance is calculated as follows:
C=

2Wr
2
2
VCmax − VCmin ,

400

1000

Conditions
・Output power : 750W 800
・Ripple of output : 10%

300

00

100

3000

200

Output voltage [V]Buck type

(20)

600
Required400
capacitance
200

200 Required
inductance
100

Boost typeFig. 7. Required value of the passive component of conventional converters

On the other hand, the energy is stored by the inductor, andrequired inductance is calculated as follows:
L=

2Wr
2

I Lmax − I Lmin

2

,

(21)

where ILmax and ILmin are the maximum and minimum
currents, respectively, of the inductor.
The proposed converter is then compared withconventional converters at the required values of the passive
components. Figure 7 shows the required value of thepassive component of the conventional converters under thecondition in which the output power is 750 W and the ripple
rate of the output voltage is 10%. The ripple rate of theoutput voltage is defined as follows:
Vrip =

VOUT max − VOUT min,
2VOUTave

Fig. 8. Required value of the active buffer capacitor of the proposed
converter
Table 2. Specifications of the prototype converter(22)

where VOUTmax, VOUTmin and VOUTave are the maximum,
minimum and average output voltages, respectively. Notethat these values assum that all power pulsation energy canbe stored by passive components.
Based on Figure 7, the required values of theconventional converter are large, because the ripple of thepassive components is influenced directly by the ripple rateof the output voltage. In addition, the required values dependon the output voltage. In particular, when the output voltage
is 130 V for the buck-type converter, the required inductancevalue is approximately 350 mH, which is a very large value
for this output power condition.
On the other hand, the proposed converter decouples thepower pulsation by means of the active buffer. The ripple
voltage of the capacitor does not affect the output voltage
ripple because the proposed control method calculates theswitching duty in consideration of the voltage ripple. The
minimum voltage of the capacitor is determined by the peak
input voltage, the maximum voltage of the capacitor isconstrained by the allowable voltage of the devices and thecapacitor. Therefore, the voltage of the active buffer(a) Input and output waveforms(b) Input and capacitor voltage waveforms
Fig. 9. Experimental resultscapacitor can fluctuate and does not depend on the output
voltage.
Figure 8 shows the required value of the passive
component of the proposed converters under the condition
that the output power is 750 W. As permitted by the
maximum capacitor voltage, the capacitance can be easily
reduced. However, a capacitor that allows high voltage andlarge current is required, and a film capacitor or a laminatedceramic capacitor can be used under this condition. The
laminated ceramic capacitor can be used in order to realize asmall converter.
V.

(a) Load is changed from 40 % to 100%

EXPERIMENTAL RESULTS

In order to demonstrate the validity of the proposed
converter, a 750-W class prototype circuit has been tested.
Table 2 shows the experimental parameters. The input andoutput filters of a 1-mH inductor and a 3.3-μF capacitor wereused. In this experiment, a 100-μF film capacitor was used
for the 750 W output power. At the rated output power, themaximum capacitor voltage becomes 357 V, which can becalculated using (20). In the experiment, the output voltage
command is set to 130 V, and the output power is controlled
by the output load.
Figure 9(a) shows the operation input and output
waveforms of the proposed converter. Based on the results,
sinusoidal waveforms without distortion are obtained at the
input current. In addition, DC waveforms of the output
voltage and output inductor current without ripple wereobtained. In addition, an input power factor of 99.9% and ahigh efficiency of 96.4% were obtained.
Figure 9(b) shows the input and capacitor waveforms of
the proposed converter. This figure shows that the proposed
strategy controlled the capacitor voltage between
approximately 280 V and 360 V at twice the input voltage
frequency.

(b) Load is changed from 100 % to 40%
Fig.10. Experimental results for transient response

Fig.11. Characteristics of efficiency and input power factor for the
proposed circuit

Figure 10 shows the transient response of the proposed
circuit. The output load was changed from 40 to 100% orfrom 100 to 40%. The experimental results reveal that the
input current had a sinusoidal waveform. In addition, thecapacitor voltage was controlled. Moreover, an undistorted
direct output voltage waveform was obtained.
Figure 11 shows the efficiency and input power factor of
the proposed converter as functions of the output power.
These results reveal that an input power factor of over 99%
and a high efficiency of over 96% were obtained. The power
factor is low in the light-load region because the lead current
initially flows to the capacitor of the input filter.

Fig.12. Total harmonic distortion of the input current

Figure 12 shows the total harmonic distortion (THD) of
the input current. The minimum value for the input current
THD is 1.91%. The input current harmonics in the proposed
circuit meet the requirement of the standard of IEC 61000-32.
Figure 13 shows the ripple rates of the output voltage
with respect to the output power of the proposed circuit andthe conventional buck converter which is connected to theFig.13. Ripple rates of output voltage

100-μF capacitor by an output filter capacitor. As the output
power increases, the ripple rate of the conventional converter
increases. On the other hand, the ripple rate of the proposed
converter is less than 10% for a wide range of output power.
VI.

CONCLUSION

We herein proposed a circuit configuration and a control
method for a single-phase AC-DC converter with an active
buffer, which is used to decouple the power pulsation
between the input and output sides. The proposed circuit canachieve low THD at the input current and can also control
the low-output DC voltage ripple. The validity of the
proposed control strategy was confirmed experimentally.
The power pulsation at twice the frequency of the power
supply can be adequately suppressed using a buffer capacitorof only 100 μF at 750 W. Finally, the input current THD wasless than 2 %, and an unity input power factor was achieved.
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