Passive-Damped LCL Filter Optimization forSingle-Phase Grid-Tied Inverters Operating in bothContinuous and Discontinuous Current Mode
Hoai Nam Le and Jun-ichi Itoh
Department of Electrical engineering
Nagaoka University of Technology, NUT
Niigata, Japanlehoainam@stn.nagaokaut.ac.jp
Abstract— This paper proposes a filter design method for apassive-damped LCL filter in single-phase grid-tied inverters
operating in both continuous current mode (CCM) anddiscontinuous current mode (DCM). Low-inductance filters
leads to two main problems: zero-crossing current distortions
and filter resonance at weak power grid. An operation in both
CCM and DCM is introduced to eliminate the zero-crossing
current distortions. Meanwhile, a design flow chart is proposed
to show step-by-step how to design the LCL filter based on rootloci. Current control performances are compared between awell-known proportional-resonant (PR) controller employedwith the only-CCM operation, and the PI controller with theproposed CCM/DCM operation. A 4-kW prototype isconstructed in order to analyze the control performance.
Compared to the conventional CCM control, the proposed
CCM/DCM control reduces the current total harmonic
distortion (THD) by 75.9%. Even at weak power grid (i.e. ahigh grid inductance of 2000 H), the proposed control canobtain a low current THD of 0.8% with the filter inductance
reduced to only 160 H, which is 0.5% of the total inverter
impedance.
Keywords—single-phase grid-tied inverter, continuous
current mode, discontinuous current mode, linearization, digital
controlI.

INTRODUCTION

In grid-tied inverters for photovoltaic systems, a filter isgenerally required in order to suppress current harmonics andmeet grid current harmonic constraints as defined bystandards such as IEEE 1547 [1]. LCL filters are usually
preferred to conventional L filters because they can obtaineffective switching harmonic attenuation with lower
inductance requirement. Nevertheless, the low-inductance
LCL filter might introduce two main problems to the current
control; zero-crossing current distortions and the well-known
resonance issue [2]-[4].
The reduction of the inductance leads to a design of ahigh switching current ripple due to a high dc-link voltage toinductance ratio. This high current ripple results in a current
distortion phenomenon called zero-current clamping, which
implies the operation of the inverter changes fromcontinuous current mode (CCM) to discontinuous current
mode (DCM) around zero-current crossing points [4]. A
strong nonlinear behavior of DCM significantly worsens acurrent control performance, inducing the zero-crossing
current distortion [5]. Many DCM nonlinearity compensation
methods have been proposed to deal with this problem [6][11]. However, the common issue with these conventional
methods is that the DCM nonlinearity compensation isdependent on the inductance. When plant mismatch orparameter variation occurs, the current distortion reduction is
no longer guaranteed.
On the other hand, the closed-loop current controller
design considering the resonance in LCL filters becomes
more challenging over a wide variation range of grid
inductance. The most straightforward way to deal with the
LCL resonance is to connect a damping resistor in series withthe capacitor of the LCL filter. Although this method caneasily achieve a stable current control over a wide frequency
range, decreased high frequency attenuation and highdamping loss are undesired drawbacks [2]. Meanwhile, the
LCL filter with a shunt RC provides a better solution withlower damping loss and good high frequency attenuation [3].
Nevertheless, it has not been reported a filter design
considered the DCM operation of the inverter around thecurrent zero-crossing points, which greatly affects the control
stability.
This paper proposes a filter design method for a passivedamped LCL filter in single-phase grid-tied inverters
operating in both CCM and DCM. The zero-crossing current
distortion is alleviated by the DCM operation of the inverter
around the current zero-crossing points. In particular, an
inductance-independent DCM nonlinearity compensation
method is introduced in order to control the inverter with thesame PI controller designed in CCM [12]. Instead of using
the inductance for the calculation of the DCM nonlinearity
compensation, a duty ratio at a previous computation period
is used to estimate the DCM nonlinearity. On the other hand,a design flow chart is proposed to show step-by-step how todesign the passive-damped LCL filter based on root loci of
closed-loop current control considering the variation of theGrid side
SW1

SW2

vdc

vo

L

Lf

iout

SW2

C
Cf 
n1

Rd
vCf

Lg

W/o dead time

With dead time

Fig. 2(b)Fig. 2(c)

ig

nC
Cd 
n 1

vg

0

0

Zerocurrentcrossing
distortion

Inverter output current
iout (10 A/div)
Time (10 ms/div)

SW1(a) Inverter output current w/o dead time and with dead time
Fig. 1. Single-phase grid-tied inverter. An H-bridge inverter with apassive-damped LCL filter is analyzed due to its simple configuration,
which provides high fault-tolerant reliability.

grid inductance. In particular, a well-known proportionalresonant (PR) controller employed with the only-CCM
operation, and the PI controller with the proposed
CCM/DCM operation are analyzed in order to compare theachievable stability in case when the inductance of the LCL
filter is extremely reduced. The original idea of this paper isthat the utilization of the duty ratio at the previous
computation period is to make the DCM nonlinearity
compensation inductance-independent, whereas the filter
design based on the root loci can achieve the most reliablestability with the smallest reducible filter volume. This paper
is organized as follows: in section II, the problems with theincreasing grid current THD due to the zero-crossing
distortion is explained. Next, in section III, the derivation of
the CCM/DCM current control based on the PI controller isdemonstrated. Then, in section IV, the filter design flowchart
for the passive-damped LCL filter in single-phase grid-tied
inverters operating in both CCM and DCM. Finally, in
section V, the operation of the proposed CCM/DCM control
is analyzed with several designs of the LCL filter.

W/o dead time
1
SW1
SW2
0
(b) Zoom-in current and switching signals w/o dead time

With dead time0

Fig. 2 describes the zero-crossing distortion andcomparison of open-loop gains between CCM and DCM. As
shown in Fig. 2(a) and 2(b), when a dead time is not in use,
the inverter output current flows continuously over entire aswitching period; hence, a sinusoidal current waveform isobtained. However, the zero-current clamping phenomenon
occurs during the dead-time interval when the dead-time is

Inverter output current
iout (3 A/div)

Zero-current
clamping
Time (5 s/div)

Dead time

1

SW1
SW2
0
(c) Zoom-in current and switching signals with dead time

ZERO-CROSSING DISTORTION

Fig. 1 depicts the circuit configuration of the single-phasegrid-tied inverter. Although many DC/AC converter
topologies such as, e.g. modular multilevel converters or
flying capacitor multilevel converters, have been proposed
for the grid-tied inverter, a typical H-bridge inverter isanalyzed due to its simple configuration, which provides
high fault-tolerant reliability [13]-[16]. The LCL filter isused as an interface between the inverter and the grid inorder to suppress the current harmonics of the inverter output
current iout. Compared to L filters or LC filters, the LCL filter
can obtain effective switching harmonics attenuation withlower inductance requirements. However, the lowinductance LCL filter design significantly increases the zerocurrent-crossing distortion; that cannot satisfy the gridcurrent harmonic constraints.

Time (5 s/div)

0

140
CCM

120
100

Gain [dB]

II.

Inverter output current iout (3 A/div)

Inductance L: 150 H
DC-link Voltage Vdc: 380 V
Switching Period Tsw: 20 s

80
60

DCM Vg_s = 10 V
D1_s = 0.2

40
20
0
-20
-40
0.1

Vg_s = 100 V1

D1_s = 0.05

10

100
1k
10k 100k 1M 10M
Frequency f [Hz](d) Bode diagram of duty-ratio-to-current transfer function for CCM and
DCM.
Fig. 2. Zero-current-crossing distortion and comparison of open-loop gain
between CCM and DCM. The dead-time causes the zero-current clamping
phenomenon in the vicinities of the zero-current crossing, which changes
the inverter operation from CCM to DCM. The low current loop gain in
DCM worsens the current response and causes the zero-current-crossing
distortion. Note that the long dead-time is employed for better illustration.

applied in order to avoid an instantaneous turn-on of both
two switching devices in one leg as shown in Fig. 2(a) andMode 1SW1Mode 2SW2Mode 3

SW2

SW1

SW1

vL

Vdc

SW2

vL

L

iout

vg

Vdc

SW1

SW2

SW2

Vdc + vg
D3

2L

D2Tsw

D3Tsw

t

Fig. 3. Current path and inverter output current waveform in DCM when
the grid voltage is positive. The zero current interval D3Tsw occurring in
DCM introduces the nonlinearities into the transfer function.

2(c). Due to this phenomenon, the inverter operation modechanges from CCM to DCM, which exhibits a nonlinear
duty-ratio-to-current transfer function [5]. In particular, as
shown in Fig. 2(d), the frequency corresponding to the poleof DCM is certainly much higher than the cutoff frequencyof the current control loop [6]. Consequently, the open loop
gain in DCM is much lower than in CCM. This worsens thecurrent response in DCM if the same controller as in CCM isemployed in DCM. As a result, the current distorts when thecircuit mode changes from CCM to DCM due to theemployment of the dead time.
CONTROLLER DESIGNIn this section, first the DCM nonlinearity compensationand the control system for the operation in only DCM is
introduced. Then, the control system for the inverter
operating in both continuous current and discontinuous
current is explained. Finally, the controller parameter design
is demonstrated.
A. Discontinuous-current-mode nonlinearity compensation
Fig. 3 depicts the current path and the inverter output
current waveform in DCM when the grid voltage is positive.
The filter inductor Lf and the filter capacitor Cf are omitted
due to the simplification. In order to derive the nonlinearity
compensation for DCM, the circuit model in DCM isrequired. First, let D1, D2 and D3 denote the duty ratios of thefirst, the second and the zero-current interval. The inductor
voltage during a switching period is expressed as [5], [12],

L

diavg
dt

 vL  Vdc  2 D1  1  vg


 ......................... (1)2 Liavg Vdc  vg 1 Vdc  vg D1Tsw 









iavg
0.5ipeak

SW1

Average current
iavg

where Vdc is the dc-link voltage and vg is the grid voltage, Tsw
is the switching period, iavg is the average current. Then, thecircuit model in DCM is established based on (1).

1
sL

iavg

Nonlinear factor

vg

Tsw

III.

VL

Vdc

2

(Vdc - vg)Tsw

D1Tsw

0

Vdc

SW1

D1
[0~1]

L

iout

vg

Current peak
ipeak

Inverter output
current iout

vL

L

iout

vg

1

SW2

0.5ipeak

Do not exist
in CCM
because1
iavg equals to
0.5ipeakiavg

Fig. 4. Circuit model of inverter operating in DCM. The current control
loop gain in DCM depends on the average current, i.e. the nonlinearities
occurring in the duty-ratio-to-current transfer function and the gridvoltage-to-current transfer function.
(ii) Compensation for duty-ratio-dependent
factor in duty-to-current transfer functiona
D1
VL*
Vdc + vgsign(iavg*) ab
Controller*
2Vdc[Vdc - vgsign(iavg )]b
D1[k-1]2Vdc2|x|[V + v sign(i *)]2

Conventional
CCM controller
iavg*
iavg

dc

vg

z-1
z

g

avg

x2

z-1

(i) Compensation for duty-ratio-dependent factor in
grid-voltage-to-current transfer function

Fig. 5. DCM current control system for single-phase grid-tied inverter.
The principle of the DCM nonlinearity compensation is to estimate theduty ratio at the steady-state points by the duty ratio at the previous
calculation. Consequently, the circuit parameter such as, e.g. inductance,
is not required in the DCM nonlinearity compensation.

Fig. 4 illustrates the circuit model of the inverter
operating in DCM. The dash line part does not exist when
the inverter operates in CCM because the average current iavg
equals to the half current peak ipeak/2; in other words, theCCM operation makes the zero-current interval D3Tsw shownin Fig. 3 disappear. However, the zero-current interval D3Tsw
induces the nonlinearity into the transfer functions when the
inverter operates in DCM, which worsens the current
response in DCM when the same controller is applied forboth CCM and DCM. Therefore, the output of the controller
is necessary to be compensated when the inverter operates in
DCM.
Fig. 5 illustrates the proposed DCM nonlinearity
compensation [12]. As shown in Fig. 4, the value of the duty
ratio D3 is necessary to compensate for the DCM
nonlinearity, and D3 can be estimated from D1. Therefore,
the principle of the DCM nonlinearity compensation in thispaper is to use the duty ratio at the previous calculation
period D1[k-1] in order to estimate the nonlinearity factor. As
shown in Fig. 5, the nonlinearity factors in the duty-tocurrent transfer function and the grid-voltage-to-current
transfer function is compensated in the control system.
Consequently, the conventional PI controller for CCM canbe applied for the DCM operation to achieve the same
control performance as in CCM.

B. Control system of inverter operating in both continuousand discontinuous current
Fig. 6 indicates the relationship among the CCM duty,
the DCM duty and the current mode. The current mode
detection between CCM and DCM is necessary when the
inverter is designed to operate in both CCM and DCM. Oneof the conventional current mode detection method is tocompare the detection value of the average current iavg (or the
average current command iavg*) with the current value iBCM at
the boundary between CCM and DCM; if iavg is larger thaniBCM, CCM is determined as the operation mode and viceversa [8]. However, the inductance is used in the calculationof iBCM which implies the current mode determination is
inductance-dependent. On the other hand, the current mode
determination in this paper focuses on the relationshipamong the CCM duty DutyCCM, the DCM duty DutyDCM andthe current mode. In particular, if DutyCCM is larger than
DutyDCM, DCM becomes the operation mode and vice versa[6], [11]-[12]. Note that DutyCCM is independent from theaverage current, whereas DutyDCM changes with the variationof the average current. In general, DutyCCM is the output
value of the controller, which implies the calculation for
DutyCCM is independent from the inductance. If the proposed
DCM nonlinearity compensation is employed, thecalculation for DutyDCM also becomes inductanceindependent. Consequently, if the relationship between
DutyCCM and DutyDCM is used to determine the current mode,
the inductance-independent current mode determination isachieved.

0.6

vg

z-1
z

x2

Duty ratio

Mode transition point

0.4
0.3
0.2

0

Inductor current value
at boundary between
CCM and DCM iBCM
0

0.5

1.0
1.5
2.0
2.5
Average Current [A]Fig. 6. Relationship among CCM duty, DCM duty and current mode.
When the circuit operates in DCM, the DCM duty becomes smaller thanthe CCM duty and vice versa. The current mode determination is realized
independently from the inductor value by using this relationship of the
duty ratios.

then, two outputs of the inductance-independently generated
duty ratios are compared to each other in order to determine
the current mode. Consequently, the CCM/DCM current
control system can perform the current control independently
from the inductance, which increases the reliability of theinverter control.
C. Controller parameter design
In this paper, the PR controller employed with the onlyCCM operation, and the PI controller with the proposed
DCM nonlinearity is compared. The transfer functions of the
PI controller and the PR controller are expressed in (2)-(3),respectively [17]-[19],Gco _ pi ( s )  K p  K i

2frequency. The current controller design is applied byassuming Lg=0. Note that both PI controller and PR
controller are designed with the same crossover frequency cand the same phase margin PM. The gain coefficients of the
PI controller and the PR controller are expressed in (4)-(6),Current mode alternation

DutyDCM [-1~1] Duty

|x|

NOT

iout

SW1

sign(iavg*)fswTd
Dead-time-1
compensation

iavg

0A

SW2

z-1
1
0

Dead-time
generation
0

0.5
vg

1
........................................... (2)ss............................ (3)s  s  o2
where Kp, Ki are gain coefficients, and o (=2fg) is the grid
Gco _ pr ( s)  K p  Ki

|x|

1
Vdc

DutyDCM
DutyCCM

0.1

Fig. 7 describes the CCM/DCM current control systemwith the waveform of the current mode alternation [12]. In
the CCM/DCM current control system, first, both the DCM
duty DutyDCM and the CCM duty DutyCCM are generated.
Then, the absolute values of these two duty ratios arecompared to each other; the smaller duty ratio is used togenerate the switching signal for the switches. Note that theabsolute operators are used with the consideration of thenegative grid voltage. The original idea of the inverter
control for the operation in both DCM and CCM is that as
first step, the duty ratio at the previous calculation period isused to compensate the DCM nonlinearity regardless of L;
Conventional CCM controller DCM duty generation (cf. Fig. 5)aiavg*
Vdc + vgsign(iavg*) abC
2[Vdc - vgsign(iavg*)]
b
iavg
2Vdc
|x|
[Vdc + vgsign(iavg*)]2

CCM
DutyDCM≧DutyCCM

DCM
DutyDCM＜DutyCCM

0.5

DutyCCM [-1~1]

Duty

0.5sign(iavg*)
Current mode
DutyDCM DutyCCM
determination
CCM duty generation
Fig. 7. CCM/DCM current control system with waveform of current mode alternation. The proposed CCM/DCM current control system compensates for the
DCM nonlinearity and determines the current mode independently from the circuit parameters such as, e.g. the inductance.

The vC feed forward is eliminated in the conventional PR-based control system.
iL*
Gco(s)

vL

*

Gd(s)

vo

vL

GL(s)

iL

iC

Vg
GC(s)

vC

Input: Pn,Vdc, vg, fg, fsw, Lg

ig

Reactive
Power
Restriction

Gg(s)Design L based on Zb (12)Design C based on Yb (13)Harmonic
Constrants

Fig. 8. Block diagram of inverter-current feedback control. The lowinductance filter design increases the disturbance gain of vc; hence, theinverter becomes more unstable at weak power grid.

Design Lf based on filter attenuation
Iteration loops of n and Rd

Stability
Analysis

respectively,

Root loci of certain combination of (L,C)
Decrease C

K p  pi  K p  pr  c ( L  L f ) ................................. (4)C: out of range  T
Ki  pi  c K p tan   c sw  PM  .................... (5)
2
2


Y
Decrease L  T
Ki  pr  c2  o2 K p tan   c sw  PM  2c (6)
2
2






IV.

L: out of range

FILTER DESIGN

Fig. 9. Passive-damped LCL filter design algorithm. The LCL filter
parameters are put in iteration loops in order to achieve the minimum
filter volume which is stable even under weak power grid condition.

filter resonance issue. However, this design restricts theminimization of the filter. Therefore, in this paper, theproposed control system with the proposed filter design
enables the reduction of the inverter-side inductance.
Next, the capacitor is selected based on the baseadmittance of the inverter Yb, which is defined by,
1
1 Pn
Yb 

..................................... (13)2 f g Zb 2 f g vg2

Gd (s)  e

GC ( s) 

1 .......................................................... (8)Ls
Cd Rd s  1

 ......................... (9)C f Cd Rd s 2  C f  Cd s

1............................................ (10)
( L f  Lg ) s
The closed-loop current control transfer function of the
proposed control system is derived as follow,
Gco _ pi Gd GL GC Gg
Gcl _ prop ( s) 
1  GC GL 1  Gd   Gg   Gco _ pi Gd GL 1  GC Gg............................................................................ (11)Fig. 9 describes the filter design algorithm base on theroot loci. The filter design starts with the initialization of thefollowing parameters: the rated active power Pn, the dc-link
voltage Vdc, the single-phase grid voltage vg, the gridfrequency fg, the switching frequency fsw, and the grid
inductance variation Lg. First, L is selected based on thebase impedance of the inverter Zb defined by,
Gg ( s ) 



Zb 

vg2
Pn

............................................................. (12)In general, L is designed such that the impedance of theinverter-side inductor ZL is several percentages of Zb inorder to avoid the zero-crossing current distortion and theNY
Output: LCL Filter Volume

Fig. 8 depicts the block diagram of inverter-current
feedback control. Note that the feed forward of vC is
required to make the output of the controller in Fig. 3
become vL* in the proposed PI-based control system,
whereas this feed forward of vC is not required in theconventional PR-based control system. The transfer
functions in Fig. 8 are expressed in (2)-(3), and (7)-(10),1.5Tsw s ..................................................... (7)GL ( s) NThe filter capacitance is limited by the decrease of thepower factor at rated power (generally less than 5%), i.e. thereactive power restriction. Then, the grid-side inductance Lf
is designed such that the harmonic attenuation of the filter at
the switching frequency is high enough to suppress theswitching frequency harmonic component of ig, satisfying
the grid standards.
Finally, the capacitor ratio n (i.e. the ratio between Cf and
Cd as shown in Fig. 1), and the damping resistor Rd are put in
iteration loops in order to analysis the stability considering
the grid inductance variation. Each combination of n and Rd
is substituting into (11) to obtain the root loci of the closedloop current control. Consequently, the stability at a certain
combination of L and C can be analyzed by the root loci. In
order to obtain the minimum filter, L and C can be also put in
iteration loops; however, for the sake of simplicity, in thispaper, only the stability analysis of one point of (L, C) is
demonstrated [20].
V.

LABORATORY SETUP

Table I depicts the system parameters for analysis,
simulations and experiment, whereas Fig. 10 shows the
prototypes of the inverter and the inverter-side inductor. As
shown in Fig. 10(a), the inverter is designed to operate at thehigh switching frequency of 100 kHz; consequently, the LCLTABLE I

Gate drive unit

Heat sink and switching devices

SYSTEM PARAMETERS FOR ANALYSIS, SIMULATION AND EXPERIMENT

A. Operation verification at normal gridFig. 11 depicts the waveforms of grid voltage, grid-sidecurrent and inverter-side current under case I and case II,with the PR-based only-CCM control and the proposed PIbased CCM/DCM control. The grid current THD (up to 40thorder of the harmonic component) is measured by a
YOKOGAWA WT1800 power meter. As shown in Fig.
11(a)-(b), the low-inductance filter design leads to the highswitching current ripple. Therefore, when %ZL, which is theinverter-side inductor impedance normalized by the total
inverter impedance Zb, is reduced from 1.8% to 0.5%, thegrid current THD at the rated load of 4 kW with the PRbased only-CCM control increases from 3.7% to 8.7%.
According to standards such as IEEE-1547, the grid current
THD at the rated load must be lower than 5%; hence, theinductor impedance design of 0.5% with the PR-based onlyCCM control, of which the grid current THD at the rated
load is 8.7%, does not satisfy the harmonic constraint.
On the other hand, it can be observed clearly from Fig.
11(d) that the inverter is intentionally operated under DCM
in the vicinities of the zero-current crossing. Due to the
DCM nonlinearity compensation, the same current dynamic
as CCM is achieved during the DCM interval; consequently,
the zero-current distortion is eliminated. In particular, theproposed PI-based CCM/DCM control reduces the gridcurrent THD at the rated load from 8.7% to 2.1% comparedto that of the PR-based only-CCM control with %ZL of 0.5%.

Dc-link
capacitor

Dc-link
snubber
capacitorl = 260 mm

w = 80 mm(a) 4-kW prototype of single-phase grid-tied inverter
Case I
L=580 H (%ZL=1.8%)
VolL=856 cm3(1.0 p.u.)

Case II
L=160 H (%ZL=0.5%)
VolL=401 cm3(0.47 p.u.)h = 134 mm

filter can be minimized due to a design of a high cutoff
frequency. In order to avoid a periodic maintenance ofcooling fans, natural cooling method is applied for thisprototype. Electrolytic capacitors are used to absorb the
single-phase power fluctuation due to their superior ratio
between the capacitance and volume compared to film
capacitors and ceramic capacitors. As shown in Fig. 10(b), in
order to minimize the core loss, and the winding loss at theswitching frequency of 100 kHz, ferrite and Litz wire arechosen. It can be observed that the inductor volume(including bobbins) is reduced by 51% when the inverterside inductor impedance %ZL is reduced from 1.8% to 0.5%.

h = 60 mm

h = 134 mm

Description
SymbolValue
DC link Voltage
vDC
350 V
Grid Voltagevg
200 Vrms
Nominal Power
4 kW
Pn
Grid Frequency
fg
50 Hz
Switching Frequency
100 kHz
fsw
Dead Time
500 nsTdeadtime
Sampling Frequency
25 kHzfsamp
Crossover Frequency
1 kHz
fc
Phase Margin
60o
PM
Case III
Case I
Case IILCL Filter Design
Grid Inductance002000 H 2000 H
Lg
Inverter-side Inductance580 H 160 H 160 H 160 HL
10 H
Grid-side Inductance
10 H
10 H
10 H
Lf
16 F
4 F
16 F
16 F
Filter CapacitanceC
Capacitance Ratio
n
1.5
0.5
1.5
1.5
Damping Resistance
8W
Rd
16 W
16 W
16 W

w = 71 mm

w = 65 mm

l = 46 mm
l = 90 mm(b) Prototypes of inverter-side inductor
Fig. 10. Prototypes of inverter and inverter-side inductor. SiC switching
devices from ROHM semiconductor are chosen to operate the inverter athigh switching frequency of 100 kHz. It is clearly observed that theinductor volume is reduced by 51% due to the reduction of the inverterside inductor impedance %ZL from 1.8% to 0.5%.

Therefore, the proposed PI-based CCM/DCM control
enables the minimization of the inverter-side inductor
impedance without violating the harmonic constraint
regulated by standards such as IEEE-1547.
B. Operation verification at weak power gridFig. 12 depicts the pole trajectory of the proposed closedloop control system at weak power grid, i.e. the high grid
inductance of 2000 H. Note that only the poles at low
frequencies and the half upper plane is shown. As thedamping capacitance Cd increases (or the capacitance ratio
increases), the pole moves toward the left plane, i.e. thesystem becomes more stable. On the other hand, the damping
effectiveness does not simply increase with the increase of
the damping resistance, because a high damping resistance
restricts the current flowing into the damping capacitor, i.e.
the reduction of the damping effectiveness. The weak power
grid is analyzed under two design cases (case II and case III)as shown in Table I and Fig. 12. In particular, the pole incase II is designed to be at the left plane in respect to the yaxis, whereas the pole in case III is located on the y-axis, i.e.
the boundary of stability.

Grid voltage vg (500 V/div)

Grid-side current ig (40 A/div)

Zero-crossing distortion

Grid voltage vg (500 V/div)

Grid-side current ig (40 A/div)

Zero-crossing distortion
THDig=3.7%

Inverter-side current
iout (40 A/div)

Time(10 ms/div)

THDig=8.7%

Inverter-side current
iout (40 A/div)(a) Conventional PR-based only-CCM control with case I
Grid voltage vg (500 V/div)

Grid-side current ig (40 A/div)

Time(10 ms/div)(b) Conventional PR-based only-CCM control with case II
Grid voltage vg (500 V/div)

Grid-side current ig (40 A/div)

THDig=0.8%

Inverter-side current
iout (40 A/div)

Time(10 ms/div)

THDig=2.1%

Inverter-side current
iout (40 A/div)

Time(10 ms/div)
DCM

CCM

DCM

(c) Proposed PI-based CCM/DCM control with case I(d) Proposed PI-based CCM/DCM control with case II
Fig. 11. Waveforms of grid voltage, grid-side current and inverter-side current under case I and case II, with the PR-based only-CCM control system and the
proposed PI-based CCM/DCM control system. The conventional PR-based only-CCM control results in a high current THD of 8.7% when the inverter-side
inductance is reduced to 160 H, which is 0.5% of the total inverter impedance. On the other hand, the proposed PI-based CCM/DCM control enables thedesign of the low-inductance filter by maintaining the low current THD of 2.1%.

Fig. 13 depicts the simulation waveforms of grid voltage,
grid-side current and converter-side current under case II(Lg=2000H) and case III with the proposed PI-based
CCM/DCM control system. As shown in Fig. 13(a), the filter
resonance is effectively damped even with small ZL and ZLf
of only 0.5% and 0.06% of Zb, respectively. The low current
THD is still achievable even under the weak power gridcondition. On the other hand, the filter resonance still occurs
in Fig. 13(b) as expected from Fig. 12. Furthermore, the filter
resonance also increases the current THD to 6.3%. These
results confirm the effectiveness of the proposed control andthe validation of the filter design method.
VI.

CONCLUSION

This paper proposed the filter design method for apassive-damped LCL filter in single-phase grid-tied inverters
operating in both CCM and DCM. The low-inductance filter
design can minimize the filter volume. However, this design
has to solve two challenges: zero-crossing distortion and thefilter resonance. The zero-crossing distortion increases withthe decrease in the inductance because the DCM intervals
occurring in the in the vicinities of the zero-current crossing
becomes longer. Therefore, in order to reduce the current
distortion, the inverter operation in both CCM and DCM isused. In particular, the DCM nonlinearity compensation is
introduced into the control system in order to obtain the same
current control performance as in CCM. The main feature of

the CCM/DCM control system is that the DCM nonlinearity
compensation is constructed by the duty ratio at the previous
calculation period. Compared to the conventional DCM
nonlinearity compensation method, the inductance is not
required in the proposed DCM nonlinearity compensation
method. On the other hand, the filter resonance is damped byinserting a RC leg in parallel to the filter capacitor. The
design method for this passive-damped LCL filter isaccomplished by the filer design flow chart based on the root
locus. Current control performances are compared between awell-known proportional-resonant (PR) controller employedwith the only-CCM operation, and the PI controller with theproposed CCM/DCM operation. Compared to theconventional CCM control, the proposed CCM/DCM control
reduces the current total harmonic distortion (THD) by
75.9%. Even at weak power grid (i.e. a high grid inductanceof 2000 mH), the proposed control can obtain a low current
THD of 0.8% with the filter inductance reduced to only 160
mH, which is 0.5% of the total inverter impedance.
In the future, the application of the CCM/DCM control
method to other topologies such as, e.g. three-phase inverters,
or flying-capacitor converters, will be analyzed.
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4300
4200
Imagination Axis [s]n = 1.54100

Filter Capacitor Voltage vcf (500 V/div)

Lg = 2000 H
L = 160 H
Lf = 10 H
C = 16 Fn = 3.0n = 2.5
n = 2.00V0A

n = 1.0

4000
n = 0.53900
3800

Rd increases

0A

Design Case III

Inverter-Side Current iout (20 A/div)

3700
-400

-300

-200
-100
Real Axis [s]Time (10 ms/div)(a) Proposed control system under case II (Lg=2000 H)

Design Case II

0

100

200

Fig. 12. Pole trajectory of proposed closed-loop control system at weakpower grid, i.e. high grid inductance of 2000 H. The design in case II isselected based on the stability and the damping loss, whereas the design incase III is to confirm the validation of the proposed DCM nonlinearity
compensation and the design flowchart.
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Grid-Side Currentig (20 A/div)
THDig=0.8%

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0A

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