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60-GHz IQ Transceiver TR2ˍ060ˍ095
Data Sheet Version 0.3 10-July-2023

TR2ˍ060ˍ095
60-GHz Highly Integrated IQ Transceiver with two Receivers

Preliminary Data Sheet
Status:Date:

Author:Filename:

Preliminary

10-July-2023

Indie Semiconductor FFO GmbH

DatasheetˍTR2ˍ060ˍ095ˍV0.3

Version:

Product number:

Package:

Marking:

Page:

0.3

TR2ˍ060ˍ095

LGA, 6 × 6 mm²

T2R95
YYWW

1 of 15

Anlage 8ˍTemplateˍDatenblattˍRevE

Date: 19-May-2020

Rev E

Document:

Annex to VAˍU03ˍ01-1-60-GHz IQ Transceiver TR2ˍ060ˍ095
Data Sheet Version 0.3 10-July-2023

Version Control
Version0.1

Changed section
Template, results

0.20.3(all)Description of change
Created with the latest template andupdated according to latest results
Release of document TR2_060_065
Conversion to TR2_060_095-2-Reason for change
UpdateTR2_060_095 datasheet

60-GHz IQ Transceiver TR2ˍ060ˍ095
Data Sheet Version 0.3 10-July-2023

Table of Contents
1Features ................................................................................................................................ 4

1.1
1.2

Overview .................................................................................................................................................. 4
Applications.............................................................................................................................................. 423

Block Diagram ....................................................................................................................... 5
Pin Configuration .................................................................................................................. 6

3.1
3.2

Pin Assignment ......................................................................................................................................... 6
Pin Description ......................................................................................................................................... 6

4Specification.......................................................................................................................... 7

4.1
4.2
4.3
4.4

Absolute Maximum Ratings ..................................................................................................................... 7
Operating Range ...................................................................................................................................... 8
Thermal Resistance .................................................................................................................................. 8
Electrical Characteristics .......................................................................................................................... 95Packaging ............................................................................................................................ 10

5.1
5.2

Outline Dimensions ................................................................................................................................ 10
Package Code ......................................................................................................................................... 11

6Application.......................................................................................................................... 12

6.1
6.2
6.3
6.4
6.5

Application Circuit Schematic ................................................................................................................ 12Power Cycling ......................................................................................................................................... 12
Evaluation Kit ......................................................................................................................................... 12
Input / Output Stages............................................................................................................................. 13
VCO Tuning Inputs.................................................................................................................................. 13

7

Reliability and Environmental Test ...................................................................................... 14-3-

60-GHz IQ Transceiver TR2ˍ060ˍ095
Data Sheet Version 0.3 10-July-2023

1Features


1.1

Radar transceiver for 60-GHz ISM band
One transmit and two receive channels
Single supply voltage of 3.3 V
Power consumption of 610 mW in continuous operation
Integrated low phase noise VCO
Transmitter with power control
Receiver with homodyne quadrature mixer
Single-ended TX / RX input / outputs
LGA64 leadless package 6 × 6 mm²
Pb-free, RoHS compliant package

Overview

The TR2 is an integrated transceiver circuit for the 60-GHz ISM band operating in the frequency range of 57 GHz –64 GHz. It has one transmit and two receive channels. The two receiver channels have a gain-controlled low-noise
amplifier (LNA), quadrature mixers, poly-phase filters and one transmitter having a gain-controlled power amplifier(PA) and a voltage-controlled oscillator (VCO) with digital band switching and a divide-by-32 circuit. The output
power of the transmitter can be controlled by two digital voltages. The IC is fabricated in a SiGe BiCMOS technologyof IHP GmbH.

1.2

Applications

The 60-GHz double-receive channel transceiver can be employed in FMCW radars requiring high range resolution
thanks to its wide operation bandwidth which is compliant with the allowed industry & ISM band (57 GHz – 64 GHz).
Its high operation frequency and high output power allows measurements with improved range accuracy andmaximum detection range. The two receiver channels provide a radar structure where angular resolution isincreased, and target angle of arrival measurements can be conducted.

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60-GHz IQ Transceiver TR2ˍ060ˍ095
Data Sheet Version 0.3 10-July-2023

2Figure 1

Block Diagram

Block Diagram-5-

60-GHz IQ Transceiver TR2ˍ060ˍ095
Data Sheet Version 0.3 10-July-2023

3

Pin Configuration

3.1

Pin Assignment

Figure 2

Pin assignment (FCLGA, top view)

3.2

Pin Description

Table 1PinNo.
A1
A2

Pin Description
DescriptionName
GND
Ground padTXEN
PA enable, no pull-up / pull-down resistors. 0 V (PA disable) / 3.3 V (PA enable), digital.
PA gain control voltage with pull-down resistor of 100 kΩ. By default, PA is set to low output power
TXGAIN
operation mode: 0V- low power mode, 3.3 V - high power mode; analogue. Active gain setting
voltage levels are kept between 1.0 V (lowest output power) – 1.5 V (highest output power).
VCC
Chip supply voltage: 3.3 VRX channel BIST circuit input signal, requires 100 kHz – 1 MHz test signal having around 300 mVpp
BISTINamplitude (sine or square wave).
IF1Qn
IF1In
IF I/Q (In-phase & Quadrature) differential outputs for RX1.
IF1Ip
Power detector output voltage giving a relative DC voltage with respect to transmitted output
PDOUT
power on the TX channel.
GND
Ground padVCC
Chip supply voltage: 3.3 V
RX channel BIST circuit enable (input with Schmitt trigger), no pull-up / pull-down resistors. 0 V BISTEN
disable, 3.3 V - enable; digital.
IF1Qp
IF I/Q (In-phase & Quadrature) differential outputs for RX1.
GND
Ground pad
GND
Ground pad
TX
TX channel antenna single-ended, 50 Ohm output.
GND
Ground pad
RX1
RX1 channel antenna single-ended, 50 Ohm input.
GND
Ground pad
DIVP
Frequency divider differential outputs (1.75GHz – 2.03GHz), DC coupled.
GND
Ground pad

A3A4A5A6
A7A8
B1
B2-B3
B4B5
B6
B7-B8
C1-C8
D1
D2-D7
D8
E1-E8
F1F2-F7-6-60-GHz IQ Transceiver TR2ˍ060ˍ095
Data Sheet Version 0.3 10-July-2023F8G1G2G3G4RX2DIVNGNDVT1VCOGN

RX2 channel antenna single-ended, 50 Ohm input.
Frequency divider differential outputs (1.75GHz – 2.03GHz), DC coupled.
Ground pad.
VCO frequency tuning voltages: 0 V – 3.3 V, analogue
VCO gain control voltage (input with Schmitt trigger), no pull-up / pull-down resistors. 0 V - lowgain, 3.3 V - high gain; digital.
RX channel 2 enable (input with Schmitt trigger), no pull-up / pull-down resistors. 0 V – disable, 3.3V – enable; digital.
IF I/Q (in-phase & quadrature) differential outputs for RX2.
Ground pad
VCO enable (input with Schmitt trigger), no pull-up / pull-down resistors. 0 V – disable, 3.3 V –enable; digital.

G5RX2ENG6
G7-8
H1IF2Qp
GNDVCOEN

H2
H3
H4
H5

VT0VT2
VCC
RX1EN

H6
H7
H8

IF2Qn
IF2InIF2Ip

4Specification

4.1

Absolute Maximum Ratings

VCO frequency tuning voltages: 0 V – 3.3 V, analogue
Chip supply voltage: 3.3 VRX channel 1 enable (input with Schmitt trigger), no pull-up / pull-down resistors. 0 V – disable, 3.3
V – enable; digital.
IF I/Q (in-phase & quadrature) differential outputs for RX2.

Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part.
Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximumratings.
Table 2Absolute Maximum Ratings
Parameter
SymbolSupply voltage
VCCMinMax
3.6

UnitV

DC voltage at RF pins

02mV

VDCRF

Remarks / Conditionto GND
Low ohmic circuit to GND TX and RXpin; DC coupled DIVout and IF pinsInputs VT0, VT1, VT2

DC voltage at tuning inputs
VVt-0.3
VCC + 0.3
VDC voltage at enable/control-0.3
VCC + 0.3
V
VEN / VCTLinputs
Input power into RX inputs
PIN0dBm
RX1, RX2
Junction temperature
TJ
-50
150°C
Storage temperature range
TSTG
150°C
Floor life (out of bag) at factoryFL
168h
IPC/JEDEC J–STD-033A MSL Level 3
ambient (30°C / 60% RH)
Compliant 1)
ESD robustness
VESDtbdV
Human body model, HBM 2)
1) Device storage outside of the packaging is limited according to latest revision of JEDEC Standard IPC/JEDEC J–STD-033.
2) CLASS 1A according to ESDA/JEDEC Joint Standard for Electrostatic Discharge Sensitivity Testing, Human Body Model
Component Level, ANSI/ESDA/JEDEC JS-001-2011.

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60-GHz IQ Transceiver TR2ˍ060ˍ095
Data Sheet Version 0.3 10-July-2023

4.2

Operating Range

Table 3Operating Range
Parameter
Ambient temperature
Supply voltage
DC voltage at tuning inputs
DC voltage at enable inputs

SymbolTAVCCVVtVENMin-40
3.1300Max
85
3.47
VCC
VCC

Unit°CVVV

Remarks / Condition(3.3 V ± 5%)
Inputs Vt0 – Vt2

Note: Do not drive input signals without power supplied to the device.

4.3

Thermal Resistance

Table 4
Thermal ResistanceParameter
Thermal resistance,
junction-to-ambient

SymbolMin

TypRthja-8-Max

Unit

Remarks / Condition

tbd

K/W

JEDEC JESD51-5

60-GHz IQ Transceiver TR2ˍ060ˍ095
Data Sheet Version 0.3 10-July-2023

4.4

Electrical Characteristics

TA = -40°C to +85°C unless otherwise noted. Typical values measured at TA = 25°C and VCC = 3.3 V.
Table 5
Electrical Characteristics (expected values, measurement of first samples pending)Parameter
Symbol
MinTypMax
UnitRemarks / Condition
DC Parameters
Supply current consumption
ICC
185mA
Enabled all, gain max.
Enable input voltage,VENˍL
00.85
V
low level
Enable input voltage,
VENˍH
2.05
2.15
VCC
V
high level
VCO tuning voltage
VVt
0VCC
V
Inputs VT0 – VT2RF Parameters
VCO start frequency
fTX
tbd
57
GHz
VT0 = VT1 = VT2 = 0
VCO stop frequency
fTX
64tbd
GHz
VT0 = VT1 = VT2 = 3.3 V
VCO tuning full bandwidth
ΔfTX9.89GHz
VT0 – VT2 interconnected
715
MHz/V At 59.85 GHz
Pushing VCO
ΔfTX/ΔVC
CTransmitter output power

PTX

Adjustable range output power

PTXˍadjDivider ratio of TX signal
Divider output power
Divider output frequency
Divider Phase Noise
RX conversion gain

Ndiv
Pdiv
fdiv
PN

tbd

-2

Adjustable RX conversion gain
IF frequency range
IF output impedance
IQ amplitude imbalance
IQ phase imbalance
Noise figure (DSB)
Input compression point

Note 1:

2.08-125
tbd

10fIF
ZOUT

Measured 10 dBm at 62 GHz forbare die. Simulated 6 dBm for
packaged chip.
PAGAIN, VCOGN to be used toadjust

dBmGHzdBc/Hz

Note 1(fTX /32)
At 1 MHz offset
Measured 20 dB at 62 GHz forbare die. Simulated 16 dB for
packaged chip.
TXGAIN, VCOGN to be used toadjust

10.532
-8

1.75
-130

dBm

015200

1000
3-10

10dB
deg
dBdBm

Differential outputs (emitter
follower type; simulated value)

Simulated at 60 GHz
Measured -20 dBm at 62 GHz forbare die. Simulated -16 dBm for
packaged chip.
Measured single-ended. Divider outputs are loaded with 50 Ω, external decoupling capacitors are required.
No 50-Ω match is required in application.
1 dB ICP

11.6
tbdMHzΩ-9-60-GHz IQ Transceiver TR2ˍ060ˍ095
Data Sheet Version 0.3 10-July-2023

5Packaging

5.1

Outline Dimensions

Figure 3

Outline Dimensions of LGA64, 0.65 mm Pitch, 6 mm × 6 mm

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60-GHz IQ Transceiver TR2ˍ060ˍ095
Data Sheet Version 0.3 10-July-2023

5.2

Figure 4

Package CodePackage Marking as planned, final confirmation pending.

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Data Sheet Version 0.3 10-July-2023

6Application

6.1

Application Circuit Schematic

Information will be provided on request and at a later stage here.

6.2

Power Cycling

It is possible to reduce power consumption by power cycling the radar front end. Rapid power cycling with voltage
rise times between 10 and 100 µs is possible. At power-up, it must be ensured that no input signal is driven highbefore the supply voltage is stable. At power-down, all input signals must be pulled low before the supply voltage
is switched off.

6.3

Evaluation Kit

Silicon Radar offers evaluation kits for speeding up radar development. Please review our website and productsheets for more information: https://www.siliconradar.com/evalkits/.
The SiRad Easy® r4 platform supports development for many of Silicon Radar’s integrated IQ transceivers including
radar front end boards for TR2ˍ060ˍ095. It serves as reference hardware and provides a design environment
including a graphical user interface for parameter setting. Its functionality and communication protocol are
adaptable to development projects.

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60-GHz IQ Transceiver TR2ˍ060ˍ095
Data Sheet Version 0.3 10-July-2023

6.4

Input / Output Stages

The following figures show the simplified circuits of the input and output stages. It is important that the voltage
applied to the input pins never exceeds VCC by more than 0.3 V. Otherwise, the supply current may be conducted
through the upper ESD protection diode connected at the pin.

VCC

RX1EN
RX2EN
BISTEN
VCOEN
VCOGN

GND

Figure 5

Equivalent I/O Circuits

6.5

VCO Tuning Inputs

The VCO tuning inputs VT0 – VT2 are of analog nature but can be switched digitally as well. The tuning inputs differ
in their tuning ranges (tuning bandwidth) and slopes, whereby VT2 has the widest tuning range, and VT0 thenarrowest. The VCO tuning range of a specific tuning input can be increased by connecting it to another tuning
input. All combinations of the three tuning inputs are allowed. Unused tuning inputs must be set to a fixed potential(between 0 and VCC). The interconnection of all inputs VT0 – VT2 leads to the maximum tuning bandwidth.

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Data Sheet Version 0.3 10-July-20237Reliability and Environmental Test

Table 6
Reliability and Environmental Test according to JEDEC Standards
Qualification Test
JEDEC StandardCondition
MSL3
J-STD-020E
Reflow simulation 3 times at 260°C
ELFR
JESD22-A108
Running the burn-in, 48 h at 85°C in 7 runs
Temperature Cycling
JESD22-A104
850 cycles at -40°C … 125°C
HTSL
JESD22-A103
1,000 h at 150°C
HTOL
JESD22-A108
1,000 h at 85°C
THB
JESD22-A101
1,000 h at 85°C and 85% RH

Pass / Failtdb
tbd
tdb
tdb
tdb
tdb

Tp ≤ Tc = 260°C
tp ≤ 30 sTS.min = 150°C
TS.max = 200°C
tS = 60 s – 120 s
TL = 217°C
tL = 60 s – 150 s
t25°C-to-Tp ≤ 480 s

Figure 6Reflow Profile for Pb-Free Assembly according to JEDEC Standard J-STD-020E- 14 -

60-GHz IQ Transceiver TR2ˍ060ˍ095
Data Sheet Version 0.3 10-July-2023

Disclaimer
Indie Semiconductor FFO GmbH 2023. The information contained herein is subject to change at any time without notice.
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