Graduate School of Information Sciences / School of Engineering

Computer Architecture Laboratory (Prof. Kobayashi)

Inventing Next-Generation Computing Systems and Exploiting their Potentials through Application Development

What is Computer Architecture?

We accept your questions from ourStructure of computers and their control methods

website. Please visit the following
URL and contact us.

cove

Tow

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ard SCellpmarthoneArchs to S

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puters!

https://www.cal.is.tohoku.ac.jp/

Our laboratory aims at establishing elemental hardware technologies for next-generation computing systems anddeveloping high-performance applications and its optimization technologies. We are also focusing on computerarchitectures in the Post-Moore's era, which integrate conventional computing technologies with new information processing technologies such as quantum annealing and artiﬁcial intelligence. Moreover, we are conducting
research about high-performance infrastructures and applications that can fulﬁll the potentials of the new computer architectures, and their social deployments.
Quantum Annealing Assisted Supercomputing Systems

Acceleration of Science and Engineering Simulations

Quantum annealing (QA), which

One of the requirements of a safe and secure society is to realize faster

This research focuses on theintegration of QA technologies intoVector Processing
Acceleratory(Memory Cache)
OptimalData Placement

High Bandwidth
Memory Layer

Large-Scale Memory Layerrarchproblems, has attracted attention.

Quantum Annealing
and AI/ML accelerator

Hie

can eﬀectively solve combinatorial

OptimalJob Placement
General-Purpose
Processing
Infrastructurescience and engineering simulations. This research aims at improving thesimulation performance using various kinds of computer systems.

(Storage Cache)
Large-Scale Storage Layer

Functionality

conventional computing as a single system image, and development anddeployment of their killer applications: a real-time tsunami inundation

Hardware Accelerator（photo from intel.com)

simulation with routing assistance for evacuation.

Examples of Science and Engineering Simulations(Tsunami Inundation Forecast and Flow around a Turbine)

Near/Far Memory Systems for
Next-Generation Computing Systems
A modern computer needs a memory system with a

Last-level Cache

Code Optimization and Tuning to Exploit Potentials ofMicroprocessors

Near/Far Controller

Microprocessors increase diversity due to theCCCCCCCCCCCCCCCC(Caching & Prefetch etc…)

high performance and a large capacity. The goal of thisresearch is to achieve a Near/Far memory system thatcode

trends in manufacturing technologies andComputer systemapplications. This research evaluates various latest

Near Memory(HBM-based)consists of memory modules with diﬀerent

Vector Supercomputer (photo from NEC)

microprocessors and, based on the evaluation
results, adopts the applications to theperformances and capacities. Moreover, the systemappropriately organizes the application data among

Far Memory(DDR-based)these modules by data access characteristics.

code

codeCodeOptimization

Tuningmicroprocessors by optimizing and tuning theapplication codes to obtain the high performances.

Resource Usage Optimization by Machine Learning

Cache Memories by Diﬀerent Memory Devices

Since a microprocessor executes billions ofCache memories occupy a large part of a

Runtimeinstructions in one second, its runtime log
data becomes signiﬁcantly large. This

optimize the management of hardware
resources, such as cache memories.

Thread2

Thread3

learning. The analyzed results are used toThread1

and analyzes them by using machine

Big-Data AnalysisThread0

research regards these data as "Big Data"

microprocessor, and their energy

Info.

CoreCoreCoreCore

Power-Aware
Power-Aware
Cache Memory Cache Memory

High-Performance
2.5D Near Memory

Intelligent
Memory DataManagementCoreCoreCoreCore

research solves the problem by using new
memory devices for the cache memories andCache-Aware Thread Scheduling

Large-Capacity
Oﬀ-Chip
Far Memory

consumptions need to be reduced. This

Optimize
Resource
Managementby optimizing the data management on thecache memories with the diﬀerent memory
devices without degrading the performances.

High-Speed
Low-Power
Cache Memory Cache Memory