THE PATH TO

ZEN

日本AMD エンタープライズセールス 岩佐英敏
PCクラスタコンソーシアム向け
December 15 TH , 2016

OUR TWO-YEAR

JOURNEY“First and foremost, we are here to build
great products through our investments indifferentiated IP coupled with our design,integration, software and systemcapabilities.”

OCTOBER 2014

OUR FOCUS

GAMINGIMMERSIVE
PLATFORMSDATACENTER

$15B+

$20B+

$18B+

XBOX ONE S
SMALLEST XBOXEVER
4K VIDEO AND HDRXBOXPROJECT
SCORPIO
4K GAMING

AND VR

PLAYSTATION 443 MILLION
VR-READYCONSOLESAPPLE
iMAC AND
MACBOOK PRO

WITH RETINADISPLAYSINDUSTRY FIRSTPREMIUM VR
STARTING AT $199

INCREDIBLE PERFORMANCEAND FEATURES FOR

PROFESSIONAL
PLATFORMS

7 TH G E N E R A T I O N

A-SERIES APU
THREE STRAIGHT QUARTERS OF
MOBILE APU GROWTH
RECORD ENTERPRISE SALESIN Q2 2016

Enterprise sales statement: Record sales of AMD mobile APU-based
commercial systems to major corporate buyers by OEMs.

INNOVATIVEPARTNERSHIPSTHATIC JV TO DEVELOP SERVER
SOCs FOR 2 ND LARGEST SERVER
MARKETATMP JV WITH TFME CREATESINDUSTRY-LEADING OSATBEST IS YETTOCOMEMOST COMPETITIVE PRODUCT LINEUP IN A
DECADEOUR X86 HERITAGE
First x86 64-bit
architectureFirst to break
1GHz

First x86
dual-core processor

First APU tomarket

Fastest CPUin market

First quadcore x86 SoC

First x86
game console
SoC

“DESIGNIN”
DESIGNING
GTHE “ZEN”
THE
ENGINE“ZEN”
ENGINE

112233PERFORMANCEPERFORMANCE
THROUGHPUT
THROUGHPUT
EFFICIENCYEFFICIENCYDESIGNING THE ENGINE: PERFORMANCEQUANTUM LEAP IN COREEXECUTION CAPABILITY

Enhanced branch prediction to select the right
instructions
Micro-op cache for efficient op issue1.75X instruction scheduler window*
1.5X issue width and execution resources*
Result: instruction level parallelism designed
for dramatic gains in single-threadedperformance*Compared to Excavator

DESIGNING THE ENGINE: THROUGHPUT
HIGH BANDWIDTH,
LOW LATENCY

Significantly enhanced pre-fetcher
8MB of shared L3 cache
Large unified L2 cache for instructions
and data
Separate low latency L1 instruction
and L1 Data caches
Up to 5X cache bandwidth to a core

DESIGNING THE ENGINE: THROUGHPUT
HIGH BANDWIDTH,
LOW LATENCYCORE 032B fetch32B/cycle

64K
I-Cache
4-way

512K L2

2*16B load

1*16B store

32B/cycle

32K
D-Cache8-way

Significantly enhanced pre-fetcher

32B/cycle

I+DCache
8-way

8MB of shared L3 cache
8M L3I+DCache
16-way32B/cycle

Large unified L2 cache for instructions
and data
Separate low latency L1 instruction and L1
Data caches
Up to 5X cache bandwidth to a core

DESIGNING
THE ENGINE:
THROUGHPUTSIMULTANEOUS
MULTI-THREADING
Thread appears the same as anindependent core to softwareHigh performance cores have gaps inutilization now exploited for an
additional thread
Excellent synergy with single thread –more execution resources benefit bothmodesDESIGNING
THE ENGINE:
EFFICIENCY
IMPROVED TRANSISTORDENSITY & EFFICIENCYEnergy-efficient
14nm FinFET
design scales
from client toenterprise-classproducts

Chart for illustrative purpos

DESIGNING THE ENGINE: EFFICIENCY
LOW-POWER DESIGNMETHODOLOGIESAggressive clock gating withmulti-level regions
Write back L1 cache
Large Micro-op cache
Stack Engine
Move elimination

DEFYING CONVENTION:PERFORMANCE, THROUGHPUT AND EFFICIENCY*Based on AMD Internal Testing

Chart for illustrative purposes only

WE ARE BACK,AND JUST GETTING STARTED!

“ZEN+”INSTRUCTIONS PER CLOCK“ZEN”“Excavator” Core

“Bulldozer”
Core*Based on AMD Internal Testing

40%

More Instructions
Per Clock*“SUMMIT RIDGE”
8 CORES, 16
THREADS
AM4 Platform• DDR4• PCI EXPRESS® GEN 3• NEXT-GEN I/OAMD consortium activity
EFFORT TO BRING OPEN STANDARDS INTO THE DATACENTER• これまでのOpen Standardへの参画–・HSA (Heterogeneous System Architecture)• 異なるアーキテクチャのデバイス間のプログラミングモデルを提唱–・GPUOpen• Open Standard platformにAMDが寄与したツールやソフトウェアを一か所でアクセスできるサイト• 2016年に発表したコンソーシアム–・Gen-Z• メモリーやアクセラレータへのラックスケールの接続–・OpenCAPI• データセンターサーバ向けのオープンなインターフェース規格–・CCIX• 複数のプロセッサアーキテクチャとアクセラレータ間のシームレスなデータ共有を狙う接続技術

“NAPLES” SERVER SOC

32-Core,64-Thread

1st Public
Demo

Enabling Industry
Software Support

ZEN DEMOS TODAYVR Desktop

2P Server

Workstation

GamingDesktopZEN CORE MARKET ROLLOUTDesktop

ServerNotebook

EmbeddedTHE LAST
12 MONTHS

THE NEXT
12 MONTHS

Released Game-Changing Polaris
GPU Architecture and 7th Gen APUs
Ramped Game Consoles andNew Semi-Custom BusinessAnnounced Two New JVs in China

GPU Market Share Gains withPolaris and New Vega Architecture
Return to Growth In PCs with “Zen”
Re-Enter Highly-Profitable x86
Server Market with “Naples”
Ramp New Semi-Custom BusinessBEST IS YETTO COMEご静聴ありがとうございました。

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