Selected Papers

1.25-Gbit/s Burst-Mode Receiver ICs with Quick
Response for Passive Optical Network Systems
Makoto Nakamura†, Yohtaro Umeda, Jun Endo,and Yuji Akatsu
Abstract
We have developed burst-mode receiver integrated circuits (ICs) with a quick response for 1.25-Gbit/s
passive optical network systems. In such a system, the receiver should be able to handle burst-data packets. We have devised a transimpedance amplifier with three gain modes that uses hysteresis comparators
and a limiting amplifier with feed-forward auto-offset control. Using these design techniques, receiver
ICs were fabricated using silicon germanium bipolar complementary metal oxide semiconductor (SiGeBiCMOS) technology. The receiver exhibits a fast settling time of under 44 bits and sensitivity of –30
dBm using a PIN-photodiode (positive-intrinsic-negative photodiode (PIN-PD)) at 1.25 Gbit/s. The useof a conventional PIN-PD and the freedom from external adjustment make it possible to build an inexpensive receiver.

1. Introduction
Communication traffic, which includes both voice
and image data, is growing rapidly as Internet use
expands. To provide broadband communications, ahigh-speed access network like fiber-to-the-home isdesired. A passive-optical-network (PON) opticalsubscriber system is inexpensive because it provides
point-to-multipoint communication and has big
advantages in both data transfer speed and cost [1],[2]. The speed has been steadily increased as we haveprogressed from the synchronous-transfer-mode(STM) PON through the asynchronous-transfermode (ATM) PON and broadband PON [3] to reachthe gigabit-class PON [4], [5].
A PON system and the burst-mode optical receiverused in it are shown in Fig. 1. A passive optical coupler allows several optical network units (ONUs) toshare an expensive optical line terminal (OLT), which
decreases the cost of the optical access system. On
the other hand, such a shared-access system has alarge path loss due to the large number of ONU† NTT Photonics Laboratories
Atsugi-shi, 243-0198 Japan
Email: nakamura@aecl.ntt.co.jp

16branches. Upstream and downstream data using theoptical wavelengths of 1.31 and 1.49 µm, respectively, is multiplexed by a wavelength division multiplexer (WDM). In the downstream traffic, data packets are transmitted continuously with uniform amplitude. In contrast, burst-data packets in the upstream
traffic are transmitted with very different power levels because of the different transmission distances
between the ONUs and the OLT. The OLT must beable to handle this irregular upstream data. Hence, theoptical receiver in the OLT is a key component of a
PON system.
The receiver in the OLT consists of a photodetector(e.g., a photodiode (PD)) and an amplifier, as shownin Fig. 1. The PD converts received optical signals toelectrical ones, and the amplifier amplifies the signals
to a sufficient amplitude for the signal-processing
large-scale integration (LSI) chip to handle. The performance requirements for the optical receiver in agigabit-class PON system are shown in Fig. 2.
Because a passive optical coupler is used, the signals
are branched off and the shared-access loss is large.
To compensate for this shared loss, the receivershould have a high sensitivity and a wide dynamic
range for the input signal power that can be accommodated. Moreover, in a PON system, each packet
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Optical coupler
Downstream data

ONU #1#1#2

ONU #2OLT#nλ: 1.49 µm#2

λ: 1.31 µm
#n
#2

#n

E/O
converter

WDM

#1

#1

SignalElectrical processing
LSI
signalAMP

Optical PD
signalONU #nUpstream data

Burst-mode optical receiver

E/O: electrical-to-opticalFig. 1. PON system and an optical receiver for an OLT.

Dynamic range
#1

#2

#1

(1) High sensitivity(2) Wide dynamic range

Optical receiver#2

Response time(3) Quick response#2#1

Guard time

Preamble

Header

PayloadFig. 2. Performance requirements for the optical receiver.

consists of a preamble, a header, and a payload, andthe receiver’s settling time must be less than the preamble time. If we can shorten the response time, we
can reduce the preamble time and thereby improvethe efficiency of uplink-data transmission [6]. Moreover, for access networks, the cost of the receivermust be low enough for subscriber use. However, theOLT receivers in gigabit-class PONs generally use an
expensive avalanche photodiode (APD) as the photodetector to obtain high sensitivity [7]. The problems with conventional receivers are summarized inTable 1 along with our design targets.
To meet these requirements, we have devised circuit design techniques that enable both a quick
response and high sensitivity using an inexpensive
positive-intrinsic-negative photodiode (PIN-PD) [8],[9].
Vol. 4 No. 10 Oct. 2006

Table 1. Properties of conventional receivers and ourtargets.
Conventional values
Photodetector

Target values

APD

PIN-PD

PIN-PD

SensitivityHigh(< –30 dBm)

Low(–26 dBm)High(< –30 dBm)

Gain control

O/E conv. gain

Trans-Z gain

Trans-Z gain

Response
speed

Slow
(µs)

Slow
(µs)

Fast
(<35 ns)

High voltage

VCC common

VCC common

High

Low

Low

Supply voltage
for PD
Cost

Trans-Z: transimpedance17

Selected Papers

2. Circuit design techniques for a burst-mode
optical receivershown in Fig. 4. The TIA consists of an amplifiercore with a variable-feedback resistor Rf controlled
by means of a quick level-detection circuit, a singleto-balance converter, and an output buffer. The leveldetection circuit is configured using comparatorswith hysteresis characteristics.
The operating principle of the gain-mode switchingis shown in Fig. 5. The TIA has three gain modes:
high, medium, and low. When the input signal issmall, a high feedback resistance value RH is selected
to decrease thermal noise and thereby obtain highThe developed burst-mode optical receiver consistsof a transimpedance amplifier (TIA) and a limiting
amplifier integrated circuit (IC), as shown in Fig. 3.
2.1 TIA circuit
For high sensitivity and a wide dynamic range, weused a TIA with variable-transimpedance gain. A
detailed circuit block diagram of the new TIA is

#1

#2

TIA
Input optical signal#1

PIN-PD

Output electrical signal

LIM

Rf

#2

Amp.
#1

Current signal
Gain
SW

Level
det.

Level
det.

Reset signal

#2

AOC

Reset signal

AOC: auto-offset compensation
LIM: limiting amplifierFig. 3. Optical receiver circuit configuration.

TIA core

Single/balance

Buffer
Out

In

Out
Rf

Rload

Hysteresis
comparator
SW1

VCC

SW1,
SW2

SW3
Out
Rf

SW2
Level det.

In

External reset
SW1,
SW2

Fig. 4. TIA circuit diagram.

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TIA output VoutHigh gain
Medium gain
Low gain
Vth
RH

RM

RL

Input current Iin
SW1 offon

SW3 off

on: SW2
available

SW2 off

off

on

RH = R 1
RM = R1 // R2
RL = R1 // R2 // R3

R3

SW2

R2

SW1

R1
R1 > R 2 > R 3

on(a) Gain-mode change(b) Detailed circuit of Rf

Fig. 5. Principle of gain-mode change in the TIA.

sensitivity. If the input signal current is large, thevalue of the feedback resistor is reduced to RM or RL
to avoid waveform degradation. To change the gainmode, when the amplitude of the output voltage of
the TIA reaches the threshold voltage (Vth), switch
SW1 turns on and initiates the first change from highto medium. After SW1 turns on, SW2 becomes available through SW3, which is controlled by SW1. The
second gain mode change, from medium to low, is
performed by SW2. The detailed circuit of the feedback resistor Rf is shown in Fig. 5(b). The feedback
resistor Rf , which can take three values: RH, RM, andRL, contains three separate resistors: a large one R1, a
medium one R2, and a small one R3. It is controlled by
the level-detection circuit. R2 and R3 are connected to
R1 in parallel using metal oxide semiconductor field
effect transistor (MOSFET) switches, which are controlled to change the gain mode.
Fast response is also essential for burst-mode operation. The response speed of the level detection andswitching mainly determines the speed of the gainmode change. For high-speed detection, we use ahysteresis comparator, which enables fast level detection and hold. Once the input signal exceeds the hysteresis voltage of the comparator Vth, the output isquickly changed to on. And the level of the detectedsignal is maintained due to the hysteresis transfer
characteristics. This means that the TIA can quickly
switch the gain without any external adjustments.

Vol. 4 No. 10 Oct. 2006

2.2 Limiting amplifier circuit
For burst-mode operation, the receiver should be
able to handle data packets with different amplitudes
corresponding to the various transmission distances.
To handle these data packets, the offset voltage ineach data packet should be eliminated to generate aclear reshaping signal that can be received in the following digital circuits. The offset voltage gives rise to
duty cycle variation of the signal and degrades thereceiver performance. To remove the offset due topacket data, we used a limiting amplifier with anauto-offset compensation (AOC) circuit.
A circuit block diagram of the limiting amplifier
and an outline of the AOC operation are shown in
Fig. 6. For accurate compensation, we used a twostage amplifier with a feed-forward AOC [9] configuration that performs coarse and fine offset compensations. In a conventional limiting amplifier, AOC
uses a feedback loop configuration for stable operation. However, the feedback loop takes a long time torespond to any change in offset conditions. On theother hand, the feed-forward configuration provides aquick response because there is no feedback loop.
In addition, to improve the accuracy and dynamic
range of the offset compensation, we used a twostage AOC configuration. When the input signal issmall, coarse AOC is performed in the first-stage
AOC circuit and fine AOC is performed in the second
stage. When the input signal is large, the offset voltage is effectively cancelled in the first-stage AOC circuit. In addition, this AOC circuit enables high sensi19

Selected Papers

1st AOC

2nd AOC

Amp.

Amp.

BufferData
out

Data in
(A)

(B)
AOC

External
reset

(C)

Size: 1 × 1.1 mm2Size: 1.1 × 1 mm2(a) TIA IC(b) LIM IC

AOC(a) Limiting amplifier

Coarse AOC

Fine AOC

(B)

(C)

Data
Data
Optical module PKG IC(A)(b) AOC operation(c) Receiver evaluation board

Fig. 6. Limiting amplifier circuit diagram and AOC
operation.

Fig. 7. Optical receiver ICs and the evaluation board.

tivity without any external adjustments because thetwo-stage configuration mitigates the accuracy
requirement in the level-hold operation. In this circuit, a reset signal initializes the condition of offset
compensation for each packet. These circuit techniques enable a quick response.
For stable operation at a data rate of 1.25 Gbit/s, adifferential interface with 50-Ω impedance matching
was used between the TIA and limiting amplifier circuits. The electrical output interface of the limiting
amplifier is differential low-voltage positive emittercoupled logic (LVPECL). Consequently, the circuit
techniques used in the TIA and limiting amplifier
enable the receiver’s settling time to be very short andenable data to be output with a constant amplitude.

amplifier IC.
The TIA IC with a PIN-PD was packaged in a conventional metal can, and the limiting amplifier IC was
molded in a low-cost plastic package. An opticalreceiver was built using this optical module and the
packaged limiting amplifier IC. A photograph of theevaluation board of the receiver is shown in Fig. 7(c).
The supply voltage of the optical receiver is +3.3 V
and the power dissipation of the ICs is about 300 mW,
excluding the output load current.

3. Experimental results
3.1 IC fabrication
Using these circuit design techniques, we fabricated TIA and limiting amplifier ICs using silicon germanium bipolar complementary metal oxide semiconductor (SiGe-BiCMOS) technology. Microphotographs of the ICs are shown in Figs. 7(a) and (b),respectively. The die sizes are 1.1 mm × 1.0 mm for
the TIA IC and 1.0 mm × 1.1 mm for the limiting20

3.2 IC performance
The receiver was operated at 1.25 Gbit/s and theperformance was evaluated using burst-mode optical
data with a pseudo-random-bit sequence (PRBS).
Waveforms for high-, medium-, and low-gain modes
at optical input powers of –30, –24, and –10 dBm,
respectively, with an extinction ratio of 10 dB are
shown in Fig. 8(a). These results confirm that thereceiver could generate data with clear eye opening in
all gain modes. Even in the high gain mode, a clear
eye pattern was obtained for a small optical input signal of –30 dBm. Our circuit techniques make it possible to improve the sensitivity compared with conventional ones [6], [10], [11]. The measurement
results reveal that the sensitivity of the developed
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Selected Papers#1: –6 dBm

1.25 Gbit/s

High-gain mode
Guard time
Input opticalsignal#2: –30 dBm

Medium-gain mode
Response time
Output electricalsignal
Low-gain mode

10 ns/div
200 ps/div(a) Waveforms(b) Waveforms for burst data

Fig. 8. Response waveforms of the optical receiver ICs.

4. Conclusion
Burst-mode optical receiver ICs with a quick
response for gigabit-class PON systems have beendeveloped. To achieve a quick response and high sensitivity at the same time, we devised a TIA circuit
Vol. 4 No. 10 Oct. 2006

10–4
1.25 Gbit/s
10–5High gain
Bit error ratereceiver with a PIN-PD is as high as that of one withan APD for burst-mode use [7].
To demonstrate the response speed, we evaluatedthe response waveform for burst data. An example of
the receiver output waveforms for packet data withdifferent amplitudes is shown in Fig. 8(b). The top
waveform is an optical input, and the bottom one is
the receiver output. The optical power of the first
packet was –6 dBm and that of the second one was–30 dBm. The receiver generated a clear reshaped
signal with constant amplitude. The output waveform
also shows that the settling time for the second packet was very short. These results show that the receiver can respond quickly to burst data and generate aconstant output amplitude for extremely different
input optical powers.
We also evaluated the response speed taking into
consideration gain-mode switching. The responses toburst data in bit-error-rate measurements in the high-,
medium-, and low-gain modes are shown in Fig. 9. In
this figure, the horizontal axis is the starting bit oferror counts in packet data, or the settling time. The
receiver achieved a fast settling time of under 44 bits,
which satisfies the specifications for both GE-PON(Gigabit Ethernet PON) [4] and G-PON (Gigabit
PON) [5].

10–6
Medium gain
10–7
Low gain

10–8
10–9

G-PON spec. (ITU-T)

10–10
10–11
10–12
0

GE-PON spec. (IEEE)

20

40

60

500

520
(bit)

Response time

Fig. 9. Response to burst data in bit error rate.

with three gain modes that uses hysteresis comparators and a limiting amplifier circuit with feed-forward
AOC. Using these design techniques, we fabricatedburst-mode receiver ICs. An optical receiver builtwith these ICs and a PIN-PD exhibited a quick
response and high sensitivity for burst data. Its sensitivity is comparable to that of a receiver with an APD.
Furthermore, the performance is good enough to satisfy the GE-PON and G-PON specifications. Therefore, these fast-response burst-mode receiver ICs will
be very useful in improving the transmission efficiency of burst-mode optical communications systems.
These receiver ICs have been implemented in an optical transceiver, as described in the next paper in thisissue [12].
21Selected Papers

References[1]

K. Okada and N. Miki, “Fiber-Optic Subscriber Systems for Point-toMultipoint Transmission Architecture,” Proc. ECOC’92, 1992.
[2] N. Miki and K. Okada, “Access Flexibility with Passive Double Star
Systems,” IEEE 5th Conference on Optical/Hybrid Access Networks
Proc., 1993.
[3] ITU-T Recommendation G.983.1.
[4] IEEE 802.3ah Standard.
[5] ITU-T Recommendation G.984.2.
[6] Q. Le, S. G. Lee, Y. H. Oh, H. Y. Kang, and T. H. Yoo, “Burst-Mode
Receiver for 1.25 Gb/s Ethernet PON with AGC and Internally Created Reset Signal,” Tech. Dig. ISSCC2004, pp. 474-475, Feb. 2004.
[7] P. Ossieur, Y. C. Yi, J. Bauwelinck, X. Z. Qiu, J. Vandewege, and E.
Gilon, “DC-coupled 1.25 Gbit/s burst-mode receiver with automatic
offset compensation,” IEE Electron. Lett., Vol. 40, Apr. 2004.
[8] M. Nakamura, Y. Imai, Y. Umeda, J. Endo, and Y. Akatsu, “1.25Gb/s
Burst-Mode Receiver ICs with Quick Response for PON Systems,”
ISSCC Dig. Tech., pp. 226-227, Feb. 2005.
[9] N. Ishihara, M. Nakamura, Y. Akazawa, N. Uchida, Y. Akahori, “3.3V, 50 Mb/s CMOS Transceiver for Optical Burst-Mode Communication,” IEEE ISSCC Tech. Dig., 15-4, Feb. 1997.
[10] K. Nishimura, H. Kimura, M. Watanabe, T. Nagai, K. Nojima, K.
Gomyo, M. Takata, M. Iwamoto, and H. Asano, “A 1.25Gbit/s CMOS
Burst-Mode Optical Transceiver for Ethernet PON System,” Tech.
Dig. Symposium On VLSI Circuits, pp. 414-417, 2004.
[11] K. Tosaka, Y. Morita, N. Tajima, M. Kita, and Y. Abe, “Developmentof optical transceiver modules for gigabit PON,” IEICE Proc. Commun. Soc. Conf., B-10-38, 2003.
[12] M. Nakamura, J. Endo, Y. Umeda, and Y. Akatsu, “High-sensitivity
and Low-cost Optical Transceiver for Passive Optical Network Systems,” NTT Technical Review, Vol. 4, No. 10, pp. 23-28, 2006 (thisissue).

Makoto Nakamura
Senior Research Engineer, Photonics Device
Laboratory, NTT Photonics Laboratories.
He received the B.S., M.S., and Dr.Eng.
degrees in electronics engineering from Nagoya
University, Aichi, in 1987, 1989, and 1998,
respectively. He joined NTT LSI Laboratories,
Kanagawa, in 1989. Since then, he has been
engaged in R&D of timing LSIs and broadband
amplifiers for 10-Gbit/s and higher-speed opticaltransmission systems and burst-mode transceiver
LSIs for optical access networks. From 2000 to
2002, he worked in NTT Electronics Corporation, where he developed LSIs and modules for
optical communications systems. He received
the Young Engineer Award from the Institute ofElectronics, Information and Communication
Engineers (IEICE) of Japan in 1997. He is amember of the IEEE Solid-State Circuits Society, IEICE, and the Institute of Electrical Engineers of Japan.

Yohtaro Umeda
Professor, Faculty of Science and Engineering,Tokyo University of Science.
He received the B.S. and M.S. degrees inphysics and the Ph.D. degree in electrical engineering from the University of Tokyo, Tokyo, in
1982, 1984, and 2000, respectively. He joined
Nippon Telegraph and Telephone Public Corporation (now NTT) in 1984 and engaged in the
study of high-speed analog and digital ICs forfiber-optic communication systems. He moved
to Tokyo University of Science in 2006. He is amember of IEICE.

Jun Endo
NTT BizLink.
He received the B.E. and M.E. degrees inapplied physics from Tohoku University, Miyagi, in 1997 and 1999, respectively. He joined
NTT Photonics Laboratories, Atsugi, in 1999
and engaged in R&D of optical receiver circuits.
He moved to NTT Bizlink in 2006.

Yuji Akatsu
Executive Manager, Research Planning Section, NTT Photonics Laboratories.
He received the B.E., M.E., and Ph.D. degrees
in electrical engineering from Hokkaido University, Hokkaido, in 1983, 1985, and 1988, respectively. In 1988, he joined NTT Opto-electronics
Laboratories. He has been engaged in R&D of
semiconductor crystal growth, opto-electronic
integrated circuits, and optical modules. He is amember of the IEEE Lasers and Electro-Optics
Society, IEICE, and the Japan Society of Applied
Physics.

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