SHF Communication Technologies AG
Wilhelm-von-Siemens-Str. 23D • 12277 Berlin • Germany
Phone ++49 30 772 051-0 • Fax ++49 30 753 10 78
E-Mail: sales@shf.de • Web: http://www.shf.deDatasheet
SHF D836 A
Differential to Single-Ended
Linear Broadband Amplifier

SHF reserves the right to change specifications and design without notice – SHF D836 A - V001 – March 11, 2016

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Description
The SHF D836 A is a differential input, single-ended output linear amplifier designed for PAM4 and16QAM applications. The single-ended output drive amplitude of up to at least 4 V linear is particularly
well suited for state-of-the-art single-drive DP-16QAM modulators. When driven from the differential
outputs of a high performance DAC, the common-mode rejection characteristic of this differential input
design helps to maintain the linearity and resolution of the DAC.
This amplifier is of a single chip design based on state-of-the-art commercial GaAs process, housed in a
special low loss carrier PCB environment to maintain wide bandwidth and low group delay variation,necessary for high performance operation.
Like other amplifiers in the product family, this amplifier enjoys the same benefit of an internal voltage
regulation to protect against accidental reverse voltage connection. Similarly, the output amplitude andcrossing adjustment using software control via an USB connection. Once adjusted, the connection canbe removed until the next time.

Ease of Use
Upon delivery, the amplifier is already pre-set to deliver maximum gain, maximum output amplitude andnominally 50% crossing.
These settings can be modified in an easy to use graphical software interface, as shown below. For
connecting the amplifier to the computer, the USB to I2C converter cable, as well as the required
software are included with each amplifier with no extra charge.
Once new settings are stored on the device the amplifier will remember the settings until further
changes are made. There is no need to connect a computer to the device unless gain, maximum
amplitude or crossing adjustments are to be made.
The software is available for download at www.shf.de .

Available Options
01: DC return on output (max. ±1.75 V, max. 35 mA)
02: Built-in bias tee on output (max. ±7 V, max. 220 mA)

SHF reserves the right to change specifications and design without notice – SHF D836 A - V001 – March 11, 2016

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Specifications – SHF D836
Parameter

UnitSymbol

Min

TypMaxConditions

Maximum RF Input Powerin OperationdBm
V

Pin max

4
1

peak to peak voltage

Maximum RF Input Powerwithout Power SupplydBm
VPin max

10
2

peak to peak voltage

DC Voltage at RF Input

V±9AC coupled input

DC Voltage at RF Input

V±7AC coupled output

Supply Voltage

V

120.45 A, reverse voltage protected

Absolute Maximum Ratings

Case Temperature

1Tcase8°C

104050Electrical Characteristics (At 40°C case temperature, unless otherwise specified)
GHz

fHIGH InP

32

single ended2, non-inverting input

GHz

fHIGH InN

27

single ended2, inverting input

GHz

fHIGH

30

Calculated from single ended

Low Frequency 3 dB Point

kHz

fLOW

Gain

dBS21

Gain Ripple

dB

∆S21

Max. Gain ReductiondB

Output Power at 1 dB
Compression

dBmV

Output Power at 2 dB
Compression
Output Power at 3 dB
Compression

High Frequency 3 dB Point

501213each inputs
measured at Pin= -27 dBm±0.5±140 MHz…25 GHz, relative to gain-slope-2.5-3-4

Control via software interface

P01dB

15
3.5

164

10 MHz…25 GHzdBm
VP02dB

174.5

185

10 MHz…25 GHzdBm
VP03dB

195,619,56

10 MHz…25 GHz

3 Order Intercept PointdBm

IP328

Max. RF Input for Linear
Operation

dBm
VPin linrd

peak to peak voltage

peak to peak voltage

peak to peak voltage
Single ended-4
0.4

I.e. Pout ≤ P01dB
peak to peak voltage, single ended
Pin ≥ - 2 dBm

Max. Output PowerReductiondBtbd

Crossing might need to be readjusted
by using the crossing control feature.
Control via software interface

Crossing Control
Range%

tbd

Control via software interface

1

If operated with heat sink (part of the delivery) at room temperature there is no need for additional cooling.

2

Single ended measurement condition with -27dBm input power

SHF reserves the right to change specifications and design without notice – SHF D836 A - V001 – March 11, 2016

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Parameter

Unit

SymbolInput Reflection

dBS11

Output Reflection

dBS22MinTypMax-10Conditions-15-10< 10 GHz, single ended-9< 30 GHz< 20 GHz, single ended

20%...80%, 3 V ≤ Vout ≤ 4 V

Rise Time/Fall Time

pstr/tf

813.5

Deconvoluted 3, 4
Full Setup 3
3 V ≤ Vout ≤ 4 VJitterfs

Group Delay Ripple

psPower Consumption

WJRMS

500
580

tbd
±50

3.4

Deconvoluted 3, 4
Full Setup 3
40 MHz…30 GHz, 100 MHz aperture
9 V supply voltage

Mechanical Characteristics
Input Connector

2.92mm (K) female5

Output Connector

2.92mm (k) male52Single ended measurement condition with -27dBm input power

3Measured with: SHF 611 C DAC -> DUT (SHF D836 A) -> Agilent 86100A with 70 GHz sampling head & precision time base.

4Calculation based on typical results of setup without DUT :/!

== "(( /!

) −( /) −#!

//) =$ =(( /!

) − 11) − 300 '5

Other gender configurations are available on request. Other connector types are also available but may impact bandwidth &reflection.

SHF reserves the right to change specifications and design without notice – SHF D836 A - V001 – March 11, 2016

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Typical S-Parameters, Group Delay and Phase Response
Single-Ended Measurements

SHF reserves the right to change specifications and design without notice – SHF D836 A - V001 – March 11, 2016

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Typical S-Parameters, Group Delay and Phase Response
Differential to Single-Ended (calculated from Single-Ended Measurements)

Typical Common-Mode-Rejection-Ratio (CMRR)SHF reserves the right to change specifications and design without notice – SHF D836 A - V001 – March 11, 2016

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Typical Binary Eye Diagrams
The measurements below had been performed using a SHF 611 C DAC or a SHF 12103 A (for 43Gbps), respectively and an Agilent 86100D DCA with Precision Time Base Module (86107A) and 70
GHz Sampling Head (86118A).

Input Signal InP @ 32 Gbps,
Eye amplitude: 342 mV

Input Signal InN @ 32 Gbps,
Eye amplitude: 313 mV

Output Signal @ 32 Gbps,
Eye amplitude: 3.05 V

Input Signal InP @ 32 Gbps,
Eye amplitude: 561 mV

Input Signal InN @ 32 Gbps,
Eye amplitude: 532 mV

Output Signal @ 32 Gbps,
Eye amplitude: 4.67 V

Input Signal InP @ 43 Gbps,
Eye amplitude: 666 mV

Input Signal InN @ 43 Gbps,
Eye amplitude: 660 mV

Output Signal @ 43 Gbps,
Eye amplitude: 5.47 V

SHF reserves the right to change specifications and design without notice – SHF D836 A - V001 – March 11, 2016

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Typical 4-Level Eye diagrams
The measurements below had been performed using a SHF 611 C DAC or a SHF 12103 A (for 43Gbps), respectively and an Agilent 86100D DCA with Precision Time Base Module (86107A) and 70
GHz Sampling Head (86118A).

Input Signal InP @ 20 GBaud,Eye amplitude: 487 mV

Input Signal InN @ 20 GBaud,Eye amplitude: 487 mV

Output Signal @ 20 GBaud,Eye amplitude: 4.39 V

Input Signal InP @ 32 GBaud,Eye amplitude: 340 mV

Input Signal InN @ 32 GBaud,Eye amplitude: 340 mV

Output Signal @ 32 GBaud,Eye amplitude: 3.14 V

Input Signal InP @ 32 GBaud,Eye amplitude: 495 mV

Input Signal InN @ 32 GBaud,Eye amplitude: 486 mV

Output Signal @ 32 GBaud,Eye amplitude: 4.41 V

SHF reserves the right to change specifications and design without notice – SHF D836 A - V001 – March 11, 2016

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Typical Suppression of common mode interference

Input Signals 32 GBit/s
100 mV/ 16 GHz interference

Output Signal 32 GBit/s

Typical Low Frequency Response (<1 MHz)

Typical Saturation Power Characteristic (single-ended measurement)

Top (red):
3 dB compression;
Middle (green): 2 dB compression;
Bottom (blue): 1 dB compression
SHF reserves the right to change specifications and design without notice – SHF D836 A - V001 – March 11, 2016

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30.6

4x M2 x 5mm

Mechanical Drawing without Heat Sink

5.3

8.5
18.5

6.36.714.1

36

M2.5 x 3.5mm

210.1

PortConnector

12

non inverting Input

3Output

12.4

455052

4.1

28.2
19.3
17.5
14.3
9.2

35

Communication

13dB-+D159

P03dB: 18dBm

40kHz - 30GHzSHF D836 A

nc+9V
0.5A

Technologies AGSHF Germany

21

12.4

2GND

33

ncI2C

32
5.3
6.7
12.5

6.3

2x M2 x 4mm

49.7

inverting Input

Pin assignment might change if a bias tee option is chosen.
Thermal resistance of heat sink approx. 6 K/WFor permanent mounting remove the heat sink from the amplifier. In that case please ensure that
adequate cooling of the amplifier is guaranteed. It is recommended to use thermal paste or a thermal
gap pad for the mounting. In order to separate the heat sink from the amplifier, remove the four screws
on the heat sink. Please note, thermal paste is used between the heat sink and the amplifier housing.
SHF reserves the right to change specifications and design without notice – SHF D836 A - V001 – March 11, 2016

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User Instructions
ATTENTION!
Electrostatic sensitive GaAs FET amplifier1.

To prevent damage through static charge build up, cables should be always discharged before
connecting them to the amplifier!

2.

Attach a 50 Ohm output load before supplying DC power to the amplifier!

3.

The supply voltage can be taken from any regular 8…12 V, 0.45 A DC power supply and can beconnected to the supply feed-through filter via an ON / OFF switch.

4.

Using a 3 dB or 6 dB input attenuator will result in a 6 dB or 12 dB increase of the input return loss.
For minimal degradation of amplifier rise time, these attenuators should have a bandwidth
specification of greater 50 GHz (V/ 1.85mm attenuators)!

5.

An input signal of about 0.65 Vpp will produce output swing of about 3 Vpp.

6.

Higher input voltages will drive the amplifier’s output stage into saturation, leading to waveform peakclipping.

7.

Saturated output voltages can only be used without damage while the amplifier is connected to a 50
Ohm precision load with a VSWR of less than 1.2 or better than 20 dB return loss up to 40 GHz.

8.

While using a reflective load the output voltage has to be reduced to a safe operating level according
to the magnitudes of the reflections.

9.

ATTENTION: At radio frequencies a capacitive load can be transformed to an inductive one throughtransmission lines! With an output stage driven into saturation this may lead to the immediate
destruction of the amplifier (within a few ps)!

10.

The input voltage (single ended) should never be greater than 2 Vpp equivalent to 10 dBm input
power.

SHF reserves the right to change specifications and design without notice – SHF D836 A - V001 – March 11, 2016

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