4-006

平成 21 年電気学会全国大会

Development of New Multilevel Current-Source Inverter
Using Inductor Cell
Suroso, Toshihiko Noguchi, and Nozuki Yoshikazu (Nagaoka University of Technology)
1.

Introduction

This paper proposes a new topology of a multilevel
current-source-inverter (CSI) applying inductor cell circuit.
Using this topology, smaller distortion of the inverter output
current is achieved by increasing the level number of the output
current as well as connecting more inductor cell circuits. The
inductor cell circuit functions to obtain an intermediate current
level of the multilevel output current waveform. A five-level
inverter configuration is tested by using computer simulation totest the proposed multilevel current-source inverter circuit.

2.

Fig. 2. Five-level current-source-inverter circuit.

System Configuration

Fig. 1 presents the general circuit configuration of the
proposed multilevel current-source inverter. The main circuit is athree-level inverter with all power switches are connected at acommon potential level and the auxiliary circuits are connectedin parallel with the main circuit. The chopper circuit works togenerate the input current of the inverter. The auxiliary circuit isan inductor cell connected in parallel with the main three-level
inverter circuit. This inductor cell circuit is composed by four
power switches with blocking diodes and an inductor in thecenter of the circuit. This circuit functions to obtain theintermediate current level of the multilevel output current
waveform by controlling the charging and discharging operation
modes of the inductor cell.
Fig. 2 shows the configuration of a five-level current-source
inverter circuit composed by chopper circuit, three-level inverter
and a single inductor cell circuit. The operation mode of thefive-level current generation is shown in Fig. 3(a) to 3(e). The
chopper circuit is represented by two identical DC current
sources.
Fig. 4 shows the controller diagram of the five-level inverter
circuit. PI regulators are used to control the input current, I1 andI2, flowing through the input inductors, Lin. Hysteresis current
control is applied to regulate the current flowing through theinductor cell (ILc).

(a) Switching combination for +I/2 current generation.

(b) Switching combination for +I current generation.

(c) Switching combination for zero current generation.

(d) Switching combination for -I/2 current generation.

(e) Switching combination for -I current generation.

Fig. 1. Proposed multilevel current-source inverter circuit

2009/3/17～19

北海道

Fig. 3. Operation modes of five-level CSI-10(第 4 分冊)©2009 IEE Japan4-006

平成 21 年電気学会全国大会

Table 2. Simulation parameters.
Input inductor (Lin)

0.5 mH

Inductor cell (Lc)

0.2 mH

Switching frequency

20 kHzFilter capacitor (Cf)

5 μF
RL = 10 Ω , LL = 3 mH

LoadFig. 4. Controller block diagram of five-level CSIQ20000000111Table 1. Switch state of five-level inverter
Q3Q4Q5Q6Q7Q80101111011101101100010110110100101011
100
100010010
10001101000

Output＋I＋I＋I /2＋I /200－I /2－I /2－I－I

Fig. 5. Five-level current, load current, input inductor current andinductor cell current waveforms
100FFT of three-level current (%)

Q10001111
11
1

A carrier based sinusoidal modulation technique is applied toobtain a pulse width modulation (PWM) output current
waveform. Table 1 lists the switch states of five-level inverter
circuit for five-level current generation.

0.1

Simulation Results

In order to examine the proposed inverter circuit configuration,a five-level inverter topology is tested with a computer
simulation. The simulation circuit specifications are listed inTable 2. Fig. 5 shows the main waveforms of proposed five-level
inverter circuit. The inverter circuit generates a perfect five-level
output current .It can be seen that the load current is a perfectsinusoidal waveform with small distortion. The amplitude of theinductor cell current is 5 A, i.e., half of the main input inductor
current, 10 A. Fig. 6 shows the harmonics profile of three-leveland five-level current using the same simulation parameters. As
it can be seen, the five-level current has lower amplitude of theharmonics components. The total harmonic distortion (THD)
values are 9.1% and 3.8% for the three-level and five-level
current waveforms, respectively.

4.

1200400

600

8001000

1200

140016001800

2000

Frequency (Hz)1010.10.01
0200

400600

800

1000

1200

1400

1600

1800

2000

Frequency (Hz)Fig. 6. Harmonic profile of three-level and five-level current
References

A new configuration of a multilevel current-source-inverter
circuit has been proposed and tested in a computer simulation.
The simulation results of the five-level output current shows
possibility of the proposed inverter topology.

北海道

0100

waveform

Conclusion

2009/3/17～190.01

FFT of five-level current (%)

3.

10(1)

-11(第 4 分冊)

T. Noguchi, Y.Nozuki, and Suroso, “Discussion on Novel Topologies
of Multi-level Power Converter Based on Duality”, IEE-Japan Tech.
Meet., SPC-08-89 (2008) (in Japanese).

©2009 IEE Japan