Outline
Switch Architectures For Small-buffered OpticalPacket Switched Networks Buffering Problem in OPS networks
 Objective
 Proposed Solutions
 Simulation Results
 Conclusions

Onur Alparslan, Shin’ichi Arakawa, Masayuki Murata
Osaka University

4 July 20071

Buffering Problem in OPS Networks

2

Objective According to a rule-of-thumb, an output link of a router Designing an all-optical OPS network architecture thatneeds a buffer sized at B = RTT x BW

can achieve high utilization and low packet drop rateby using small FDL buffers
 Showing the buffer requirementsz Huge buffer size requirement due to ultra-high speed of opticalnetworks
 Electronic RAM is not a feasible solutionz O/E/O conversion is hard at ultra-high speed of optical networks
 FDLs (fiber-delay-lines) have limitationsz FDLs can provide small amount of buffering with fixed delays
z Bulky devices
 Optical RAM
z Still under researchz Do not expect it to have large capacity soon

3

Proposed Solutions 1/2

4

Proposed Solutions 2/2

 Preventing wavelength over-utilizationz Apply XCP-based congestion control

XCPXCP» XCP is a new congestion control algorithm specifically

XCP

XCP

IP Routers

XCP

IP Routersdesigned for high-bandwidth and large-delay
networks.
z Carefully select XCP parameters

TCP, UDP Trafficz Control maximum wavelength utilization ratio by

XCP Macro Flow (LSP)OPS Domain

XCP Burstiness OPS Architecturez Time-slotted WDM OPS networkz Variable length IP packets enter OPS domain
without aggregationz Establish macro flows between edge nodesz Assign incoming TCP, UDP traffic to macro flows (similar to XCP-CSFQ, TeXCP)z Apply leaky bucket pacing to macro flows according to XCP flow rate atedge node5z Possible to use LSPs for controlling macro flows if GMPLS is available

6Architecture

Output Buffering FDL Architecturez Single stage FDL set with B delay linesz FDL length distribution increases linearly(x,2x,3x,4x….) where x is FDL granularity» FDL granularity of 3 means a FDL set of (3 slots, 6slots, 9 slots, 12 slots.…)z Voids occur between packets inside FDLs when x>1

Input Link 1

Output Link 1...

Input Link 2

Output Link 2

SWITCH...

Input Link 3

Output Link 3...

Input Link 4

Output Link 4...

….

Switch size is large because all delay lines areconnected to a single switch
 Fabrication of a single big switch may be costly
78

Input Buffering with FDLs
Input Link 1

SStar Topology Simulations
E1

Output Link 1
E12

Input Link 2

S

Input Link 3

S

Input Link 4

S

Output Link 2

10ms
CSWITCH

E3

Output Link 3

Output Link 4




E2
1ms

Smaller Switches

12 links star topology
Wavelength speed is 1Gbit/s
Slot size is 52BytesEach edge node sends traffic to all other edge nodes
30% XCP target utilization
Realistic packet size distribution

910Simulation Results

Recent Research and Preliminary Results Aggregate packet drop rate in the core

 Preliminary results show thatz Shared buffering with XCP control further decreases
the FDL requirementsz FDL requirement decreases as slot size increases» However using bigger slot size decreases
utilization efficiency due to padding for smallpackets» Trade-off

Input Buffering

Output Buffering Evaluating throughput of TCP with theproposed OPS architecture on meshtopology

 Similar fiber delay line requirements
 Input buffering uses smaller switches
1112

Shared Buffering

TCP Traffic Simulation (Preliminary Results)
24

Input Link 1

15

Input Link 2
Input Link 3

14

Output Link 1
Output Link 2
SWITCH

Input Link 4

171

7

20

3

4

16

Output Link 3
Output Link 4







Only single circulation is allowed in the shared buffer

6

Link Utilization (Without XCP control)

1926

13523

925

27

NSFNET topology with 28 nodes (14 edge + 14 core) and 35 links
Wavelength speed 1Gbit/s
Slot size is 1500Bytes
Apply TCP traffic among all edge node pairs
TCP data packets are 1500Bytes, TCP ACK packets are 40Bytes
XCP target utilization 90%
Core nodes have Shared FDL buffering with only 7 delay lines per switch with
granularity of 1 slotz

132111218





210

10228zMax. buffer capacity per link is 7 packets
Rule-of-thumb requires 20,834 packet buffer size per link

14

Link Utilization (Our Architecture)
Apply XCP controlled
pacing to incoming TCP
packets at edge nodes ofOPS domain
 Around 85% utilization
 Lower packet drop rate

Utilization of link fromnode 8 to node 7
 Around 25% utilization
 High packet drop rate



15

Nodal degree is 5 andswitch has only 7 delaylines shared buffer, sodelay line per link is only
1.4

16Conclusions
 Possible to decrease buffer requirements of OPS

core routers byz applying XCP pacing at edge nodesz XCP-based utilization control at core nodes in the OPS network

Thank you

 Input and output buffering have similar fiber delayline requirements when utilization is low Shared buffering with proposed XCP based pacing
may further decrease the buffer requirementsz Possible to get more than 3 times higher TCP throughput withvery small buffers

1718