[ /Title(IRF530,RF1S530SM)/Subject(14A,100V,0.160
Ohm,NChannel
PowerMOSFETs)/Author ()/Keywords(14A,100V,0.160
Ohm,NChannel
PowerMOSFETs,IntersilCorporation,TO220AB, TO263AB

IRF530
Data Sheet

February 2002

14A, 100V, 0.160 Ohm, N-Channel PowerMOSFETs
These are N-Channel enhancement mode silicon gate
power field effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand aspecified level of energy in the breakdown avalanche modeof operation. All of these power MOSFETs are designed forapplications such as switching regulators, switching
convertors, motor drivers, relay drivers, and drivers for highpower bipolar switching transistors requiring high speed andlow gate drive power. These types can be operated directlyfrom integrated circuits.
Formerly developmental type TA17411.

Ordering Information
PART NUMBER
IRF530• 14A, 100V
• rDS(ON) = 0.160Ω• Single Pulse Avalanche Energy Rated• SOA is Power Dissipation Limited• Nanosecond Switching Speeds• Linear Transfer Characteristics• High Input Impedance• Related Literature- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”

Symbol

PACKAGE
TO-220ABFeaturesBRAND

DIRF530
GNOTE: When ordering, use the entire part number.
SPackaging
JEDEC TO-220AB
SOURCEDRAIN
GATE
DRAIN (FLANGE)

1©2002 Fairchild Semiconductor Corporation

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
IRF530 Rev. B1

IRF530
Absolute Maximum Ratings

TC = 25oC, Unless Otherwise Specified

Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGRContinuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTGMaximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg

IRF530100100141056±2079
0.53
69-55 to 175

UNITS
VVA
AAV
W
W/oCmJoC

300
260oCoC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of thedevice at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 150oC.
TC = 25oC, Unless Otherwise Specified

Electrical Specifications

MIN

TYP

MAXUNITS

Drain to Source Breakdown Voltage

PARAMETERSYMBOL
BVDSS

ID = 250µA, VGS = 0V (Figure 10)

100--

V

Gate to Threshold Voltage

VGS(TH)

VGS = VDS, ID = 250µA

2-4.0VIDSS

VDS = 95V, VGS = 0V--25µAVDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 150oCµA

Zero Gate Voltage Drain Current

TEST CONDITIONS--250

On-State Drain Current (Note 2)

ID(ON)

VDS > ID(ON) x rDS(ON) MAX, VGS = 10V

14--

A

Gate to Source Leakage Current

IGSS

VGS = ±20V--±500nA

Drain to Source On Resistance (Note 2)rDS(ON)

ID = 8.3A, VGS = 10V (Figures 8, 9)

-0.14

0.16

ΩForward Transconductance (Note 2)

gfstd(ON)VDS ≥ 50V, ID = 8.3A (Figure 12)

5.1

7.6-

S

VDD = 50V, ID ≈ 14A, RG ≈ 12Ω, RL = 3.4Ω
MOSFET Switching Times are Essentially
Independent of Operating Temperature-

1215ns-3565ns-

2570ns-2559ns

VGS = 10V, ID = 14A, VDS = 0.8 x Rated BVDSSIg(REF) = 1.5mA (Figure 14)
Gate Charge is Essentially Independent ofOperating Temperature-

1830nC-

4-

nC-

7-

nC

VDS = 25V, VGS = 0V, f = 1MHz (Figure 11)

-600-

pF-

250-

pF

Turn-On Delay Time
Rise TimetrTurn-Off Delay Timetd(OFF)

Fall TimetfTotal Gate Charge(Gate to Source + Gate to Drain)

Qg(TOT)

Gate to Source Charge

Qgs

Gate to Drain “Miller” Charge

Qgd

Input Capacitance

CISS

Output Capacitance

COSSReverse Transfer Capacitance

CRSS

Internal Drain InductanceLD

Measured from theContact Screw on Tab To
Center of Die
Measured from the Drain
Lead, 6mm (0.25in) fromPackage to Center of Die

Internal Source InductanceLS

Measured from the Source
Lead, 6mm (0.25in) From
Header to Source Bonding
Pad

Modified MOSFET
Symbol Showing theInternal Devices
Inductances
D-50-

pF-

3.5-

nH-

4.5-

nH-

7.5-

nH-

-

1.9oC/W

--

62.5

oC/W

----LD
GLS
S

Thermal Resistance Junction to Case

RθJC

Thermal Resistance Junction toAmbient

RθJA

Free Air Operation2©2002 Fairchild Semiconductor Corporation

IRF530 Rev. B1

IRF530
Source to Drain Diode Specifications
PARAMETERSYMBOL

Continuous Source to Drain Current
Pulse Source to Drain Current (Note 2)

TEST CONDITIONSISDModified MOSFET Symbol
Showing the Integral
Reverse P-N Junction
Diode

ISDM

DMIN

TYP

MAX

UNITS

--

14A--56

A

GS

Source to Drain Diode Voltage (Note 2)

VSD

Reverse Recovery TimetrrReverse Recovery Charge

QRR

TJ = 25oC, ISD = 14A, VGS = 0V (Figure 13)
TJ = 25oC, ISD = 14A, dISD/dt = 100A/µs
TJ = 25oC, ISD = 14A, dISD/dt = 100A/µs

--

2.5

V

5.5

120

250

ns

0.17

0.6

1.3

µC

NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 25V, starting TJ = 25oC, L = 530µH, RG = 25Ω, peak IAS = 14A (Figures 15, 16).

Typical Performance Curves Unless Otherwise Specified
151.0
ID, DRAIN CURRENT (A)POWER DISSIPATION MULTIPLIER

1.20.80.60.40.2963002501255075100
TC , CASE TEMPERATURE (oC)15025175

5075100150125175

TC , CASE TEMPERATURE (oC)FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE

ZθJC, TRANSIENT THERMAL IMPEDANCE

12FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vsCASE TEMPERATURE

1010.50.2
PDM

0.1
0.1

0.05
t1

0.02
0.01t2NOTES:DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC

SINGLE PULSE
0.01
10-5

10-4

10-3

10-20.1

110t P, RECTANGULAR PULSE DURATION (s)FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE3©2002 Fairchild Semiconductor Corporation

IRF530 Rev. B1

IRF530
Typical Performance Curves Unless Otherwise Specified (Continued)
25
OPERATION IN THISAREA MAY BE
LIMITED BY rDS(ON)ID, DRAIN CURRENT (A)ID, DRAIN CURRENT (A)

10 310 210µs
100µs
101ms
10ms

10.1

TC = 25oC
TJ = 175oC
SINGLE PULSE

20PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
15VGS = 6V
10VGS = 5V
5VGS = 4V
01010 2VDS, DRAIN TO SOURCE VOLTAGE (V)1010 3IDS(ON), DRAIN TO SOURCE CURRENT (A)ID, DRAIN CURRENT (A)VGS = 8V

20

VGS = 7V
VGS = 10V

15VGS = 6V

10
VGS = 5V
5VGS = 4V
021345100175oC

0.10NORMALIZED ON RESISTANCErDS(ON), ON-STATE RESISTANCE (Ω)

0.9

0.6
VGS = 10V
0.3
VGS = 20V

03648

ID, DRAIN CURRENT (A)FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATEVOLTAGE AND DRAIN CURRENT25oC

13.01.224502468VGS, GATE TO SOURCE VOLTAGE (V)

10FIGURE 7. TRANSFER CHARACTERISTICSPULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

124010FIGURE 6. SATURATION CHARACTERISTICS

030

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS ≥ 50V

VDS, DRAIN TO SOURCE VOLTAGE (V)

1.520

FIGURE 5. OUTPUT CHARACTERISTICS

25PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

10VDS, DRAIN TO SOURCE VOLTAGE (V)FIGURE 4. FORWARD BIAS SAFE OPERATING AREA

0VGS = 7V

VGS = 10V
VGS = 8V

60

2.4

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = 10V, ID = 14A

1.8

1.2

0.6

0-60 -40 -20020406080 100 120 140 160 180

TJ , JUNCTION TEMPERATURE (oC)FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE4©2002 Fairchild Semiconductor Corporation

IRF530 Rev. B1

IRF530
Typical Performance Curves Unless Otherwise Specified (Continued)
1500
ID = 250µA
1.15

VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD

1200
C, CAPACITANCE (pF)

NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE

1.25

1.05

0.950.85

900CISS600

COSS300

0.75-60 -40 -20

CRSS02040080 100 120 140 160 180

60

VDS, DRAIN TO SOURCE VOLTAGE (V)FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWNVOLTAGE vs JUNCTION TEMPERATURE

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS ≥ 50V86FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE100
ISD, SOURCE TO DRAIN CURRENT (A)gfs, TRANSCONDUCTANCE (S)1025oC

175oC

420051015102101

TJ , JUNCTION TEMPERATURE (oC)

20PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

1025oC

175oC
10.1

250.40.81.21.6
VSD , SOURCE TO DRAIN VOLTAGE (V)

0I D , DRAIN CURRENT (A)FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT2.0

FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20VGS, GATE TO SOURCE (V)ID = 14A
VDS = 50V

16VDS = 20V
12VDS = 80V
8400612182430QG , GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE5©2002 Fairchild Semiconductor Corporation

IRF530 Rev. B1

IRF530
Test Circuits and Waveforms
VDS

BVDSStPLVDSIASVARY tP TO OBTAIN

VDD+RGREQUIRED PEAK IAS

-VGS

VDD

DUT
tP

0V

0IAS
0.01Ω

tAV

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUITFIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tONtOFFtd(ON)

td(OFF)
tftr
VDS
RL

90%+RG-10%

10%0VDD

90%

90%

DUT

VGS
050%50%
PULSE WIDTH

10%VGSFIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUITVDS(ISOLATEDSUPPLY)CURRENTREGULATOR12V
BATTERY

0.2µF

VDD
Qg(TOT)

SAME TYPEAS DUT50kΩ

Qgd
Qgs

0.3µF

DIg(REF)

VDS
DUT

G0S

0
IG CURRENTSAMPLINGRESISTOR

VGS

VDSID CURRENTSAMPLINGRESISTOR

FIGURE 19. GATE CHARGE TEST CIRCUIT

IG(REF)
0FIGURE 20. GATE CHARGE WAVEFORMS

6©2002 Fairchild Semiconductor Corporation

IRF530 Rev. B1TRADEMARKSThe following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOS™
EnSigna™
FACT™
FACT Quiet Series™
FAST®

FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™

PACMAN™
POP™
Power247™
PowerTrench®
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER®
SMART START™
STAR*POWER™
Stealth™

SuperSOT™-3
SuperSOT™-6
SuperSOT™-8SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET®
VCX™

STAR*POWER is used under license

DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANYPRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANYLIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTORCORPORATION.
As used herein:
2. A critical component is any component of a life support
1. Life support devices or systems are devices or systems
device or system whose failure to perform can bewhich, (a) are intended for surgical implant into the body,reasonably expected to cause the failure of the life supportor (b) support or sustain life, or (c) whose failure to perform
device or system, or to affect its safety or effectiveness.
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected toresult in significant injury to the user.

PRODUCT STATUS DEFINITIONSDefinition of Terms
Datasheet Identification

Product Status

Definition

Advance Information

Formative or In
DesignThis datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.

PreliminaryFirst Production

This datasheet contains preliminary data, andsupplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improve
design.

No Identification NeededFull Production

This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. H4

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