# Multi-line input network for class EF inverter with enhanced design flexibility

Baptiste Daire, Christian Martin, Fabien Sixdenier, Charles Joubert, Loris Pace

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Baptiste Daire, Christian Martin, Fabien Sixdenier, Charles Joubert, Loris Pace. Multi-line input network for class EF inverter with enhanced design flexibility. The 26th European Conference on Power Electronics and Applications, GDR SEEDS France & EPE Association, Mar 2025, Paris, France. 10.34746/epe2025-0125. hal-05097447

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Distributed under a Creative Commons Attribution 4.0 International License
Multi-line input network for class EF inverter with enhanced
design flexibility

Baptiste Daire, Christian Martin, Fabien Sixdenier, Charles Joubert, Loris Pace

Universite Claude Bernard Lyon 1, Ampère, UMR5005, INSA Lyon, Ecole Centrale de Lyon,
CNRS, Villeurbanne, F-69100, France

***Index Terms***—VHF, resonant converter, class EF amplifier, ZVS/ZdVS converter, transmission line

***Abstract***—This paper addresses a new input network for the class EF inverter, which utilizes multiple transmission lines instead of the commonly used quarter-wave line. Experimental demonstrations at 15 MHz with 40 W output power are conducted, showcasing that enhanced performance can be achieved with the proposed input network.

I. INTRODUCTION

The class EF inverter/amplifier, which is based on the
behavior of a quarter-wavelength transmission line, was
first introduced in [1]. Due to its soft-switching operating
conditions and the reduced voltage stress imposed on
the switch compared to the class E amplifier [2]–[4],
it quickly attracted the attention of the Very High Fre-
quency (VHF) power conversion community. This inter-
est led to the development of the class Φ₂ inverter [5] in
which the bulky input transmission line is replaced by
lumped elements. Today, the class Φ₂ inverter is among
the most widely used topologies for 10+ MHz power
conversion. However, as operating frequencies increase,
the tuning process becomes increasingly challenging.
Consequently, the class Φ₂ inverter may not be optimal
for power conversion beyond 100 MHz, where the con-
ventional class EF topology offers distinct advantages.
Additionally, the class EF inverter has gained interest
as a Switch Mode Power Amplifier (SMPA) in RF
applications [6]–[8], due to the aforementioned benefits.
As a result, improving the overall performance of this
inverter is essential, as it is likely to see broader adoption
in the future. This paper aims to present a simple mod-
ification of the quarter-wavelength transmission line by
introducing a novel input network that enhances design
flexibility. Additionally, the proposed input network is
expected to offer improved performance compared to the
conventional quarter-wavelength transmission line. First,

the general operating principles of the class EF inverter
are described, and theoretical waveforms are provided.
Next, the new input network is introduced, accompanied
by an analytical development of its behavior and a
discussion of its anticipated benefits. Finally, experi-
mental demonstrations of 15 MHz, 40 W output power
class EF inverters employing the new input network are
presented. Since our primary objective is to introduce the
concept and demonstrate the feasibility of this new input
network before addressing technological challenges and
measurement issues, we have intentionally selected a
relatively low switching frequency of 15 MHz for the
experimental implementations. This choice precludes a
direct comparison with prior works, as no low-frequency
class EF inverters using a quarter-wavelength transmis-
sion line are available in the literature to the best of our
knowledge, except for [1]. Consequently, technological
challenges associated with implementing this new input
network at higher frequencies can be addressed by future
designers aiming to develop high-efficiency class EF
inverters.

II. GENERALITIES ABOUT THE CLASS EF INVERTER

A. *Operating principle*

The class EF inverter, whose basic electrical
schematic is depicted in figure 1, consists of the fol-
lowing key components:

* A DC voltage source (V<sub>DC</sub>): Assumed to provide a constant voltage supply.

* A single source-grounded switch: Operating at a switching frequency *F*.

* A quarter-wavelength transmission line: Assumed to be perfectly short-circuited for AC signals due to the presence of the zero internal impedance DC voltage source.

* A series filter (L<sub>1</sub>C<sub>1</sub>): Tuned to the switching frequency *F*, with a quality factor high enough
to ensure that the output current $i_R(\omega t)$ flowing through the load can be expressed as:

$$i_R(\omega t) = I_R \cdot \sin(\omega t + \phi) \quad (1)$$

* A load: Representing an impedance of $R + jL\omega$ at the device's switching frequency $F$.

<figure><img src="image_2.png" /><figcaption>Fig. 1: The class EF inverter</figcaption></figure>

Theoretical waveforms of the class EF inverter are shown in figure 2.

<figure><img src="image_3.png" /><figcaption>Fig. 2: Theoretical waveforms of the class EF inverter</figcaption></figure>

Note that the voltage across the switch reaches twice the input voltage, and the device operates under full soft-switching conditions:

* Zero Voltage Switching (ZVS) at the turn-off.

* Zero Voltage Switching (ZVS) and Zero derivative Voltage Switching (ZdVS, which is equivalent to a Zero Current Switching (ZCS)) at the turn-on.

## B. Design equations of the class EF inverter

According to [9], the required values of $R$ and $L$ are linked to the output power $P$ delivered by the inverter, the value of $C_s$, the switching pulsation $\omega = 2\pi F$, and the input voltage $V_{DC}$ by the following equations:

$$R \cdot \omega C_s = \frac{1}{\pi} \cdot \sin^2(\theta) \quad (2)$$

$$L\omega \cdot \omega C_s = \frac{1}{\pi} (\theta - \sin(\theta) \cdot \cos(\theta)) \quad (3)$$

$$\frac{P}{\omega C_s \cdot V_{DC}^2} = \frac{2}{\pi} \cdot \frac{1}{\tan^2(\frac{\theta}{2})} \quad (4)$$

Where the value of $\theta$ corresponds to the time required by the circuit to charge and discharge the shunt capacitor $C_s$, as shown in figure 2. Based on the theoretical shape of the $v_{ds}(\omega t)$ voltage, the duty cycle $D$ used to drive the switch is given by equation (5):

$$D = \frac{1}{2} - \frac{\theta}{2\pi} \quad (5)$$

## III. PROPOSED IMPROVEMENT

### A. Generalities about transmission lines

A fundamental circuit that is commonly used to model a transmission line is called the RLCG model and is depicted in figure 3 where:

* $R$: linear resistor [Ω/m]

* $L$: linear inductor [H/m]

* $C$: linear capacitor [F/m]

* $G$: linear conductance [S/m]

Note that these four parameters are assumed to be constant along the line.

<figure><img src="image_4.png" /><figcaption>Fig. 3: RLCG model</figcaption></figure>
In the specific case of a lossless line (i.e., $R = G = 0$), the analytical description of this circuit leads to the following expression for $Z_{in}$:

$$Z_{in} = Z_0 \cdot \frac{Z_l + j \cdot Z_0 \cdot \tan(\beta\ell)}{Z_0 + j \cdot Z_l \cdot \tan(\beta\ell)} \quad (6)$$

where:

$$\left\{ Z_0 = \sqrt{\frac{L}{C}} \qquad \beta = 2\pi f \cdot \sqrt{LC} \right. \quad (7)$$

In these conditions, the value of $\beta\ell$ can naturally be expressed as:

$$\beta\ell = 2\pi\ell \cdot \sqrt{LC} \cdot f \quad (8)$$

This value is called the electrical length of the considered transmission line.

## B. Transformation process of the input network

The first step is to analyze a lossless, short-circuited transmission line with a physical length of $\ell$ and a characteristic impedance of $Z_0$, as illustrated in figure 4.

<figure><img src="image_5.png" /><figcaption>Fig. 4: A single line terminated by a short circuit</figcaption></figure>

In this scenario, the transmission line is terminated with a short-circuit, resulting in a value of $Z_l$ equal to zero in equation (6). Consequently, the impedance $Z_{L0}$ observed at the input of the transmission line can be expressed as:

$$Z_{L0} = j \cdot Z_0 \cdot \tan(\beta\ell) \quad (9)$$

Next, we examine a short-circuited transmission line that is half the length of the previous one, with a characteristic impedance that is twice as high. This scenario is illustrated in figure 5a.

<figure><img src="image_6.png" /><figcaption>Fig. 5: Two cases under investigation: (a) a single transmission line terminated by a short circuit, and (b) a single transmission line terminated by an open circuit.</figcaption></figure>

In this particular case, the impedance $Z_{SC}$ observed at the input of the transmission line can be expressed as follows:

$$Z_{SC} = j \cdot 2 \cdot Z_0 \cdot \tan(\beta\ell/2) \quad (10)$$

Now, let us consider the scenario shown in figure 5b, where a transmission line with a physical length of $\ell/2$ and a characteristic impedance of $2 \cdot Z_0$ is terminated with an open-circuit. Therefore, the value of $Z_l$ in equation (6) can be set to $+\infty$. In this case, the impedance $Z_{OC}$ observed at the input of the transmission line can be expressed as:

$$Z_{OC} = \frac{2 \cdot Z_0}{j \cdot \tan(\beta\ell/2)} \quad (11)$$

Finally, we examine the specific case where the two aforementioned transmission lines are arranged in parallel, as depicted in figure 6.

<figure><img src="image_7.png" /><figcaption>Fig. 6: Specific case where two lines are arranged in parallel</figcaption></figure>

In this case, the impedance $Z_{L1}$ observed at the input of this network is equal to the parallel combination of the impedances of the individual lines. In other words, $Z_{L1}$ can be expressed as:

$$Z_{L1} = Z_{OC} \parallel Z_{SC} \quad (12)$$

Substituting the values of $Z_{SC}$ and $Z_{OC}$ from equations (10) and (11), respectively, leads to:

$$Z_{L1} = j \cdot 2 \cdot Z_0 \cdot \frac{\tan(\beta\ell/2)}{1 - \tan^2(\beta\ell/2)} \quad (13)$$

Given that:

$$\tan^2(a) = 1 - \frac{2 \cdot \tan(a)}{\tan(2 \cdot a)} \quad (14)$$

equation (13) can be rewritten as:

$$Z_{L1} = Z_{L0} = j \cdot Z_0 \cdot \tan(\beta\ell) \quad (15)$$

This implies that the impedance of the short-circuited line shown in figure 4 can be replicated by using two lines, each half the length of the original, arranged as depicted in figure 6. Furthermore, the same procedure can be applied to replicate the behavior of the resulting short-circuited line in figure 6. Consequently, the behavior of the original line in figure 4 can be reproduced using the circuit shown in figure 7.
<figure><img src="image_8.png" /><figcaption>Fig. 7: Three lines that act as the single line depicted in figure 4</figcaption></figure>

As a result, the value of the impedance $Z_{L2}$ is equal to:

$$Z_{L2} = Z_{L1} = Z_{L0} \quad (16)$$

Theoretically, this process of dividing the short-circuited line into progressively shorter segments with higher characteristic impedance can be applied infinitely.

### C. Application to the class EF inverter

Since the input quarter-wavelength transmission line of the class EF inverter behaves like the short-circuited transmission line shown in figure 4 for AC signals, it can be easily replaced by other input networks composed of shorter lines, as explained earlier. This approach results in a new family of class EF inverters utilizing multiple transmission lines, with the general configuration illustrated in figure 8. For convenience, and due to the X-shaped structure of the modified input network, this new family of inverters is referred to as the class $EF_{Xk}$ in this paper, where $k$ denotes the number of lines left open. It should be emphasized that the class $EF_{X1}$ configuration has been investigated in [6] and [10], where it was shown that its efficiency surpasses that of the class EF inverter in its initial configuration, i.e., with a quarter-wave line at the input.

<figure><img src="image_9.png" /><figcaption>Fig. 8: General form of a class $EF_{Xk}$ inverter for $k \ge 1$</figcaption></figure>

### D. Expected improvements

The following improvements are expected when using the class $EF_{Xk}$ inverter instead of the conventional class EF inverter:

* The new input network is expected to offer increased flexibility in terms of the converter's geometrical design. Consequently, the designer has the freedom to choose one input network over another based on the imposed physical constraints.

* By reducing the distance traveled by current harmonics, a class $EF_{Xk}$ inverter is anticipated to result in higher efficiencies. While using multiple shorter lines to replicate the behavior of a single line helps reduce in-line losses, this should be approached cautiously. The losses in a line depend on both its length and attenuation, meaning that using two lower-quality lines to replicate the behavior of a single high-quality line may not necessarily improve performance.

* A portion of the even harmonic currents now flows through open stubs, which act as perfect virtual short-circuits. As a result, the current harmonics bypass both the input decoupling capacitor and its parasitic resistance, leading to reduced power dissipation.

* Building upon the second point, using multiple lines instead of a single line is expected to reduce the attenuation of high-order voltage harmonics. This theoretically results in less distorted drain-to-source waveforms.

## IV. EXPERIMENTAL DEMONSTRATIONS

In this section, experimental implementations and comparisons of the class EF, $EF_{X1}$, and $EF_{X2}$ inverters are conducted to demonstrate the feasibility of the multiple-line input networks. For a more accurate and reliable analysis, the same Printed Circuit Board (PCB) is used for all converters, with only the transmission line input network being modified between them. Specifically, all input networks are constructed using coaxial cable assemblies, allowing for easy switching between converters by simply replacing the input network. This plug-and-play setup ensures that all components remain consistent, with the exception of the transmission line-based input network.

### A. Design of a conventional class EF inverter

First, let us consider a conventional class EF inverter as represented on figure 1. A $F = 15$ MHz switching frequency, $P = 40$ W output power, and a $V_{DC} = 20$ V input voltage operating point were selected for the converter design. For convenience, the $C_s$ capacitance consists solely of the time related output capacitance $C_{oss}(tr)$ of the switch [11], which was calculated to be equal to 440 pF for a maximum drain voltage of
<figure><img src="image_10.png" /><figcaption>Fig. 9: The electrical diagrams of the three EF<sub>Xk</sub> class inverters and pictures of their experimental implementations</figcaption></figure>

2 · V<sub>DC</sub> = 40 V. Therefore, equation (4) can be used to express the value of θ as:

$$ \theta = 2 \cdot \arctan \left( \sqrt{\frac{2}{\pi} \cdot \frac{\omega C_s \cdot V_{DC}^2}{P}} \right) = 0.949 \quad (17) $$

Note that the ideal value of the duty cycle *D*, which theoretically ensures soft switching conditions, can be determined using equation (5) and is found to be 34.8%. Substituting this value of θ into equations (2) and (3) yields the following values for *R* and *L*:

$$ R = \frac{\sin^2(\theta)}{\pi \omega C_s} = 5.1 \ \Omega \quad (18) $$

$$ L = \frac{\theta - \sin(\theta) \cdot \cos(\theta)}{\omega \cdot \pi \omega C_s} = 39 \ \text{nH} \quad (19) $$

For the implementation of the $L_1C_1$ output filter, the following relationship must be satisfied:

$$ L_1 \cdot C_1 = \frac{1}{\omega^2} \quad (20) $$

The selection of $L_1$ and $C_1$ is a compromise between ease of implementation and the filter's ability to attenuate higher-order harmonics. The following values were chosen:

$$ C_1 = 660 \ \text{pF} \quad (21) $$

$$ L_1 = 170 \ \text{nH} \quad (22) $$

Finally, table I lists all the components used in practice to implement the 15 MHz, 40 W class EF inverter.

<table><caption>TABLE I: Components used to realize the inverter</caption><thead><tr><th>Name</th><th>Reference</th><th>Value</th></tr></thead><tbody><tr><td><i>R</i></td><td>MP9100-5.00-1%</td><td>5 Ω</td></tr><tr><td><i>L</i> + <i>L</i><sub>1</sub></td><td>2929SQ-221-GEC</td><td>220 nH</td></tr><tr><td><i>C</i><sub>1</sub></td><td>100B331JW600XC100</td><td>2x330 pF</td></tr><tr><td>Decoupling caps</td><td>CKG57NX7R2E105M500JH<br>CB037E0104KBA</td><td>2x1 μF<br>2x0.1 μF</td></tr><tr><td>Transistor</td><td>GS61008P (<i>C</i><sub>s</sub> = <i>C</i><sub>oss(tr)</sub> = 440 pF @ 40 V)</td><td></td></tr><tr><td>Driver</td><td>UCC27611</td><td></td></tr></tbody></table>

## B. Implementation and comparison of input networks

In this section, the experimental implementation of the input networks for the three converters, namely EF, EF<sub>X1</sub>, and EF<sub>X2</sub>, is presented. These networks are illustrated in figures 9a, 9b, and 9c, respectively, while table II provides the physical parameters of the coaxial cables used in practice. For the operating switching frequency, the corresponding wavelength is approximately 14 meters when using a PTFE coaxial cable, meaning that a λ/4 length corresponds to a 3.5-meter coaxial cable. Note that the characteristic impedance of the RG180B/U coaxial cable, which is used to implement the class EF<sub>X2</sub> inverter, is only 95 Ω whereas it should
<figure><img src="image_11.png" /><figcaption>Fig. 10: Measured absolute values of impedances of the three input networks $Z_{L0}$, $Z_{L1}$ and $Z_{L2}$</figcaption></figure>

theoretically be 100 Ω to ensure the desired behavior of the input network. This discrepancy arises from the challenges encountered in sourcing a 100 Ω coaxial cable from manufacturers. However, the 5 Ω difference between the theoretical and practical characteristic impedances does not significantly affect the overall response of the input network, as shown in figure 10, where the measured impedances $Z_{L0}$, $Z_{L1}$ and $Z_{L2}$ of the three input networks are plotted.

<table><caption>TABLE II: Physical parameters of the coaxial cables used in order to realize the different input networks</caption><thead><tr><th>Name</th><th>Z<sub>a</sub></th><th>Z<sub>b</sub></th><th>Z<sub>c</sub></th></tr></thead><tbody><tr><td>Caract. imped.</td><td>25 Ω</td><td>50 Ω</td><td>95 Ω</td></tr><tr><td>Manufacturer</td><td colspan="3">QAXIAL</td></tr><tr><td>Reference</td><td>RG316/25</td><td>RG303/U</td><td>RG180B/U</td></tr><tr><td>Dielectric</td><td colspan="3">PTFE (Poly Tetra Fluor Ethylene)</td></tr><tr><td>ε<sub>r</sub></td><td colspan="3">2.04</td></tr><tr><td>tan(δ)</td><td colspan="3">0.0003</td></tr><tr><td>A @ 100 MHz</td><td>33 dB/100m</td><td>12.6 dB/100m</td><td>21 dB/100m</td></tr><tr><td>Measured R<sub>DC</sub></td><td>62 mΩ/m</td><td>78 mΩ/m</td><td>631 mΩ/m</td></tr></tbody></table>

Figure 10 shows that the input networks of class $EF_{X1}$ and $EF_{X2}$ inverters (i.e. $Z_{L1}$ and $Z_{L2}$ respectively) appear to better approximate the ideal behavior of a quarter-wavelength transmission line at higher frequencies. We believe this phenomenon is due to the use of multiple lines instead of a single one: since each frequency follows its own dedicated path through an open stub, the distance traveled by the wave is shortened, thus minimizing the relative delay induced by the variation of relative permittivity at higher frequencies.

### C. Experimental waveforms

Experimental waveforms are captured using a 1 GHz passive probe (TPP1000 from Tektronix) in conjunction with an MSO 5104 Mixed Signal Oscilloscope from Tektronix. Figure 11 displays the superimposed drain-to-source voltages and output voltages of the three inverters.

Additional experimental waveforms are shown in figure 12, where the drain-to-source voltage of the three inverters is presented for various duty cycles and input voltages.

<figure><img src="image_12.png" /><figcaption>Fig. 11: Superposed drain-to-source voltages and output voltages at nominal operating point</figcaption></figure>

Note that the ideal square wave drain-to-source voltage, as shown in figure 2, is not achieved here due to the imperfections of the coaxial cables used. However, the $EF_{X1}$ and $EF_{X2}$ inverters appear to provide better drain-to-source voltages compared to the conventional class EF inverter, as discussed in part III.D. Specifically, the voltage overshoot at the switch turn-off is reduced from approximately 5 V when using a modified input network with a 20 V input voltage.

### D. Measured efficiency of proposed inverters

In order to measure the efficiency of the class EF inverter, the process detailed in [10] has been followed. Results of efficiency measurements are presented on figure 13.
<figure><img src="image_13.png" /><figcaption>(a) $V_{DC} = 20$ V and $D = 35\%$</figcaption></figure>

<figure><img src="image_14.png" /><figcaption>(c) $V_{DC} = 10$ V and $D = 35\%$</figcaption></figure>

<figure><img src="image_15.png" /><figcaption>(b) $V_{DC} = 20$ V and $D = 25\%$</figcaption></figure>

<figure><img src="image_16.png" /><figcaption>(d) $V_{DC} = 20$ V and $D = 45\%$</figcaption></figure>

<figure><img src="image_17.png" /><figcaption>Fig. 13: Measured efficiency of the three inverters</figcaption></figure>

Both the efficiencies of the class EF<sub>X1</sub> and EF<sub>X2</sub> inverters are higher than that of the conventional class EF inverter.

# V. DISCUSSION

## A. Technological challenge

As explained previously, the measured efficiencies of the three inverters must be interpreted with caution, as the quality of the coaxial cables used to construct the different input networks greatly influences the overall measured efficiencies. For example, the efficiency of

the class EF<sub>X2</sub> inverter is notably reduced by the DC resistance of its input network. When a 20 V input voltage $V_{DC}$ is applied, 33 W of output power $P$ and an overall efficiency $\eta$ of 87% were measured. This implies that a 1.9 A DC current flows through the input network of the class EF<sub>X2</sub> inverter, whose DC resistance $R_{DC}$ was measured to be 552 mΩ. As a consequence, 2 W are lost in the input network of the class EF<sub>X2</sub> inverter due to the DC current alone. In comparison, and following the same calculation process for the class EF<sub>X1</sub> inverter, only 0.7 W are lost in the lines due to the DC current. Hence, this 1.3 W difference in lost power accounts for the significantly lower measured efficiency of the class EF<sub>X2</sub> inverter compared to the class EF<sub>X1</sub> inverter.

## B. Integration challenge

In this paper, we have deliberately chosen a relatively low 15 MHz switching frequency for tuning the inverters. This choice simplifies measurement and allows for a better temporal analysis of various phenomena occurring in the proposed inverters. However, due to the significant length of the transmission lines used, integration at such a frequency is impractical. This integration issue
is expected to be less significant at higher switching frequencies, where shorter lines can be employed:

* In the RF field, transmission-line-based components are commonly used to realize GHz+ amplifiers, so the integration of these lines is possible.

* In the VHF field, topologies operating near 100 MHz are often presented. Although such switching frequencies are not yet high enough to favor transmission-line-based components, the use of lumped components remains the standard. Nevertheless, we believe that the trend toward higher switching frequencies will continue, and the use of transmission-line-based components could provide solutions to future technological challenges.

## VI. CONCLUSION

To conclude, this paper presents a new input network for the class EF inverter. The behavior of the modified input network is analytically discussed, and several experimental implementations are provided to demonstrate the feasibility and offer insights into the overall performance of this new input network. Preliminary experimental results show that improved performance can be achieved in several areas. Specifically, the new input networks seem to reduce distortion in the drain-to-source voltages. Moreover, higher overall efficiencies were measured when using the modified input networks, compared to the conventional quarter-wavelength transmission line.

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