# Three-phase Active-Split source inverter with step-up/step-down DC bus voltage capabilities for traction application

Antoine Sabrié, Alexandre Battiston, Jean-Yves Gauthier, Xuefang Lin-Shi

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Antoine Sabrié, Alexandre Battiston, Jean-Yves Gauthier, Xuefang Lin-Shi. Three-phase Active-Split source inverter with step-up/step-down DC bus voltage capabilities for traction application. The 26th European Conference on Power Electronics and Applications, GDR SEEDS France & EPE Association, Mar 2025, Paris, France. 10.34746/epe2025-0165. hal-05108333

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# Three-phase Active-Split source inverter with step-up/step-down DC bus voltage capabilities for traction application

(1,2) Antoine Sabrié, (1) Alexandre Battiston, (2) Jean-Yves Gauthier, (2) Xuefang Lin-shi,

(1) IFP Energies nouvelles - Institut Carnot IFPEN Transport Energie
1 et 4 Avenue de Bois Préau, 92852 Rueil-Malmaison, France

(2) Univ Lyon, INSA Lyon, Université Claude Bernard Lyon 1, Ecole Centrale de Lyon, CNRS
Ampère UMR 5005, 69621 Villeurbanne, France
antoine.sabrie@ifpen.fr alexandre.battiston@ifpen.fr
jean-yves.gauthier@insa-lyon.fr xuefang.shi@insa-lyon.fr

***Index Terms***—Voltage Source Inverter (VSI), DC-AC converter, single-stage, Split-source inverter, Buck-Boost converter.

***Abstract***—This paper aims at proposing a new single stage DC-AC inverter with both step-up and step-down DC bus voltage capability. For a two-level inverter, the low speed operation points induce low modulation index values and poor efficiency. The proposed topology can operate in a new step-down mode to drive the motor with a DC bus voltage lower than the source for low-speed region, while still benefiting of an unaltered step-up function of the DC bus voltage. Meaning that the addition of the step-down function does not induce additional losses during step-up operation. The converter is validated both by simulation and experimentally. In step-down mode, reduced phase current ripple can be achieved, as well as reduced DC-link capacitor temperature.

## I. INTRODUCTION

In Automotive traction application the two-level Voltage Source Inverter (VSI) has been used extensively due to its maturity, simplicity of implementation, its reliability and its cost. However, the DC bus voltage is fixed, it can fluctuate with the state of charge of the battery. The maximal attainable operating points are thus limited by the DC bus voltage supplied by the source. To tackle this difficulty, industrial have introduced a second stage of conversion using DC-DC Boost converter interfaced upstream of the VSI as depicted in Fig. 1. This configuration if for instance used in Toyota Prius, where the DC bus can be elevated from 200 to at most 650V [1]. Whereas the usual DC bus voltages are often around 350 – 400V [2]. This usage of the second stage of conversion have not yet reached consensus. Indeed, the added stage of conversion increases cost, and reduces reliability and power density. While extending the

torque-speed characteristic of the inverter-fed electrical machine and increasing the maximum power compared to VSI supplied by 400V battery, the discussion of the relevance of adding the second conversion stage are still ongoing. In the literature, numerous studies try to compare both configurations [3–7]. Most of the studies seem to conclude in favor of adding the Boost converter due to better efficiency over a normalize WLTC drive cycle. In [8], the authors states that lower temperatures are achieved when using the Boost. The authors in [9–11] state that at higher voltages when flux-weakening techniques are used, the added losses of the Boost converter are increased compared to the VSI supplied at 400V. If some authors conclude that there is a real advantage to this second configuration, it is necessary to qualify the statement, as done in [12]. Indeed, in most of the studies higher efficiency of the two-stage solution is reported when the battery voltage is only slightly elevated, lower than the compared battery voltage, meaning when $V_{DC}$ is varied between 200–400V. When the two-stage solution operated at lower DC bus voltage than the initial 400V of the two-level VSI configuration, the switching losses of the inverter are lower. Better THD of the voltages fed to the machine thanks to higher modulation indexes and reduced DC-link capacitors temperature [13]. While the two-stage configuration will suffer more losses at higher voltages and higher regimes, it is in fact undeniable that when the DC bus voltage is lower than the otherwise used battery voltage, the drive train will benefit from it. One might then question the potential usage of a DC bus voltage step-down function. This function would enable us to optimize the drive train in low speed regions, as well as reducing constraints to connect sources with very fluctuating DC voltages. For the latter case, the step-down function as already been proposed for fuel
cell application [14]. However, the topology suffers from added losses when using the step-up function.

<figure><img src="image_2.png" /><figcaption>Fig. 1: Two-stage DC-DC Boost and two level VSI configuration.</figcaption></figure>

<figure><img src="image_3.png" /><figcaption>Fig. 2: Single-stage only step-up Bidirectional Active-Split source inverter proposed in [15].</figcaption></figure>

In this paper, we aim at proposing a new DC-AC inverter topology with both step-up and step-down DC bus voltage capabilities. A two stage of a solution offering the function is depicted in Fig. 3. It considers a Buck-Boost topology interfaced upstream the VSI. The main drawback of such a solution is that the added semiconductors to enable the reduction of the DC bus voltage would add losses when the elevation of the DC bus is used. In previous work, we proposed a single-stage step-up inverter based on split source topologies [16–20] called Bidirectional Active split source Inverter (B-ASSI) [15]. This topology is depicted in Fig. 2. In this paper, a new topology based on the B-ASSI is derived. The proposed topology offers the step-down function without affecting nor increasing losses when stepping-up the DC bus voltage. Thus enabling us to optimize the drive train when stepping down the DC bus voltage is permitted while still gaining the advantages of the increased maximum power achieved by the machine.

The paper is organized as follows, first the derived topology is analyzed and modelled. Simulation results, experimental results and

<figure><img src="image_4.png" /><figcaption>Fig. 3: Two-stage configuration with a DC-DC 4 switch Buck-Boost converter and a VSI</figcaption></figure>

<figure><img src="image_5.png" /><figcaption>Fig. 4: Proposed topology based on the B-ASSI offering both step-up and step-down DC bus voltage capability.</figcaption></figure>

## II. ANALYSIS AND STEADY-STATE MODEL OF THE PROPOSED BUCK-B-ASSI

The proposed topology is called the Buck-B-ASSI (BB-ASSI) and is presented in Fig. 4. Compared to the classical B-ASSI, a new coupled inductor is introduced, enabling the topology to perform with a DC bus voltage lower than the input voltage. The B-ASSI is a structure that can alternate between inductor charge state and discharging states during any active or zero sequence state of the inverter. The adequate control of the switches connected to the middle point of the inverter legs offer this degree of freedom. Such control is necessary to offer completely decoupled control over the load operating conditions and the desired DC bus voltage. This degree of freedom as well as ensuring regenerative capability was needed in automotive traction application. The B-ASSI can be modelled in the exact same manner as a Boost converter, and can thus only achieve boost operation over the DC bus voltage. If the DC bus voltage was to be inferior to the input voltage, the discharging inductor state would not be achievable. However, for the proposed Buck-B-ASSI, with the added transistor in the secondary side, a discharging state can be achieved in this condition. This discharging state is depicted in Fig. 5a and is achieved by imposing the command signals $C_{a1}$, $C_{b1}$ and $C_{c1}$ of the transistor as stated in (1).

$$C_{a1} = C_{b1} = C_{c1} = \overline{C_{\text{buck}}} \quad (1)$$
<figure><img src="image_6.png" /><figcaption>Fig. 5: Conduction mode of the BB-ASSI: (a) - Discharging inductor state, (b) - Charging inductor state for the zero sequence state $V_{000}$.</figcaption></figure>

<figure><img src="image_7.png" /><figcaption>Fig. 6: Virtual schematics of the BB-ASSI in Buck Mode considered for its modelling.</figcaption></figure>

This state forces open the three switches $C_{a1}$, $C_{b1}$ and $C_{c1}$ and the transistor $C_{buck}$ turns ON. This state is a forbidden state for the B-ASSI, which would create a discontinuity of the inductor current. For the BB-ASSI however, it will force the discharge in the of the stored energy in the secondary side due to continuity of the flux in the coupled inductor. The duration of the discharging state is set by the desired DC bus voltage. On the contrary, the charging inductor state is achieved for any previous state of the B-ASSI when in Buck Mode. Meaning, the modulation, and the state of the converter can be kept as normally intended [15]. When operating in Buck mode, the command signals $C_{a1}$, $C_{b1}$

and $C_{c1}$ must respect (1). Meaning, they can be seen as a single switch with three parallelized transistors. Thus, similarly where the DC-DC functionality of the B-ASSI could be modelled as a Boost converter, the BB-ASSI can be schematically be represented as a non-isolated Flyback converter. This Flyback converter representation is depicted in Fig. 6, where the load current would represent the current absorbed to the electrical machine averaged over the switching frequency. This simplified representation can enable us to derive the steady-state model of the DC-DC function of the converter similarly as the Flyback converter, as given in (2).

$$ \frac{V_{DC}}{V_{in}} = \frac{N_2}{N_1} \frac{M_{DC}}{1 - M_{DC}} \qquad (2) $$

Where $M_{DC}$ is the duty cycle of the DC-DC function of the converter, and $1 - M_{DC}$ describes the duration of the discharging inductor state that needs to be applied. $N_1$ and $N_2$ refers to the number of turn of the primary and the secondary side of the coupled inductor.

<figure><img src="image_8.png" /><figcaption>Fig. 7: Illustration of the working principle of the BB-ASSI over two switching periods.</figcaption></figure>

The Fig. 7 illustrate the working principle in the switching period $t_{sw}$ in Buck Mode. The command signals for the inverter leg can be obtained with any modulation. The one used is the same one as the B-ASSI in [15]. The same goes for the command signals of $C_{a2}$, $C_{b2}$ and $C_{c2}$ which enables bidirectional power flow at any load operating condition, as well as preventing any shoot-through phenomenon. In Boost Mode, the command signals $C_{a1}$, $C_{b1}$ and $C_{c1}$ are generated with dedicated duty cycles for each leg. In Buck Mode, however, the no duty cycles are required since all three duty cycles of the inverter legs only need to be compared to the value $1 - M_{DC}$ and can thus generate from this comparison with the same carrier wave the command $C_{buck}$ and $C_{abc1}$.
The BB-ASSI is in fact as a Buck-Boost inverter, as seen in (2). However, since the B-ASSI is already a boosting topology, only the Buck Mode is used. As stated in the introduction, the main advantage of the BB-ASSI resides in the fact that if the Buck Mode is not needed anymore, the transistor $C_{buck}$ can be turned OFF, disconnecting the secondary side. The B-ASSI can then be operated in an unaltered elevation Mode without any added losses due to the Buck function.

### III. SIMULATION RESULTS

A simulation of the proposed converter is carried out with a Permanent Magnet Synchronous Machine (PMSM) in Matlab/Simulink and SimScape, and SimPowerSystems toolboxes. The motor is speed-controlled using classical Field Oriented Control (FOC), and the different parameters used for the simulation are reported in Tab. I.

<table><caption>TABLE I: Simulated Motor and converter parameters.</caption><thead><tr><th>Parameter</th><th>Symbol</th><th>Value</th></tr></thead><tbody><tr><td>Battery Voltage</td><td>V<sub>in</sub></td><td>20V</td></tr><tr><td>Split source Inductor</td><td>L<sub>SSI</sub></td><td>16μH</td></tr><tr><td>DC bus Capacitor</td><td>C</td><td>200μF</td></tr><tr><td>Motor Nominal Voltage</td><td>V</td><td>60V</td></tr><tr><td>Switching frequency</td><td>f<sub>sw</sub></td><td>30kHz</td></tr><tr><td>Number of pole pairs</td><td>p</td><td>4</td></tr><tr><td>Motor Inductance</td><td>L<sub>s</sub></td><td>10μH</td></tr><tr><td>Motor Resistance</td><td>R<sub>s</sub></td><td>5mΩ</td></tr><tr><td>Flux linkage</td><td>φ<sub>f</sub></td><td>9.5.10<sup>-3</sup>Wb</td></tr><tr><td>Motor inertia</td><td>J</td><td>2.8.10<sup>-6</sup>kg.m<sup>2</sup></td></tr><tr><td>Friction coefficient</td><td>f</td><td>5.2.10<sup>-6</sup>N.m.s/rad</td></tr><tr><td>Speed reference</td><td>ω<sup>*</sup></td><td>[0-15000 rpm]</td></tr><tr><td>Maximal load Torque</td><td>Γ<sub>ch</sub></td><td>15 Nm</td></tr></tbody></table>

For all simulation, the regime of the motor is represented, the DC bus voltage and input voltage, the applied duty cycle, the modulation index, and the phase current $i_{abc}$. The first simulation test case is represented in Fig. 8. This enables to validate that the Buck Mode of the converter is achieved, since the DC bus is regulated at 10V from an input voltage of 20V. It can be seen that the load can be operated independently of the DC bus voltage. Indeed, the modulation index can achieve its highest value at 10V, and the DC bus voltage could for instance be set at a higher value to reach higher speed.

Secondly, it is verified by simulation in Fig. 9, that a smooth transition can be achieved between Buck and Boost mode. It also verified that the Boost mode is unaltered. Indeed, it can be seen that the current in the secondary side of the coupled induction is null during boost stage. In this simulation, one advantage of introducing the Buck mode can be seen. Indeed,

<figure><img src="image_9.png" /><figcaption>Fig. 8: Validation of the load control over its entire operating range with a regulated DC bus voltage $V_{DC} = V_{in}/2$</figcaption></figure>

normally for low regimes the modulation is close to zero, and the waveform fed to the machine suffers from it with very high Total Harmonic Distortion (THD). In facts, those operation points at low speeds exhibit the worst working efficiency normally for the inverter. Here it can be seen that since the DC bus voltage is gradually decreased from 15 to 10V that the ripple current of the phase current are dramatically reduced. This will reduce the losses in the machine as well as for the inverter legs for the price of added losses on the secondary side and in the coupled inductor.

Lastly, Fig. 10 shows the obtained waveform for a step load change from $Γ_{ch} = +2.7N.m$ to $Γ_{ch} = -2.7N.m$. This validates the performance of the converter in generator mode, demonstrating the bidirectional power flow capability of the proposed converter.

### IV. EXPERIMENTAL RESULTS

A prototype of the B-ASSI has been developed, using MOSFETs NTMTS6D0N15MC from ON-semiconductors. Fig. 11 illustrates the prototype as well as the experimental setup on the test bench. The converter is designed as a proof of concept, the proposed modulation of the B-ASSI is implemented in MATLAB/Simulink environment. The converter is used to drive a PMSM in a back-to-back configuration. An 2LVSI is used to drive the second machine. Thus being able to control the torque and speed of the common
<figure><img src="image_10.png" /><figcaption>Fig. 9: Validation by simulation of a transition to Boost Mode to buck Mode with gradually decreased DC bus voltage reference for the same load operating condition.</figcaption></figure>

<figure><img src="image_11.png" /><figcaption>Fig. 10: Validation of the generator mode of the BB-ASSI</figcaption></figure>

shaft. The parameters of the B-ASSI prototype and the driven PMSM are given in Tab. I. For the BB-ASSI, an extension board is realized and presented in Fig. 12. This board replaces the small six inductors of the B-ASSI.

<figure><img src="image_12.png" /></figure>

<figure><img src="image_13.png" /><figcaption>Fig. 11: Experimental validation: (a) – Proposed B-ASSI prototype, (b) – experimental setup</figcaption></figure>

<figure><img src="image_14.png" /><figcaption>Fig. 12: Experimental board for the BB-ASSI with the coupled inductor and additional transistor.</figcaption></figure>

The working principle of the BB-ASSI is experiment-
<figure><img src="image_15.png" /><figcaption>Fig. 13: Experimental validation of Buck operation mode of the BB-ASSI</figcaption></figure>

<figure><img src="image_16.png" /><figcaption>Fig. 14: Simulation of the BB-ASSI with considered leakage inductance non-ideal coupling factor to explain the parasitic phenomenon.</figcaption></figure>

tally validated and is depicted in Fig. 13. Huge voltage spikes can be observed from the $V_{DS}$ voltage of the secondary side transistor each time it turns OFF. This is why, to ensure not working too close to the breakdown voltage, a very small input voltage is imposed. However, a DC bus voltage of 3V is achieved, thus validating the correct Buck operation of the converter. As the Flyback converter, the BB-ASSI does not emancipate itself from the classical problems of the Flyback converters. Indeed, the parasitic elements such as the leakage inductance of the coupled inductor as well as the coupling factor are at the origin of the over-voltages and ringing seen experimentally. In order to prove this lat point, a finer simulation of the converter is conducted with particular care to the simulation of the parasitic elements. It can be seen from this simulation results in Fig. 14 that taking these elements into consideration explain the waveforms of the experimental setup. If one could have expected such results, it also means that classically used solution for the Flyback, such as snubber or active clamps, can also be applied for the BB-ASSI.

## V. EXPLORATION OF THE ADVANTAGES OF THE DC BUS STEP-DOWN FUNCTION

As mentioned, the added Buck capability of the BB-ASSI could optimize the inverter and the electrical machine working condition, especially in low speed regions. It has been confirmed by simulation, reducing the DC bus voltage in low speed regions can improve the THD of the current and voltage fed to the machine as well as drastically reducing the ripple of the phase current. Such improvements could also reduce the Torque ripple at low speed, but still needs to be quantified. Another criteria that could be optimized reside in the thermal management of the DC bus capacitor. The RMS current flowing through those capacitors is calculated in two

<table><caption>TABLE II: Considered parameters for theoretical calculation;</caption><thead><tr><th>Parameter</th><th>Symbol</th><th>Value</th></tr></thead><tbody><tr><td>Battery Voltage</td><td>V<sub>in</sub></td><td>175V</td></tr><tr><td>Split source Inductor</td><td>L<sub>SSI</sub></td><td>16μH</td></tr><tr><td>DC bus Capacitor</td><td>C</td><td>200μF</td></tr><tr><td>Motor Nominal Voltage</td><td>V</td><td>350V</td></tr><tr><td>Switching frequency</td><td>f<sub>sw</sub></td><td>30kHz</td></tr><tr><td>Number of pole pairs</td><td>p</td><td>2</td></tr><tr><td>Motor Inductance</td><td>L<sub>s</sub></td><td>250μH</td></tr><tr><td>Motor Resistance</td><td>R<sub>s</sub></td><td>6.9mΩ</td></tr><tr><td>Flux linkage</td><td>φ<sub>f</sub></td><td>87.78.10<sup>-3</sup>Wb</td></tr><tr><td>Friction coefficient</td><td>f</td><td>0.0019N.m.s/rad</td></tr><tr><td>Speed reference</td><td>ω<sup>*</sup></td><td>[0-25000 rpm]</td></tr><tr><td>Maximal load Torque</td><td>Γ<sub>ch</sub></td><td>130 Nm</td></tr></tbody></table>

different case, considering the parameters of a machine close to traction application given in Tab. II. First, for the BB-ASSI operating in Buck Mode in low speed regions until the DC bus voltage needs to be increased to that of the input voltage. Secondly, this RMS DC bus capacitor current is calculated in the case of the VSI that could not operate at lower DC bus voltage during the entire low speed region. The Fig. 15 represents the difference between the two calculated RMS current for both configuration. It can be seen, that when a negative value means that the RMS current for the VSI will be higher than for the BB-ASSI thus showing that reducing the DC bus voltage can effectively reduce capacitor working temperature.

Finally, the efficiency for the BB-ASSI is calculated as well as the Boost+VSI configuration in the entire Torque Speed characteristic. The loss analysis for the
<figure><img src="image_17.png" /><figcaption>Fig. 15: Difference of DC bus capacitor RMS current between the BB-ASSI and the VSI in low speed regions, considering the turn ratio $N_1/N_2 = 1/8$.</figcaption></figure>

split source topologies is not easily defined due to the specific modulation and the numerous instantaneous current flowing through the different transistors. The used methodology is based on previous work on the B-ASSI and can the details of the derivation can be found in [21]. Considering the WLTC normalized drive cycle, the cumulative energy dissipated in the losses are plotted in Fig. 16. Three topologies are compared. The Boost only two-stage configuration of Fig. 1, the two-stage configuration with both Buck and Boost capability (Fig. 3) and the proposed single-stage conduction with also Buck and Boost capability (Fig. 4). As stated earlier, the two-stage with a 4 switch Buck-Boost converter+VSI does not perform well efficiency wise. Indeed, the added semiconductors will add losses for the entire Torque speed characteristic and not only when the Buck function is used during low speed regions. The BB-ASSI performs well better since the Boost mode is unaltered, but still shows added losses compared to the Boost+VSI solution. However, it has been seen that increasing the number of turn in the secondary side can allow a reduction of the added losses during Buck Mode. Thus, the sizing of the coupled inductor is a key aspect in the potential benefits of the BB-ASSI. Thus, a turn ratio of at least 1:8 should be selected in order to minimize the losses and achieve an efficiency for the drive cycle close to the Boost+VSI. The BB-ASSI exhibit losses close to that of the Boost+VSI or slightly more. However, for the low speed region, the ripple of the phase current of the BB-ASSI will be drastically reduced compared to that of the Boost+VSI, and would exhibit reduced working

<figure><img src="image_18.png" /><figcaption>Fig. 16: Calculated cumulative dissipated energy considering WLTC drive cycle for the three considered topologies</figcaption></figure>

temperature for the DC link of the converter. These advantages, especially for the machine, could prove to be better from a systemic point of view.

## VI. CONCLUSION

This paper introduces a new single-stage topology with both step-up and step-down DC bus voltage capability. It is based on the specific capability of the B-ASSI to be able to cause inductor current discontinuity. The added coupled inductor enables the converter to operate in Buck Mode, without affecting whatsoever the operation of the converter in Boost Mode. Not only a smooth transition between the two modes can be easily obtained, no additional losses are suffered when boosting the voltage due to the added components. The BB-ASSI, with care in the sizing of the passive elements, could prove to be an attractive topology in the efficiency point of view, while enabling the reduction of ripple phase current and of the temperature of the DC link capacitors in the low speed operating points region. Moreover, this functionality can also make it insensitive to voltage variations on the power supply, thus functioning even if the voltage source exhibits a large DC voltage range.

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