# Advancement of the SI-SIDO Boost-Buck-Boost Converter with Continuous Switching Method for Bipolar LVDC Applications

Babak Rooholahi, Hans-Günter Eckel

► To cite this version:

Babak Rooholahi, Hans-Günter Eckel. Advancement of the SI-SIDO Boost-Buck-Boost Converter with Continuous Switching Method for Bipolar LVDC Applications. The 26th European Conference on Power Electronics and Applications, GDR SEEDS France & EPE Association, Mar 2025, Paris, France. 10.34746/epe2025-0064. hal-05081758

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https://utc.hal.science/hal-05081758v1

Submitted on 23 May 2025

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# Advancement of the SI-SIDO Boost-Buck-Boost Converter with Continuous Switching Method for Bipolar LVDC Applications

Babak Rooholahi, Hans-Günter Eckel

University of Rostock
Albert-Einstein-Str. 26
Rostock, Germany

Tel.: +49 / (0381) 498-7285.

E-Mail: babak.rooholahi@uni-rostock.de

URL: http://www.iee.uni-rostock.de

## Keywords

«DC-DC power converter», «LVDC», «Bipolar DC», «Interleaved converters», «SiC MOSFET».

## Abstract

This paper presents the enhanced performance of the single-inductor single-input dual-output boost-buck-boost DC-DC converter with a novel continuous switching method. Building on previous work, this method optimizes performance under varying load and input conditions, enabling higher power applications and greater adaptability for bipolar low voltage DC systems.

## Introduction

The integration of photovoltaic (PV) systems into commercial, residential, and industrial DC grids offers numerous advantages, particularly when these grids can operate without an AC connection. In bipolar DC grids, such as those operating at ± 350 V, DC-DC converters are essential for independently controlling both voltage levels [1]. These bipolar DC grids can either connect to DC-AC inverters for AC grid integration via two-stage PV transformerless configurations or directly supply DC loads and charge batteries [2]. Among DC-DC converters, non-isolated variants are gaining attention due to their inherent benefits, making them suitable for integrating renewable energy sources (RES) into the grid [3]. Recent researches have focused on developing novel non-isolated DC-DC converter topologies to enhance performance compared to traditional designs. The demand for non-isolated DC-DC configurations in bipolar low voltage DC (LVDC) microgrids is growing, driven by applications such as electric vehicle (EV)

chargers, LVDC grid distribution lines, residential PV converters, and auxiliary power converters for railway and bus systems [4].

In single-stage and two-stage transformerless AC grid-connected inverter applications, to prevent leakage currents, the negative pole of the PV panels must be grounded [5, 6]. Single-input dual-output (SIDO) DC-DC converters are commonly used in the first stage to convert DC power from solar panels or small wind turbines into multiple regulated DC output voltages. These converters often feature topologies that can both step-down and step-up voltage, allowing independent regulation of each output channel and providing balanced and unbalanced voltage levels [7]. SIDO DC-DC converters offer advantages such as reduced component count, smaller size, and lower cost compared to using two separate converters, though they may introduce design and control complexity and have limited output power.

In [8], Dhananjaya introduced a configuration of two boost converters in a single structure, which offers two distinct output voltages but faces challenges with a high count of power semiconductor devices and dual inductor use. Prieto's work on the Zeta-CSC converter provides DC bipolar voltage with common-ground connection benefits, though it introduces discontinuities and elevated ripple in input and output currents. In other work, Prieto's SEPIC-Boost converter, while minimizing input current ripple, results in high output current ripples, sharing a common switch between elements [9]. Efficient operation of bipolar LVDC distribution systems necessitates SIDO converter structures capable of voltage balancing, crucial for stable system performance and preventing equipment damage. Voltage balancing is vital in systems with multiple energy sources to optimize energy harvesting and performance. Moreover, common-
<figure><img src="image_2.png" /><figcaption>Fig. 1: Two-stage PV conversion system</figcaption></figure>

ground solutions are essential to mitigate PV leakage currents in grid-connected inverters, ensuring grid stability and safety. Voltage balancing in SIDO converters can be inherent or achieved through specific control methods [10]. Fig. 1 illustrates a two-stage PV conversion system configuration, where the SIDO DC-DC converter provides bipolar DC output, and a three-level neutral-point-clamped (3L-NPC) inverter integrates the system to the AC grid [11]. In one of the latest works [12], Chapparya introduced a non-isolated boost-zeta interleaved SIDO type multiport converter featuring an input-parallel output-series combination of switching cells tailored for bipolar LVDC microgrid applications. The proposed converter is capable of achieving voltage balancing. However, this configuration lacks the ability to establish a common-ground connection. Additionally, the article does not provide information regarding the converter's performance when integrated with a PV power source, leaving its suitability for bipolar DC microgrids uncertain.

Prabhakaran's Boost-SEPIC type interleaved (BSTI) DC-DC converter addresses voltage imbalances in bipolar LVDC microgrids, supporting bidirectional operation, synchronous rectification, and zero-voltage-switching (ZVS) [13]. Despite these advantages, its complex and expensive driver and control circuitry, lack of common-ground connection, limited power range, and low efficiency underscore the need for improved SIDO converters.

A new interleaved single-inductor SIDO (SI-SIDO) boost-buck-boost DC-DC converter with a common-ground connection, inherent voltage balancing, high power efficiency, smaller size, and low cost is proposed in [14]. This paper introduces a novel switching pattern to advance the proposed SI-SIDO boost-buck-boost converter, reducing inductor current ripple and enhancing the power range for RES applications. The proposed continuous switching method offers improvements in performance and

suitability for higher power applications, while maintaining voltage balancing and common-ground conditions.

## Proposed switching method and operational principles

This section begins by introducing the conceptual and technical design of the non-isolated SI-SIDO boost-buck-boost converter, specifically tailored for integration into LVDC microgrids with photovoltaic sources. Following this, the core of the section delves into a detailed description and steady-state analysis of the proposed continuous switching method.

## Configuration of the SI-SIDO boost-buck-boost converter

The proposed SI-SIDO converter is a hybrid design that integrates conventional boost and buck-boost configurations. This converter can be designed for bidirectional operation when the input power source is electrical energy storage (EES). As depicted in Fig. 2, this design includes four switches (two switches and two diodes for each direction), one inductor (L), and three capacitors ($C_{in}$, $C_{o1}$, $C_{o2}$).

This unique arrangement allows the single inductor to be shared between the boost and buck-boost components of the circuit, enabling the converter to manage energy distribution effectively between two distinct output voltages.

## Description of the proposed switching method

The proposed continuous switching method in the SI-SIDO converter follows traditional DC-DC converter switching patterns. In this approach, both switches, $S_1$ and $S_2$, operate at a high switching frequency with a period $T_{sw}$ and duty cycles $d_1$ and $d_2$, respectively.

<figure><img src="image_3.png" /><figcaption>Fig. 2: The configuration of SI-SIDO boost-buck-boost DC-DC converter</figcaption></figure>
The switching operation of the converter can be categorized into four basic scenarios based on the individual duty cycles: (1) $d_1 > 0.5$ and $d_2 > 0.5$, (2) $d_1 > 0.5$ and $d_2 < 0.5$, (3) $d_1 < 0.5$ and $d_2 > 0.5$, and (4) $d_1 < 0.5$ and $d_2 < 0.5$. The first and fourth scenarios are further extended by three relative conditions between $d_1$ and $d_2$: $d_1 > d_2$, $d_1 = d_2$, and $d_1 < d_2$. As a result, the converter can operate in eight distinct switching conditions, as depicted in Table I.

<table><caption>**Table I: Possible Switching conditions**</caption><thead><tr><th>Switching conditions</th><th>d1 &gt; d2</th><th>d1 = d2</th><th>d1 &lt; d2</th></tr></thead><tbody><tr><td>d1, d2 &gt; 0.5</td><td>(1)</td><td>(2)</td><td>(3)</td></tr><tr><td>d1 &gt; 0.5 &gt; d2</td><td>(4)</td><td>-</td><td>-</td></tr><tr><td>d2 &gt; 0.5 &gt; d1</td><td>-</td><td>-</td><td>(5)</td></tr><tr><td>d1, d2 &lt; 0.5</td><td>(6)</td><td>(7)</td><td>(8)</td></tr></tbody></table>

Among these, the voltage-balanced operation is achieved when $d_1 = d_2$, which corresponds to two scenarios: $d_1 = d_2 > 0.5$ (step-up operation) and $d_1 = d_2 < 0.5$ (step-down operation). In this paper, the focus is exclusively on these voltage-balanced scenarios, as they are critical for the proposed converter's application in bipolar LVDC microgrids.

One of the features of the proposed switching method is the phase delay introduced between the switching pulses of the switches, adjustable from 0 to $T_{sw}/2$. The converter's performance is significantly influenced by this phase delay. For optimal voltage balancing in bipolar LVDC applications, the phase delay has to be set to $T_{sw}/2$. This means that switch $S_1$ starts its switching cycle, and after a delay of $T_{sw}/2$, switch $S_2$ begins its cycle. This phased switching results in optimal performance and efficient energy distribution.

## Operational principles

Fig. 3 and Fig. 4 illustrate the operating states of the proposed converter during step-up ($d_1$ and $d_2 > 0.5$) and step-down ($d_1$ and $d_2 < 0.5$) operations.

### Step-Up Operation ($d_1, d_2 > 0.5$)

As shown in Fig. 3, the proposed converter operates through three distinct states during step-up operation:

1) Inductor Boost Charging State (State 1): The inductor stores energy as both switches ($S_1$ and $S_2$) are turned ON. The current through the inductor rises, and the inductor voltage equals the input voltage ($V_{in}$).

2) Boost Discharging Operating State (State 2): Switch $S_1$ remains ON while $S_2$ turns OFF. The energy stored in the inductor is transferred to the output capacitor $C_{o1}$, stepping up the voltage level.

3) Buck-Boost Discharging Operating State (State 3): Switch $S_1$ turns OFF while $S_2$ remains ON. The inductor energy is directed to the second output capacitor $C_{o2}$ through the buck-boost configuration.

During each switching cycle, State 1 occurs twice: once before the boost discharging state (State 2) and once before the buck-boost discharging state (State 3). This sequence ensures efficient energy transfer and optimal performance in step-up operation.

<figure><img src="image_4.png" /><figcaption>Fig. 3: Operating states of the converter during the step-up operation. (a) State 1. (b) State 2. (c) State 3.</figcaption></figure>

<figure><img src="image_5.png" /><figcaption>Fig. 4: Operating states of the converter during the step-down operation. (a) State 1. (b) State 2. (c) State 3.</figcaption></figure>
## Step-Down Operation ($d_1, d_2 < 0.5$)

As shown in Fig. 4, the converter performs differently in step-down operating states:

1) Inductor Buck Charging State (State 1): During this state, $S_1$ turns ON, and $S_2$ is OFF, and the inductor current rises while storing energy. At the same time part of this energy transferred to the output capacitor $C_{o1}$. Therefore, the inductor voltage during the charge is lower than the input voltage.

2) Buck Discharging Operating State (State 2): Switch $S_1$ turns OFF, while $S_2$ is OFF. The inductor releases energy to both output capacitors $C_{o1}$ and $C_{o2}$.

3) Buck-Boost Discharging Operating State (State 3): Switch $S_1$ remains OFF, and $S_2$ turns ON. The inductor energy is transferred to the output capacitor $C_{o2}$ through the buck-boost configuration.

Unlike step-up operation, the inductor charging state (State 1) occurs only once during the step-down operation. State 2, however, occurs twice: once following State 1 and once after State 3.

<figure><img src="image_6.png" /><figcaption>Fig. 5: Control signals and operational waveforms of the converter during step-up operation</figcaption></figure>

## Steady-state analysis

Fig. 5 and Fig. 6 depict the control signals and operational waveforms of the proposed converter, showcasing the switching patterns of switches $S_1$ and $S_2$, as well as the response of the inductor voltage, inductor current, and output voltages during the continuous switching method for step-up and step-down operations, respectively.

As the figures illustrate, the control signal pulse waveforms divide the operational time into distinct intervals, labeled as $\tau_1$, $\tau_2$, $\tau_3$, and $\tau_4$ within a single switching period. These intervals, defined by (1), represent the duration of each state in the switching cycle and offer insights into the converter's dynamic behavior:

$$ \tau_1 + \tau_2 + \tau_3 + \tau_4 = 1 \quad (1) $$

## Step-up operation:

During the step-up operation ($d_1, d_2 > 0.5$), the converter exhibits the following behavior in each interval:

### 1) Interval $\tau_1$ and $\tau_3$: Boost charging state (State 1)

The inductor current enters the charging state as both switches, $S_1$ and $S_2$, are turned ON. Energy is stored in the inductor during this phase. Considering the voltage balancing condition ($d_1 = d_2 = d$), the durations of $\tau_1$ and $\tau_3$ are given by:

<figure><img src="image_7.png" /><figcaption>Fig. 6: Control signals and operational waveforms of the converter during step-down operation</figcaption></figure>

$$ \tau_1 = d_2 - \frac{1}{2} = d - \frac{1}{2} \quad (2) $$

$$ \tau_3 = d_1 - \frac{1}{2} = d - \frac{1}{2} \quad (3) $$

For step-up operation, the duty cycle $d$ must satisfy the condition $d > 0.5$, as shown in (2) and (3).
## 2) Interval $τ_2$: Boost discharging state (State 2)

In this phase, the inductor current discharges, transferring energy to the output capacitor $C_{o1}$ through diode $D_1$. The duration of $τ_2$ is:

$$τ_2 = 1 - d_2 = 1 - d \quad (4)$$

## 3) Interval $τ_4$: Buck-boost discharging state (State 3)

During this phase, the stored energy in the inductor is transferred to capacitor $C_{o2}$ via diode $D_2$, reducing the inductor current to its minimum. The duration of $τ_4$ is given by:

$$τ_4 = 1 - d_1 = 1 - d \quad (5)$$

### Step-Down Operation:

In the step-down operation ($d_1, d_2 < 0.5$), the converter's behavior is as follows:

### 1) Interval $τ_1$: Buck charging State (State 1)

The inductor current increases as $S_1$ is turned ON, storing energy in the inductor. Simultaneously, part of the input energy is transferred to the output capacitor $C_{o1}$. The duration of $τ_1$ is expressed as:

$$τ_1 = d_1 = d \quad (6)$$

## 2) Interval $τ_2$ and $τ_4$: Buck discharging state (State 2)

During these intervals, the inductor current discharges, transferring energy to both output capacitors $C_{o1}$ and $C_{o2}$ through diodes $D_1$ and $D_2$. The durations of $τ_2$ and $τ_4$ are:

$$τ_2 = \frac{1}{2} - d_1 = \frac{1}{2} - d \quad (7)$$

$$τ_4 = \frac{1}{2} - d_2 = \frac{1}{2} - d \quad (8)$$

## 3) Interval $τ_3$: Buck-boost discharging State (State 3)

The stored energy in the inductor is transferred to capacitor $C_{o2}$ through diode $D_2$. The duration of $τ_3$ is given by:

$$τ_3 = d_2 = d \quad (9)$$

### Inductor current ripple

The inductor current ripple ($Δi_L$) refers to the variation in the inductor current during each switching cycle, typically expressed as a percentage of the average current. Its magnitude significantly influences the converter's overall

efficiency and plays a vital role in design and optimization considerations.

The inductor current ripple ($Δi_L$) is derived using equations based on circuit analysis and control theory. As illustrated in Fig. 5 and Fig. 6, the inductor current exhibits an increase during the charging mode (positive ramp) and a corresponding decrease during the discharging phase (negative ramp), reaching its minimum value. Notably, the magnitude of the ripple remains identical in both phases.

This symmetrical behavior allows for the calculation of the current ripple, quantifying the variation in current and its influence on converter performance. The equations for determining the inductor current ripple under step-up and step-down operations are provided below:

$$V_L = L \frac{Δi_L}{Δt} \quad (10)$$

During step-up operation:

$$\left\{ \begin{aligned} LΔi_L(Charging) &= [V_L(τ_1) + V_L(τ_2) + V_L(τ_3)]Δt \\ LΔi_L(Discharging) &= V_L(τ_4)Δt \end{aligned} \right. \quad (11)$$

$$Δi_L = \left\{ \begin{aligned} & \frac{1}{Lf_{sw}} \left[ V_{in} \left(d_2 - \frac{1}{2}\right) + (V_{in} - V_{o1})(1 - d_2) + V_{in} \left(d_1 - \frac{1}{2}\right) \right] \\ & \frac{1}{Lf_{sw}} [V_{o2}(1 - d_1)] \end{aligned} \right. \quad (12)$$

where, $Δi_L$, $V_L$, and $L$ are the inductor current ripple, inductor voltage, and inductor value, respectively. $V_{in}$, $V_{o1}$ and $V_{o2}$ represent the input and output voltages, and $f_{sw}$ is the switching frequency of the converter. By applying the voltage balancing condition ($d_1 = d_2 = d$), $Δi_L$ during step-up operation simplifies to:

$$Δi_L(Step-up) = \begin{cases} \frac{V_{o1}(d-1)+V_{in}d}{Lf_{sw}} & (Charging) \\ \frac{V_{o2}(1-d)}{Lf_{sw}} & (Discharging) \end{cases} \quad (13)$$

The inductor current ripple during step-down operation:

$$\left\{ \begin{aligned} LΔi_L(Charging) &= V_L(τ_1)Δt \\ LΔi_L(Discharging) &= [V_L(τ_2) + V_L(τ_3) + V_L(τ_4)]Δt \end{aligned} \right. \quad (14)$$
$$ \Delta i_L = \begin{cases} \frac{1}{Lf_{sw}} [(V_{in} - V_{o1})d_1] \\ \frac{1}{Lf_{sw}} \begin{bmatrix} (V_{o1} + V_{o2}) (\frac{1}{2} - d_1) + \\ V_{o2}d_2 + \\ (V_{o1} + V_{o2}) (\frac{1}{2} - d_2) \end{bmatrix} \end{cases} \quad (15) $$

By applying the voltage balancing condition, $\Delta i_L$ during step-down operation can be calculated as:

$$ \Delta i_{L}(step-down) = \begin{cases} \frac{(V_{in}-V_{o1})d}{Lf_{sw}} & (Charging) \\ \frac{V_{o1}(1-2d)+V_{o2}(1-d)}{Lf_{sw}} & (Discharging) \end{cases} \quad (16) $$

## Critical and optimal inductance values

The critical inductance value is the minimum inductance required to prevent the inductor current from dropping to zero, thereby maintaining continuous conduction. Calculating this critical inductance is crucial to ensure the converter operates in a stable and reliable continuous conduction mode (CCM).

From (6), the following equations are valid.

$$ \left[ \begin{matrix} V_{in} \left(d - \frac{1}{2}\right) + \\ (V_{in} - V_{o1})(1 - d) + \\ V_{in} \left(d - \frac{1}{2}\right) \end{matrix} \right] T_{sw} = L_{crit} i_{peak} \quad (10) $$

$$ \left\{ \begin{matrix} [(V_{o1})(d-1) + V_{in}d]T_{sw} = L_{crit}i_{peak} \\ L_{crit}i_{peak} = L_{crit}(2 \times i_{ave}) \end{matrix} \right. \quad (11) $$

$$ L_{crit} = \frac{(V_{o1})(d-1)+V_{in}d}{2 \times i_{ave} \times f_{sw}} = \frac{(V_{o1})(d-1)+V_{in}d}{2 \times (i_{in}(ave)+i_{o2}(ave)) \times f_{sw}} \quad (12) $$

From the above equations, the critical inductance be expressed as:

$$ L_{crit} = \frac{(V_{in} \times R_{o1})[V_{o1}(d-1)+V_{in}d]}{2 \times (V_{o1}^2+V_{o2}^2+V_{in}V_{o2}) \times f_{sw}} \quad (13) $$

where, $L_{crit}$ is the critical value of the inductor, $i_{peak}$ is the maximum amount of the inductor current, $i_{ave}$ is the average of the inductor current, $i_{in(ave)}$ is the average of the input current, and $i_{o2(ave)}$ is the average of the lower leg output current. $R_{o1}$ represents the output resistive load of the upper leg.

To optimize converter performance, the trade-off between inductor value and current ripple must be

considered. The critical inductance represents the minimum value required for CCM operation, but may not align with the optimal inductor current ripple. Because the ripple is inversely proportional to inductance, lower values lead to higher ripple currents, which can reduce efficiency. Therefore, while critical inductance ensures stable CCM operation, selecting an inductor based on a desired ripple—typically 10% to 20% of the average current—is essential. The optimum inductor value can be calculated using the inductor current ripple equation (14).

$$ L = \begin{cases} \frac{V_{o1}(d-1)+V_{in}d}{\Delta i_{L}f_{sw}} & \rightarrow \text{Positive Slope} \\ \frac{V_{o2}(1-d)}{\Delta i_{L}f_{sw}} & \rightarrow \text{Negative Slope} \end{cases} \quad (14) $$

As shown in (14), the inductor value of the negative slope is larger and can be chosen as the optimal value.

## Output voltage gain

The steady-state analysis of the output voltage gain (M) for the proposed converter establishes a mathematical relationship between the input voltage (Vin) and the two output voltages (Vo1 and Vo2). According to the principles of inductor voltage balance, the net change in inductor voltage over one switching period $T_{sw}$ is zero and it can be expressed as:

$$ \int_{0}^{T_{sw}} V_{L} dt = 0 \quad (17) $$

$$ \int_{0}^{t_1} V_{L} dt + \int_{t_1}^{t_2} V_{L} dt + \int_{t_2}^{t_3} V_{L} dt + \int_{t_3}^{t_4} V_{L} dt = 0 \quad (18) $$

Based the time intervals depicted in Fig. 5, the output voltage gain of the converter with the proposed continuous switching method during step-up operation can be derived from the following equations.

$$ \tau_1 V_{in} + \tau_2 (V_{in} - V_{o1}) + \tau_3 V_{in} - \tau_4 V_{o2} = 0 \quad (19) $$

$$ V_{o1}(d_2 - 1) + d_1 V_{in} - V_{o2}(1 - d_1) = 0 \quad (20) $$

Replacing $V_{o1}$ with $V_o-V_{o2}$, the equation can be reformulated as:

$$ d_1 V_{in} + V_{o2}(d_1 - d_2) = V_o(1 - d_2) \quad (21) $$

$$ M = \frac{V_o}{V_{in}} = \frac{d_1}{(1-d_2)} + \frac{V_{o2}(d_1-d_2)}{V_{in}(1-d_2)}, \quad d_1, d_2 > 0.5 \quad (22) $$

By substituting the voltage balancing condition, the output voltage gain is expressed as:

$$ M = \frac{V_o}{V_{in}} = \frac{d}{(1-d)}, \quad d > 0.5 \quad (23) $$
Similarly, based on the time intervals depicted in Fig. 6, the output voltage gain of the converter during the step-down operation is expressed as:

$$ \tau_1(V_{in} - V_{o1}) - \tau_2(V_{o1} + V_{o2}) - \tau_3 V_{o2} - \tau_4(V_{o1} + V_{o2}) = 0 \quad (24) $$

$$ d_1 V_{in} - V_o (1 - d_2) + V_{o2} (d_1 - d_2) = 0 \quad (25) $$

$$ M = \frac{V_o}{V_{in}} = \frac{d_1}{(1-d_2)} + \frac{V_{o2}(d_1-d_2)}{V_{in}(1-d_2)}, \quad d_1, d_2 < 0.5 \quad (26) $$

Considering the voltage balancing condition, the output voltage gain is:

$$ M = \frac{V_o}{V_{in}} = \frac{d}{(1-d)}, \quad d < 0.5 \quad (27) $$

As (23) and (27) reveal, the overall performance of the proposed converter under the continuous switching method during the voltage balancing condition mirrors that of a traditional buck-boost converter. Accordingly, the proposed converter operates in step-up mode when d>0.5 and in step-down mode when d<0.5, with the same output voltage gain as the buck-boost converter.

## Voltage and current stress of switches

The voltage and current stresses on the switches are vital for assessing the power-handling capacity of the system. Voltage stress refers to the maximum voltage the switches must handle, while current stress pertains to the peak current through them. The voltage and current stresses on the switches in the proposed SI-SIDO converter can be expressed as:

$$ V_{S_1(\max)} = V_{D_2(\max)} = V_{o2} + V_{in} \quad (28) $$

$$ V_{S_2(\max)} = V_{D_1(\max)} = V_{o1} \quad (29) $$

$$ I_{S_{1,2}(\max)} = I_{D_{1,2}(\max)} = I_L \quad (30) $$

## Comparison and simulation results

Table II compares the proposed continuous switching method with previous methods presented in [11]. The table is divided into two parts, first part is the parameters that are collected from the operational and steady-state analysis, and the second part is the comparison of the simulation results.

As can be seen from the first part of Table II, in the proposed SI-SIDO converter, the input current remains continuous across all switching methods. The inductor current ripple is significantly reduced, enhancing overall performance and extending the power range to 10 kW. This

reduction allows the switching frequency to decrease from 100 kHz to 20 kHz, minimizing switching losses and increasing the efficiency. The input current capacity rises to 50 A in the full load condition and keeps the same inductor value. Control complexity is reduced by using equal switching frequencies and duty cycles ($d = d_1 = d_2$) for both switches, and the voltage balancing condition can be easily conducted.

Fig. 7 compares the voltage gains of the different switching methods. In the discontinuous individual switching method, the duty cycles during voltage balancing are not equal. Therefore, to plot the voltage gain for this method, the duty cycle of the first switch ($d_1$) is calculated based on the duty cycle of the second switch ($d_2$), with the x-axis representing $d_2$. The calculation formula is provided in [11]. As shown in Fig. 7, the voltage gain of the proposed continuous switching method is lower than that of the discontinuous methods.

The simulation results presented in the second part of Table II demonstrate an increase in input current and output power as the output resistive load is decreased from 300 Ω to 50 Ω. Additionally, the output capacitors used in the proposed continuous switching method are significantly smaller than those employed in the previous discontinuous methods.

The proposed continuous switching method for the boost-buck-boost SI-SIDO converter was simulated using PLECS version 4.7.5. The results demonstrate the converter's performance during step-up and step-down operations in voltage-balanced islanded mode. Table III provides the circuit specifications used during the simulation. Fig. 8 and Fig. 9 illustrate the converter's performance, showing the gate pulses for switches $S_1$ and $S_2$, along with the input current, inductor current, inductor voltage, and output voltages ($V_{o1}$ and $V_{o2}$) during the step-up and step-down operations, respectively. Additionally,

<figure><img src="image_8.png" /><figcaption>Fig. 7: Comparison of the output voltage gains</figcaption></figure>
<table><caption>Table II: The performance comparison of the SI-SIDO converter using different switching methods</caption><thead><tr><th rowspan="2">Parameter</th><th colspan="3">Operating method</th></tr><tr><th>Discontinuous Individual [11]</th><th>Discontinuous Integrated [11]</th><th>Proposed Continuous method</th></tr></thead><tbody><tr><td>Input current type</td><td>Continuous</td><td>Continuous</td><td>Continuous</td></tr><tr><td>Inductor current ripple</td><td>Very High</td><td>Regulated</td><td>Very Low</td></tr><tr><td>Control complexity</td><td>Very High</td><td>High</td><td>Low</td></tr><tr><td>Common-ground</td><td>Yes</td><td>Yes</td><td>Yes</td></tr><tr><td>Voltage-balancing condition</td><td>d<sub>2</sub> and d<sub>1</sub> = <sup>1</sup>&frasl;<sub>2 &minus; d<sub>2</sub></sub></td><td>d<sub>1</sub> = d<sub>2</sub> = d</td><td>d<sub>1</sub> = d<sub>2</sub> = d</td></tr><tr><td>Output voltage Gain</td><td><sup>1 &minus; d<sub>1</sub>d<sub>2</sub></sup>&frasl;<sub>(1 &minus; d<sub>1</sub>)(1 &minus; d<sub>2</sub>)</sub></td><td><sup>1 + d</sup>&frasl;<sub>1 &minus; d</sub></td><td><sup>d</sup>&frasl;<sub>1 &minus; d</sub></td></tr><tr><td>Operating power range</td><td>50 &ndash; 500 W</td><td>Up to 3 kW</td><td>Up to 10 kW</td></tr><tr><td>Input current range</td><td>Up to 4 A</td><td>Up to 15 A</td><td>Up to 50 A</td></tr><tr><td>Efficiency</td><td>86%-96%</td><td>90%-97%</td><td>95%-99%</td></tr></tbody></table>

<table><caption>The simulation values</caption><thead><tr><th></th><th></th><th></th><th>Step-Up</th><th>Step-Down</th></tr></thead><tbody><tr><td>Input current</td><td>3.68 A</td><td>3.43 A</td><td>21.5 A</td><td>0.65 A</td></tr><tr><td>Input voltage</td><td>230 V</td><td>230 V</td><td>230 V</td><td>230 V</td></tr><tr><td>Inductor value</td><td>2 mH</td><td>2 mH</td><td>2 mH</td><td>2 mH</td></tr><tr><td>Inductor current ripple (Δi<sub>L</sub>)</td><td>9 A</td><td>2 A</td><td>2 A</td><td>1.5 A</td></tr><tr><td>Output power during the simulation</td><td>840 W</td><td>800 W</td><td>5000 W</td><td>150 W</td></tr><tr><td>Output Voltages (V<sub>o1</sub>, V<sub>o2</sub>)</td><td>350+350</td><td>350+350</td><td>350+350</td><td>60+60</td></tr><tr><td>Output capacitors (C<sub>o1</sub>, C<sub>o2</sub>)</td><td>1500 μF</td><td>1500 μF</td><td>50 μF</td><td>50 μF</td></tr><tr><td>Output resistor load</td><td>300 Ω</td><td>300 Ω</td><td>50 Ω</td><td>50 Ω</td></tr><tr><td>Output voltage ripple (ΔV<sub>o1</sub>, ΔV<sub>o2</sub>)</td><td>10 V</td><td>0.04 V</td><td>5.5 V</td><td>0.4 V</td></tr><tr><td>Switching frequency</td><td>100 kHz</td><td>100 kHz</td><td>20 kHz</td><td>20 kHz</td></tr></tbody></table>

<figure><img src="image_9.png" /><figcaption>Fig. 8: Performance of the converter during the step-up operation</figcaption></figure>

<figure><img src="image_10.png" /><figcaption>Fig. 9: Performance of the converter during the step-down operation</figcaption></figure>

Fig. 10 shows the voltage stress on the switches during the step-up mode performance.

Fig. 11 illustrates the output voltages of the proposed converter during step-up operation
when the resistor loads change suddenly from 50 Ω to 500 Ω. As shown, the converter maintains the voltage balancing condition across the output capacitors, even during sudden load variations.

## Conclusion

This paper presents a novel continuous switching method for the SI-SIDO boost-buck-boost DC-DC converter, designed for bipolar LVDC microgrid applications.

The proposed converter integrates the conventional boost and buck-boost topologies, featuring a single inductor and dual output capacitors, allowing for efficient energy transfer and voltage balancing across multiple output channels. The continuous switching method enhances the converter's performance by minimizing inductor current ripple and optimizing the power range, making it suitable for high-power applications.

<table><caption>Table III: Simulation circuit specifications</caption><thead><tr><th rowspan="2">Parameter</th><th rowspan="2">Definition</th><th colspan="2">Value</th></tr><tr><th>Step-up</th><th>Step-down</th></tr></thead><tbody><tr><td>V<sub>in</sub></td><td>Input voltage</td><td>230 V</td><td>230 V</td></tr><tr><td>V<sub>o1</sub>, V<sub>o2</sub></td><td>Output voltages</td><td>350 V</td><td>60 V</td></tr><tr><td>L</td><td>Inductance</td><td>2 mH</td><td>2 mH</td></tr><tr><td>I<sub>L(Max)</sub></td><td>Inductor maximum current</td><td>30 A</td><td>2.6</td></tr><tr><td>I<sub>L(DC)</sub></td><td>DC current of the inductor</td><td>28.5 A</td><td>1.85 A</td></tr><tr><td>f<sub>sw</sub></td><td>Switching frequency</td><td>20 kHz</td><td>20 kHz</td></tr><tr><td>d</td><td>Duty-cycle</td><td>0.75</td><td>0.35</td></tr><tr><td>R<sub>o1</sub>, R<sub>o2</sub></td><td>Output resistor load</td><td>50 Ω</td><td>50 Ω</td></tr><tr><td>C<sub>o1</sub>, C<sub>o2</sub></td><td>Output capacitors</td><td>50 μF</td><td>50 μF</td></tr></tbody></table>

<figure><img src="image_11.png" /><figcaption>(a)</figcaption></figure>

<figure><img src="image_12.png" /><figcaption>(b)</figcaption></figure>

<figure><img src="image_13.png" /><figcaption>Fig. 11: Inductor current and output voltages during the step changes of the resistive loads from 50 Ω to 500 Ω.</figcaption></figure>

Simulation results demonstrate that the inductor current ripple is greatly reduced, allowing for a decrease in switching frequency, which further improves the converter's overall efficiency. The PI control strategy effectively maintains voltage stability, ensuring balanced output voltages even during dynamic load changes. In comparison with previous discontinuous switching methods, the proposed continuous approach not only simplifies control complexity but also enhances the converter's reliability and efficiency. The reduction in the size of output capacitors and the increased input current capacity further underscore the practical advantages of this design. Overall, the proposed SI-SIDO converter with continuous switching method offers a promising solution for efficient and reliable energy conversion in bipolar LVDC systems.

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