# Study of 3-Phase Embedded Charger for Vehicle-to-Home (V2H) Under Unbalanced Load Conditions

Elie Fayad, Antoine Bruyere, Francois Gruson

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Elie Fayad, Antoine Bruyere, Francois Gruson. Study of 3-Phase Embedded Charger for Vehicle-to-Home (V2H) Under Unbalanced Load Conditions. The 26th European Conference on Power Electronics and Applications, GDR SEEDS France & EPE Association, Mar 2025, Paris, France. 10.34746/epe2025-0038 . hal-05075845

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<figure><img src="image_1.png" /></figure>

Distributed under a Creative Commons Attribution 4.0 International License
Study of 3-Phase Embedded Charger for Vehicle-to-Home (V2H)
Under Unbalanced Load Conditions

Elie Fayad, Antoine Bruyere, and Francois Gruson

Univ. Lille, Arts et Metiers Institute of Technology, Centrale Lille, Junia, ULR 2697 - L2EP
F-59000 Lille, France

E-Mail: elie.fayad@ensam.eu, antoine.bruyere@centralelille.fr, and francois.gruson@ensam.eu

ACKNOWLEDGMENT

This work has been conducted as part of the Electric
Vehicle Reversible Charger for Vehicle to Everything
(eV2x) project. This project is funded by the BPI France
through France Relance 2030 that funds Ecole Nationale
Supérieure d'Arts et Métiers (ENSAM) as an indirect
partner of the European project IPCEI/MECT.

***Index Terms***—DC-AC converter, Electric Vehicle (EV), On-board charger, Discontinuous pulse-width modulation.

***Abstract***—This paper provides a comprehensive exam-
ination of various Vehicle-to-Everything (V2X) scenarios,
emphasising on those that pose significant challenges.
A focus is given to the Vehicle-to-Load/Home (V2L/H)
scenario, where a three-phase embedded charger is tasked
with powering a single-phase load. In this context, it is
crucial to properly manage the load's neutral to ensure
the voltages delivered by the charger remain balanced.
The paper delves into two potential methods for neutral
connection, elucidating the implications each method has
on the power electronics involved.

I. INTRODUCTION

To decrease carbon emissions from the transportation
sector [1], the market for electric vehicles (EVs) is
rapidly expanding. Beyond their role as transportation
devices, EVs can serve as Energy Storage Systems (ESS)
[2], contributing significantly to the ongoing transforma-
tion of the electrical grid. EVs can provide a variety of
energy services, including injecting power back into the
grid, known as Vehicle-to-Grid (V2G). They can also
supply power to various loads when the grid is weak
or unavailable, referred to as Vehicle-to-Load (V2L),
Vehicle-to-Home (V2H), and Vehicle-to-Building (V2B).
Additionally, EVs can recharge other EVs in need, a
process termed Vehicle-to-Vehicle (V2V). Collectively,

these capabilities fall under the umbrella of Vehicle-
to-Everything (V2X) [3]. All these functionalities are
managed by the embedded charger within the EV. Tradи-
tionally, the embedded charger is controlled as a current-
controlled source, known as Power Factor Control (PFC),
also known as grid-following control, when it is con-
connected to grid. It is controlled as a constant voltage
source with constant frequency in the absence of the
grid. Recently, the control strategy called grid-forming
control, where the converter acts as a voltage-controlled
source, initially developed for inverters connected to
the transmission system, has been studied for embedded
chargers [4]. This control addresses some of the limita-
tions of traditional control strategies in V2X applications,
as detailed in [5]. In this context, this paper aims at
identifying critical cases and associated challenges in
V2X, with a particular focus on the V2L/H scenario.
Among the various challenges, managing unbalanced
loads stands out as a significant issue.

All the previously mentioned energy services are
ensured by the bidirectional charger. In this paper, the
on-board charger represented in Figure 1 is considered.
It consists of the battery H<sub>BTY</sub>, a DC/DC converter
providing a constant voltage V<sub>DC</sub> = 700V, a DC
link split into two capacitors C<sub>H</sub> and C<sub>L</sub>, the DC/AC
inverter providing the modulated three-phase voltages
v<sub>mabc</sub> referenced to point O, mid point of the DC link,
the connection impedance Z<sub>c</sub>, the relay box and the
Electromagnetic Compatibility (EMC) Filter, which will
be neglected. This charger is connected to the grid at
the point of common coupling (PCC). A home is also
connected at the PCC. In this study, it is considered
that the grid is absent and hence, the charger is solely
supplying the power to the load (V2H case). The main
focus is on the DC link and the DC/AC conversion stage
of the charger.

On balanced 3-phase systems, a common 3-phase 3-
wires architecture can be employed [6]–[9]. However,
in some V2X situations such as V2Load/Home, the
<figure><img src="image_2.png" /><figcaption>Fig. 1. Embedded charger architecture</figcaption></figure>

<figure><img src="image_3.png" /><figcaption>Fig. 2. Phasor diagram of the system: a) with floating neutral point b) with neutral point connected to point O</figcaption></figure>

<figure><img src="image_4.png" /><figcaption>Fig. 3. Simplified representation of the V2H study case</figcaption></figure>

power system (the Load or Home itself) can be largely unbalanced, for example with a load connected at a single power line. In such unbalanced situations, the 3 Line-to-Neutral voltages, $v_{gabc}$, can become unbalanced due to the neutral point n being floating in the absence of the power grid, as seen in the phasor representation shown in Figure 2.a. This situation has to be avoided as it could lead to load damages.

To address this issue, the solution is to use a 4th wire connected to the load neutral n and to set the potential of n at a known value, for instance the reference of the converter, point O. The reference of n to O can be done by different manners, with typically either using a direct wire connection between n and O [10] or using a 4th leg to control the voltage $v_{nO}$ [11], [12]. Both solutions have pros and cons that are discussed in this paper. As far as we are concerned:

* Apparition of a neutral current.

* Sizing of the DC link capacitor.

* Possibility to implement over-modulation and discontinuous modulation with the 3-phase bridge.

All of these points will be compared in this paper, so that to give to the Power-Electronics designer some clues to decide if one solution is better than the another.

The rest of this paper is divided as follows: section II discusses the impact of both configurations on the DC link, notably the capacitors design and DC power. Section III deals with the modulation techniques of the neutral leg and finally section IV presents the conclusion of the study.

## II. IMPACT OF THE TWO CONFIGURATIONS ON THE DC LINK

In order to study the impact of the unbalanced load on the DC bus, the case of Figure 3 is considered where the EV is supplying a single phase resistive load connected to phase b with its required power. The parameters of the studied system can be found in Table I.

### A. Neutral connected to the mid-point of the DC link

When connecting the neutral of the load to the mid-point of the DC link, the path for the neutral current is ensured, leading to a major disadvantage in this configuration: the propagation of the zero-sequence current through the DC link capacitors. This can cause several
<table><caption>TABLE I
STUDIED SYSTEM PARAMETERS</caption><thead><tr><th>Parameter</th><th>Symbol</th><th>Value</th></tr></thead><tbody><tr><td>Charger Nominal Power</td><td>P</td><td>11 KW</td></tr><tr><td>Home Load Power</td><td>P<sub>load</sub></td><td>3.3 KW</td></tr><tr><td>Frequency</td><td>f</td><td>50 Hz</td></tr><tr><td>Angular Frequency</td><td>ω</td><td>2πf rad/s</td></tr><tr><td>DC Bus Voltage</td><td>V<sub>DC</sub></td><td>700 V</td></tr><tr><td>AC RMS Voltage</td><td>V<sub>g</sub></td><td>230 V</td></tr></tbody></table>

<figure><img src="image_5.png" /><figcaption>Fig. 4. Power at the DC link in the V2H study case</figcaption></figure>

complications. Specifically, the two capacitors in the DC link must handle the current ripples induced by the zero-sequence current. These ripples occur at the system frequency $\omega$, impacting both the power and voltage of the capacitors. Consequently, selecting the appropriate DC bus capacitors becomes more complex, as their size must account for the ripple levels.

When a single phase load is connected to a three phase inverter, the instantaneous output power at the AC side $p_{load}$ is:

$$p_{load} = V_g I \cos(\varphi) + V_g I \cos(2\omega t + \varphi) \quad (1)$$

where $V_g$ is the rms voltage at the PCC, $I$ the rms current, and $\varphi$ the phase angle difference between $V_g$ and $I$. A second order ripple can be seen present in the power. Supposing the converter has an efficiency of unity, the second order power ripple will propagate to the DC side. When accounting for the zero-sequence current, the ripple becomes greater and this can be demonstrated. Considering the simplified system in Figure 4 and knowing that the instantaneous power on the AC side is equal to the one on the DC side, the current $i_{dcc}$ on the DC side can be calculated:

$$i_{DCC} = \frac{p_{DCC}}{V_{DC}} = I_{DCC} \cos(\varphi) + I_{DCC} \cos(2\omega t + \varphi) \quad (2)$$

<figure><img src="image_6.png" /><figcaption>Fig. 5. Comparison between the power at the AC side and the simulated and theoretical power at the DC side</figcaption></figure>

where $p_{DCC}$ is the power provided by the DC/DC converter, and $I_{DCC}$ is the current amplitude. The zero-sequence current is of the form:

$$i_0(t) = I_0 \sqrt{2} \cos(\omega t + \varphi) \quad (3)$$

where $I_0$ is zero-sequence rms current. Then, we can write that:

$$i_m = I_{DCC} \cos(\varphi) + I_{DCC} \cos(2\omega t + \varphi) + \frac{I_0 \sqrt{2}}{2} \cos(\omega t + \varphi) \quad (4)$$

Hence, the expression of the power provided by the DC/DC converter and the DC bus capacitors can be written as:

$$p_{DC} = V_{DC} I_{DCC} \cos(\varphi) + V_{DC} I_{DCC} \cos(2\omega t + \varphi) + \frac{V_{DC} I_0 \sqrt{2}}{2} \cos(\omega t + \varphi) \quad (5)$$

It can be seen from Equation 5 that the zero-sequence passing through the DC link has an influence on the power provided. Indeed, this current adds additional ripples on the power.

The simulation results of the studied V2H system are presented in Figure 5. They indicate that the power required by the load contains the ripple at twice the fundamental frequency, seen on the $p_{load}$ curve, as expected. In addition, it can be seen that the DC power $p_{dc}$ contains further ripples due to the zero-sequence current, leading to more power peaks, as discussed previously. Also, the expression (5) has been plotted ($p_{DC}$ Theoretical) and compared to the simulated DC power. It can be seen that it correspond perfectly, hence validating the theoretical calculations.
<figure><img src="image_7.png" /><figcaption>Fig. 6. Capacitors voltage ripple</figcaption></figure>

Alongside its effect on the power, the zero-sequence current passing through the DC link has an impact on the sizing of the capacitors of the DC link. Taking one of the capacitors, the voltage across it can be written as:

$$v_{DCH}(t) = \frac{1}{C_H} \int i_{CH}(t)dt \quad (6)$$

The current passing through the capacitor $i_{CH}(t)$ is half of the zero-sequence current $i_0(t)$. Hence, the expression of the voltage can be found:

$$v_{DCH}(t) = \frac{I_0\sqrt{2}}{2\omega C_H} \sin(\omega t + \varphi) + V_{DCH_0} \quad (7)$$

$$v_{DCH}(t) = \hat{V} \sin(\omega t + \varphi) + \frac{V_{DC}}{2} \quad (8)$$

From (7) and (8), it can be seen that the zero-sequence current causes ripples on the capacitor voltages. This is also confirmed through simulation as shown in Figure 6. Indeed, this current causes ripples that can lead to high peak voltage levels, hence the need of capacitors that can withstand these voltages, leading to an increase in the cost. These ripples can be limited by choosing the appropriate value of capacitance when designing the DC link. It can be derived from (7) and (8):

$$C_H = \frac{I_0\sqrt{2}}{\omega\Delta V} \quad (9)$$

where $\Delta V$ is the peak-to-peak voltage ripple. Using the expression (9), and choosing a limit value for the $\Delta V$, the capacitance needed to limit the ripple is calculated. For instance, considering the V2H study case previously mentioned and the voltage ripples shown in Figure 6, if a limit voltage ripple is, for example, $\Delta V = 100V$ then according to Equation 9 the value of each of the capacitors must be $C_{H/L} \approx 718\mu F$. To achieve a lower voltage ripple, bigger capacitors are needed and hence a compromise between ripple percentage, volume, and cost must be made.

<figure><img src="image_8.png" /><figcaption>Fig. 7. Comparison between the power at the AC side and the power at the DC side when neutral is connected to the fourth leg</figcaption></figure>

## B. Neutral connected to a fourth leg

In the previous subsection, the impact of the zero-sequence current circulating through the DC link was highlighted. Now, the case where the neutral is connected to the mid-point of a fourth leg is investigated. Using the same V2H case study, significant changes in the power dynamics are observed. When examining the power graphs on both the AC and DC sides, as illustrated in Figure 7, it is evident that the additional ripples present in the DC power previously have been eliminated. This observation substantiates that the additional ripples were indeed due to the presence of zero-sequence current in the DC link. As shown in the theoretical expression for DC side power (5), the ripples caused by the zero-sequence current will be nullified if the zero-sequence current is null. Consequently, the remaining ripples at the DC side will be solely due to the twice the fundamental frequency ripple resulting from the single-phase load. This configuration, where the neutral is connected to the midpoint of a fourth leg, effectively prevents the zero-sequence current from circulating in the DC link, thereby eliminating its associated ripples.

In addition, since the DC link is now maintained at a constant voltage, the power fluctuation is absorbed by the source instead of the DC/DC converter. This can also impact the design of the DC bus capacitors as three scenarios can be considered:

* Considering a constant DC bus Voltage.

* Considering a constant DC current.

* Considering a constant DC Power.

The design of the DC bus capacitors is then done depending on the requirements.

By connecting the neutral to the midpoint of the fourth leg, and controlling it so that the neutral voltage n is set to a known voltage point O, the issue of unbal-
<figure><img src="image_9.png" /><figcaption>Fig. 8. Top/Bottom modulation scheme</figcaption></figure>

anced output voltages caused by an unbalanced load is resolved. This configuration also ensures that the zero-sequence current does not return to the DC link, thereby eliminating the previously observed negative impacts such as additional ripples in the DC power. However, this improved configuration comes with certain trade-offs. The inclusion of an additional leg increases the complexity of the system, which can lead to higher initial costs due to the need for more components. Furthermore, the added leg could introduce additional power losses, contingent on the switching techniques used. Despite these potential drawbacks, the benefits of eliminating the zero-sequence current from the DC link can be more significant.

### III. MODULATION TECHNIQUE USING THE NEURAL LEG

Since the fourth leg has been proposed to solve unbalanced voltages problem, it will be modulated in order to act as a neutral leg. In other words, the mid-point of the fourth leg will act as the neutral point of the system. In order to do so, the voltage modulated by this leg $v_{m_n}$ will be equal to half of the DC voltage $V_{DC}$. By doing so, the potential $n$ is controlled so that the voltage $v_{nO}$ is null.

In this paper, the Sinusoidal Pulse Width Modulation (SPWM) switching scheme is used for the first three legs, where a set of three-phase sinusoidal reference signals are compared with a high frequency carrier-wave signal. The same technique will be used on the fourth one, i.e. a DC reference signal equal to half of the DC link voltage will be compared to the carrier-wave signal.

The fourth leg can provide modulation opportunities that were not possible with the other configuration. Unlike the three-leg topology with a neutral connected to

<figure><img src="image_10.png" /><figcaption>Fig. 9. DPWM of each leg</figcaption></figure>

the midpoint of the DC link, it is possible to inject a zero-sequence voltage with third-order harmonics and their multiples to optimize the performance of the converter. Indeed, injecting a zero-sequence voltage in the three-leg topology will systematically induce currents with the same harmonics since the impedance is zero. So these kind of modulations are possible using the 4th leg. For instance, the implementation of Discontinuous Pulse Width Modulation (DPWM) schemes is possible with the four leg inverter. An example is the Top/Bottom DPWM. In such scheme, the goal is to turn off the switching during specific intervals to minimize switching losses and allow to reduce the DC bus voltage for the same RMS AC modulated voltage. During these off intervals, instead of leaving the output voltage floating or at zero, a zero-sequence voltage can be injected to maintain continuity in the output waveform [13]. In this type of modulation, the zero-sequence duty cycle is chosen in a way that only two of the three-phase legs are switched during one switching period, and the third one remains connected to the positive or the negative DC bus. Several clamping strategies exist [14]. In this paper, the "60° DPMW Clamping" strategy, also known as "DPWM2", has been used in which the clamped phase leg changes at every 60° electrical angle, as seen in Figure 8.

These DPWM techniques inherently introduce zero sequence voltages due to the clamping of phases to the DC bus. The advantage of the fourth leg is that it can be controlled to counteract these zero sequence components, ensuring that the neutral point does not drift, which is difficult in the configuration where the neutral is connected to the mid-point of the DC link. When implementing this modulation technique, it is now
possible to lower the switching losses as the legs of the three phases are switching off during specific interval, as seen in Figure 9. However, it can be also seen that the fourth leg is operating all the time at the switching frequency in order to compensate the zero-sequence voltage being injected. In this case, a trade-off is also present since this leg cannot operate at low frequency and hence the same transistor technology is need for the 4th leg to accommodate the high switching frequency, which in turn can increase the overall cost.

## IV. CONCLUSION

This study evaluated the performance of a three-phase embedded charger for Vehicle-to-Home (V2H) applications under unbalanced load conditions, comparing two configurations to solve the unbalanced voltages issue: connecting the neutral point of the load to the DC link midpoint or adding a fourth leg to the converter. Connecting the neutral to the DC link midpoint causes a zero-sequence current to circulate through the DC bus, leading to increased voltage and power ripples in the DC link and complicating the capacitor design. Conversely, the fourth leg configuration eliminates these issues by providing a dedicated path for zero-sequence currents, thereby stabilizing capacitor voltages and maintaining balanced output under unbalanced loads alongside offering more modulation opportunities. In conclusion, the fourth leg configuration proves to be a more effective solution for managing unbalanced loads in V2H applications. However, economical and efficiency studies need to be conducted in order to fully asses these configurations.

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