# High sensitivity surface defect inspection of SiC and smartSiC substrates using a DUV laser-based system

Enrica Cela, Sam Shahidi, Prasant Parangi, Ramesh Shrestha, Gavin Simpson, Julie Widiez, Nicolas Daval, Audrey Chapelle, Séverin Rouchier, Walter Schwarzenbach

► To cite this version:

Enrica Cela, Sam Shahidi, Prasant Parangi, Ramesh Shrestha, Gavin Simpson, et al.. High sensitivity surface defect inspection of SiC and smartSiC substrates using a DUV laser-based system. Defect and Diffusion Forum (Online), 2023, 425, pp.57-61. 10.4028/p-4918s1 . cea-04756899

HAL Id: cea-04756899

https://cea.hal.science/cea-04756899v1

Submitted on 28 Oct 2024

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# High Sensitivity Surface Defect Inspection of SiC and SmartSiC™ Substrates Using a DUV Laser-Based System

Enrica Cela<fnref n="1" />,ᵃ*, Sam Shahidi<fnref n="2" />,ᵇ, Prasant Parangi<fnref n="2" />,ᶜ, Ramesh Shrestha<fnref n="2" />,ᵈ, Gavin Simpson<fnref n="2" />,ᵉ*, Julie Widiez<fnref n="3" />,ᵉ, Nicolas Daval<fnref n="1" />,,g, Audrey Chapelle<fnref n="1" />,ʰ, Séverin Rouchier<fnref n="1" />,ⱼ, Walter Schwarzenbach<fnref n="1" />,ᵢ

**Keywords:** SmartSiC™, Smart Cut™, in-line metrology, defects inspection, DUV laser, unpatterned substrates, defects classification

**Abstract.** SmartSiC™ technology enables the supply of cost-effective and high-quality substrates to support the manufacturing of Silicon Carbide (SiC) Power Devices and the transition to High Volume Manufacturing (HVM) [1]. As detailed in [2] SmartSiC™ is prepared using a poly-crystalline handle wafer, it combines the benefit from both an optimized high quality epi-ready 4H-SiC layer and an ultra high conductivity handle material. Smart Cut™ technology can be extended to SiC 200mm substrates and first SmartSiC™ 200mm sample has been prepared [2]. SmartSiC™ substrates crystal quality is inherited by donor wafers [1, 2] and do not require a systematic control, enabling a new defects monitoring strategy, focusing on surface defects.

This paper describes how a commercially available DUV inspection system was utilized for high sensitivity, high-throughput inspections of 150 and 200 mm 4H-SiC and SmartSiC™ substrates, for the HVM environment. The KLA Surfscan® SP A2 unpatterned wafer inspection system offers the opportunity to complement other inspection technologies to optimize SiC substrate defect control, with low threshold detection, below 150 nm.

## Introduction: SmartSiC™ Defects Inspection Challenges

4H-SiC defect characterization is crucial to guarantee the epitaxial layers' yield. The link between epitaxial layers' extended defects and devices performances has been investigated since many years [4]. Both crystallographic defects inherited from the substrate (such as Basal Plane Dislocations, Stacking Faults and Micro-Pipes) and surface defects were studied as impacting the epitaxial layers' growth. Surface defects of 4H-SiC substrates, such as particles and scratches, can act as nucleation centers for epitaxial layer crystallographic defects, and propagate to product yield-limiting defects, as triangular stacking faults [3, 5].

Production-grade SiC wafers quality control must include defect inspection, as an early, cost-effective means to control quality and final device yield.

As illustrated in Fig. 1 and Fig. 2, SmartSiC™ is a bi-layer SiC engineered substrate composed of a thin layer of 4H-SiC material, ranging from 700 nm to 350 nm, transferred to a specific handle wafer.

<footnote n="1">¹Soitec SA, Chemin des Franques, 38190 Bernin, France</footnote>

<footnote n="2">²KLA+, 1 Technology Drive, Milpitas, CA USA</footnote>

<footnote n="3">³CEA-LETI, 17 avenue des Martyrs, 38054 Grenoble, France</footnote>

<footnote>ᵃenrica.cela@soitec.com, ᵇsam.shahidi@kla.com, ᶜprasant.parangi@kla.com,</footnote>

<footnote>ᵈramesh.shrestha@kla.com, ᶜgavin.simpson@kla.com, ᵈjulie.widiez@cea.fr,</footnote>

<footnote n="9">⁹nicolas.daval@soitec.com, ᵈaudrey.chapelle@soitec.com, ᵈseverin.rouchier@soitec.com,</footnote>

<footnote>ᵢwalter.schwarzenbach@soitec.com</footnote>

<footnote>*Corresponding authors</footnote>
<figure><img src="image_2.png" /><figcaption>Fig. 1. Typical SmartSiC™ stack.</figcaption></figure>

<figure><img src="image_3.png" /><figcaption>Fig. 2. Smart Cut™ process description, as adapted to SiC</figcaption></figure>

Smart Cut™ technology enables replicating the high-quality crystal quality of the donor wafers, selected for their excellent grade. The same donors can be reused multiple times. Thus, SmartSiC™ requires inspection for only surface defects, similar to Silicon.

Typical inspection tools for SiC substrates include surface microscopy, laser light scattering and photoluminescence data collection, to characterize both surface and crystal defects. A lower system throughput and complex inspection setup, however, can limit the process control sampling volume of SiC wafers in a production environment. On the other hand, specific SmartSiC™ design creates the opportunity of using laser scattering-based tools designed for HVM, offering high throughput and high sensitivity.

## Influence of SiC optical properties on inspection systems performance

SiC material exhibits a very low absorption coefficient, resulting in high penetration depth and transparency on a wide portion of the light spectrum. Values reported in the literature for optical penetration depth are extremely high in the UV range (48 µm penetration at room temperature for a 355 nm laser, 8.4 µm at 325 nm [6]).

These material properties can cause surface defects sensitivity limitation, due to sub-surface signal, and local reflectance variation on thin layers stacks. In order to limit the influence of high penetration depth, we considered the optical behavior of SmartSiC™ substrates at 266 nm DUV wavelength.

Most of the reference values for 4H-SiC optical constants are measured in the ultraviolet range, 300 to 360 nm wavelength, commonly used for epitaxial layers characterization. In addition, as shown in [7], dopants concentration strongly influences optical properties. Therefore for our study k extinction coefficient was measured in the DUV range, below 300 nm, on a production grade 4H-SiC wafer used as donor for SmartSiC™ manufacturing (n-doped 4H-SiC with dopants concentration ~5.10¹⁸ at/cm³). We calculated the penetration depth based on the fit of n and k optical constants using a variable angle spectroscopy ellipsometer (Woollam, RC2).
At 266 nm DUV wavelength, the extinction coefficient k was measured at $5.10^{-2}$, lowering the penetration depth into 4H-SiC to 400 nm, reducing the influence of embedded and interface defects for thin layers and limiting local reflectivity variations. The leverage of limiting penetration depth helps to improve surface inspection sensitivity at this wavelength.

To overcome the technical barriers related to high 4H-SiC penetration depth in visible and UV spectral range, a DUV wavelength laser-based inspection system (KLA's Surfscan® SP A2) was used to inspect surface defects on various 4H-SiC and SmartSiC™ substrates.

The scattering of a 60 nm silicate sphere on the top and the bottom of the top SiC layer of a SmartSiC™ stack was simulated as a function of SiC layer thickness for the Surfscan® SP A2 optical system (Fig.3). The graph is based on numerical simulation of light scattering of a sphere on top of film stack, performed based on Mie scattering theory. The signal from the bottom interface is 2 to 3 orders of magnitude less than the signal from the top surface. As a result, a DUV laser-based system can detect and segregate surface defects to achieve a sensitivity of a few tens of nanometers on a conventional 4H-SiC substrate or a SmartSiC™ stack.

<figure><img src="image_4.png" /><figcaption>Fig. 3. Simulated scattering of 60 nm silicate sphere on the top and bottom interface of the top layer of SmartSiC™ substrate.</figcaption></figure>

## DUV inspection sensitivity

Experimental data confirmed the simulation predictions: deposited 50 nm polystyrene latex (PSL) spheres were successfully detected on a production-grade 4H-SiC substrate and 126 nm spheres were likewise detected on various SmartSiC™ stacks (Fig.4).

<figure><img src="image_5.png" /><figcaption>Fig. 4. Deposited PSL spheres detection using Surfscan® SP A2 on: conventional 4H-SiC (Left) and various SmartSiC™ stacks (Center and Right)</figcaption></figure>
Moreover, these results were obtained at a throughput compatible with HVM requirements. For example 150 mm SmartSiC™ wafers were measured at 125 wafers per hour throughput.

## Real Defects Detection and Classification

Production grade SmartSiC™ substrates, both 150 and 200 mm, were inspected in the same configuration as the wafers deposited with artificial defects, to confirm the sensitivity results on real defects. The defects coordinates issued from the DUV inspection system were reviewed using a scanning electron microscope (SEM, FEI Versa 3D). As illustrated in Fig. 5, surface particles below 300 nm were successfully detected on SmartSiC™ substrates.

<figure><img src="image_6.png" /><figcaption>Fig. 5. SEM review images gallery illustrating SmartSiC™ defect types</figcaption></figure>

Not all SiC defects types are of equal significance from a manufacturing point of view. The ability to identify and separate “cleanable” versus “non-cleanable” defects is crucial to achieving “defect-free” substrates. Simultaneous brightfield and darkfield data collection channels were used on the Surfscan® SP A2 system to classify defects based on the optical signature. “Non-cleanable” defects showed a stronger signal on the brightfield channel, whereas “cleanable” defects are mostly detected on the darkfield channel. Based on this observation, a classification rule was established to segregate defect categories with no impact on inspection sensitivity or throughput.

Detection and classification results are illustrated in Fig. 6 for a production grade 150 mm SmartSiC™ substrate:

<figure><img src="image_7.png" /><figcaption>Fig. 6. SmartSiC™ defects detection and classification using DUV darkfield and visible brightfield inspections: maps of signal-based classification for “cleanable” (Left) and “non-cleanable” defects (Right)</figcaption></figure>

To demonstrate the classification accuracy on a statistic sample of wafers, SmartSiC™ substrates were inspected using a Nomarski confocal differential interference contrast microscope (Lasertec, SICA88) and images were manually reviewed. Classification accuracy achieved is above 85%, as summarized in Table 1.
<table><caption>Table 1. Classification result compared to manual microscope images review</caption><thead><tr><th>SmartSiC<sup>TM</sup><br>substrates<br>group</th><th>Total defects<br>count (300 nm<br>threshold)</th><th>Non-cleanable<br>defects<br>(classification)</th><th>Non-cleanable<br>defects (manual<br>review)</th><th>Binning<br>accuracy</th></tr></thead><tbody><tr><td>A</td><td>598</td><td>46</td><td>51</td><td>90%</td></tr><tr><td>B</td><td>345</td><td>81</td><td>86</td><td>94%</td></tr></tbody></table>

## Summary

In this work, a production-worthy, DUV laser-based inspection system, the Surfscan® SP A2 was used to perform high-sensitivity defect inspection on various SiC substrates. Multiple SmartSiC™ stacks were inspected at a 126 nm detection threshold. Sub-micron particles detection was confirmed on real particles and defects classification was successfully demonstrated. All the results were obtained at HVM compatible requirements on both 150 and 200 mm substrates.

SmartSiC™ technology, replicating the crystal quality of a donor wafer, allows for a new approach for defect monitoring, focusing on surface defects, similar to Silicon. This creates the opportunity of an inspection combining high sensitivity and high throughput. Unique SmartSiC™ engineered substrates coupled with well-suited inspection and metrology systems will help to drive lower manufacturing costs to enable the evolving SiC power device market.

## Acknowledgments

The SmartSiC™ wafers development has been performed in partnership with CEA-LETI as part of the Soitec and Leti's Substrate Innovation Center.

This work is supported by the H2020 - ECSEL JU programme of the European Union under the grant of the TRANSFORM project 'Trusted European SiC Value Chain for a greener Economy' (ECSEL JU Grant No. 101007237)

## References

[1] S. Rouchier et al., "150 mm SiC engineered substrates for high-voltage power devices", ECSCRM 2021

[2] W. Schwarzenbach et al., "SmartSiC™: Boosting SiC performance for high-voltage power applications", ICSCRM 2022

[3] D. Baierhofer et al., Material Science in Semiconductor Processing, vol 140 (2022), 106414

[4] T. Kimoto, Japanese Journal of Applied Physics, vol 54 (2015), 040103

[5] H. Matsuhata et al., Microscopy (2017), pp. 103-109

[6] S.G. Sridhara et al., Materials Science and Engineering, B61-62 (1999), pp. 229-233

[7] R. Weingärtner et al., Materials Science and Engineering, B80 (2001), pp. 357-361