# Design Considerations and Validation of a GaN e-HEMT-Based Cryogenic Power Converter

Jisun Ham, Junyeol Maeng, Chaemin Im, Dongsu Seo, Jaheum Koo,
Seungyong Hahn, Shenghui Cui

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Jisun Ham, Junyeol Maeng, Chaemin Im, Dongsu Seo, Jaheum Koo, et al.. Design Considerations and Validation of a GaN e-HEMT-Based Cryogenic Power Converter. The 26th European Conference on Power Electronics and Applications, GDR SEEDS France & EPE Association, Mar 2025, Paris, France. 10.34746/epe2025-0166 . hal-05108337

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# Design Considerations and Validation of a GaN e-HEMT-Based Cryogenic Power Converter

Jisun Ham, Junyeol Maeng, Chaemin Im, Dongsu Seo,

Jaheum Koo, Seungyong Hahn and Shenghui Cui

Department of Electrical and Computer Engineering, Seoul National University

1 Gwanak-ro, Gwanak-gu, Seoul 08826

Seoul, Korea

E-Mail: wltjs917@snu.ac.kr, junyul7@snu.ac.kr, nuser1@snu.ac.kr, simon9313@snu.ac.kr,

zaza0388@snu.ac.kr, hahnsy@snu.ac.kr, cuish@snu.ac.kr

## ACKNOWLEDGMENT

This work was supported by the Korea Institute of Energy Technology Evaluation and Planning(KETEP) grant funded by the Korea Government(MOTIE)(20224000000160, DC Grid Energy Innovation Research Center), by the National Research Foundation of Korea(NRF) grant funded by the Korea government(MSIT)(RS-2022-NR068574)

*Index Terms*—Cryogenic, aerospace, electrified aircraft, gallium nitride (GaN), high electron mobility transistor (HEMT), AC-DC converter, power factor correction.

*Abstract*—As efforts to reduce CO₂ emissions grow, cryogenic power electronic converters are gaining attention for applications in electric propulsion, aerospace, and superconducting technologies. This paper presents the design and experimental validation of a power converter using GaN enhancement-mode high electron mobility transistors (e-HEMTs) optimized for cryogenic environments. Losses and efficiency are compared at room temperature (RT) and cryogenic temperature (CT), highlighting the influence of temperature on device characteristics and converter performance. Results show significant loss reductions at CT, with air cooling for RT testing and liquid nitrogen for CT experiments. These findings demonstrate the viability of GaN e-HEMT-based converters in cryogenic applications.

## I. INTRODUCTION

In response to the rapidly changing global climate, regulations aimed at reducing CO₂ emissions are on the rise. As a result, new standards are being established for the transportation sector, which contributes a significant portion of CO₂ emissions, and research into electric propulsion is actively underway. Among potential fuel

sources for electric propulsion, hydrogen and liquified natural gas (LNG) are gaining considerable attention due to their economic viability [1], [2]. In electric propulsion systems using hydrogen and LNG, the process of heating the fuel is essential. In this process, the loss generated by power electronic converters can be utilized to aid in heating the fuel, effectively providing a cooling benefit to the system without additional cost [2]. Beyond electrically powered aircraft and ships, cryogenic power electronic converters are also applicable in aerospace and superconducting technologies, making this a growing area of research as applications expand.

Research on cryogenic power electronic converters initially aimed to develop converters capable of functioning in cryogenic environments, such as aerospace [3], [4]. Power semiconductor devices have attracted significant attention among the various components of these converters as their performance improves at cryogenic temperatures. For instance, silicon (Si) field-effect transistors (FETs) and gallium nitride (GaN) enhancement-mode high electron mobility transistors (e-HEMTs) experience a reduction in on-resistance ($R_{DS(ON)}$) as the temperature drops [5], [6]. In silicon-based devices, $R_{DS(ON)}$ increases again at temperatures below 100 K due to carrier freeze-out [7]. This phenomenon occurs at extremely low temperatures, where electrons lack sufficient thermal energy to transit into the conduction band. In contrast, GaN devices exhibit a decrease in $R_{DS(ON)}$ down to 4 K without experiencing carrier freeze-out [8]. For low-voltage silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs), the channel resistance component of $R_{DS(ON)}$ becomes dominant at lower temperatures and has a negative temperature coefficient, causing $R_{DS(ON)}$ to increase as the temperature drops. SiC MOSFETs also experience
carrier freeze-out, further contributing to the increase in $R_{DS(ON)}$. Consequently, SiC MOSFETs are less suited for cryogenic applications, and current research on high-efficiency, high-density power converters is primarily focused on Si and GaN-based devices.

Some studies compare the effectiveness of cryogenic converters by simulating device characteristics at cryogenic temperatures [9], [10], while others focus on physical hardware design [11]–[14]. In [11], a 40 kW cryogenically cooled three-level active neutral point clamped inverter was designed using Si MOSFETs as the power semiconductor devices. The full-load loss of the converter was reduced by 30% at cryogenic temperatures compared to room temperature. Still, only the power section operates in a cryogenic environment, while the isolated power supply and gate driver operate in a gaseous nitrogen ($N_2$) environment. In [12], a 1 kW GaN-based three-level power converter was developed. Efficiency and losses were measured, but equipment limitations restricted the test to 133 K. In [13], a 1 MW inverter was designed using SiC devices, as high-current Si MOSFETs or GaN HEMT devices were unavailable at the required voltage level. Since SiC MOSFET performance deteriorates at cryogenic temperatures, liquid nitrogen ($LN_2$) cooling was applied only to the inductor, while gaseous $N_2$ cooling was used for the power converter section. Thermal insulation was achieved by attaching foams to the cooling tube, allowing the gate driver and auxiliary components to operate near room temperature. In [14], a 3 kW synchronous buck converter using 650 V GaN e-HEMT devices was designed. At a 1700 W load, losses were reduced by about 37% at cryogenic temperatures compared to room temperature. In this design, the gate driver operated at cryogenic temperatures, but the auxiliary power supply and DC-link capacitors remained at room temperature.

This paper outlines the hardware design for a power electronic converter that takes into account device characteristics at cryogenic temperatures. Although numerous studies have characterized GaN e-HEMT devices at cryogenic temperatures [5], [6], [10], [15]–[18], there is a lack of research on designing converters using GaN e-HEMTs. In the research conducted so far, switching-mode power supplies (SMPS) for powering auxiliary components have demonstrated poor performance at cryogenic temperatures, leading them to operate at temperatures higher than room temperature or cryogenic conditions. This study analyzes the characteristics of SMPS at cryogenic temperatures based on experimental data. A power factor correction (PFC) circuit using GaN e-HEMT devices is developed, and the hardware

design is validated through experimental testing. The design does not include cryogenically cooled inductors. Furthermore, the efficiency and losses of the power electronic converters are compared and analyzed at both room temperature (RT) and cryogenic temperature (CT). Air cooling is used for RT experiments, while $LN_2$ is used for cryogenic testing.

<figure><img src="image_2.png" /><figcaption>Fig. 1: Totem-pole PFC topology.</figcaption></figure>

## II. DEVICE CHARACTERISTICS AT CRYOGENIC TEMPERATURE

The hardware developed in this paper is a totem-pole PFC converter, as shown in Fig.1. Unlike the previously studied hardware in existing literature like three-phase inverters, flying capacitor multilevel converters, and buck converters, a single-phase PFC converter is selected to address hotel loads in electric propulsion systems. In this design, GaN e-HEMT devices are used for the fast-switching leg, while Si superjunction (SJ) MOSFETs handle the 60 Hz synchronous rectification to enhance overall efficiency.

Selecting the proper devices is crucial for fabricating a cryogenic power electronic converter. While most devices are only guaranteed to operate down to around -50 °C according to their datasheets, targeting cryogenic application requires analyzing and choosing devices based on their performance at these lower temperatures. The remainder of Section II explores the cryogenic characteristics of the main components used in the power converter.

### A. GaN e-HEMT

GaN e-HEMTs have a unique physical structure and properties, making them a promising candidate for cryogenic applications. These devices conduct through a two-dimensional electron gas (2DEG), and the total resistance is the sum of the contact, source-to-gate, gate-to-drain, and 2DEG channel resistances. Among these, the 2DEG channel resistance is dominant. As the temperature decreases, $R_{DS(ON)}$ decreases due to
<figure><img src="image_3.png" /><figcaption>Fig. 2: R<sub>DS(ON)</sub> comparison between RT and CT (a) GaN e-HEMT (b) Si SJ MOSFET.</figcaption></figure>

the increase in electron mobility. Additionally, because
carrier freeze-out does not occur in the 2DEG, R<sub>DS(ON)</sub>
continues to decrease as the temperature drops [10], [16],
[17]. Switching speeds are also improved as transcon-
ductance increases at CT, and studies have shown that
the breakdown voltage remains almost constant between
RT and CT [19]. These characteristics make GaN e-
HEMTs well-suited for high-frequency switching cryo-
genic power converters.

The GaN device used in the cryogenic power con-
verter is the GS66508B from GaN Systems. As shown
in Fig.2a, the measured R<sub>DS(ON)</sub> of the device is 44 mΩ
at 296 K and 7 mΩ at 77 K, indicating that the R<sub>DS(ON)</sub>
is approximately 6.3 times lower at CT than at RT.
Therefore, cryogenic power converters using GaN e-
HEMTs are expected to have reduced power semicon-
ductor losses, especially conduction loss.

B. Si Power MOSFET

The cryogenic characteristics of Si power MOSFET
devices have been extensively studied through various
tests and analyses [2], [5], [11], [17], [20]. In Si power
MOSFETs, R<sub>DS(ON)</sub> decreases as temperature drops due
to increased carrier mobility from reduced lattice scat-
tering. However, below 100 K, carrier freeze-out occurs,
causing R<sub>DS(ON)</sub> to rise. Nevertheless it still remains
lower than at RT. The threshold voltage increases as
intrinsic carrier concentration decreases with tempera-
ture, contributing to stable operation. Additionally, the
increased inversion layer mobility at low temperatures
leads to faster switching speeds reducing switching
losses. However, the breakdown voltage decreases at
lower temperatures due to enhanced impact ionization as
the mean free path increases, requiring careful considera-
tion during hardware design to account for this reduction.

The 650 V Si SJ MOSFETs are widely used for
totem-pole PFC connected to 220 V mains, since the
DC-link voltage is typically designed to be 350 400
V. However, such design imposes risk of avalanche
breakdown at cryogenic temperature due to the afore-
mentioned reason. Therefore, The Si power MOSFET
SPW55N80C3FKSA1 from Infineon, rated at 800 V is
used in this paper. At 77 K, the breakdown voltage is
estimated to be around 560 V, approximately 0.7 times
that of room temperature in accordance with literature
[17]. Fig.2b shows the measured R<sub>DS(on)</sub> of the device,
which is 67 mΩ at 296 K and 11 mΩ at 77 K—a
reduction of about 6.1 times. Since this device is used
for synchronous rectification with 60 Hz switching, it
conducts for most of the cycle. Therefore, the cryogenic
power converter utilizing this device is expected to
exhibit excellent performance at CT.

C. Gate Driver

There are two major categories of gate drivers: bipo-
lar junction transistor (BJT)-based and complementary
metal-oxide-semiconductor (CMOS)-based. BJT-based
gate drivers are not suitable for cryogenic converters.
At low temperatures, the bandgap of the emitter region
decreases, significantly reducing emitter injection effi-
ciency. Although the switching speed increases due to
an increase in the diffusion coefficient and a decrease in
carrier lifetime, this advantage is outweighed by the re-
duction in current gain. On the other hand, CMOS-based
gate drivers are well-suited for cryogenic applications.
As the temperature decreases, carrier mobility improves,
and transconductance increases, enabling high-frequency
switching at cryogenic temperatures. Additionally, the
increase in threshold voltage enhances noise immunity.
However, reliability challenges, such as gate degrada-
tion, must also be considered. In conclusion, CMOS-
based gate drivers are the more appropriate choice for
cryogenic power electronic converters.

D. Passive Components

It is essential to consider the cryogenic characteristics
of capacitors and resistors in converter design, as these
characteristics are influenced by the materials that com-
pose the components [17], [20]. For capacitors, ceramic
capacitors are commonly used as snubber capacitors,
while electrolytic or film capacitors serve as DC-link
capacitors. Commercial ceramic capacitors, such as those
made from X7R material, tend to experience a decrease
in capacitance at extremely low temperatures. NP0, a
ceramic material with stable properties at CT, is more
<table><caption>TABLE I: Output Voltage of 5V-to-9V Murata Power Supply According to Load</caption><thead><tr><th rowspan="2">Mfr. Part number</th><th rowspan="2">Temp</th><th colspan="4">Load [%]</th></tr><tr><th>6</th><th>4</th><th>2</th><th>0</th></tr></thead><tbody><tr><td rowspan="2">MEJ1S0509SC</td><td>276 K</td><td>9.30</td><td>9.33</td><td>9.38</td><td>11.91</td></tr><tr><td>77 K</td><td>4.76</td><td>5.78</td><td>7.30</td><td>10.19</td></tr><tr><td rowspan="2">MEJ2S0509SC</td><td>276 K</td><td>9.70</td><td>9.80</td><td>9.85</td><td>11.20</td></tr><tr><td>77 K</td><td>4.90</td><td>6.22</td><td>8.00</td><td>14.90</td></tr></tbody></table>

suitable for use as a snubber capacitor. In terms of DC-link capacitors, electrolytic capacitors perform poorly in cryogenic conditions, making polypropylene or PPS film capacitors a better choice. For resistors, while cryogenic properties vary with the material, widely used thin film and metal film resistors maintain characteristics similar to those at RT, making them suitable for cryogenic applications.

### III. KEY CONSIDERATIONS FOR CRYOGENIC POWER CONVERTER DESIGN

#### A. SMPS Operation

To drive power semiconductor devices, it is essential to apply the appropriate gating signal, which requires a gate driver, a PWM signal from the control board, and an auxiliary switching-mode power supply (SMPS). In most cryogenic power converter designs in literature, the SMPSs are designed to operate at RT because its output voltage varies at CT. Recently, efforts have begun to design SMPSs that function at CT [21]. However, the SMPS [21] still experiences voltage drops. The voltage variation occurs in CT conditions because the analog control of the SMPS is affected by temperature changes. When circuits are comprised of timer devices, timing resistors, and capacitors operating at CT, the resistance values shift, altering the output voltage. A study [21] demonstrated experimentally that output voltage fluctuates with changes in frequency and duty cycle of the timer devices at CT, and this phenomenon is also observed in commercial products.

Some commercial SMPSs fail to operate at CT, while others exhibit significant voltage fluctuations. Among the tested products, Murata devices operated successfully in 77 K condition. Table I presents the results of testing Murata devices with different power ratings but identical output voltage under varying loads. The findings show that the output voltage decreases as the load increases. Therefore, for the stable operation of the converter, it is recommended that the SMPS operate at room

temperature and supply the output voltage to the power converter board. On the power converter board, sufficient capacitors should be added to ensure that the voltage remains stable while the gate driver outputs the voltage.

#### B. Increasing Transconductance of GaN e-HEMT

GaN e-HEMTs can operate at higher switching speeds due to increased electron mobility and the corresponding rise in transconductance as temperature decreases. The transconductance of the GS66508B at RT and CT is shown in Fig.3. The transconductance is about 2 to 2.5 times greater in CT than in RT. Higher switching speeds reduce switching losses in power semiconductor devices, improving the overall efficiency of converters. However, as the switching speed increases, the device becomes more sensitive to parasitic components, potentially leading to failures that are not observed at RT. Additionally, self-turn-on issues caused by high $dv/dt$ and gate voltage overshoot problems due to high $di/dt$ are more likely to arise. To mitigate these risks, PCB layouts should minimize parasitic inductance, and switching devices without kelvin source connections are not recommended.

#### C. Gate Driver Operation

While considering the characteristics of power semiconductor devices is crucial in designing cryogenic power electronic converters, the characteristics of the gate driver, which operates power semiconductor devices, are also essential. As mentioned in Section II, it is recommended to use CMOS-based devices rather than BJT-based ones for gate drivers. Since not all devices are guaranteed to operate below -50°C, it is essential to verify whether the selected gate driver functions properly in cryogenic conditions.

Testing various isolated gate drivers from multiple manufacturers revealed that most of them failed to operate in cryogenic conditions. Among the relatively simpler and less feature-rich non-isolated gate drivers, IXDN609SI from IXYS was identified with experimental

<figure><img src="image_4.png" /><figcaption>Fig. 3: GS66508B transconductance at RT and CT [18].</figcaption></figure>
<figure><img src="image_5.png" /><figcaption>Fig. 4: IXDN609SI output voltage comparison between RT and CT (a) turn-on process (b) turn-off process.</figcaption></figure>

tests to perform well in cryogenic environments. The measured turn-on and turn-off processes of this device at different temperatures are shown in Fig.4. It was observed that both turn-on and turn-off processes exhibit minimal delay at CT, while turn-off voltage is more oscillatory under CT conditions. After conducting over 10 tests to validate the stable gating performance of this device under cryogenic conditions, it was incorporated into the design.

# IV. EXPERIMENTAL RESULTS

## A. Hardware Validation

The cryogenic power converter hardware was designed and developed based on Section II and III. The main components of the cryogenic power converter are summarized in Table II, and the prototype hardware is shown in Fig.5a. The experimental setup for verifying

<figure><img src="image_6.png" /><figcaption>Fig. 5: (a) Designed cryogenic power converter prototype (b) experiment setup.</figcaption></figure>

<table><caption>TABLE II: Component List of Designed Hardware</caption><thead><tr><td>Component</td><td>Part number</td><td>Parameters</td></tr></thead><tbody><tr><td>GaN e-HEMT</td><td>GS66508B</td><td>650 V, 30 A</td></tr><tr><td>Si SJ MOSFET</td><td>SPW55N80C3FKSA1</td><td>800 V, 54.9 A</td></tr><tr><td>Gate driver</td><td>IXDN609SI</td><td></td></tr><tr><td>Snubber capacitor</td><td>CAA572C0G2J204J640LH</td><td>0.2 uF</td></tr><tr><td>DC-link capacitor</td><td>MKP1848H61050JK2</td><td>10 uF</td></tr></tbody></table>

<table><caption>TABLE III: Parameters of Testing Condition</caption><thead><tr><td>Symbol</td><td>Parameter</td><td>Nominal value</td></tr></thead><tbody><tr><td>P</td><td>Rated Power</td><td>3 kW</td></tr><tr><td>V<sub>grid</sub></td><td>Grid Voltage</td><td>220 V<sub>ll,rms</sub></td></tr><tr><td>V<sub>dc</sub></td><td>DC-Link Voltage</td><td>350 V</td></tr><tr><td>L</td><td>PFC Inductance</td><td>400 μH</td></tr><tr><td>f<sub>sw</sub></td><td>GaN Switching Frequency</td><td>60 kHz</td></tr></tbody></table>

the functionality of the designed hardware is depicted in Fig.5b. Air cooling was utilized for the RT tests, while direct LN₂ cooling was applied for the CT tests. The experimental verification parameters are also summarized in Table III.

As illustrated in Fig.6, the converter demonstrates successful current control at both RT and CT, synthesizing a sinusoidal current in phase with the grid voltage. The SMPS operating at RT ensures a stable voltage supply, enabling reliable gate driving, as seen in the VGS waveform in Fig.6b, where the voltage remains stable without fluctuations during gate driver operation. These results confirm that the hardware design is appropriate, demonstrating both stable operation and effective control under the tested conditions.

## B. Efficiency Comparison and Loss Analysis

To compare the converter's efficiency at different operating temperatures, measurements were conducted using the WT5000 from YOKOGAWA. The measured efficiency is presented in Fig.7. As shown, the same hardware demonstrates varying efficiency levels depending on the operating temperature, with higher efficiency observed at CT compared to RT. This improvement is primarily attributed to the significant reduction in RDS(ON), as illustrated in Fig.2. With the designed hardware, the peak efficiency is 99.1%, and an efficiency improvement of 0.6% at a maximum load of 3 kW was achieved.
<figure><img src="image_7.png" /><figcaption>Fig. 6: 3 kW current control waveform (a) at RT (b) at CT.</figcaption></figure>

The influence of $R_{DS(ON)}$ is more clearly highlighted in Fig.8. The losses in the power electronic converter are categorized into switching losses and conduction losses of the power semiconductor devices. These losses were theoretically calculated using the measured loss data and the $R_{DS(ON)}$ values at RT and CT. As discussed in Sections II and III, switching losses are expected to decrease at CT. However, this trend is not apparent in Fig.8. This discrepancy is due to the difference in gate resistance values used between RT and CT. At RT, a gate resistance of 10 Ω for turn-on and 2 Ω for turn-off is employed. If these same resistance values were applied at CT, the switching speed would become excessively fast, increasing the risk of overvoltage-induced breakdown. Therefore, at CT, gate resistances of 22 Ω for turn-on and 9 Ω for turn-off were used. The increased gate resistance at CT results in slightly higher switching losses compared to RT. However, a significant reduction in conduction losses is observed at CT due to the substantial decrease in $R_{DS(ON)}$. Despite the higher gate resistances, reduction in $R_{DS(ON)}$ plays a key role in loss mitigation, enabling the developed hardware to achieve an 18 W reduction in total losses at maximum load.

<figure><img src="image_8.png" /><figcaption>Fig. 7: Efficiency comparison between RT (296 K) and CT (77 K).</figcaption></figure>

<figure><img src="image_9.png" /><figcaption>Fig. 8: Power converter loss comparison between RT (296 K) and CT (77 K).</figcaption></figure>

V. CONCLUSION

This paper outlines the process and key considerations for designing cryogenic-oriented hardware for power converter systems, taking advantage of freely available cryogenic cooling. Based on these considerations, the hardware was developed after conducting pretests to verify the cryogenic operability of the selected components. For experimental validation, current control was performed at both RT and CT, and efficiency was measured under various load conditions. The efficiency at CT was found to be higher than at RT, with an improvement of 0.6 %p at the maximum load of 3 kW. In terms of losses, conduction losses were significantly reduced due to the decreased $R_{DS(ON)}$, resulting in a reduction of 18 W at maximum load. By following the design process detailed in this paper, power electronic converters can be optimized for cryogenic environments, enabling higher efficiency and paving the way for high-efficiency, high-density power converters with potential applications in future electric propulsion systems.
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