# Fault injection attacks on unpowered devices

Paul Grandamme, Lilian Bossuet, Jean-Max Dutertre

► To cite this version:

Paul Grandamme, Lilian Bossuet, Jean-Max Dutertre. Fault injection attacks on unpowered devices. Workshop on Practical Hardware Innovations in Security Implementation and Characterization (PHISIC), May 2025, Gardanne, France. hal-05082401

HAL Id: hal-05082401

https://hal.science/hal-05082401v1

Submitted on 23 May 2025

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Distributed under a Creative Commons Attribution 4.0 International License
# Fault injection attacks on unpowered devices

Paul Grandamme¹,², Lilian Bossuet¹, Jean-Max Dutertre²

¹Laboratoire Hubert Curien, Université Jean Monnet, CNRS, Saint-Étienne - {firstname.name}@univ-st-etienne.fr

² Mines Saint-Étienne, CEA Leti, Centre CMP, Gardanne - dutertre@emse.fr

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## Context

Most of **fault injection attacks** are carried out on components that are operating and therefore **powered**. Internal sensors can detect the attack and allow the device to react.

## Research question

Can we perform fault injection attacks on **unpowered devices**?

## Fault injection means

### X-ray

* Irradiator or tomograph

* W target

* Localized with W or Pb shields

### Laser

* 1,064 nm (near IR)

* Pulse of 0.9 s at 1 Hz

* Power of 1 W

* x20 magnification

* 5 µm spot

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## Fault models

### X-ray [1]

1. $e^+/h^-$ pairs are separated by the electric field, $e^+$ escapes through the control gate, $h^-$ are injected into the floating gate and recombine. The floating gate transistors are discharged.

2. Charges are trapped in the floating gate oxide.

3. Charges stored in the floating gate obtain enough energy to escape the potential well (**photoemission**).

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### Laser [2]

* Laser beam exposure causes the **temperature** to rise

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* The rise in temperature leads to the **discharge** of floating gate transistors.

## From the physical level to the logic level to the memory level

<figure><img src="image_7.png" /><figcaption>**Physical level**</figcaption></figure>

<figure><img src="image_8.png" /><figcaption>**Logic level**</figcaption></figure>

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* Floating gate transistors used in **Flash** memories (constants, access rights, cryptographic keys, ...)

* **Unidirectional** and **data-dependent** fault model

* **Persistent** faults

<caption>**Memory level**</caption>

## Conclusion

### Unpowered devices

* Reality of the threat of such attacks

* Cryptographic application: Persistent Fault Analysis (PFA)

* Hardware sensors not working

* No synchronisation required

<table><thead><tr><th></th><th>Accuracy</th><th>Cost</th><th>Understanding of the fault model</th><th>Backside access</th></tr></thead><tbody><tr><th>X-ray</th><td>Red</td><td>Red</td><td>Red</td><td>Green</td></tr><tr><th>Laser</th><td>Green</td><td>Red</td><td>Green</td><td>Red</td></tr></tbody></table>

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## Perspectives

* Attacks on **reconfigurable** circuits (FPGA, SoC-FPGA)

* Attacks on **secure** devices (hardware sensors, EDAC codes)

* Design of **countermeasures** (hardware sensors or analysis specific to attacks on non-powered circuits)

## Publications

[1] Grandamme, Bossuet, Dutertre, "X-Ray Fault Injection in non-volatile memories on Power OFF devices", PAINE 2023

[2] Grandamme et al. "Switching Off your Device Does Not Protect Against Fault Attacks", TCHES 2024

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Laboratoire
Hubert Curien

UMR • CNRS • 5516 • Saint-Étienne

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MINES
Saint-Étienne

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anr®

agence nationale
de la recherche