# Reconfigurable Parallel Interleaved Three-Phase Inverter for Aeronautical Applications

D.M.A. Avila, Bernardo Cougo, Thierry A. Meynard, Guillaume Gateau, M.A.S. Mendes

► To cite this version:

D.M.A. Avila, Bernardo Cougo, Thierry A. Meynard, Guillaume Gateau, M.A.S. Mendes. Reconfigurable Parallel Interleaved Three-Phase Inverter for Aeronautical Applications. ESARS'12: International conference on Electrical Systems for Aircraft, Railway and Ship propulsion, 2012, Bologna, Italy. pp.1-6, 10.1109/ESARS.2012.6387455. hal-03902949

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# Reconfigurable Parallel Interleaved Three-Phase
Inverter for Aeronautical Applications

D. M. A. Avila

Federal Center of Technological Education
of Minas Gerais (CEFET-MG)

Belo Horizonte, Brazil, CEP 30480-000

Email: david@deii.cefetmg.br

B. Cougo, T. Meynard, G. Gateau

LAPLACE, University of Toulouse
2 rue Charles Camichel

31071 Toulouse, France

Email: cougo@laplace.univ-tlse.fr

M. A. S. Mendes

GEP, Federal University of Minas
Gerais (UFMG)

Belo Horizonte, Brazil, CEP 31270-901

Email: marcoss@cpdee.ufmg.br

***Abstract***– This paper presents a reconfigurable parallel interleaved inverter connected through InterCell Transformers (ICT) and driving two separate and identical AC loads. The proposed system can be connected to both 270V and 540V bus DC available in aeronautical applications, without any difference in the system operation and with no need of oversizing switches, filters and passive components. This feature is achieved through the reconfiguration of the inverters, by connecting the DC link of each sub-system in parallel or in series. This paper also presents a study of the impact of differences between the two separate loads on the system behavior, especially with regard to the magnetic flux ripple in the ICTs and the capacitors voltage balance. Simulation and experimental results confirm the operation and effectiveness of the proposed system.

## I. INTRODUCTION

Modern aircrafts make use of High Voltage DC (HVDC) buses of 270V and/or 540V to distribute energy to different loads located at different parts of the airplane [1]. Furthermore, there is a growing replacement of conventional pneumatic devices by electrical ones in order to decrease the device's weight and increase its efficiency [2].

Multilevel converters are promising topologies to drive these electrical devices since they allow adapting voltage and current levels of the load to the available switches. They also increase the apparent frequency of the output voltages and currents, with the resulting decrease in the filter weight.

Multilevel inverters have been the subject of research in the past three decades, with special focus given on series converters such as Neutral Point Clamped (NPC) [3], Flying Capacitor (FC) [4] and Stacked Multicell Converter (SMC) [5].

In recent years, the dual of multilevel series inverters, the parallel interleaved inverters, have also received special attention [6,7]. Parallel connection of two or more inverters is possible by the use of inductors, as shown in Fig. 1. The main advantages of these converters are the capability to supply higher currents to the load using standard semiconductor devices and the possibility of reducing the ripple current in the load. Another important advantage of paralleling inverter when compared to a conventional inverter is that, for the same ripple current in the load, an association of $N_I$ paralleled inverters brings a reduction of the total energy stored in the output inductors at a ratio of $N_I^2$. Storing less energy in the output inductors reduces system volume and weight and increases the dynamic response of the system [8,9].

There are several modulation methods developed for series multilevel inverters and due to duality rules, they can also be applied to parallel multilevel converters [10,11].

The sinusoidal PWM modulation method has been widely used in paralleled inverters, together with different modulation techniques related to the disposition of the $N_I$ triangular carriers. The most common techniques are the Phase Shift (PS), Phase Disposition (PD), Phase Opposite Disposition (POD) and Alternate Phase Opposite Disposition (APOD), which are well described in [12]. PD method is the most efficient regarding the reduction of harmonics in the load voltage [12], while POD method leads to lower magnetic flux ripple in coupled inductors [11].

<figure><img src="image_2.png" /><figcaption>Fig. 1. Parallel interleaved three-phase inverters connected through coupled ($M \neq 0$) or uncoupled inductors ($M=0$).</figcaption></figure>

Inductors used to connect the output of inverters in parallel can be magnetically coupled ($M \neq 0$) or not ($M = 0$), where M is the mutual inductance between the pair of inductors used for each phase of the load. Magnetically coupled inductors, which are also called InterCell Transformer (ICT) [13], have the main advantage of reducing the high frequency current ripple in each commutation cell, which reduces the high frequency losses in the windings of the magnetic component as well as in the switches of the commutation cells [13].

The maximum magnetic flux in ICTs is the main parameter used to determine the minimum required cross-section of the ICT magnetic core to avoid saturation. Thus, reducing the magnetic flux in the ICT core reduces the size and weight of these components. The ICT design is presented in details in [13].

### A. Parallel three-phase inverters

The simplified one phase diagram for two paralleled inverters system is shown in Fig. 2. For the case of strong inductive
loads such as an electrical machine, the magnetic flux $\phi$ in the ICT core only depends on the currents flowing through each ICT winding [11] and can be expressed as

$$ \phi(t) = \frac{M \cdot I_1(t) - M \cdot I_2(t)}{N} = \frac{M \cdot I_{dif}(t)}{N} \quad (1) $$

where N is the number of turns in each winding, M is the magnetizing inductance of the ICT and $I_1$ and $I_2$ are, respectively, the currents through ICT windings 1 and 2. Equation (1) shows that the magnetic flux inside the ICT core can be known from the measurement of currents $I_1$ and $I_2$, and is directly proportional to the differential current ($I_{dif}$), where $I_{dif} = I_1 - I_2$. The magnetic flux can also be written in terms of the integral of voltages $V_{x1}$ and $V_{x2}$ where $x \in \{U, V, W\}$ (see Fig. 1), as

$$ \phi(t) = \frac{M}{N} \cdot \frac{\int (V_{x1}(t) - V_{x2}(t)) dt}{(L - M)} \quad (2) $$

Unlike the system shown in Fig. 1, parallel connected inverters can also drive separate loads. Paralleled inverters driving separate loads can be found in some applications inside an aircraft such as special AC machine with two independent three-phase windings and multiple small and identical loads.

In the case of driving separate loads, the simplified one phase circuit is shown in Fig. 3 and the equation of ICT magnetic flux in function of the integral of each inverter output voltage becomes

$$ \phi(t) = \frac{M}{N} \cdot \frac{\int [(V_{x1}(t) - V_{n1}(t)) - (V_{x2}(t) - V_{n2}(t))] dt}{(L_{load} + L) - (M_{load} + M)} \quad (3) $$

where $V_{n1}$ and $V_{n2}$ are, respectively, the voltage at the neutral points of sub-load 1 and 2, $L_{load}$ is the self inductance of the load (for identical sub-loads) and $M_{load}$ is the mutual inductance of the load.

<figure><img src="image_3.png" /><figcaption>Fig. 2. Simplified circuit of one phase of two parallel interleaved inverters driving a single load.</figcaption></figure>

<figure><img src="image_4.png" /><figcaption>Fig. 3. Simplified circuit of one phase of two parallel interleaved inverters driving two separate loads. Load is represented by an RLE circuit, which is usually the case for double three-phase machines.</figcaption></figure>

The first aim of this paper is to propose a paralleled inverter system with $N_1 = 2$, connected through ICTs and driving two separate AC loads. This system can be connected either to a 270V or 540V DC bus without any modifications or adaptation. The second aim of this work is to analyze the influence of differences between the two separate loads on the system behavior. The influence of PD and POD modulation techniques

over the ICT differential current ripple and over the voltage balance across the bus DC capacitors $C_1$ and $C_2$ is also studied.

In paralleled inverter systems driving separate loads, it is possible to connect or not the neutral points $n_1$ and $n_2$ of the two three-phase sub-loads. In this work these two possibilities are analyzed, which combined with the two modulation techniques PD and POD produced four different scenarios: (i) disconnected neutral point with POD; (ii) disconnected neutral point with PD; (iii) connected neutral point with POD and (iv) connected neutral point with PD. These four scenarios are evaluated for two input connection possibilities: parallel or series.

## II. PARALLEL OR SERIES CONNECTED INPUTS

The term “parallel interleaved inverters” refers to the way the inverters outputs are connected. However interleaved inverters have also their inputs connected in parallel, sharing the whole DC bus voltage as shown in Fig. 4(a). This paper proposes to connect the paralleled inverter inputs in two different ways: in parallel when the converters are connected to the 270V DC bus and also in series when connected to the 540V DC bus, in order to divide by two the DC bus voltage applied to the input of each inverter. This approach allows inverters designed for the DC input voltage of 270V to be used in a DC bus with a voltage of 540V when their inputs are connected in series, as shown in Fig. 4(b). In this case, the total bus voltage of 540V can be divided by the association, in series, of the capacitors present at the input of each inverter.

Thus, if the system is used in a DC bus with a voltage equal to 270V, the inverters have their inputs connected in parallel, as in Fig. 4(a). Each inverter will be fed by the full DC bus voltage, i.e., 270V, which will provide a current equal to $2 \cdot I_{DC}$. On the other hand, if the system is used in a DC bus with a voltage equal to 540V, the inverters will have their inputs connected in series (Fig. 4(b)). Capacitors $C_1$ and $C_2$ will be used as a capacitive voltage divider, each one having half the DC bus voltage, i.e., 270V. As the total power supplied to load is the same, the current supplied by the DC bus is half in this case, i.e., equal to $I_{DC}$.

This approach is very useful in aeronautic applications where DC buses with 270V and 540V can be found, allowing the same system to be employed in these two cases. The advantage is that each three-phase inverter can be designed for 270V DC bus, thus using 600V breakdown voltage switches and input and output filters adapted to this voltage level.

## III. IDENTICAL SEPARATE LOADS

The influence of the type of input connection (parallel or series) over the system behavior is evaluated by numerical simulation using PowerSys PSIM tool. Two figures of merit were considered: the maximum ripple of the ICT magnetic flux and the voltage balance of capacitors $C_1$ and $C_2$. In a first step, the four scenarios (i), (ii) (iii) and (iv) listed in previous section were evaluated considering two identical separate load. Furthermore a study considering the case where the loads have different parameters is also presented.
<figure><img src="image_5.png" /><figcaption>Fig. 4. Parallel interleaved three-phase inverters connected through ICTs. (a) parallel connected inputs for 270V DC bus; (b) series connected inputs for 540V DC bus.</figcaption></figure>

The PSIM model used in simulation stage has the same parameters of the prototype used in the experimental stage. These parameters are listed below.

(i) Inverter parameters:

- DC bus voltage ($V_{DC}$): 100V (series connection) and 50V (parallel connection)

- Inverter's switching frequency (fpwm): 16kHz

- Fundamental frequency (f): 500Hz

- Common mode voltage (CMV) added to the three-phase voltage references: PWMBC (disconnected neutral point) [14] and PWMBCNP (connected neutral point) [10].

(ii) Sub-load parameters (power per phase):

$$- P = 0.2\text{kW} ; R_{load} = 45\Omega ; L_{load} = 400\mu\text{H}$$

(iii) ICT parameters:

$$- L_1 = L_2 = L = 3.182 \text{ mH} ; M = -3.180 \text{ mH}$$

The ICT mutual inductance has a negative value in order to clarify that each ICT winding has inverted polarity relative to each other, i.e., voltage in ICT windings induce a flux in opposite directions in the ICT core.

In order to evaluate the model at a wide set of operating points with respect to the modulation index ($M_I$), this parameter

was swept in time, between 0 and 1.2 with an increment step of 0.1 every 4ms.

### A. ICT Differential Current Ripple and Load Current

Changing the connection of the inverters inputs from parallel to series produced no changes in current in each ICT winding as well as in load current and in ICT differential current considering the first two scenarios evaluated: POD and PD with no connection between the neutral point of both loads. Graphs showing the evolution in time of $I_{dif}$ and current in winding 1 ($I_1$) and consequently in sub-load 1, for these scenario (i), valid for both input configurations, are shown in Fig. 5. Results for a fixed operation point (modulation index $M_I = 0.9$) are shown in Fig. 6.

Equivalent results were found for scenario (ii), also valid for both input configurations.

Simulation results show that in scenarios (i) and (ii) (disconnected neutral points), the input configuration type (parallel or in series) produces no change in the ICT differential current and in the load and ICT currents. In these two cases, although instantaneous neutral point voltages $V_{n1}$ and $V_{n2}$ are not constant, the time average potentials are the same when the inverters inputs are connected in parallel, existing only a potential fluctuation in fundamental frequency related to the common mode voltage injected in the system. On the other hand, when the inverters input are connected in series, these neutral points have different average potentials in addition to the high frequency fluctuation mentioned above. The average potential difference between $V_{n1}$ and $V_{n2}$ in this case is equal to half the total DC bus voltage, and comes from the fact that each inverter input is connected to a capacitor with different electrical potential, as shown in Fig. 4(b).

When the inputs are connected in series, one must note that scenarios (iii) and (iv) (connected neutral points) are only possible if a capacitor is connected between the two neutral points. This capacitor will charge with a voltage equal to half the DC bus voltage, maintaining the average potential of each neutral point equal to the disconnected neutral case.

Another solution for connecting two inverters in series in a single load is by using electrically isolated ICTs. This solution should only be used in applications where the load must be anyhow electrically isolated because isolated ICTs are usually much bulkier than non isolated ICTs due to significant low frequency flowing through its core.

In this work the connection of the two neutral points in the case of series connected inverters was made using a capacitor of 3300µF.

Simulation results show that the connection between the neutral points (scenarios (iii) and (iv)) changes the shape and maximum ripple of ICT differential current when compared to scenarios (i) and (ii). Although the connection between the two neutral points changes the ICT differential current, there were no changes produced by the series connection of the inverters input when compared to the original parallel connection.

### B. Capacitors Voltage Balance

Unlike what happens with the magnetic flux inside the ICT core, capacitors $C_1$ and $C_2$ voltage balance can be affected by the type of input connection. When parallel connection is used, both $C_1$ and $C_2$ have their voltages imposed by the DC bus, as shown in Fig. 4(a). On the other hand, when series connection
is used, only the sum of voltages over $C_1$ and $C_2$ is imposed. In this case the DC bus voltage partition between $C_1$ and $C_2$ must be studied.

<figure><img src="image_6.png" /><figcaption>Fig. 5. Waveform of ICT differential current ($I_{dij}$) and ICT windings currents $I_{x1}$ and $I_{x2}$, with $M_1$ varying in time from 0 to 1.2, with disconnected neutral points, POD method, parallel or series connected inputs.</figcaption></figure>

<figure><img src="image_7.png" /><figcaption>Fig. 6. Reference voltage $V_{ref}$ for PWMBC CMV, differential current ($I_{dij}$) and ICT windings currents $I_{x1}$ and $I_{x2}$ in time domain, with $M_1 = 0.9$, $f = 500$Hz, disconnected neutral points, POD method, parallel or series connected inputs.</figcaption></figure>

Simulation results show that in the case of identical charges (the case of different loads will be analyzed in the next section), the DC bus voltage is divided equally between the capacitors $C_1$ and $C_2$, considering the four evaluated scenarios and series connected inputs. This is not the case when the two sub-loads are not identical, as it will be seen in the next section.

# IV. QUASI-IDENTICAL SEPARATE LOADS

## A. ICT Differential Current Ripple

The analysis conducted so far takes into account the simplification of two identical loads driven by the system, which ensures symmetry in the current flowing through the ICT windings. In practice, however, differences between the parameters of separate loads can be found, and their influence on the ICT current ripple must be investigated.

For a purpose of conciseness, the mathematical derivation of current imbalance due to the differences between the voltage, resistance and inductance of each sub-load will be omitted. However the results are shown in Fig. 7 and Fig. 8. Fig. 7 shows the magnetic flux density in the ICT core as a function of the parameters of one of two loads, normalized to the rated values. The parameters of the second load were kept in the

rated values. It was considered in this study the load parameters resistance ($R_{load}$) and inductance ($L_{load}$), as well as the voltage represented by the EMF of the machine, which reflects the value of mechanical load on the axis. As expected, the ICT magnetic flux density is minimal when the relationship between the parameters of both sub-loads 1 and 2 is unitary, which corresponds to the value 1 on the “x axis” of the graph. It can be noted that the system is less sensitive to differences between the inductance in the sub-loads, while differences in $R_{load}$ or in the voltages of the system (either the inverter output voltage or the EMF) produce a significant change in the ICT magnetic flux.

In Fig. 8, the influence of differences between the resistance $R_{load}$ and EMF voltage in the loads is considered from another perspective. This figure shows the value that each of these two parameters must have (normalized to the rated value), as a function of the ICT core relative permeability, in order to produce an increase in the magnetic flux density equal to 0.2T. This graph shows that cores with lower relative permeability make the system more robust to the differences between the resistance $R_{load}$ and EMF voltage in the loads. It can be also noted that the acceptable range for differences between parameter $R_{load}$ of two loads is greater than for parameter EMF.

<figure><img src="image_8.png" /><figcaption>Fig. 7. Peak magnetic flux density inside the ICT core as a function of $R_{load}$, $L_{load}$ and EMF in sub-load 2 (normalized to the rated values). Parameters of sub-load 1 were kept equal to the rated values.</figcaption></figure>

<figure><img src="image_9.png" /><figcaption>Fig. 8. Normalized values of $R_{load}$ and EMF in sub-load 2, as a function of relative permeability of ICT core, to produce an increase of 0.2T in the magnetic flux density inside the ICT core.</figcaption></figure>
## B. Capacitors Voltage Balance

Differences between $R_{load}$ and $L_{load}$ produce differences between the line currents in each load. In the case of series connected inputs such differences produce voltage imbalance in capacitors $C_1$ and $C_2$. Fig. 9 shows the voltage across capacitor $C_1$ for three different values of $R_2$ (where $R_2$ is the value of the $R_{load}$ in sub-load 2) for POD method with no neutral point connection. The higher is the distance between $R_2$ and the rated value, the higher is the distance between the voltage across $C_1$ ($V_{CI}$) and the ideal value $V_{DC}$ in steady state. The establishment of a connection between the neutral points in this case produces no change in the voltage distribution profile shown in Fig. 9.

<figure><img src="image_10.png" /><figcaption>Fig. 9. Voltage across capacitor $C_1$ for three different $R_2$ values, with $R_1$ = 100%, series connected inputs, connected or disconnected neutral points, POD method, $M_1$ = 0.9 and $f$ = 500Hz.</figcaption></figure>

## V. EXPERIMENTAL RESULTS

The experimental setup shown in Fig. 10 was used to validate the analytical and simulation results presented in this work. It is composed by two parallel interleaved three-phase inverters connected through ICTs, with inputs connected in parallel or series. The TMS320C6713b floating point DSP was used to generate the reference signals. An FPGA generates the carriers used by the DSP, as well as gate signals of the converter. The inverters drive two separate three-phase sub-loads of 0.6kW each (at 270V DC bus and $M_1=1.0$). A RL circuit was used as load and has the following values:

Sub-load 1: $R_1$ = 45Ω; $L_1$ = 400μH (rated values)

Sub-load 2: $R_2$ = 45Ω; $L_1$ = 330μH (rated values)

$R_2$ = 50Ω; $L_1$ = 400μH (around 90%)

$R_2$ = 57Ω; $L_1$ = 430μH (around 80%)

The magnetic flux ripple inside the ICT core was estimated by measuring the ICT differential current ($I_{dif}$). The CMV added via reference signal was chosen to be the PWMBC for disconnected neutral point case and the PWMBCNP for connected neutral point case.

<figure><img src="image_11.png" /><figcaption>Fig. 10. Experimental setup composed by two three-phase inverters with outputs connected in parallel through ICTs.</figcaption></figure>

Fig. 11 shows the current in the ICT winding 1 of phase U ($I_{U1}$) as well as the differential current in the corresponding ICT ($I_{Udif}$) for inverters inputs connected in parallel and series mode, using POD method and PWMBCNP common mode voltage. These results confirm the simulations results previously shown.

Fig. 12 shows the maximum ripple of the ICT differential current as a function of $M_1$, for three different values of $R_2$ and for series and parallel connected inputs. The four scenarios evaluated are presented. It can be seen that results related to series and parallel input connection are quite the same when $R_2$ is equal to $R_1$ value (solid and dashed blue lines), despite the difference between $L_1$ and $L_2$. On the other hand, the increase in the difference between $R_1$ and $R_2$ increases the difference between series connection and parallel connection results. In this case, the series connection produces the smaller maximum ripple of $I_{dif}$.

<figure><img src="image_12.png" /><figcaption>Fig. 11. ICT current for POD method and two sub-loads with connected neutral points. (a) Parallel input mode; (b) series input mode.</figcaption></figure>

## VI. CONCLUSIONS

The possibility of connecting the inputs of paralleled inverters in series or in parallel is a useful feature to allow the use of the same system with two different DC voltages available in aeronautical applications: 270V and 540V. The exchange between the input connections in series and in parallel can be easily accomplished by selecting the correct position of a 4-pole switch and no additional adjustment is needed.

Both input connection configurations presented allow the use of connected or disconnected neutral point of two sub-loads driven by the inverters. If the series input connection is used, connecting the neutral points must be made through an electrolytic capacitor. Otherwise, inverters with series connected inputs must drive separate and isolated loads.

The input connection type produces no change on the magnetic flux inside the ICT core, independently on the load. On the other hand, differences between the resistance and
inductance of sub-loads produce voltage imbalances in the capacitors of the DC bus. In this case the maximum magnetic flux ripple depends on the input connection type.

When a parallel connection is established in the DC bus, the voltages in the DC bus capacitors of each subsystem are imposed by the bus DC.

<figure><img src="image_13.png" /><figcaption>Fig. 12. ICT differential current as a function of $M_1$ for different values of sub-load 2: Red line: $R_2 = 100\%$ (rated value); Green line: $R_2 = 90\%$; blue line: $R_2 = 80\%$. Dashed line: parallel connected inputs. Solid line: series connected inputs. (a) POD method with disconnected neutral points; (b) PD method with disconnected neutral points; (c) POD method with connected neutral points; (d) PD method with connected neutral points.</figcaption></figure>

The differences between resistance and inductance of sub-loads will produce a more significant difference between the currents in the two ICT windings and, consequently, a higher magnetic flux ripple in ICT core will be observed. On the other hand, if series input connection is established, the differences between resistance and inductance of sub-loads will produce a difference between the currents in the ICT windings (increasing

the $I_{dif}$ ripple), as well as a voltage imbalance in $C_1$ and $C_2$. The voltage imbalance in $C_1$ and $C_2$ will work as a compensation effect over the differences in the loads once the capacitor corresponding to the higher load will be charged with a smaller voltage. The difference between the currents in the ICT windings and, consequently the $I_{dif}$ ripple will be smaller than in the case of a parallel input connection.

In addition, simulation results show that for series input configuration, voltage balance in $C_1$ and $C_2$ is naturally achieved, since separate loads have identical parameters. On the other hand, in the case of not identical loads, differences between resistances in the loads have a higher impact on the voltage imbalance in $C_1$ and $C_2$ than differences between inductances of sub-loads.

Experimental results verified the analysis presented in this paper and the feasibility of using the same inverter system for two different DC buses present in modern aircrafts (270V and 540V), without the need of oversizing the converter's switches and filters.

## VII. ACKNOWLEDGMENTS

D.M.A. Ávila thanks the CEFET-MG, Brazil, for the financial support given to this work.

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