# Optimization of Time Windowing Technique for Closed-Loop Circuit Cosimulation Using WR Method

Md Moktarul Alam, Mohsen Koohestani, Mohammed Ramdani, Philippe Besnier, Richard Perdriau

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Md Moktarul Alam, Mohsen Koohestani, Mohammed Ramdani, Philippe Besnier, Richard Perdriau. Optimization of Time Windowing Technique for Closed-Loop Circuit Cosimulation Using WR Method. IEEE Open Journal of Industry Applications, 2025, 6, pp.852-866. 10.1109/OJIA.2025.3636063. hal-05416101

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Distributed under a Creative Commons CC BY 4.0 - Attribution - International License
Received 14 April 2025; revised 13 July 2025, 10 September 2025, and 29 October 2025; accepted 19 November 2025. Date of publication 24 November 2025; date of current version 8 December 2025.

Digital Object Identifier 10.1109/OJIA.2025.3636063

# Optimization of Time Windowing Technique for Closed-Loop Circuit Cosimulation Using WR Method

MD MOKTARUL ALAM (Member, IEEE), MOHSEN KOOHESTANI (Senior Member, IEEE), MOHAMMED RAMDANI (Senior Member, IEEE), PHILIPPE BESNIER (Senior Member, IEEE), AND RICHARD PERDRIAU (Senior Member, IEEE)

Corresponding Author: MD MOKTARUL ALAM (e-mail: moktaruleee@gmail.com).

This work was supported by the French National Research Agency (ANR) through ECOCES project (Electromagnetic compatibility Co-simulation of Complex Electrical Systems) under Grant ANR-19-CE05-0016-05.

**ABSTRACT** Power electronic systems are widely used for efficient power processing across various applications. However, due to their nonlinear behavior and susceptibility to disturbances, modeling and simulation are essential for fully understanding their complex interactions. The waveform relaxation (WR) method is employed to solve subsystems independently, with data exchanged until convergence is reached, offering flexibility in selecting solvers and integration techniques. In power electronics, applying the WR method with time windowing improves simulation stability and accuracy by introducing an equation to determine the optimal number of time windows. A time windowing technique is proposed, for the first time, for the cosimulation of a closed-loop power circuit divided into a first subsystem (converter) and a second subsystem (proportional-integral controller). These two subsystems are supposed to be designed by two different entities, which are not allowed to exchange their respective models for intellectual property reasons. The time windowing WR method is applied to transfer the data from subsystem 1 to 2. More importantly, an analytical model for the implementation of a time windowing WR technique is developed. This equation allows a deterministic choice of the number of time windows at each iteration, for convergence, based on windowing size and simulation parameters. Results show consistent output within a specified voltage range, with reduced CPU simulation time compared to cosimulation with an arbitrary selection of numbers of time windows, while being comparable to the full system simulation. The proposed technique is implemented with an input voltage range of 1.8–3 V, resulting in consistent outputs of 3.3 V in both continuous-time and discrete-time simulation modes. The comparative analysis demonstrates that with an increased number of iterations, the elapsed time is 11.1% and 5.6% faster for continuous-time and discrete-time simulation modes, respectively, compared to a cosimulation with time windows. Furthermore, the time windowing WR method closely aligns with the full system result, with only a slight difference in elapsed time. In addition, to validate the proposed analytical model using the time windowing WR technique in a closed-loop circuit, the buck converter is evaluated and compared without the full system. These results highlight the accuracy of WR with time windowing method and illustrate the quicker convergence achieved when used in circuit cosimulation.

**INDEX TERMS** Boost converter, cosimulation, number of windows, time windowing technique, waveform relaxation (WR).

<footnote n="1">¹École Supérieure d'Électronique de l'Ouest (ESEO), 49107 Angers, France</footnote>

<footnote n="2">²Institut National des Sciences Appliquées, University of Rennes, 35708 Rennes, France</footnote>

<footnote n="3">³CNRS, IETR, University of Rennes, 6164 UMR, France</footnote>
# I. INTRODUCTION

Power electronic systems are widely used across various domains, including automotive industry, communications, medical electronics, transportation, and large power grid networks involving significant dynamic components [1], [2]. The inclusion of nonlinear devices in power electronics introduces complexity to modeling and simulation, especially when responding to signal disturbances. Traditional load flow study tools primarily concentrate on steady-state power system operation and do not account for transient behavior across different interconnected system components. In the automotive sector, manufacturers must follow regulations, especially to reduce parasitic radiation, while making sure the vehicle is safe and works properly. Modern industrial systems are very complex, so designing the whole system at once is often not possible. Therefore, the system is divided into smaller subsystems to make design, simulation, and testing easier [3], [4], [5].

Cosimulation acts as a bridge between different methodologies, enabling their simultaneous use in two or more kernels located either in the same or different machines, in a manner that leverages their individual strengths while mitigating their limitations. Cosimulation allows for stability analysis and detailed subsystem behavior, ensuring accuracy where it matters most while maintaining manageable computational demands. Throughout this article, the term “full system simulation” will be used in contrast to denote the simulation of the whole system in a single kernel without splitting it into subsystems. Splitting, within the cosimulation framework, refers to the partitioning of a complex system into smaller, interacting subsystems. Each subsystem can be simulated independently often using different numerical solvers or time domains (e.g., continuous or discrete) and iteratively updated until convergence is achieved. This approach enhances modularity, facilitates cosimulation, and allows for better integration of heterogeneous modeling environments.

Cosimulation integrates different simulation tools, each specialized for certain time scales or modeling approaches (i.e., circuit-to-circuit [6] and field-to-circuit [7]). This integration allows for a more comprehensive analysis of the system. This approach allows subsystems, each with their own specific dynamics, to interact in a unified environment and is commonly applied to problems involving heterogeneous domains. The cosimulation technique is particularly used in complex electrical systems where different dynamics can be more efficiently addressed by modifying numerical algorithms [5], [7], [8], [9], [10], [11]. A comparison of these cosimulation approaches is provided in Table 1.

Building on previous cosimulation approaches, this study aims to enhance the accuracy, stability, and convergence acceleration of dynamic system simulations. While the authors in [12] and [13] addressed transient stability and inverter synchronization, and the authors in [14] and [15] advanced numerical optimization and parallel algorithms, none considered subsystem cosimulation or time domain acceleration. The waveform relaxation (WR) method [16] enabled

<caption>**TABLE 1. Comparison With Related Work on Cosimulation Techniques**</caption>

Compared to [5], which relies on model fidelity and may miss nonlinear effects in fast-switching scenarios, our time windowing WR method ensures accurate, stable results while enabling cosimulation of independently designed converter and controller models, addressing intellectual property concerns.

Unlike [7], which uses linear models and scale reduction, our approach captures nonlinearities, supports independent subsystem co-simulation without model exchange, and reduces CPU time through an analytical determination of optimal time windows.

In comparison to [8], focused on thermal management and high-fidelity multidomain modeling with heavy computational demand, our method also enables independent subsystem cosimulation and reduces CPU and data exchange time via time windowing WR.

Compared to [9], a distributed co-simulation protocol-based interface for cyber-physical systems with platform integration and hardware-in-the-loop testing whose performance depends on cycle selection and memory, our method avoids such dependencies through analytical optimization of the number of time windows, ensuring stable, accurate cosimulation of convertercontroller interactions without hardware-specific tuning.

In contrast to [10], which applies DSI/GJ without feedback and relies on external initial values, our GS-based time windowing WR cosimulation incorporates a feedback loop between subsystems and computes initial parameters internally, enabling faster convergence, tighter coupling, and accurate simulation of nonlinear interactions.

Unlike [11], which validates a fuzzy logic controller for a dc-dc buck converter under specific conditions but may not capture all nonlinearities, our generalizable time windowing WR framework, validated on both boost and buck converters, accurately simulates transient nonlinear behavior and demonstrates faster convergence without requiring full system knowledge.

subsystem-level sequential or parallel integration but was originally limited to linear systems and lacked convergence acceleration and adaptive time windowing, which the present study addresses.

The challenges of iterative problem-solving are addressed in [16] and [17] using the WR method, which is indeed a natural framework for time domain cosimulation, but it is not the only option available. WR is an iterative method for solving systems of coupled differential equations by decomposing the system into smaller, independent subsystems. These subsystems are solved separately over specific time intervals, with their solutions iteratively exchanged until convergence is reached. This approach is particularly advantageous in cosimulation scenarios, as it enables parallel computation and minimizes interdependence between subsystems during simulation. In addition, WR is a key technique for seamless data exchange, particularly when dealing with complex black-box models. Other methods, such as cosimulation via time stepping synchronization (e.g., Gauss-Jacobi (GJ) or Gauss-Seidel (GS) synchronization) and parallel discrete-time simulation are also commonly used. The WR approach
allows for transfer of data and iteration until convergence is reached by addressing the time dependence problem inside subsystems independently. The traditional WR method serves as a numerical technique for solving large-scale systems of differential equations, especially time-dependent problems. However, the convergence rate can be slow for certain problem types, necessitating numerous iterations. In systems with strong couplings between subsystems, the traditional WR method faces challenges, as strongly coupled may require frequent updates to achieve convergence [18]. To address this issue, various acceleration techniques [19] are applied in WR method. The acceleration techniques include partitioning, which decomposes the system into subsystems, and multirate simulation that utilizes different time steps in simulation. In addition, time windowing segments are employed to minimize unnecessary computation time, although determining that the optimal segment size remains challenging [18]. The order in which subsystems are solved can significantly impact convergence speed, especially for slow-changing variables. The acceleration of times initially employs larger time steps for subsystems, gradually reducing them to effectively improve convergence time [8], [11], [20], [21].

The time windowing technique involves initializing parameter values at the last instance of each window to reduce computational time. The number of time windows depends on the window size in the WR method, which determines the duration of each time step in the windows equations [9], [17]. This parameter significantly impacts convergence behavior and computational efficiency. Choosing an appropriate number of time windows can improve accuracy but requires more iterations and computational effort [22]. Selecting an optimal number often involves experimentation and balancing tradeoffs based on the specific problem and available resources [23], [24].

In the current study, power electronics applications are addressed through the employment of a proportional–integral (PI) controller and boost converter. In order to study transient behavior with specified time steps, the boost equation is usually employed for simulation time [25], [26] of the converter. The boost circuit is divided into two subsystems: subsystem 1 (converter) and subsystem 2 (PI controller). These subsystems are solved consecutively using WR, which exchanges data and iterates until convergence at predetermined time intervals. However, this approach leads to slower convergence rates with respect to full system simulation in closed-loop circuits. To address this, a time windowing acceleration technique is proposed in this article. This method entails setting up initialization and applying an arbitrary number of time windows that could impact circuit parameters for subsystems 1 and 2. The elapsed time of the circuit cosimulation includes not only the CPU processing time but also the data exchange between subsystems. Note that a higher number of time window do not guarantee faster convergence, whereas a lower number of time windows can sometimes lead to faster convergence according to existing literature review [6], [10], [17]. That

indeed depends on the circuit characteristics and window size, as applied to source-to-load and closed-loop circuits.

To take all relevant factors into an account, this article aims at bypassing this obstacle and providing a solution for an optimized determination of the number of time windows at each iteration. An analytical model is developed based on the window size and circuit parameters for the optimum number of time windows, applicable in simulation time scenarios. This analytical model is then validated using a boost circuit. The cosimulation results obtained from the boost converter are compared with those of the full system and presented in this article. This analytical model is also applied to the buck converter, with cosimulation results presented and compared to the full system to validate the time windowing WR technique.

The rest of this article is organized as follows. Section II introduces the structure and implementation of WR method. Section III describes the cosimulation boost converter and PI controller based on WR method and time windowing acceleration technique. Section IV develops an analytical model to determine the optimal number of time windows based on circuit characteristics and window size. Section V discusses a case study on the application of the time windowing technique in circuit cosimulation and presents the results obtained from the practical implementation of the time windowing WR technique. Finally, Section VI concludes this article.

## II. IMPLEMENTATION OF WR METHOD

The WR method is an iterative numerical technique for solving ordinary differential equations or partial differential equations [20]. Particularly, it is effective for stiff systems, including discretization, initial guess, decomposition into subsystems, iterative relaxation with communication between subsystems, convergence check, and assembling the final solution [27]. It is applicable to various types of differential equations and involves updating solutions at each time step based on neighboring solutions until convergence is achieved, as calculated in (1)–(3) [23], [28]

$$ \frac{dy}{dt} = f(y, t) \qquad (1) $$

where y is the state variable of a subsystem that varies according to the function f(y, t) over time t. The subsystem internal dynamics as well as interactions with other subsystems are included into the function f(y, t). To guarantee precise and consistent integration of subsystem behaviors, the differential equation (1) is solved repeatedly.

The time domain is discretized into discrete intervals instant of time $t_0, t_1, t_2, \dots, t_n$ by choosing a time step size, represented by $\Delta t$. Every iteration i yields the solution, which is then updated at every time step $t_n$, and the time step $\Delta t$ is adjusted

$$ Y_k^{i+1} = \phi_n(Y_{n-1}^i, Y_n^i, Y_{n+1}^i) \qquad (2) $$

where $Y_k^{i+1}$ represents the solution of relaxation and $\phi$ denotes a relaxation function. $\phi_n$ interpolates or extrapolates
<figure><img src="image_2.png" /><figcaption>FIGURE 1. Structure of the WR method.</figcaption></figure>

between these states to ensure consistency across subsystems and iterations. The exact form of $\phi_n$ depends on the specific application and context within the model. In this function, $Y_{n-1}$, $Y_n$, and $Y_{n+1}$ represent the values of the system at the previous, current, and next time steps, respectively. They are linked through the discrete-time difference approach used to approximate the system's behavior over time. The function $\phi_n$ is the numerical rule or function used to compute the next state of a system at a point. It is manually implemented as part of the model, taking into account the specific characteristics of the system being studied

$$ 
\begin{aligned}
\varepsilon &= \left| \frac{V_{\text{ref}} - V_{\text{out}}}{V_{\text{ref}}} \right| \\
\varepsilon_0 &= |Y_k^{i+1} - Y_k^i|.
\end{aligned} 
\quad (3) 
$$

Equation (3) defines the computed error $\varepsilon$ as the difference between reference $V_{\text{ref}}$ and desired output value $V_{\text{out}}$. The tolerance $\varepsilon_0$ is used to assess convergence. $Y_k^{i+1}$ denotes the solution at the current iteration $i+1$, while $Y_k^i$ represents the solution at the previous iteration $i$. The final solution is obtained by combining the results of all subsystems after achieving convergence, as calculated from (3). Because the GS methodology makes it easier to interface solutions throughout the iterative phase [17], this method works particularly well for subsystems that operate with both fixed and variable time steps.

Following the methodology of the WR method, as illustrated in Fig. 1, and applied throughout the iteration process, the solution is updated at each time step using the GS iteration method [14]. An example of a feedback loop circuit simulation, incorporating the WR method, is shown in Fig. 2. The sawtooth waveform displayed in the figure runs at the switching frequency ($f_{\text{SW}}$ = 20 kHz) and is also the one used

<figure><img src="image_3.png" /><figcaption>FIGURE 2. Illustration of closed-loop converter cosimulation using WR method.</figcaption></figure>

to generate pulses controlling the switch. At $i = 0$ is assumed. This guess may be based on the input, output, zero, or an average value derived from a relaxation function. The function $\phi_n$, which uses values from the previous time step ($Y_{n-1}^i$, $Y_n^i$, and $Y_{n+1}^i$), is considered an initial value in WR method. The subsystem differential equation is then solved over the interval $[0, t]$ to compute the updated value of $Y_k^{i+1}$. The function $f_1$ depends on the state variables of the current iteration $Y_k^{i+1}$, previous iteration $Y_k^i$, and simulation time $t$. The updated value of $Y_k^{i+1}$ is then passed as an input to another subsystem. In another subsystem, the updated value $X_k^i$ is computed by solving the differential equation, where $f_2$ depends on the updated state variables $X_k^i$, $X_k^{i+1}$, and $t$. Using the relative error $\varepsilon$ is a valid metric for evaluating control system performance, as it directly measures output accuracy relative to the reference. The subtraction of $Y_k^i$ and the sawtooth waveform is part of the error correction mechanism based on the pulsewidth modulation (PWM) technique. Specifically, $Y_k^i$ is the waveform from the previous iteration and serves as the input estimate for the current iteration. The sawtooth waveform serves as the carrier signal in the PWM process. By subtracting the control signal $Y_k^i$ from the sawtooth waveform, a modulation signal is generated that defines the switching instants of the power converter. This mechanism transforms the control error into pulsewidths, which regulate the power delivered to the system and ensure accurate error correction to meet the convergence criteria.

The difference between these signals generates an error signal, which is then used to adjust the system in current or updated iterations ($Y_k^{(i+1)}$), improving accuracy and aligning the output with the expected waveform. If the condition $\varepsilon < \varepsilon_0$ is not met, then the boundedness of the state variables is ensured by activating an external integrator initialized with the value of $X$. This integrator guarantees the closed-loop system's stability according to the criterion $\varepsilon_0 < \varepsilon$ and ensures that the convergence performance is consistent with the GS methodology.

### III. CLOSED-LOOP CIRCUIT COSIMULATION

The buck-boost IC in boost mode, as shown in Fig. 3(a), was used to compare the full system and the cosimulation of the boost converter. In Fig. 3(b) and (c), transistor, an
<figure><img src="image_4.png" /></figure>

<figure><img src="image_5.png" /></figure>

<figure><img src="image_6.png" /></figure>

<figure><img src="image_7.png" /></figure>

<figure><img src="image_8.png" /><figcaption>**FIGURE 3.** (a) Buck-boost converter on its test board. Simulink equivalent model of the boost mode in (b) continuous-time and (c) discrete-time simulations of a buck-boost IC. Splitting the system for (d) continuous-time and (e) discrete-time simulations.</figcaption></figure>

<figure><img src="image_9.png" /></figure>

<figure><img src="image_10.png" /><figcaption>**FIGURE 4.** Step response of the studied boost converter: (a) continuous-time and (b) discrete-time without any regulator adjustments.</figcaption></figure>

inductor, and a diode are used to regulate the output voltage of the converter in boost mode. A PI controller is employed for both continuous-time and discrete-time simulation modes, respectively. The PI controller value proportional gain $k_p$ and integral gain $k_i$ adjust the duty cycle of the transistor based on the feedback, maintaining stable voltage despite input and load variations [25], [26]. The stability of the closed-loop boost converter in the proposed cosimulation framework depends mainly on the control parameters, $k_p$ and $k_i$, of the PI controller. Simulation results, as shown in Fig. 4, demonstrate that the poor tuning of these parameters produces oscillatory or unstable behavior, whereas proper tuning ensures fast convergence, minimal overshoot, and robust performance under varying output voltages. Therefore, carefully balancing $k_p$ and $k_i$ is essential to preserve gain and phase margins and guarantee stable operation under both steady-state and dynamic conditions.

The entire simulation process is structured and executed using MATLAB simulink software. Noteworthy is the fact that the complete WR technique utilized to derive those simulation outcomes is carried out using a laptop equipped with an Intel CoreTM i7-10850H CPU @ 2.70 GHz, 32 GB of RAM, and a 64-bit operating system employing Microsoft Windows 11. Memory use was 23% for the duration of the system simulation. The percentage of total RAM grew to 32% in the cosimulation. In the continuous case, we used ode45, a variable-step, variable-order Runge-Kutta method, while in the discrete-time case, a fixed-step solver was employed to
model the system's behavior. These choices were made to ensure consistency between the two domains within our specific modeling setup and to provide a fair basis for comparison. While other solvers are available in MATLAB, ode45 and the fixed-step solver were selected because they were well-suited for handling the system's differential equations in their respective domains. Since only one solver was used for each case in this study, it was not possible to evaluate how different solver choices might affect the results.

## A. CONTINUOUS-TIME AND DISCRETE-TIME SIMULATION SETUP AND COSIMULATION APPROACH

Fig. 3(b) and (c) illustrates the boost converter in continuous and discrete time, respectively, with parameters determined using the boost equation. For continuous-time simulations, the system is represented using differential-algebraic equations. In this formulation, the state variables describe the dynamic behavior of the boost converter in (4) and (5), including the inductor current $I_L(t)$ and the capacitor voltage $V_c(t)$, which characterize the energy storage and transfer within the system. The algebraic variables represent the control system continuous-time output $Y(t)$ in (7), which governs the converter operation and adjusts power transfer based on the PI controller configuration. The system operates using an averaged modeling approach where $Y(t)$ represents a continuous control signal rather than a discrete switch state. In discrete-time simulation, the system is represented by the difference equations in (8), which use fixed time steps, whereas continuous-time simulation employs variable time steps that can be much smaller than the time constants of the simulated system. The process for cosimulation using the WR method remains similar to that in continuous-time simulation, but the system operates at fixed time steps

$$I_L(t)^{i+1} = I_L(t)^i + \frac{1}{L}(V_{in} - V_c^i(t) \cdot Y^i(t)). \Delta t \quad (4)$$

$$V_c(t)^{i+1} = V_c(t)^i + \frac{1}{C} \left( I_L^i(t) \cdot Y^i(t) - \frac{V_c^i(t)}{R} \right) \cdot \Delta t \quad (5)$$

$$X(t)^{i+1} = V_{\text{ref}} - V_{\text{out}}^i(t) \quad (6)$$

$$Y(t)_{\text{cont.}}^{i+1} = K_p(t) \cdot X^{i+1}(t) + k_i \int X^{i+1}(t) dt \quad (7)$$

$$Y(t)_{\text{dis.}}^{i+1} = K_p(t) \cdot X^{i+1}(t) + k_i \cdot n \Delta t \sum_{n=0}^{i} X^{i+1} \quad (8)$$

Corresponding values are provided in Table 2 for both continuous-time and discrete-time simulations. Notably, specific values of $k_p$ and $k_i$ are utilized in each mode. Note that with the aim to showcase the feasibility of the cosimulation both in continuous and discrete modes, the different $k_p$ and $k_i$ values in both modes are solely due to the stability of the modeled converter. In addition, load values are applied to maintain a stable output voltage. The simulation duration is 0.05 s, with an input voltage range of 1.8–3 V. The variable

<table><caption>TABLE 2. Boost Converter Parameter Values</caption><thead><tr><th>Parameter names</th><th>Continuous time</th><th>Discrete time</th></tr></thead><tbody><tr><td>V<sub>in</sub></td><td>1.8–3 V</td><td>1.8–3 V</td></tr><tr><td>V<sub>out</sub></td><td>3.3 V</td><td>3.3 V</td></tr><tr><td>L<sub>1</sub></td><td>10 μH</td><td>10 μH</td></tr><tr><td>C<sub>1</sub></td><td>100 μF</td><td>100 μF</td></tr><tr><td>R<sub>1</sub></td><td>10 Ω</td><td>10 Ω</td></tr><tr><td>f<sub>sw</sub></td><td>20 kHz</td><td>20 kHz</td></tr><tr><td>T<sub>step</sub></td><td>1 μs</td><td>1 μs</td></tr><tr><td>t<sub>total</sub></td><td>0.05 s</td><td>0.05 s</td></tr><tr><td>k<sub>p</sub></td><td>0.7</td><td>0.3</td></tr><tr><td>k<sub>i</sub></td><td>100</td><td>266.2</td></tr><tr><td>Simulation time</td><td>31.8 s</td><td>42.6 s</td></tr></tbody></table>

$X$ represents the difference between the desired and reference voltages, as defined by (6).

In a loop, the convergence error is checked, and at each iteration the values of $Y$ and $X$ are updated. Subsystem 2 adds an external integral component. The integral value of $X$ is used in subsystem 2, which is initially provided from the PI controller. This value is essential as it represents the accumulated error up to the current step in time. The cosimulation is deemed complete when the error, using (3), satisfies the convergence specifications. If not, the process is carried out again until the convergence 2% [6], [17] based on (3) is reached. The choice of tolerance directly impacts both the accuracy and computational efficiency of the simulation. While a higher tolerance (e.g., 5% or more) can lead to quicker convergence but less precise results, a lower tolerance could slow down the simulation without significantly improving the outcome. In our study, setting the tolerance to 2% strikes a balance, ensuring that the results are sufficiently accurate for the intended analysis while keeping the simulation time reasonable. In addition, Fig. 5 shows that the system's steady-state behavior and convergence under the chosen tolerance have been verified and found to be within an acceptable range for the study's objectives.

To verify the stability of the converter under consideration, a pole-zero analysis was performed using the tuned regulator parameters in both continuous-time and discrete-time modes. The poles of the transfer functions were found to be $(-0.36 \pm 1.86i) \times 10^4$ for the continuous-time system and $(-1.8 \pm 1.88i) \times 10^4$ for the discrete-time system. As all poles lie in the left half of the complex plane, the system is confirmed to be stable.

## B. IMPLEMENTING BOOST CONVERTER BY USING WR METHOD

Fig. 5 displays a graphic representation of the WR technique in operation. The specific interface variables at the WR method boundary or connection points are $X$ and $Y$. These interface variables are shown visually in Fig. 3(d) and (e). Fig. 5 illustrates that the input voltage is applied within the range of 1.8–3 V. Throughout this range, the output voltage remains
<figure><img src="image_11.png" /></figure>

<figure><img src="image_12.png" /><figcaption>**FIGURE 5.** Cosimulation output waveform response of the studied boost converter based on WR method. (a) continuous time. (b) Discrete time. Different colors refer to different iterations of the WR algorithm.</figcaption></figure>

constant at 3.3 V. However, instability is observed during the subsequent duration, and the system reaches convergence after 19 iterations [see Fig. 5(a)]. This is due to the presence of nonlinear components, such as diodes in parallel with transistor, which can be difficult to model accurately over time. If the WR method fails to properly capture the nonlinear behavior of these components, then instability may arise. Comparably, the discrete-time simulation, as depicted in Fig. 5(b), shows that the output value maintains stability for a specified period before becoming unstable, with convergence occurring in 22 iterations. The elapsed times for the continuous-time and discrete-time simulations are 39.6 and 46.8 s, respectively, indicating a comparatively slower convergence in both cases compared to the full system. The following time windowing acceleration technique achieves faster convergence.

### C. TIME WINDOWING ACCELERATION TECHNIQUE

Time windowing is a computational technique that is used at specific time intervals within a simulation. This approach involves dividing the simulation discrete time into several windows and allocating computational effort selectively to

<figure><img src="image_13.png" /><figcaption>**FIGURE 6.** Time windowing method by using window number.</figcaption></figure>

active windows. Time windowing can improve the computational efficiency and accuracy of simulations. Note that this technique is not relevant for full system simulation. In the time windowing technique, as illustrated in Fig. 6, it is crucial to initialize the necessary circuit parameters to ensure rapid convergence, considering the characteristics of the circuit. Subsequently, an arbitrary number of time windows are selected for the WR method, and then the convergence criteria are checked to assess the results.

The boost converter scenario, as illustrated in Fig. 3(d) and (e), uses the time windowing approach to represent the initial conditions of the capacitor voltage ($V_C$) and inductor current ($I_L$) as interface variables. In order to maintain continuity and coherence in the simulation across multiple time intervals, the converged values of $I_L$ and $V_C$ from one time window serve as the initial conditions for the next. This process repeats for each time window, ensuring that each waveform reflects the system's response over a discrete-time period. The initial conditions dynamically adjust based on the convergence achieved in the previous window, as shown in Fig. 7.

The time windowing technique is applied in Fig. 7 for both continuous-time and discrete-time simulation modes, respectively. It is observed that the number of time windows used in Fig. 7(a) and (b) is arbitrary, indicating that convergence in the initial stage has no impact on the later stages.

A comparison of simulations with and without (i.e., initial) time windowing is provided in Table 3. The use of four and ten time windows in the WR method consistently maintains the output at 3.3 V. As observed, the use of four time windows results in a 21.2% reduction in elapsed time and a 26.3% increase in iterations. Similarly, elapsed time is reduced by
<figure><img src="image_14.png" /><figcaption>FIGURE 7. Output voltage waveform responses by using 4 (left) using equation (13), incorporating (11), (12) and 10 (right) arbitrary time windows. (a) and (b) Continuous time. (c) and (d) Discrete time. Different colors correspond to different iterations of the time windowing WR algorithm.</figcaption></figure>

<table><caption>TABLE 3. WR Simulation Results for the Boost Converter With Time Windowing Acceleration Technique</caption><thead><tr><th rowspan="2">No. of windows<br>(W)</th><th colspan="2">Continuous-time mode</th><th colspan="2">Discrete-time mode</th></tr><tr><th>Elapsed<br>time (s)</th><th>Iteration<br>(i)</th><th>Elapsed<br>time (s)</th><th>Iteration<br>(i)</th></tr></thead><tbody><tr><td><u>1</u></td><td><u>39.6</u></td><td><u>19</u></td><td><u>46.8</u></td><td><u>22</u></td></tr><tr><td><u>4</u></td><td><u>31.2</u></td><td><u>24</u></td><td><u>43.2</u></td><td><u>30</u></td></tr><tr><td><u>10</u></td><td><u>33.8</u></td><td><u>31</u></td><td><u>48.6</u></td><td><u>40</u></td></tr><tr><td>15</td><td>35.3</td><td>37</td><td>53.4</td><td>48</td></tr><tr><td>25</td><td>40.8</td><td>50</td><td>63.5</td><td>61</td></tr></tbody></table>

Note that the underlined numbers of time windows are chosen arbitrarily while plain and underlined bold ones are derived from equations developed in Section IV.

14.6% and iterations are increased by 63.2% when ten windows are used. These results indicate that time windowing technique can faster converge in cosimulation and improve computing efficiency, although the increasing number of iterations is mentioned in Table 3.

In the discrete-time simulation mode, as shown in Fig. 7(c) and (d), the use of four and ten time windows with the WR method leads to varied outcomes and instability, which contrasts with the stable results seen in continuous simulation mode. The use of four and ten time windows provides the differences in the elapsed time of 28% and 30%, respectively, as compared to continuous-time and discrete-time simulation. On the other hand, a comparison between simulations with and without time windowing reveals a distinct pattern, employing four time windows results in a 7.7% reduction in elapsed time and a 36.4% increase in iterations.

In contrast, using ten time windows leads to a 3.8% slower elapsed time and an 81.8% rise in iterations.

The WR method, as shown in Fig. 7(d), encounters challenges in achieving convergence for certain cases (see, e.g., $W = 6, 7, 8$, and $9$), similar to Fig. 7(c). These challenges arise due to the choice of time windows and initial conditions, which can significantly influence convergence in the discrete-time domain. When the WR method fails to converge, the output voltage error does not fall below the tolerance specified in (3). The algorithm halts iterations upon reaching the maximum iteration limit or when successive iterations yield negligible error reduction. This approach ensures computational feasibility but may result in suboptimal solutions. For $W = 6, 7, 8$, and $9$, as shown in Fig. 7(d), the curves converge to different values at the end of each window, indicating that the number of time windows is incorrect. In these conditions, it is certain that the output results cannot match those of the full system.

## IV. DEVELOPMENT OF A TIME WINDOW NUMBER EQUATION BASED ON TIME WINDOWING TECHNIQUE

The number of time windows depends directly on both the size of each window and the parameters of the circuit. Smaller windows often improve convergence during transient conditions, since parameters are reinitialized more frequently. In practice, each waveform segment must converge before the following segment can be computed. This results in a step-by-step or piecewise form of WR convergence. Once a section of the waveform converges, it remains stable as the simulation continues. The optimal number of time windows in discrete-time simulations with nonlinear behavior requires careful evaluation of circuit parameters and simulation constraints. To address this, the concept of an optimal time window number is formulated based on multiresolution analysis [29]. Determining the optimal number of time windows in the WR method requires balancing the computational efficiency with simulation accuracy. In this study, the number of windows is obtained using an exponential approach for circuit cosimulation [29], [30]. In this formulation, the number of windows is expressed as the product of two functions: the window signal $f(T)$ and the window size function $W(T)$

$$W_f \rightarrow f(T), W(T). \qquad (9)$$

The window signal function $f(T)$ is derived from the input voltage $V_{in}$ and a parameter $A$ that represents interface variables between subsystems. This function decreases exponentially with simulation time, reflecting the transient response of the circuit. The window size function $W(T)$ is similarly influenced by the input voltage $V_{in}$ and initial window conditions ($k_0 = 1$). Together, these functions define the total number of time windows required. In fact, $T$ is the total simulation time, whereas $t$ is the current simulation time as simulation advances.
<figure><img src="image_15.png" /><figcaption>FIGURE 8. Interface variable of cosimulation based on WR method.</figcaption></figure>

The window signal function $f(T)$ can be expressed as an exponential function of the input voltage $V_{in}$ and parameter $A$

$$f(T) = V_{in}e^{-AT} \qquad (10)$$

where $V_{in}$ is the input voltage within the 1.8–3 V range, and $A$ is the interface variable of parameters in the circuit subsystems.

$A$ is derived from the subsystem interface variables and the circuit output $V_{out}$. Without time windowing, poor initialization of these variables can result in long convergence times. In discrete-time mode, the interface variable $X$ [see Fig. 8(a)] decreases exponentially, while $Y$ [see Fig. 8(b)] increases exponentially. Depending on the initial values $X_0$ and $Y_0$, significant transient deviations may occur. Although these deviations eventually stabilize, they lead to longer convergence and increased computational effort.

Therefore, careful initialization or estimation of interface variables is crucial for efficient and reliable simulation. When time windowing is applied, convergence issues are limited to the first iterations of the initial window. After this, the closed-loop system automatically adjusts the interface variables, eliminating the need for a sensitivity analysis. In this context, $X_0$ and $Y_0$ correspond to the initial interface variables of subsystems 1 and 2, respectively, while $V_{out}$ represents the circuit output. Finally, the parameter $A$ is calculated from the logarithm of these interface variables, as defined in the following:

$$A = V_{out} \times k_n \times \ln(X_0/Y_0). \qquad (11)$$

The window size function $W(T)$ is defined in terms of the input voltage $V_{in}$ and the exponential decay of an initial constant $k_0$

$$W(T) = V_{in}e^{-k_0 T}. \qquad (12)$$

By multiplying the window signal function $f(T)$ and the window size function $W(T)$, the number of windows $W_f$ is obtained, as given in the following:

$$W_f = f(T) \times W(T) \\ W_f = \text{ceil} \left( V_{in} e^{-V_{out} \times (\ln(X_0/Y_0)+1) \times k_0 T} \right). \qquad (13)$$

Equation (14) can then be refined iteratively if convergence is not achieved. In such cases, updated interface variables $X_n$ and $Y_n$ are substituted back into (13) to recalculate the

<figure><img src="image_16.png" /><figcaption>FIGURE 9. Algorithm for calculation of number of time windows.</figcaption></figure>

number of windows, ensuring accuracy and stability in both continuous-time and discrete-time modes

$$A_m = V_{out} \times k_n \times \ln(X_n/Y_n). \qquad (14)$$

This analytical framework provides a deterministic method for selecting the optimal number of time windows in circuit cosimulation. It avoids the trial-and-error approach commonly used in practice and ensures that the simulation converges reliably to the correct solution. By aligning the number of windows with the system’s internal dynamics, the method improves accuracy while reducing the computational cost.

## V. APPLICATION OF TIME WINDOWING TECHNIQUE

For the proof-of-concept in two scenarios: boost and buck converters, the proposed time window number equation is applied within the time windowing WR technique. The results for the boost converter cosimulation are then compared with measurements and the performance of the entire system. Similarly, the buck converter output is evaluated and compared. Validation findings demonstrate a strong correlation between the measurements and the overall system performance.

### A. PROPOSED TIME WINDOW EQUATION FOR BOOST COSIMULATION

The first validation involves cosimulation of the boost converter using the time windowing WR algorithm (as shown in Fig. 9). Equations are applied in both continuous-time
and discrete-time simulations. Table 3 outlines the process of determining the optimal number of time windows using the analytical equations (10)–(13). The same input voltage is tested within the range of 1.8–3 V. Initially, the number of time windows was calculated as 4, and this value was applied to the time windowing WR method, as shown in Fig. 7(a) and (c). In the cosimulation results, the continuous-time simulation successfully converged to the same value at the end of each time window (not considering the first one), which moreover was the same as the full system. However, the discrete-time simulation only converged to different values at the end point of each time window and, therefore, failed to align with the full system.

To address this discrepancy, $W(T)$ and $A_m$ parameters utilize $k_n$ instead of $k_0$. This adjustment treats the four time windows as initial values and uses the interface values obtained from these windows as a starting point in the modified formulation. By applying $A_m$ in (14) and substituting for $A$ in (11), an updated evaluation of (13) is obtained to calculate the exact optimal number of time windows. Therefore, an updated result of 15 time windows is obtained for the time windowing WR technique. When this updated number of windows is used in the time windowing WR method for both continuous and discrete time, the cosimulation results successfully converge to the same value at the end of each time window (not considering the first one) leading to match the full system results for both time modes. Importantly, no further updates of the number of time windows are required to achieve convergence and matching. As shown in Fig. 10(a) and Table 3, a stable signal output is achieved in continuous-time mode, reducing the number of iterations in each time window. The output waveform reached the desired value after 37 iterations, with the overall simulation time being 11.1% faster than without time windowing, despite the increased number of iterations. It is of paramount importance to note that any number of time windows other than those calculated before leads to divergence at the end of each time window. This occurs when the number of windows is not aligned with the system's internal dynamics or discretization scheme, particularly the switching behavior of the power converter and the timing of waveform exchanges. The time windowing WR method is therefore highly sensitive to the selection of the optimal number of windows. Using the analytical model to determine the exact number of time windows ensures consistency of exchanged variables between subsystems, maintaining synchronization and guaranteeing convergence across the coupled systems. This sensitivity, however, does not affect the overall applicability of the WR method, which remains fully effective once the optimal number of time windows are correctly selected.

In discrete-time mode [see Fig. 10(b)], the modified $A_m$ is applied in the analytical model. The updated optimal number of time windows (15) is used in the time windowing WR method. This resulted in 48 iterations that matched the full system and met the convergence conditions, but with an elapsed time of 53.4 s. This increase in time is likely due to overhead factors, such as window size, convergence

<figure><img src="image_17.png" /></figure>

<figure><img src="image_18.png" /><figcaption>FIGURE 10. Output voltage waveform responses using (13) incorporating (14) for both time mode (a) continuous time. (b) Discrete time. Different colors represent different iterations of the time windowing WR algorithm.</figcaption></figure>

boundary conditions for each window, and initialization parameters, which slightly raise the CPU elapsed time compared to the WR method and full system simulation. These results demonstrate that the proposed equation ensures convergence and consistent simulation outcomes across the entire system.

An extended simulation time and the application of (14), as outlined in (13), demonstrate a stable output after 50 iterations, as shown in Fig. 11(a), consistent with the entire system in continuous-time mode. In discrete-time mode [see Fig. 11(b)], the optimal number of time windows was determined to be 25, requiring 61 iterations to match the full system results. These findings underscore the accuracy and reliability of (10)–(13) in replicating the behavior of a single system over time. By consistently controlling the number of windows, the time windowing WR approach ensures signal consistency across a range of simulation periods.

Table 3 presents a comparison of different numbers of time windows, showing the exact number of windows derived using the analytical model for both continuous and discrete time. The use of ten time windows is arbitrary, while the other numbers are calculated based on the analytical model of time windows. The terms “co/full” refer to the cosimulation results and the full system response, respectively. In
<figure><img src="image_19.png" /></figure>

<figure><img src="image_20.png" /><figcaption>**FIGURE 11.** Output voltage waveform responses based on ?? incorporating with (14) for both (a) continuous-time and (b) discrete-time extended modes. Different colors align to different iterations of the time windowing WR algorithm.</figcaption></figure>

continuous-time simulation, the arbitrary number of time windows aligns with the full system. However, in discrete-time simulation, a mismatch occurs. This highlights the impact of discrete-time simulation, where an analytical model is needed to account for the updated number of time windows. This model is specifically examined for discrete-time simulation. Note that in all cases, the computation of the number of time windows is included in the displayed simulation time. Although the elapsed time is higher for the configurations with four and ten time windows, it has not yet matched that of the full system. This suggests that by applying the proposed windows number method, it is possible to transmit minimal data while maintaining maximum confidentiality.

## B. PROPOSED TIME WINDOW EQUATION FOR BUCK COSIMULATION

The second validation involves the cosimulation of a closed-loop buck converter in discrete-time mode. The continuous-time mode of buck converter cosimulation was addressed in a previous paper [31]. The discrete-time mode buck converter is

<figure><img src="image_21.png" /></figure>

<figure><img src="image_22.png" /><figcaption>**FIGURE 12.** Buck converter cosimulation between (a) subsystem 1 (converter) and (b) subsystem 2 (controller).</figcaption></figure>

<table><caption>**TABLE 4.** WR Simulation Results of a Buck Converter Using Proposed Time Window Number Equation</caption><thead><tr><td>Number of windows</td><td>Elapsed time Co / Full (s)</td><td>Iteration</td></tr></thead><tbody><tr><td>1</td><td>42.8 / 37.8</td><td>37</td></tr><tr><td>5</td><td>38.2 / 37.8</td><td>53</td></tr></tbody></table>

equipped with a PI controller (as shown in Fig 12). The simulation output voltage is 3.3 V, while the input source varies from 3.6 to 5.5 V, with a 10 kHz frequency for the sawtooth waveform used in generating switching pulses. To perform the cosimulation, we utilized the Simulink library to simulate each subsystem, and MATLAB managed the synchronization and information exchange between the subsystems.

Subsystem 1, the converter, and subsystem 2, the controller, are the two separate subsystems, as shown in Fig. 12(a) and (b), respectively. The WR equations (1)–(3) are utilized in the interaction between the PI controller and the converter. The output $Y$ from the PI controller serves as the initial parameter for tuning the switching mechanism. Moreover, an additional integration value, referred to as *Inout*, is incorporated into the PI controller, which is initialized by the master code in MATLAB. This initial value is derived from $X$. In fact, the additional integrator will only help the system converge in the cosimulation with time windowing without any influence on the response of the real world system. This integrator does not need to be implemented in the actual circuit to be designed.

The validation of the buck converter involves a cosimulation utilizing the time windowing WR algorithm, as illustrated in Fig. 13 and Table 4. The result is displayed in Fig. 13(a) where, when using only the WR method, the last iteration does not diverge but converges to a value, which differs from that of the full system. Therefore, it is indeed needed to determine the optimal number of time windows. Equations (10)–(13)
<figure><img src="image_23.png" /><figcaption>**FIGURE 13.** Output voltage waveform responses (a) without time windowing and (b) with number of time windows based on ???. Different colors align to different iterations of the time windowing WR algorithm.</figcaption></figure>

<figure><img src="image_24.png" /></figure>

are utilized to calculate this number based on the interface values of X and Y, being five time windows as the output. Fig. 13(b) shows that the output voltage now converges within each window, matching the full system after 53 iterations. The elapsed time using (8) is compared without time windowing in cosimulation and the full system, as shown in Table 4. The results show that the elapsed time is faster than without time windowing and is nearly identical to the full system simulation, with only a 1.6% difference due to overhead factors affecting elapsed time. A comparison of the WR approach cosimulation with the full system is presented in Fig. 14, where convergence is ensured by this strategy, and the simulation results remain consistent across the full system. Notably, (14) is not required, as the determined optimal number of

<figure><img src="image_25.png" /><figcaption>**FIGURE 14.** Comparison between the full system and co-simulation by using time windowing WR technique.</figcaption></figure>

<figure><img src="image_26.png" /><figcaption>**FIGURE 15.** Comparison among the measured, full system, and cosimulation output voltages by using GS-WR time windowing technique.</figcaption></figure>

windows aligns with the full system behavior. This can be ensured by the fact that all output values converge to the same value at the end of each time window not considering the first one. The relative error compared to the full system drops below –26 dB (5%) within the first few ms and remains significantly lower throughout the remainder of the time. This confirms that the system models exhibit high precision, with steady-state errors well below –26 dB (5%). This simplifies the cosimulation process and maintains consistency with the overall system model. The convergence and consistency of the simulation results throughout the entire system are confirmed using this approach.

### C. SIMULATION VERSUS EXPERIMENT VALIDATION

Fig. 15 presents a comparison among measurements, simulations without splitting, and cosimulations utilizing the WR method for the studied boost converter. The output voltages exhibit similarity for boost simulations in both continuous-time and discrete-time modes. However, notable differences arise compared to the measurement data, particularly at the simulation onset. It is important to note that the boost mode
of the buck-boost IC functions as a black-box during simulation, meaning that the real parameters of the internal active components, such as the transistor and diode, are unknown in the simulation. This abstraction hides the detailed internal workings of these components, making it impossible for the simulation to directly observe or analyze their behavior. As a result, the simulation may not capture all of the dynamics of these components, potentially leading to discrepancies between the simulation results and the actual performance of the system. This lack of visibility is intentional and crucial for protecting proprietary technologies and intellectual property. By concealing the internal structure, manufacturers can safeguard their designs and prevent competitors from accessing critical component details. It is important to note that the full system or measurement parameters are not utilized within the cosimulation itself but are employed for validation purposes only.

The WR method significantly improves alignment with the measurement data after approximately 0.005 s in the continuous mode and around 0.008 s in the discrete-time mode. This indicates successful convergence of the WR method toward real values. Despite the initial mismatch, the WR method gradually approaches close alignment with the measurement data, showcasing its capability to capture system dynamics over time. This underscores that the effectiveness of the proposed time windowing WR method using the developed optimal time window equation enables accurate simulations despite inherent challenges posed by concealed internal parameters.

## VI. CONCLUSION

This article proposed an analytical model to obtain the optimal number of time windows to ensure convergence in a cosimulation of a closed loop system (dc-dc converter) and matching the full system simulation. The boost circuit was first divided into converter and PI controller, and WR with time windowing technique was applied by utilizing initial values, such as inductor current, capacitor voltage, and controller integration values. Within an input voltage range of 1.8–3 V, the proposed technique matches the full system in both continuous-time and discrete-time modes.

A comparative analysis of total iterations between WR methods with and without time windowing technique demonstrated a reduction in elapsed time by 11.1% and 5.6% by applying the developed analytical model. As simulation time increases, adjustments in the number of time windows were necessary to accommodate extended durations and ensured signal stability and accuracy. Comparing time windowing WR simulated and measured results showed that the WR method progressively aligned with measurements after 0.005 and 0.008 s in continuous-time and discrete-time mode, respectively, demonstrating convergence toward reference values.

For validation, the analytical method was then applied to the time windowing WR technique for the discrete-time

buck converter, and the cosimulation results were consistent with those of the full system. The time windowing approach demonstrated acceptable transient performance, making it promising for future applications in cosimulation and hardware-in-loop setups. In particular, it enables the partitioning of simulation tasks into fixed time intervals, facilitating synchronization with real-time execution cycles. This structured segmentation improves control over computational complexity within each window and supports the parallel execution of subsystem models both of which are critical for meeting the stringent timing requirements of hardware-in-the-loop (HIL) systems. In addition, the ability to precompute certain model components or initial values within each window provides a further means of reducing real-time computational demands, thereby enhancing the method's applicability to real-time simulation frameworks.

Overall, the proposed method enhances cosimulation in industrial context by dividing continuous signal exchanges into discrete time windows, enabling accurate waveform reconstruction and synchronization. This approach is particularly valuable in loop-based systems where multiple subsystems interact in real time, improving stability, data consistency, and integration across diverse domains, such as mechanical, electrical, and control systems.

## REFERENCES

[1] S. Bacha et al., "Power electronic converters modeling and control," *Adv. Textbooks Control Signal Process.*, vol. 454, 2014, Art. no. 454.

[2] J. G. Kassakian, D. J. Perreault, G. C. Verghese, and M. F. Schlecht, *Principles of Power Electronics*. Cambridge, MA, USA: Cambridge Univ. Press, 2023.

[3] P. K. Maroti, S. Padmanaban, M. S. Bhaskar, V. K. Ramachandaramurthy, and F. Blaabjerg, "The state-of-the-art of power electronics converters configurations in electric vehicle technologies," *Power Electron. Devices Compon.*, vol. 1, 2022, Art. no. 100001.

[4] M. S. Hossain Lipu et al., "Power electronics converter technology integrated energy storage management in electric vehicles: Emerging trends, analytical assessment and future research opportunities," *Electronics*, vol. 11, no. 4, 2022, Art. no. 562.

[5] D. Rimorov, J. Huang, C. F. Mugombozi, T. Roudier, and I. Kamwa, "Power coupling for transient stability and electromagnetic transient collaborative simulation of power grids," *IEEE Trans. Power Syst.*, vol. 36, no. 6, pp. 5175-5184, Nov. 2021.

[6] M. M. Alam, M. Kohestani, M. Ramdani, and R. Perdriau, "Circuit-to-circuit co-simulation for closed-loop electrical systems using waveform relaxation," *IEEE Trans. Power Electron.*, vol. 40, no. 6, pp. 8553-8565, Jun. 2025.

[7] A. B. Diallo, M. Bensetti, C. Vollaire, L. Pichon, and A. Breard, "Scale reduction for modeling and prototyping of inductive power transfer system for EV applications," *IEEE Trans. Magn.*, vol. 59, no. 5, May 2023, Art. no. 86004044.

[8] R. Yuan et al., "Modelling and co-simulation of hybrid vehicles: A thermal management perspective," *Appl. Thermal Eng.*, vol. 180, 2020, Art. no. 115883.

[9] M. Segura, T. Poggi, and R. Barcena, "A generic interface for X-in-the-loop simulations based on distributed co-simulation protocol," *IEEE Access*, vol. 11, pp. 5578-5595, 2023.

[10] M. Al Mamun, S. Paudyal, and S. Kamalasadan, "Real-time power system dynamic simulation using windowing based waveform relaxation method," in *Proc. IEEE Power Energy Soc. Gen. Meeting*, 2021, pp. 1-5.

[11] M. K. Al-Nussairi and R. Bayindir, "Co-simulation of fuzzy logic control for a DC-DC buck converter in cascade system," in *Artificial Intelligence and Evolutionary Computations in Engineering Systems*. Berlin, Germany: Springer, 2020, pp. 561-569.
[12] A. A. Suvorov et al., "Comprehensive validation of transient stability calculations in electric power systems and hardware-software tool for its implementation," *IEEE Access*, vol. 8, pp. 136071–136091, 2020.

[13] J. Qirong and Z. Chongbin, "Electromagnetic transient synchronization stability with grid-connected inverters," *J. Tsinghua Univ.*, vol. 61, no. 5, pp. 415–428, 2021.

[14] R. Zheng, G. Wang, and K. Ho, "Accurate semidefinite relaxation method for elliptic localization with unknown transmitter position," *IEEE Trans. Wireless Commun.*, vol. 20, no. 4, pp. 2746–2760, Apr. 2020.

[15] C. Lohmann, J. Dünnebacke, and S. Turek, "Fourier analysis of a time-simultaneous two-grid algorithm using a damped Jacobi waveform relaxation smoother for the one-dimensional heat equation," *J. Numer. Math.*, vol. 30, no. 3, pp. 173–207, 2022.

[16] J. K. White, A. Sangiovanni-Vincentelli, J. K. White, and A. Sangiovanni-Vincentelli, *Waveform relaxation*. Berlin, Germany: Springer, 1987.

[17] M. M. Goulkhah, *Waveform Relaxation Based Hardware-in-the-Loop Simulation*. Winnipeg, MB, Canada: Univ. Manitoba, 2014.

[18] G. Ciaramella and M. J. Gander, *Iterative Methods and Preconditioners for Syst. of Linear Equ.*, Philadelphia, PA, USA: SIAM, 2022.

[19] E. N. Duman, D. Taş, and B. Çatay, "Branch-and-price-and-cut methods for the electric vehicle routing problem with time windows," *Int. J. Prod. Res.*, vol. 60, no. 17, pp. 5332–5353, 2022.

[20] J. Lai and Z. Fan, "Stability for discrete time waveform relaxation methods based on Euler schemes," *AIMS Math.*, vol. 8, no. 10, pp. 23713–23733, 2023.

[21] S. Sadaf, M. S. Bhaskar, M. Meraj, A. Iqbal, and N. Al-Emadi, "A novel modified switched inductor boost converter with reduced switch voltage stress," *IEEE Trans. Ind. Electron.*, vol. 68, no. 2, pp. 1275–1289, Feb. 2020.

[22] H. Liu, J. Yu, and R. Wang, "Numerical investigation on model predictive control of portable electronic devices based on MATLAB/FLUENT co-simulation framework," *Appl. Thermal Eng.*, vol. 232, 2023, Art. no. 121079.

[23] Y. Liu, R. Huang, W. Du, A. Singhal, and Z. Huang, "Highly-scalable transmission and distribution dynamic co-simulation with 10,000 grid-following and grid-forming inverters," *IEEE Trans. Power Del.*, vol. 39, no. 1, pp. 578–590, Feb. 2023.

[24] J. Zheng, Z. Zhao, Y. Zeng, S. Ji, and L. Yuan, "An event-driven parallel acceleration real-time simulation for power electronic systems without simulation distortion in circuit partitioning," *IEEE Trans. Power Electron.*, vol. 37, no. 12, pp. 15626–15640, Dec. 2022.

[25] Q. Wang, H. Xi, F. Deng, M. Cheng, and G. Buja, "Design and analysis of genetic algorithm and BP neural network based PID control for boost converter applied in renewable power generations," *IET Renewable Power Gener.*, vol. 16, no. 7, pp. 1336–1344, 2022.

[26] M. Zaid et al., "A transformerless high gain DC–DC boost converter with reduced voltage stress," *Int. Trans. Elect. Energy Syst.*, vol. 31, no. 5, 2021, Art. no. e12877.

[27] V. B. Dmitriev-Zdorov, "Multicycle generalization. A new way to improve the convergence of waveform relaxation for circuit simulation," *IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.*, vol. 17, no. 5, pp. 435–443, May 1998.

[28] Z. Jackiewicz and M. Kwapisz, "Convergence of waveform relaxation methods for differential-algebraic systems," *SIAM J. Numer. Anal.*, vol. 33, no. 6, pp. 2303–2317, 1996.

[29] S. G. Mallat, "A theory for multiresolution signal decomposition: The wavelet representation," *IEEE Trans. Pattern Anal. Mach. Intell.*, vol. 11, no. 7, pp. 674–693, Jul. 1989.

[30] J. R. Hartman, "Networked control system co-simulation for co-design: Theory and experiments," in *Proc. Amer. Control Conf.*, vol. 4, 2004, pp. 3341–3346.

[31] M. M. Alam, R. Perdriau, M. Ramdani, and M. Kohestani, "Importance of interface variables for closed-loop circuit EMC co-simulation using WR method," in *Proc. Int. Symp. Electromagn. Compat.-EMC Europe*, 2024, pp. 849–854.

<figure><img src="image_27.png" /></figure>

**MD MOKTARUL ALAM** (Member, IEEE) received the Ph.D. degree (honors) in electronic engineering from the Institut National des Sciences Appliquées (INSA), University of Rennes, Rennes, France, in 2025 and master's degree in electronic engineering from the International Islamic University Malaysia, Kuala Lumpur, Malaysia, in 2019.

He is actively involved in research projects related to electromagnetic compatibility (EMC) and has an extensive experience in power electronics, propagation, electromagnetics, and antenna systems. From 2017 to 2019, he was a Research Assistant and Teaching Assistant with the International Islamic University Malaysia. From 2022 to 2025, he was a Research Assistant with ESEO, Angers, France. He has authored or coauthored several research papers in national and international journals and conference. His research interests include power electronics, electromagnetic propagation, antennas, EMC, and cosimulation.

<figure><img src="image_28.png" /></figure>

**MOHSEN KOOHESTANI** (Senior Member, IEEE) received the joint Ph.D. degree (honors) in electromagnetics from the Ecole Polytechnique Fédérale de Lausanne, Lausanne, Switzerland, and the Universidade de Lisboa, Lisbon, Portugal, in 2014, and the Habilitation à diriger des recherches" (Accreditation degree) from the Université de Rennes, Rennes, France, in 2023.

From 2014 to 2018, he was a Senior Research Fellow with the Institut d'Électronique et des Technologies du numérique (IETR), Université de Rennes 1, Rennes, France. Since 2018, he has been an Associate Professor with the École Supérieure d'Électronique de l'Ouest, Angers, France, where he was promoted to Full Professor in 2024. He is also an Associate Researcher with IETR, UMR CNRS 6164. He has authored more than 80 peer-reviewed scientific papers. His research interests include the domain of antennas, microwaves, EMC, and biomedical engineering.

Dr. Kohestani is an Official Member of AFNOR, the IEC standardization working group (WG2 and WG9), in the SC47A French subcommittee on the EMC for integrated circuits.

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**MOHAMMED RAMDANI** (Senior Member, IEEE) was born in Oujda, Morocco. He received the Ph.D. degree in microelectronics from the Université Paul Sabatier, Toulouse, France, in 1989, and the habilitation à Diriger des Recherches (accreditation degree) from Université de Rennes 1, Rennes, France, in 2004.

He is currently a Professor with ESEO, an engineering school, Angers, France. His research focuses on the electromagnetic compatibility (EMC) of integrated circuits and integrated circuit design. He has contributed extensively to the field, authored several book chapters on EMC of ICs and authored or coauthored numerous peer-reviewed scientific papers.

Dr. Ramdani is an Active Member with the International Steering Committee of EMC Europe. He was the General Chair of EMC Europe 2017, which took place in Angers.
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**PHILIPPE BESNIER** (Senior Member, IEEE) received the diplôme d'ingénieur degree in electronics from école universitaire d'ingénieurs de Lille, Lille, France, in 1990, and the Ph.D. degree in electronics from the University of Lille, Lille, in 1993.

He was an Assistant Scientist with the EMC division, ONERA, Meudon, France. From 1994 to 1997, he was a Researcher (chargé de recherche) with the Centre National de la Recherche Scientifique (CNRS), Laboratory of Radio-Propagation

and Electronics, University of Lille. From 1997 to 2002, he was the Director with the Centre d'Etudes et de Recherches en Protection Electromagnétique: a not-for-profit organization for research, expertise and training in EMC and related activities, based in Laval, France. He also co-founded and headed TEKCEM in 1998, a small business company specialized in turn-key systems for EMC measurements. Since 2002, he has been since then with the Institut d'électronique et des Technologies du numérique (IETR), Rennes, France. In 2013, He was a Senior Researcher (directeur de recherche au CNRS) with CNSR. Between 2012 and 2016, he was the Co-Head of the "antennas and microwave devices" research department, IETR. During the first semester of 2017, he headed the WAVES (now eWAVES) team—electromagnetic waves in complex media. Since July 2017, he has been a deputy Director with the IETR. His research interests include interference analysis on cable harnesses (including electromagnetic topology), theory and application of reverberation chambers, shielding and absorbing techniques, quantification and propagation of uncertainties in EMC modeling and electromagnetic cybersecurity.

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**RICHARD PERDRIAU** (Senior Member, IEEE) was born in Angers, France, in 1971. He received the engineering degree in electronics and computer science from ESEO, Angers, France, in 1992, the Ph.D. degree in applied sciences from Université Catholique de Louvain, Louvain-la-Neuve, Belgium, in 2004, and the Habilitation à Diriger des Recherches (accreditation degree) from Université de Rennes 1, Rennes, France, in 2012.

From 1992 to 2012, he was an Assistant and then

an Associate Professor with ESEO, in the fields of microelectronics and embedded systems. In 2013, he was a Full Professor. His research interests include EMC of integrated circuits, mixed-signal hardware description languages, and integrated circuit design.

Dr. Perdriau was the Vice-Chair and Technical Program Co-Chair of EMC Europe 2017. Moreover, he is the Technical Program Chair of EMC Europe 2025 and an Active Member of IEC SC47 A.