# Frugal AI for Automated Cardiac Defibrillation: Balancing Performance & Hardware Constraints

Rafael Silva, Caroline Stehlé, Guillaume Pétriat, Pierre-Henri Cadet, Thierry Tibi, Maxime Sermesant

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## To cite this version:

Rafael Silva, Caroline Stehlé, Guillaume Pétriat, Pierre-Henri Cadet, Thierry Tibi, et al., Frugal AI for Automated Cardiac Defibrillation: Balancing Performance & Hardware Constraints. FIMH 2025 - 13th International Conference on Functional Imaging and Modeling of the Heart, Jun 2025, Dallas (TX), United States. 10.1007/978-3-031-94559-5_14. hal-05119661

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Frugal AI for Automated Cardiac Defibrillation:
Balancing Performance & Hardware Constraints

Rafael Silva¹[0000-0001-6254-7843], Caroline Stehlé²,³[0000-0003-2835-2916],
Guillaume Pétriat⁴, Pierre-Henri Cadet⁴, Thierry Tibi⁴, and Maxime
Sermesant¹,³[0000-0002-6256-8350]

¹ Centre Inria d'Université Côte d'Azur, Epione team, Sophia Antipolis, France
[rafael.silva@inria.fr](mailto:rafael.silva@inria.fr)

² Université Côte d'Azur, 3IA Techpool, Sophia Antipolis, France

³ 3IA Côte d'Azur - Interdisciplinary Institute for Artificial Intelligence, Sophia Antipolis, France

⁴ Inn'Pulse, Grasse, France

**Abstract.** Sudden cardiac arrest, often caused by ventricular fibrillation (VF) and ventricular tachycardia (VT), is a leading cause of death worldwide. Timely detection and treatment of these shockable rhythms using Automated External Defibrillators (AEDs) are crucial. This work presents a Deep Learning (DL)-based system for real-time detection of shockable rhythms using a single-lead electrocardiogram (ECG) and limited computing resources. Following the principles of Frugal AI, we focus on developing an efficient, lightweight model that balances high classification performance with minimal hardware requirements. We achieve this by performing Bayesian hyperparameter optimization on the ResNet architecture and applying 8-bit quantization. We also benchmark the model on several STMicroelectronics development boards, assessing performance, the effect of quantization, and resource requirements, with the aim of ensuring computational efficiency and low latency without compromising detection accuracy. Our best results were able to detect shockable rhythms in under 3 seconds with 88.9% sensitivity and 99.6% specificity with 0.2 s of inference time using an STM32 NUCLEO board. Our approach adheres to international AED guidelines and standards, demonstrating its practicality for the healthcare market.

**Keywords:** Automated Cardiac Defibrillation · ECG Classification · Embedded Systems.

# 1 Introduction

Out-of-hospital cardiac arrest (OHCA) is the third leading cause of death worldwide, with 700,000 annual deaths in Europe and USA alone [2] and a survival rate of around 10% [17]. This emergency can occur suddenly, even in people without any known heart conditions, and it needs immediate intervention to prevent fatalities. The timely detection and treatment of these life-threatening episodes with accessible Automated External Defibrillators (AEDs) is critical
to improving survival rates. However, despite being widely available in public spaces, AED use in OHCA remains low in some regions [9], as episodes often occur in residential areas or out of reach from AEDs. This highlights the need for the development of ultra-portable defibrillators. Nevertheless, several hardware and algorithmic challenges still compromise the implementation of state-of-the-art algorithms on such resource-constrained systems.

Frugal AI tries to achieve this by promoting the design, development and deployment of efficient AI systems that use minimal resources, making them more accessible, cost-effective, and sustainable [16]. This includes techniques that optimize models to reduce computational cost, memory usage, and energy consumption while maintaining high performance. For example, model quantization, which reduces the computational precision, and model pruning, which removes unimportant parameters, are commonly used to reduce the model complexity and size. Also, Neural Architecture Search (NAS) is an approach that uses an optimization method to automatically propose new and efficient model architectures that can be adapted for hardware deployment. It involves having a search space of possible neural networks, including variations in layers, connections and operations. The search strategy consists of an algorithm that is employed to propose new architectures and find the best performing one for a given task, such as reinforcement learning and Bayesian optimization.

## 1.1 Sudden Cardiac Arrest and Defibrillation

Sudden cardiac arrest (SCA) occurs when the heart abruptly loses its mechanical function due to an electrical abnormality, generally ventricular tachycardia (VT). If untreated, it can progress into ventricular fibrillation (VFib) or ventricular flutter (VFL), highly mortal arrhythmias. However, they can be treated with a device that delivers a controlled electrical shock to the heart.

Cardiac defibrillators analyze the surface Electrocardiogram (ECG) and use a shock advice algorithm (SAA) that classifies the rhythms into shockable or non-shockable. Shockable rhythms include coarse VFib (with amplitude greater than 200 µV), rapid VT, and VFL (an extreme form of VT). All other cardiac rhythms are considered non-shockable, including normal sinus rhythm (NSR), all types of atrial arrhythmias, premature ventricular contractions, bundle branch blocks, and asystole, as regulated by the International Electrotechnical Commission (IEC) [6]. IEC also establishes the performance requirements for SAAs, with a minimum sensitivity of 90% for VF and 75% for VT, and minimum specificity of 95% for non-shockable rhythms in the absence of artifacts [6].

## 1.2 Defibrillation Algorithms

SAA algorithms can be designed using two main approaches. Feature extraction methods compute features from the ECG and then feed them to Machine Learning (ML) classifiers (e.g, ruled-based, support vector machines (SVMs)). Some features include the threshold crossing interval (TCI) that sets a time interval threshold between consecutive heartbeats [5], the amplitude spectrum
area (AMSA) [15,5], and wavelet coefficients that assess local frequency changes
in the ECG. These methods often involve careful signal preprocessing steps and
the extraction of multiple features to be reliable and accurate.

On the other hand, neural network-based methods often use the raw ECG
signals directly, such as convolutional neural networks (CNNs) or recurrent neu-
ral networks (RNNs), without explicit feature extraction. They are robust to
noise and can capture complex patterns. As an example, ResNet, a CNN-based
architecture, has shown to be highly performant in shockable rhythm ECG clas-
sification with reported sensitivities and specificities of 99,1% and 98,5%, re-
spectively [7]. However they often require large amounts of data for training and
computing resources that not always fit hardware constraints.

1.3 Embedded System Implementations

Developing a cardiac defibrillator involves implementing a real-time detection model in hardware capable of acquiring the ECG, rapidly calculating the model response, and delivering a controlled shock, which needs to be streamlined and optimized to minimize latency. Microcontrollers are often limited by available RAM (which stores incoming data and performs calculations), flash memory (which stores firmware, model, and other data), and computing power.

A series of studies have explored different hardware platforms for implement-
ing algorithms in AED systems. Using ECG segments of 1.4s, Nasimi et al. [13]
used a Raspberry Pi to integrate a lightweight 16-bit CNN and detected shock-
able rhythms with a sensitivity of 96.13% and a specificity of 99.64%, resulting
in a latency of 0.845 seconds. Another work by Kwon et al. [10] tested 5 differ-
ent feature-based models on a Texas Instruments MSP430, with the best results
demonstrating 96.56% sensitivity and 81.53% specificity in detecting VFib within
5 seconds. Khadar et al. [8] implemented an SVM-based model in a Raspberry Pi
using 47 features extracted from R-peaks and wavelet coefficients from 3-second
ECG segments, reporting a latency of 0.56 s and 98.6% accuracy.

Many state-of-the-art approaches in the literature fail to account for the con-
straints of real-time embedded systems, raising concerns about their feasibility
for practical deployment. While existing works often focus on maximizing clas-
sification performance and reducing the time for detection, they are often not
optimized for hardware deployment, overlooking critical factors such as compu-
tational complexity, latency, and energy efficiency.

This article presents the development of a cardiac defibrillator prototype,
focusing on the analysis of a DL-based ECG classification model and the feasi-
bility of its deployment on an embedded system. By optimizing the architecture
and learning parameters, and benchmarking on real hardware, we highlight the
interplay between detection accuracy, computational efficiency, and compliance
with real-time constraints. These results are intended to guide future research to-
wards a lightweight, high-performance, and generalizable DL algorithm, capable
of being deployed on AEDs.
# 2 Materials and Methods

## 2.1 Data

**Data Sources** To train and evaluate the performance of the shockable rhythm detection model, several public ECG databases were selected. These databases vary in terms of acquisition setting (sampling frequency and number of leads), number of recordings and patients, and duration. Among them are the MIT-BIH Malignant Ventricular Ectopy Database (VFDB) [4,3], and the Creighton University Ventricular Tachyarrhythmia Database (CUDB) [14,3], both including several VT, VFL, and VFib annotations. And, for additional rhythm types and conditions, the MIT-BIH Arrhythmia Database (MITDB) [12,3] and the MIT-BIH Atrial Fibrillation Database (AFDB) [11,3] were selected. As such, the combined datasets provide a total of 938 hours of ECG recordings coming from 126 patients with over 15 rhythm types and conditions. Two representative ECG signals in NSR and VFib are depicted in Figure 1.

<figure><img src="image_3.png" /><figcaption>**Fig. 1:** Example of ECG signal in normal sinus rhythm and ventricular fibrillation. Data extracted from CUDB [14,3].</figcaption></figure>

**Preprocessing** Due to the diversity of acquisition settings in the datasets, pre-processing ensured that the ECG data were consistent and compatible with cardiac defibrillation devices, namely:

1. Channel Splitting: for multi-lead ECG recordings, individual channels were independently used to ensure the use of single-lead data.

2. Resampling: all signals were resampled to 100 Hz to ensure the same data representation and reduce computational complexity.

3. Segmentation: the recordings were segmented either according to their rhythm labels or aggregated by consecutive beats of the same label.

4. Standard Scaling: removing the mean and scaling to unit variance allowed to minimize amplitude differences between datasets and patients.

Moreover, samples labeled VFib, VFL, and VT were assigned to the positive class (shockable rhythms), and all other samples to the negative class (non-shockable), simplifying the classification task to a binary one.
## 2.2 Model Training and Evaluation

**Data Splitting** To properly assess the generalizability of the model and avoid data leakage, the data were divided by patient, using a 70/15/15 split for the training, validation and test sets. This splitting was performed at the database level and ensured that at least one patient with the target rhythms is present. The recordings from a patient were then preprocessed and segmented accordingly.

**Data Augmentation** Various time-series augmentation techniques were implemented during training to improve generalizability and robustness to artifacts typical of ECG acquisitions. The number of augmentations per sample was chosen at random, as its parameters, including Gaussian noise (zero mean and maximum standard deviation of 0.05), random scaling (maximum standard deviation of 1), time masking (maximum 20% of the signal duration), baseline wander (a sinusoid with a maximum amplitude of 20% of the signal amplitude, a maximum frequency of 0.5 Hz, and a random phase) and sliding window (50% overlap).

**Neural Network Architecture** Instead of selecting an off-the-shelf architecture or manually designing a neural network, we used an adapted version of the 1D ResNet for NAS to carry out the model training experiments and create an optimized architecture. Its backbone structure consists of convolutional-based blocks with skip connections, each one containing two consecutive sets of batch normalization, a ReLU layer, a 50% dropout, and a convolution layer with a defined number of filters and kernel size. Between blocks, the number of filters can increase by a factor of two and the downsampling operation can be applied, allowing to change the depth and complexity of the network. For class prediction there is batch normalization, a ReLU layer, average pooling, a 50% dropout, and a linear layer. The search space to design the architecture consisted of several of these parameters, such as the number of blocks and filters (Table 1), with value ranges that result in light architectures.

**Training and Hyperparameter Optimization** The models were trained for 50 epochs with early stopping based on minimization of the validation loss to avoid over-fitting (patience of 5 epochs). Also, training ensured class balance with weighted sampling. The weights with the lowest validation loss were chosen for model evaluation. We used the binary cross-entropy loss (BCEWithLogitsLoss) and the AdamW optimizer. All models were trained using PyTorch 2.2.2 and CUDA 12.1 in a Python 3.10 environment with a Tesla T4 GPU card (16 GB RAM). Bayesian hyperparameter optimization using Weights&Biases [1] allowed us to identify the optimal learning rate and batch size and to define all ResNet's architecture parameters (Table 1), as part of the NAS strategy. This optimization strategy allows to decide the next combination of hyperparameters to test taking into account the previous validation losses.
<table><caption>**Table 1:** Summary of Bayesian optimization hyperparameter range values.</caption><thead><tr><td>Hyperparameter</td><td>Value Range</td><td>Hyperparameter</td><td>Value Range</td></tr></thead><tbody><tr><td>Number of blocks</td><td>5 - 10</td><td>Kernel Size</td><td>5 - 25</td></tr><tr><td>Number of filters</td><td>16 - 128</td><td>Stride</td><td>1, 2</td></tr><tr><td>Downsample Gap</td><td>3 - 12</td><td>Batch Size</td><td>8 - 64</td></tr><tr><td>Increase Filter Gap</td><td>6 - 24</td><td>Learning Rate</td><td>0.0001 - 0.01</td></tr></tbody></table>

## 2.3 Model Quantization and Deployment

**Post-Training Model Quantization** To enable efficient deployment on embedded systems, we used the STM32 Cube AI framework for 8-bit quantization of the trained models. The original models, trained with 32-bit precision, were converted to the Open Neural Network Exchange (ONNX) format.

Using a calibration dataset derived from the training data, we quantized the model's weights and activations to 8-bit precision and evaluated on the test data. The STM32 Cube AI framework<fnref n="1" /> also allowed benchmarking on various STM32 boards. Key metrics, including inference time, multiply-accumulate operations (MACCs), flash memory, and RAM usage, were measured, providing insights into the models' feasibility for resource-constrained systems.

**Board Benchmarking** Quantization significantly reduced model size from a 32-bit version that could not fit on the target boards (408 KiB) to having only 102 KiB, allowing deployment on multiple STM32 boards. By using a range of boards available with the STM32Cube.AI Developer Cloud framework, four viable candidates for our model achieved inference times below 1 second (Figure 2). For instance, with a NUCLEO-H743ZI2 board, the simulated inference time is 727 ms for 10-second inputs.

<figure><img src="image_4.png" /><figcaption>**Fig. 2:** Inference times benchmark of different boards using the STM32 Cube AI framework after quantization, highlighting candidates with low latency (<1s).</figcaption></figure>

<footnote n="1">¹ https://stm32ai.st.com/stm32-cube-ai/</footnote>
<table><caption>**Table 2:** Data summary and results for shockable rhythm detection, detailing the total duration of the rhythms, the number of patients, and the sensitivity and specificity for 10 and 3-second inputs.</caption><thead><tr><th rowspan="2">Class</th><th rowspan="2">Rhythm</th><th colspan="3">Total Duration</th><th colspan="2">Sensitivity/Specificity</th></tr><tr><th>Train (87)</th><th>Validation (17)</th><th>Test (22)</th><th>10 seconds</th><th>3 seconds</th></tr></thead><tbody><tr><td rowspan="3">Shockable</td><td>VFib</td><td>1h 47min</td><td>3min 30 s</td><td>12min 20s</td><td>96.2%</td><td>90.1%</td></tr><tr><td>VT/VFL</td><td>2h 36min</td><td>41min 40s</td><td>19min</td><td>86.8%</td><td>88.4%</td></tr><tr><td>(both)</td><td></td><td></td><td></td><td>(91.0%)</td><td>(88.9%)</td></tr><tr><td rowspan="3">Non-Shockable</td><td>NSR</td><td>9d 18h</td><td>2d 2h</td><td>2d 2h</td><td>99.8%</td><td>99.7%</td></tr><tr><td>Other</td><td>5d 21h</td><td>20h 57min</td><td>1d 19h</td><td>99.9%</td><td>99.4%</td></tr><tr><td>(both)</td><td></td><td></td><td></td><td>(99.9%)</td><td>(99.6%)</td></tr></tbody></table>

VFib = ventricular fibrillation; VT = ventricular tachycardia; VFL = ventricular flutter; NSR = normal sinus rhythm

# 3 Results and Discussion

## 3.1 Data Distribution

As described in Table 2, the dataset was divided into 87, 17 and 22 patients for training, validation and testing. While non-shockable rhythms accounted for almost 19 days of ECG recordings, shockable rhythms accounted for just over 5 hours. This imbalance is due to the use of various databases with a wide range of ECG morphologies, conditions and rhythms. To deal with such issue and be able to generalize, weighted sampling ensured that each training batch contained the same proportion of the two classes, balancing class representation.

## 3.2 Model Choice and Classification Performance

To identify the best-performing model for real-time ECG classification, we performed a series of experiments using Bayesian optimization. This process was conducted using the same data split, ensuring consistency in model evaluation. As a baseline, all candidate models were trained using 10-second inputs, and model selection was guided using validation metrics.

Given the significant class imbalance and the hardware constraints, we prioritized models with a high F1-Score (balance between precision and sensitivity) and a low number of parameters. Using these criteria, we identified a model that provided the best compromise between classification performance and model complexity. After 143 optimization iterations, the selected model achieved an accuracy of 99.8%, an F1-Score of 85.9%, a specificity of 99.88%, and a sensitivity of 91.0% on the test set, with only 102,903 parameters (Table 2). Because the model allows for different input durations, we also performed a sensitivity analysis to minimize it. With 3-second inputs, we were able to achieve 88.9% sensitivity and 99.6% specificity (Table 2), complying with IEC requirements.
In both cases, VFib detection is accurate despite having fewer training samples, which was expected given the clear morphological differences of the wave. VT classification, on the other hand, is less precise, possibly due to the absence of clear VT annotations in the CUDB database. Although direct comparison with other works is not straightforward, given the choice of databases and preprocessing steps, our lightweight ResNet model is competitive both in input duration (3 s) and classification performance (≈ 90% sensitivities, >99% specificities).

### 3.3 Effect of Quantization

After 8-bit quantization, classification performance remained stable for both 10-second and 3-second ECG inputs (Table 3), with slightly improved sensitivity and a minor drop in specificity, probably due to the selection of the calibration data. Shorter inputs also linearly reduced the number of computations (MACCs), further improving inference speed. Compared to the work of Nasimi et al. [13], which also uses a CNN-based network, our approach uses 8-bit quantization instead of 16-bit and evaluates on more than 33,000 test samples versus their 1,606. This difference in dataset size may explain why their reported sensitivity is higher, despite both approaches achieving similar specificity. Also, our implementation appears to be more computationally efficient, with an average inference time of 0.197 s, in comparison to [13] (0.845 s) and [8] (0.560 s).

<table><caption>**Table 3:** Classification performance for the quantized (8-bit) and original (32-bit) models and hardware metrics using a simulated NUCLEO-H743ZI2 board. The differences between the 10 and 3-second inputs are described for both.</caption><thead><tr><th rowspan="2">Input Duration</th><th rowspan="2">Model Version</th><th colspan="3">Classification Performance</th><th colspan="3">Hardware Performance</th></tr><tr><th>Accuracy</th><th>Sensitivity</th><th>Specificity</th><th>MACCs</th><th>Weights (KiB)</th><th>RAM (KiB)</th><th>Inference Time (ms)</th></tr></thead><tbody><tr><td rowspan="2">10 seconds</td><td>8-bit</td><td>99.8%</td><td>91.5%</td><td>99.8%</td><td>102.9M</td><td>102.0</td><td>120.2</td><td>726.8</td></tr><tr><td>32-bit</td><td>99.8%</td><td>91.0%</td><td>99.9%</td><td>-</td><td>408.0</td><td>-</td><td>-</td></tr><tr><td rowspan="2">3 seconds</td><td>8-bit</td><td>99.5%</td><td>90.0%</td><td>99.6%</td><td>30.9M</td><td>102.0</td><td>41.5</td><td>196.5</td></tr><tr><td>32-bit</td><td>99.5%</td><td>88.9%</td><td>99.6%</td><td>-</td><td>408.0</td><td>-</td><td>-</td></tr></tbody></table>

MACCs = Multiply-Accumulate Operations; KiB = kibibytes (1 KiB = 1024 bytes)

### 3.4 Hardware Deployment

To get inference time on real hardware we programmed a physical board NUCLEO-H753ZI (Figure 3a) using STM32Cube IDE with the X-CUBE-AI package. We gave random inputs to the model and set up a timer to compute the inference time. Then, with the board connected to the serial port with PuTTY, we recorded the model output and inference time (Figure 3b). The model inferences
are computed in an infinite loop until the user button is pressed. In this configuration, the inference time is always around 659 ms for the 10-second inputs, which is coherent with the simulation results obtained on the cloud.

We also measured power consumption board during inference. The current draw increased from 0.28 A (idle) to 0.31 A (inference) at 5.06 V, resulting in an estimated power consumption of 151.8 mW per inference. While this provides an initial benchmark, a detailed computational and energy efficiency comparison with existing AED algorithms is still required.

<figure><img src="image_5.png" /><figcaption>**Fig. 3:** (a) NUCLEO-H743ZI2 board chosen for real hardware measurements running the experiments. (b) The output terminal with inference times for 10-second inputs.</figcaption></figure>

## 4 Conclusion

In this work, we analyzed the impact of model training, quantization, and deployment on real-time shockable rhythm detection in embedded systems. By optimizing training and architecture hyperparameters, we identified a model with a good balance between performance and computational efficiency, achieving 91.0% sensitivity and 99.9% specificity for 10-second inputs. By reducing the input duration to 3 seconds, the model still complies with international standards. Moreover, with 8-bit quantization, we reduced the model size, enabling real deployment on STM32 microcontrollers while maintaining high classification performance. Benchmarking results showed that four selected boards achieved inference times below 1 second, allowing real-time predictions.

**Future Work** Future work will involve testing our model with ECG data acquired directly from the microcontroller, especially under extreme noise and artifact conditions typical in real cardiac arrest scenarios. We will also compare energy efficiency with existing approaches and explore further optimization techniques for hardware deployment.
**Acknowledgments.** This work has been supported by the French government, through the National Research Agency (ANR) 3IA Côte d'Azur and IA Cluster project (ANR-19-3IA-0002 and ANR-23-IACL-0001). The authors are grateful to the OPAL infrastructure from Université Côte d'Azur for providing resources and support.

**Disclosure of Interests.** This research is a collaborative project between Inria, 3IA Techpool (3IA Côte d'Azur), and Inn'Pulse. Authors Pétriat G., Cadet P.-H., and Tibi T. are co-founders of Inn'Pulse. The company had no role in the study design, data collection, analysis, interpretation of data, or decision to publish. The remaining authors declare no competing interests.

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