# Nanoscale Calibration Standards for On-Wafer S-Parameters measurements up to 110 GHz

Daouda Seck, Djamel Allal, Florent Marlec, Clément Lenoir, Mohamed Sebbache, Kamel Haddadi

► To cite this version:

Daouda Seck, Djamel Allal, Florent Marlec, Clément Lenoir, Mohamed Sebbache, et al.. Nanoscale Calibration Standards for On-Wafer S-Parameters measurements up to 110 GHz. EPJ Web of Conferences, 2025, 22nd International Metrology Congress (CIM2025), 323, 10.1051/epjconf/202532312003. hal-05065878

HAL Id: hal-05065878

https://hal.science/hal-05065878v1

Submitted on 13 May 2025

HAL is a multi-disciplinary open access
archive for the deposit and dissemination of sci-
entific research documents, whether they are pub-
lished or not. The documents may come from
teaching and research institutions in France or
abroad, or from public or private research centers.

L'archive ouverte pluridisciplinaire HAL, est
destinée au dépôt et à la diffusion de documents
scientifiques de niveau recherche, publiés ou non,
émanant des établissements d'enseignement et de
recherche français ou étrangers, des laboratoires
publics ou privés.

<figure><img src="image_1.png" /></figure>

Distributed under a Creative Commons Attribution 4.0 International License
# Nanoscale Calibration Standards for On-Wafer S-Parameters measurements up to 110 GHz

Daouda Seck ¹,²*, Djamel Allal¹, Florent Marlec², Clément Lenoir², Mohamed Sebbache², and Kamel Haddadi²*

¹LNE Laboratoire National de Métrologie et d'Essais, Trappes, France, France

²Univ. Lille, CNRS, Centrale Lille, Univ. Polytechnique Hauts-de-France, UMR 8520 - IEMN - Institut d'Electronique de Microélectronique et de Nanotechnologie - Lille, France

**Abstract.** We report the first experimental results on the design and fabrication of nanoscale on-wafer calibration standards operating up to 110 GHz. The propagation constant and effective permittivity of coplanar waveguide (CPW) transmission lines (TLs) are extracted from raw S-parameters using the Thru-Reflect-Line (TRL) method. Experimental data show deviations in extracted propagation characteristics when comparing nanostructures to microscale structures.

## 1 Introduction

The growing demand for miniaturization in on-wafer RF and microwave circuit design extends to the nanoscale. This scaling introduces challenges, particularly due to the high impedances that arise at such small dimensions. These high impedances create a mismatch with the vector network analyzer (VNA), which is typically designed and calibrated for a nominal impedance of 50 Ω [1], [2]. This mismatch negatively affects measurement sensitivity and accuracy. Moreover, commercially available calibration kits are not suited to the scale of these miniaturized components or nanodevices. Addressing these challenges requires equipping on-wafer probe stations with additional capabilities to enhance sensitivity [3], [4] and repeatability [4], [5].

It is also essential to miniaturize calibration standards to correct vector network analyzer (VNA) systematic errors at the nanoscale. The advancement of nanotechnology is largely driven by innovations in integrated circuit design which incorporate both miniaturized passive and active components. Passive components include transmission lines (TLs), which enable RF signal transmission across the circuit and support the design of impedance matching networks, couplers, dividers, and filters, among others. Planar TLs, such as microstrip lines and coplanar waveguides (CPW) [7], offer greater flexibility for component-mounting circuits. A key advantage of these structures is the ability to control losses through careful selection of conductor and substrate materials. High-frequency electrical performance of electronic devices is typically evaluated using a pre-calibrated VNA to measure their S-parameters, which represent the ratios of incident, reflected, and transmitted power waves. To obtain accurate S-parameters of the device under test (DUT), systematic errors inherent to the measurement system

must be removed through calibration using traceable standards [8].

This article presents initial results on the design of a nanoscale calibration kit in GSG CPW topology, developed for on-wafer S-parameter measurements up to 110 GHz, based on a 50 Ω reference impedance [9].

## 2 Methodology

The measurement of S-parameters using a VNA rely on a concept that necessitates an error model or measurement model [10], depending on the DUT configuration, which can have one or two ports (as in this study). In the case of a two-port DUT, the measurement model accounts for systematic errors and the DUT itself, all represented as cascaded two-port networks.

<figure><img src="image_2.png" /><figcaption>Fig. 1. Measurement error model.</figcaption></figure>

The whole process is expressed by equation (1) where *M* represents the DUT data measured at the reference planes of the measurement system. *X* and *Y* represent the systematic errors on right and left sides. Finally, the term *T*<sub>DUT</sub> denotes the true response in transfer matrix for the DUT.

$$M = X.T_{DUT}.Y \quad (1)$$

Knowledge of the transmission characteristics of a line, namely the characteristic impedance *Z*<sub>c</sub>, the propagation constant *γ* and the effective relative permittivity *ε*<sub>reff</sub> are required. Mark and Williams have demonstrated that

<footnote>* Corresponding author: Daouda.Seck@lne.fr</footnote>
impedance can be determined from measurements of the propagation constant and the linear capacitance of a transmission line [11], [12].

The Thru-Reflect-Line (TRL) calibration technique enables the determination of the propagation constant of a transmission line using the measured S-parameters of two calibration standards: a thru and a line. These standards are mathematically represented in a T-matrix format, which facilitates the extraction of the propagation characteristics of the transmission line. The effective permittivity is directly related to the propagation constant through the following equation

$$ \epsilon_{reff} = -\left(\frac{c}{2\pi f}\right)^2 \quad (2) $$

where c is the speed of light in vacuum, f is the frequency, and γ is the TL phase constant.

## 3 Design and Fabrication

In our approach, we have designed CPW structures as calibration standards for on-wafer S-parameter measurements. These structures consist of two sections: a microscale section, optimized for contacting ground-signal-ground (GSG) probes with a pitch ranging from 50 µm to 100 µm and matched to a 50 Ω impedance, and a nanoscale section. To ensure impedance continuity between these regions, a tapered transition is implemented with an optimized geometric aspect ratio profile. The key contribution of this study lies in the miniaturized section, whose dimensions are scaled to match the calibration standards, enabling accurate high-frequency measurements at the nanoscale.

<figure><img src="image_3.png" /><figcaption>Fig. 2. View of the CPW structure designed in CST Studio.</figcaption></figure>

The calibration structures were fabricated on a high-resistivity silicon substrate (ε<sub>r</sub>=11.9). Gold was used as conductive material. A titanium adhesion layer was integrated, simultaneously as a resistive element with a sheet resistance of 48.9 Ω/□ for a deposited thickness in the range of 23–25 nm. The structural topology and dimensional parameters were optimized through full-wave 3D electromagnetic simulations in CST Studio, ensuring precise impedance control and minimal signal degradation. The detailed geometric specifications are provided in Table 1.

<table><caption>Table 1: Dimensional parameters.</caption><thead><tr><th>dimension</th><th>W1</th><th>W2</th><th>G1</th><th>G2</th><th>Wg1</th><th>Wg2</th><th>t</th><th>Hs</th></tr></thead><tbody><tr><td>μm</td><td>27</td><td>0.5</td><td>18.2</td><td>0.85</td><td>140</td><td>40</td><td>0.35</td><td>350</td></tr></tbody></table>

The calibration standards were fabricated using a three-step microfabrication process. First, alignment marks were patterned. Next, a Titanium layer was deposited to form the resistive elements. Finally, a 350 nm gold layer was deposited with an underlying titanium adhesion layer to enhance metal-substrate adhesion. The fabrication of these nanoscale structures presented significant technical challenges, using electron beam lithography (EBL) to achieve the required resolution. The process included an optimization of the EBL (to minimize proximity effects) and lift-off to ensure precise feature definition. This optimization was critical for achieving high-yield fabrication while operating at the resolution limits of the available microfabrication technology.

Two fabrication runs were conducted, with the first yielding a small number of defective devices, as illustrated in Fig. 3.

<figure><img src="image_4.png" /><figcaption>Fig. 3. Scanning electron microscope (SEM) view of a defective tapered TL (1st fabrication run).</figcaption></figure>

After process optimization, the second run produced well-defined structures, as shown in Fig. 4.

<figure><img src="image_5.png" /><figcaption>Fig. 4. Scanning electron microscope (SEM) view of a tapered TL (2nd fabrication run).</figcaption></figure>

## 4 Measurement results

The Measurements campaign was performed from 250 MHz to 110 GHz using an on-wafer probe station and a Rohde & Schwarz ZVA67 VNA (Fig. 5). Initially, the LRRM calibration technique was applied using a commercial microscale calibration kit (ISS) to define the measurement reference planes at the GSG probe tips and verify the functionality of all fabricated standards (Fig. 6). The VNA output power was set to Pout = -15 dBm, with an IF bandwidth of 50 Hz.
<figure><img src="image_6.png" /><figcaption>Fig. 5. On-wafer probe station.</figcaption></figure>

<figure><img src="image_7.png" /><figcaption>Fig. 6. HR silicon wafer with dedicated miniaturized CPW structures.</figcaption></figure>

The TRL calibration technique was implemented using uncalibrated measurement data to establish the measurement reference planes at the input of the nanoscale DUTs. The calibration procedure employed a 200 µm line as the thru standard, a second line selected from a set ranging from 250 to 2250 µm as the line standard, and a pair of short circuits as the reflect standard. Given the high attenuation in the nanoscale structures, the TRL algorithm remained applicable with any combination of line standards.

The lateral miniaturization of CPW structures induces changes in their aspect ratio, leading to increased conductor losses, which in turn affect the effective permittivity, propagation constant, and characteristic impedance. To quantify these effects, a comparative analysis was performed between the extracted effective permittivity and propagation characteristics of the micro- and nanoscale structures. Fig. 7 presents the measured and simulated effective permittivity and propagation constants for micro- and nanoscale CPW structures over a frequency range up to 110 GHz.

As shown in Fig. 7, the real part of the effective permittivity for the microscale CPW line remains approximately 6.4 from 40 GHz to 110 GHz, which is consistent with the theoretical value for an ideal CPW line. In contrast, the nanoscale CPW line exhibits a higher and more frequency-dependent effective permittivity, varying from approximately 9.5 at 10 GHz to 7.5 at 110 GHz. The nanoscale TL also exhibits significantly higher losses, with an attenuation constant (α) reaching approximately 22 dB/mm (≈2.5 Np/mm) at 110 GHz, compared to only 2.2 dB/mm (≈0.25 Np/mm) for the microscale CPW TL. This increased attenuation is primarily attributed to higher conductor losses, which become more pronounced at smaller dimensions.

<figure><img src="image_8.png" /><figcaption>Fig. 7. Comparison of measured and simulated effective permittivity and propagation constants for micro- and nanoscale CPW structures. The top row presents the real (left) and imaginary (right) components of the effective permittivity $ε_{eff}$ as a function of frequency. The bottom row shows the attenuation constant (α, left) and phase constant (β, right) extracted from measurements and simulations.</figcaption></figure>

Finally, a 300 µm CPW TL was measured as the DUT. In the TRL calibration, the measurement reference plane is defined at the center of the thru standard, with its two halves included in the error boxes. This calibration method effectively de-embeds all systematic contributions from the VNA, including cables and probes, to the defined reference plane.

Fig. 8 presents the measured transmission amplitude and phase of the transmission coefficient $S_{21}$ of the DUT after applying both the ISS LRRM calibration and our TRL calibration, along with simulation results obtained using Keysight ADS. The ISS calibration results indicate higher attenuation, as it considers the entire structure between the probe tips, including contact resistances and parasitic effects. In contrast, the TRL calibration more accurately isolates the DUT response by referencing the calibration plane within the CPW nanoscale TL itself.

The observed deviation between the TRL-calibrated measurements and simulation results can be attributed to multiple factors. These include fabrication-related imperfections, such as scratches on CPW lines, which could locally alter the transmission characteristics, as well as a lower-than-expected conductivity of the deposited metal, leading to increased insertion loss.
<figure><img src="image_9.png" /><figcaption>Fig. 8. Measured and simulated transmission coefficient $S_{21}$ for the 300 µm CPW TL. The left plot shows the magnitude $|S_{21}|$ in dB, while the right plot presents the phase response (in degrees) as a function of frequency. The results compare the transmission coefficient obtained using the TRL calibration, ISS LRRM calibration, and Keysight ADS simulation.</figcaption></figure>

## 5 Conclusion

We developed nanoscale S-parameter calibration standards for on-wafer characterization of nanodevices. The dimensional parameters of these standards were optimized through full-wave 3D electromagnetic simulations to ensure impedance control and calibration accuracy. Nano-fabrication posed significant challenges, initial measurement results demonstrated the feasibility of nanoscale on-wafer calibration, with TRL-calibrated data showing consistency with expected propagation characteristics. Further investigations are ongoing to assess factors influencing the performance of these nanostructures, with a comprehensive uncertainty analysis planned to quantify systematic and random measurement errors.

## Acknowledgements

This project (BELC157) has received funding from the Réseau National de la Métrologie Française (RNMF) and from the Association Nationale de la Recherche et de la Technologie ANRT under grant 2022/0073. This work was partially supported by the French Renatech network.

## References

1. H. Happy et al., "Measurement Techniques for RF Nanoelectronic Devices: New Equipment to Overcome the Problems of Impedance and Scale Mismatch," in *IEEE Microwave Magazine*, vol. 15, no. 1, pp. 30-39, Jan.-Feb. 2014.

2. K. Daffé, G et al., "On-Wafer Series-Through Broadband Measurement of Sub-fF55-nm MOS RF Voltage-Tunable Capacitors," in *IEEE Microwave and Wireless Components Letters*, vol. 28, no. 9, pp. 831-833, Sept. 2018.

3. R. Romano, F. Mubarak, M. Spirito and L. Galatro, "The HΓ-VNA, an Interferometric Approach for the Accurate Measurement of Extreme Impedances," *93rd ARFTG Microwave Measurement Conference (ARFTG)*, Boston, MA, USA, 2019, pp. 1-6.

4. K. Haddadi et al., "Multiport Vector Network Analyzer Configured in RF Interferometric Mode for Reference Impedance Renormalization," in *IEEE MTT-S International Microwave Symposium (IMS)*, Boston, MA, USA, 2019, pp. 1276-1278.

5. C. Mokhtari et al., "Nanorobotics and Automatic On-Wafer Probe Station with Nanometer Positioning Accuracy," *2023 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO)*, Winnipeg, MB, Canada, 2023, pp. 22-24.

6. C. Mokhtari et al., "Exploring Nanorobotics Integration with Microwave and Millimeter-Wave Techniques for Advanced On-wafer Measurement," *5th International Conference in Electronic Engineering, Information Technology & Education (EEITE)*, Chania, Greece, 2024, pp. 1-6.

7. R. N. Simons, "Coplanar waveguide circuits, components, and systems," *John Wiley & Sons, 2004*.

8. Andrej Rumiantsev, "Design of On-Wafer Calibration Standards," *On-Wafer Calibration Techniques Enabling Accurate Characterization of High-Performance Silicon Devices at the mm-Wave Range and Beyond. River Publishers*, 2022. 51-67.

9. D. Seck, D. Allal and K. Haddadi, "On-Wafer TRL Calibration Design for Microwave Nanoscale and High Impedance Measurement," *IEEE Symposium on Wireless Technology & Applications (ISWTA)*, Kuala Lumpur, Malaysia, 2024, pp. 260-263.

10. M. Zeier, D. Allal, and R. Judaschke. Guidelines on the evaluation of vector network analysers (VNA). *EURAMET Calibration Guide*, 2018, vol. 3, no 12, p. 507-521.

11. R. B. Marks and D. F. Williams, "Characteristic impedance determination using propagation constant measurement," in *IEEE Microwave and Guided Wave Letters*, vol. 1, no. 6, pp. 141-143, June 1991.

12. D. F. Williams and R. B. Marks, "Transmission line capacitance measurement," in *IEEE Microwave and Guided Wave Letters*, vol. 1, no. 9, pp. 243-245, Sept. 1991.