# Implementing quantum polar codes in a superconducting processor: From state preparation to decoding

Handy Kurniawan, Valentin Savin, Carmen G. Almudever, Francisco Garcia-Herrero

## ► To cite this version:

Handy Kurniawan, Valentin Savin, Carmen G. Almudever, Francisco Garcia-Herrero. Implementing quantum polar codes in a superconducting processor: From state preparation to decoding. IEEE Software, 2025, pp.1-8. 10.1109/MS.2025.3569447. cea-05143172

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Submitted on 3 Jul 2025

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# Implementing Quantum Polar Codes in a Superconducting Processor: From State Preparation to Decoding

Handy Kurniawan<fnref n="1" />, Valentin Savin<fnref n="2" />, Carmen G. Almudéver<fnref n="3" />, and Francisco García Herrero<fnref n="4" />

**Abstract**—Quantum polar codes are a class of capacity-achieving quantum codes, with fast and efficient error syndrome decoding for Pauli channels, emerging as a promising approach to fault-tolerant quantum computation. However, their implementation on superconducting quantum hardware with connectivity constraints is hindered by the need for long-range qubit interactions, which increases CNOT gate usage and reduces fidelity. A full-stack software framework for implementing quantum polar codes is presented, integrating a noise-aware compilation approach that optimizes resource usage by combining quantum and classical software. Experimental results demonstrate significant improvements in logical state preparation rates, with resource savings from 10% to 81% for both quantum and classical computations.

Achieving large-scale fault-tolerant quantum computation relies heavily on implementing quantum error correction (QEC), where the quantum information is protected from noise by encoding it using a quantum error-correcting code (QECC)<fnref n="1" />. Most QEC proposals detect and correct errors by measuring the stabilizers of the encoded quantum state. Ideally, stabilizer measurements provide perfect syndrome information, accurately indicating the presence of errors<fnref n="2" />. However, on real quantum devices, noise in syndrome measurements reduces computational reliability and increases the complexity of classical decoding required to identify errors.

Several studies have explored the application of various QECCs on real quantum hardware, such as the surface code<fnref n="3" />, the repetition code<fnref n="4" />, the Steane code⁵, cluster-state-based codes⁶, and quantum low-density parity-check (LDPC) codes⁷. These codes have been implemented in a wide range of platforms that include trapped-ion⁵, photonic⁶, neutral atom⁷, and superconducting<fnref n="3" />,<fnref n="4" /> quantum processors.

Quantum polar codes⁸ are a class of QECCs with unequaled error correction performance, as they are known to achieve the symmetric coherent information (one-shot capacity) of any quantum channel while being equipped with an efficient, log-linear complexity decoding algorithm for Pauli channels. Recently, a fault-tolerant preparation procedure of polar code states using two-qubit Pauli measurements and error detection has been proposed⁹,¹⁰, which, coupled with Steane error correction, was shown to outperform by several orders of magnitude the error rate performance of a surface code with similar parameters¹⁰. Yet, the fault-tolerant implementation of quantum polar codes requires interactions between distant

qubits, which is challenging for quantum processors that only allow nearest-neighbor interactions. In this case, it is necessary to insert SWAP gates that bring non-adjacent qubits to physically adjacent positions whenever they need to perform a two-qubit (2Q) gate. This results in an overhead of 2Q gates, which increases the noise level. Simply reducing the 2Q gate overhead might not be the optimal solution, since a higher count of 2Q gates with lower error rates may improve the overall fidelity¹¹.

This paper proposes a full-stack approach to implementing quantum polar codes, motivated by their strong performance and efficient decoding, with a focus on addressing the challenge of local interaction constraints on quantum hardware. The key contributions of this work are as follows: (1) Demonstrating the effectiveness of noise-aware compilation techniques on real superconducting quantum processors with limited connectivity, using quantum polar codes as a challenging case study that underscores the importance of these techniques. (2) Implementing a platform that spans the entire process, from the compilation and optimization of quantum circuits for state preparation to the classical software system responsible for processing syndrome measurements with error detection and correction algorithms. (3) Experimentally demonstrating that our proposal results in significant time and space resource savings, without degrading the logical error rate (LER) performance.

## BACKGROUND

This section provides an overview of the relevant key concepts, including a short description of quantum polar codes, the main types of noise models considered for simulation, and a review of the existing noise-aware compilation techniques.

### Quantum Polar Codes

Quantum polar codes are a class of QECCs with high-weight stabilizers, which prevent the implementation of fault-tolerant error correction through repeated syndrome measurements, similar to what is done for topological, or more generally, quantum LDPC codes. The preparation procedure⁹ progressively constructs the generators of the stabilizer group using two-qubit Pauli measurements. As the measured operators anticommute, the preparation procedure cannot be

<footnote n="1">¹Universidad Complutense de Madrid, Madrid, 28040, Spain</footnote>

<footnote n="2">²Université Grenobles Alpes, CEA-Léti, F-38054, Grenoble, France</footnote>

<footnote n="3">³Universitat Politècnica de València, Valencia, Spain</footnote>

<footnote n="4">⁴Universidad Complutense de Madrid, Madrid, 28040, Spain</footnote>
<figure><img src="image_2.png" /></figure>

Figure 1. Block diagram of QEC layer based on polar codes. The blue color represents the quantum software, the green color represents the classical software, and the red and gray colors are out of the scope of this work.

repeated. Instead, it can be complemented by a specific error
detection mechanism, making it fault-tolerant. This allows
fault-tolerant preparation of polar code states, which can
be coupled with Steane error correction to implement fault-
tolerant error correction. Figure 1 illustrates a high-level block
diagram of the QEC layer based on polar codes. This hybrid
process integrates quantum operations, such as state prepa-
ration, with classical operations to implement error detection
and correction algorithms. Note that implementing the control
unit is out of the scope of this work.

*State Preparation.:* We consider polar codes of length $N = 2^n$ data qubits ($n > 0$), encoding one logical qubit, denoted as $Q_1$ codes⁹. The state preparation process is done in $n$ steps, where each step consists of either $N/2$ Pauli $Z \otimes Z$ measurements, or $N/2$ Pauli $X \otimes X$ measurements. The total number of physical qubits is $N := N + N/2$, comprising the $N$ data qubits, storing the encoded quantum information, and $N/2$ ancilla qubits used to implement the measurements. The specific pattern of the Pauli measurements depends on the information index in the polar code⁹ and the prepared logical state. Figure 2 illustrates the fault-tolerant preparation protocol for a $Q_1$ code of length $N = 8$.

*Error Detection.:* In the noiseless case, at each step of the preparation procedure, the *N*/2 classical bits obtained from the *N*/2 Pauli measurements can be organized as a concatenation of codewords of some smaller classical polar codes. One can exploit this property to detect errors, by computing the corresponding error syndromes (not to be confused with the quantum polar code syndrome). This is illustrated in Figure 3, where error syndromes are computed for each block of *N*/2 bits. A non-zero syndrome indicates the presence of an error, in which case the prepared state is discarded and the preparation process is repeated. If all the syndromes are zero, the prepared state is accepted. This makes the state preparation probabilistic, and we refer to the probability that the state is successfully prepared as preparation rate. Preparation failures can be addressed through time redundancy, where the state preparation is repeated until it succeeds, or space redundancy through a factory-based approach¹⁰, where multiple code states are prepared in parallel to increase the likelihood of a valid state. Note that a successfully prepared state is still prone to errors, as some errors may go undetected by the

error detection mechanism. Finally, within the error detection
unit, the signs of the stabilizer group generators and logical
operators (for the prepared logical state) are also computed and
transmitted to the error correction unit, in case of successful
state preparation (N bits, for N − 1 generators and one logical
operator).

*Error Correction.:* In Steane error correction, the prepared state serves as an ancilla state, onto which the errors from the protected state are copied through transversal CNOT gates and measured out to perform error correction. Implementing the full Steane error correction procedure is out of the scope of this work, but we are still interested in determining the LER of the prepared logical state. To do so, we directly measure the prepared state and perform error correction. Precisely, we measure the data qubits on either *X* or *Z* basis, depending on the prepared logical state, and perform Successive Cancellation (SC) decoding on the measurement outputs to determine the sign of the logical operator. Note that SC decoding only uses the information on the signs of the *N* − 1 generators received from the error detection unit. A logical error occurs if the decoded sign of the logical operator does not match the one determined within the error detection unit.

Noise Models

To simulate the behavior of quantum computers, we employ
the calibration-based noise model, which provides a more
accurate representation but is resource-intensive. This model
is constrained by the native gates and topology of the actual
hardware, mimicking the circuit executed on real devices¹². As
shown in Figure 4, additional gates (compared to the original
circuit in Figure 2) are needed due to hardware limitations,
which significantly increases the circuit depth and noise. This
model also accounts for error sources such as qubit parameters
(relaxation and dephasing times, frequency, anharmonicity,
and readout errors), and the specific error rates of native
gates provided by hardware vendors¹². More considered noise
models are presented in the Supplementary material.

Noise-aware compilation

Noise-aware compilation techniques employ error rate data
from quantum device calibrations to improve circuit fidelity.
These techniques are useful in quantum processors with
limited connectivity, where long-distance qubit interactions
require numerous SWAPs, increasing the number of 2Q gates
that lead to higher error accumulation and degrade circuit
fidelity. Noise-aware compilation optimizes qubit placement
and routing by selecting qubits and gates with lower error
rates to reduce errors.

PROPOSED ARCHITECTURE

Figure 5 illustrates the proposed architecture, which consists of quantum software, classical software, and cloud infrastructure. See the Supplementary material for implementation details.

The quantum software implements the state preparation
phase through a noise-aware compiler. The compiler combines
<figure><img src="image_3.png" /><figcaption>Figure 2. Measurement-based preparation of the logical $|+$) state for the $Q_1(N = 8, i = 3)$ code$^9$, where $i$ indicates the information position in the polar code. Red dashed lines indicate the three polarization steps in the preparation procedure. Steps one and three consist of Pauli $X \otimes X$ measurements, while step two consists of Pauli $Z \otimes Z$ measurements.</figcaption></figure>

<figure><img src="image_4.png" /><figcaption>Figure 3. Error detection unit processing $n(N/2)$ classical bits. Error syndromes are computed and verified. If an error is detected (i.e., the syndrome is not all-zero), the prepared state is discarded, and the process restarts. If no error is detected, the information on the sign of the stabilizers and logical operators is passed to the error correction unit.</figcaption></figure>

SABRE's initial qubit placement strategy$^{13}$ with TriQ's noise-aware qubit routing approach$^{14}$ (S-TriQ). This hybrid method allows scalable and efficient compilation, even for larger code lengths $N$, as analyzed in the next section. The compiler's input includes the target device's topology and the calibration data. Once compiled, the resulting quantum circuits are executed on real quantum hardware and on a noisy simulator. For simulation, Qiskit Aer simulator$^{12}$ is used, incorporating the calibration-based noise model for higher accuracy in the analysis. Additionally, this simulator allows us to scale down the noise model to explore how the LER will change with future improvements in quantum hardware.

The classical software handles the post-processing of the measured classical bits through error detection and correction. The error detection stage provides the preparation rate results, while the error correction and verification software enable us to compute the LER.

All the classical software was implemented using Python 3.11.5 on a Virtual Machine configured with 13 GB of memory and 8 CPUs with model 12th Gen Intel(R) Core(TM) i7-1255U (4.70 GHz), running Ubuntu 20.04. The software stack included Qiskit 0.44.3, Qiskit-Aer 0.14.2, Qiskit-IBM-Runtime 0.24.0$^{12}$, and the updated TriQ package$^{14}$. The quantum back-ends used in this study are the 127-qubit ibm_brisbane and ibm_sherbrooke devices with versions 1.1.40 and 1.5.38, respectively.

## RESULTS AND DISCUSSION

We evaluate the performance of our proposed noise-aware compilation technique (S-TriQ) against a standard workflow that uses non-noise-aware compilation (Qiskit-3), which does not consider calibration data. Our comparison focuses on key metrics such as preparation rate, LER, compilation latency, and decoding latency.

The experiments were run over 20 days, with four runs per day on average. Measurements for code lengths $N = 4, 8$, and 16, corresponding to $\bar{N} = 6, 12$, and 24 physical qubits, respectively, were taken in batches of 20,000, 10,000, and 10. These values were chosen to consider both hardware and time replication. By using the factory method$^{10}$, the $N = 16$ code can be replicated five times within the 127-qubit topology of devices like ibm_brisbane and ibm_sherbrooke.

As illustrated in Figure 6 (a) and (b), using S-TriQ results in an average improvement in the preparation rate ranging from 17% to 36% for ibm_brisbane, and 25% to 55% for ibm_sherbrooke, compared to Qiskit-3. Notably, at an error scale of 0.2, the highest improvement is observed for both devices, indicating that the noise-aware compilation technique remains effective even as the physical error rate decreases. This enhancement in preparation rate can also
<figure><img src="image_5.png" /><figcaption>Figure 4. (Top) Measurement-based preparation of the logical $|+\rangle$ state for the $Q_1(N = 8, i = 3)$ code from Figure 2, mapped into ibm_sherbrooke topology using noise-aware compilation technique. The original CNOT gate was mapped using the native ECR gate and single-qubit pre-rotations. (Bottom) Partial detail.</figcaption></figure>

<figure><img src="image_6.png" /><figcaption>Figure 5. Block diagram of the proposed implementation.</figcaption></figure>

be interpreted as resource savings in time, by reducing the number of repetitions needed for successful state preparation, or in space, by preparing circuits in parallel within a single execution, with the factory approach. The resource savings reach 10% to 54% for ibm_brisbane, and 20% to 81% for ibm_sherbrooke. The simulation of codes with $N \ge 32$ was not performed due to memory limitations in our local systems, as more than 100 GB of RAM was required. However, we executed them on real quantum computers, and the increased circuit depth and the elevated noise level made successful state preparation improvements negligible. With the current quantum devices, a length of code $N = 32$ achieved a preparation rate improvement of 0.06% and 1.7% for logical $|0\rangle$ and $|+\rangle$ respectively in ibm_sherbrooke. Nevertheless, it is reasonable to expect similar gains in the near future, when physical devices improve to the defined target physical error rate on the order of $10^{-4}$.

Figure 6 (c) and (d) compare the LERs for noise-aware and non-noise-aware compilation techniques, showing almost identical results across different code lengths and noise levels. This suggests that the state preparation is functioning effectively in the proposed architecture, that is, the improvement in the

preparation rate does not come at the expense of an increase in the number of undetected errors. Moreover, the observed LER is consistent with the minimum $X$-distance of the code ($d_X = 2$ for $N = 4$, and $d_X = 4$ for $N = 8$), decaying as $p^{d_X/2}$ for small physical error rates $p$, which also serves as evidence of the fault-tolerance property of the compiled circuits.

Regarding the proposed compiler, S-TriQ introduces nearly twice as many CNOT gates as Qiskit-3 but increases the preparation rate. This is due to the optimized qubit placement and routing in S-TriQ, which selects qubits and gates with lower error rates, thereby improving overall circuit fidelity. This trade-off between gate count and preparation success highlights the effectiveness of noise-aware strategies, especially as code lengths increase. Additionally, the compilation time remains relatively stable, taking under 5 seconds for code lengths up to 32 qubits. However, at 64 qubits, the compilation time increases significantly, ranging from 45 to 66 seconds. This rise is due to the increased complexity of finding better routing paths with the amount of calibration data that needs to be processed for the derived quantum circuit. Conversely, the decoding time for one accepted state grows almost linearly with code length. Specifically, it was measured at around 0.3, 43, and 110 microseconds for a code length of 4, 8, and 16, respectively. The results are promising, as the decoding time remains within hundreds of microseconds, suggesting that real-time performance is achievable even with non-embedded system software. While 110 microseconds may seem a large time compared to the latency requirements associated with QEC, given the current state of quantum technology, with a latency budget of tens of microseconds for decoding, we believe our approach demonstrates the feasibility of achieving low latencies even with a high-level language (Python) implementation. Also, we expect that the time budget for decoding
<figure><img src="image_7.png" /><figcaption>Figure 6. (a) and (b) show the preparation rate of the logical $|+\rangle$ state, while (c) and (d) depict the X logical error rate (for logical $|0\rangle$ state), for $Q_1$ codes of length $N = 4$ (blue), $N = 8$ (orange), and $N = 16$ (green) with quantum processors: (a) and (c) ibm_brisbane, and (b) and (d) ibm_sherbrooke. On the abscissa, the physical error scaling factor is the factor applied to the actual physical error rate of the device, as determined by the latest calibration data. Red arrows show the performance gap between noise-aware and non-noise-aware compilation techniques.</figcaption></figure>

will expand as advancements are made, as discussed in the Supplementary material. Additionally, with further optimizations, particularly through the use of compiled languages like C/C++, we anticipate a significant reduction in latency. For even faster decoding, hardware accelerators such as FPGA or ASIC implementations could be key to obtaining sub-microsecond implementations. As illustrated in¹⁵, an ASIC implementation can achieve a latency of 630 nanoseconds for a larger classical code length of 1024, substantially longer than the codes targeted in our work.

## CONCLUSION

We presented a full-stack approach based on quantum and classical software that integrates noise-aware compilation with the polar code QEC layer, addressing challenges from state preparation to decoding on superconducting processors with constrained connectivity. We evaluated its performance using a simulator with a calibration-based noise model and real quantum devices, comparing two compilation techniques for quantum polar codes and demonstrating the clear advantages of the noise-aware approach. We further highlighted that as physical error rates improve, such as through error scaling, the

performance of our proposed architecture also improves. Although the proposed method offers a path forward, achieving efficient fault-tolerant operation at scale remains a significant challenge, particularly due to the current limitation of superconducting qubit technology, which restricts the code length to $N = 32$. As a result, future work may explore extending scalability through a factory-based approach, implementing the full Steane error correction procedure, and applying the method to processors with increased connectivity as they become available.

## CODE AVAILABILITY

https://github.com/HandyKurniawan/na_polar_codes_ framework.

## ACKNOWLEDGMENTS

This work was supported by the QuantERA project EQUIP (grants PCI2022-133004 and PCI2022-132922, funded by the AEI, Ministerio de Ciencia e Innovación, Gobierno de España, MCIN/AEI/10.13039/501100011033, and ANR-22-QUA2-0005-01, funded by the Agence Nationale de la Recherche, France), and by the European
Union “NextGenerationEU/PRTR”. This research is part of the project PID2023-147059OB-I00 funded by MCIU/AEI/10.13039/501100011033/FEDER. UE. HK acknowledges support from the Comunidad de Madrid under grant number PIPF-2023/COM-30051. CGA acknowledges support from the Spanish Ministry of Science, Innovation, and Universities through the Beatriz Galindo program 2020 (BG20-00023) and the European ERDF PID2021-123627OB-C51. We acknowledge the use of IBM Quantum services for this work. The views expressed are those of the authors and do not reflect the official policy or position of IBM or the IBM Quantum team.

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# Supplementary material for Implementing Quantum Polar Codes in a Superconducting Processor: From State Preparation to Decoding

Handy Kurniawan¹, Valentin Savin², Carmen G. Almudéver³, and Francisco García Herrero¹

¹Universidad Complutense de Madrid, Madrid, 28040, Spain

²Université Grenobles Alpes, CEA-Léti, F-38054, Grenoble, France

³Universitat Politècnica de València, Valencia, Spain

## Contents

<table><tbody><tr><td><b>1 Quantum Error Correction</b></td><td><b>1</b></td></tr><tr><td>1.1 Main sources of error</td><td>2</td></tr><tr><td>1.2 Basic QECC definitions</td><td>2</td></tr><tr><td>1.3 Quantum polar codes</td><td>3</td></tr><tr><td><b>2 Noise-Aware Compilation: Implementation Details</b></td><td><b>4</b></td></tr><tr><td>2.1 Noise models</td><td>4</td></tr><tr><td>2.2 Quantum circuit compilation process</td><td>5</td></tr><tr><td>2.3 Noise-aware compilation</td><td>5</td></tr><tr><td>2.4 Compilation framework</td><td>6</td></tr><tr><td>2.4.1 Initial qubit placement</td><td>6</td></tr><tr><td>2.4.2 Qubit routing</td><td>7</td></tr><tr><td>2.5 Performance metrics</td><td>7</td></tr><tr><td>2.5.1 Preparation rate</td><td>7</td></tr><tr><td>2.5.2 Logical error rate</td><td>7</td></tr><tr><td>2.5.3 Relative gain</td><td>7</td></tr><tr><td>2.6 Example of the workflow for a quantum polar code</td><td>8</td></tr><tr><td>2.7 Repository of the implementation</td><td>9</td></tr><tr><td><b>3 Additional Information from the Experiment</b></td><td><b>9</b></td></tr><tr><td>3.1 Preparation rate</td><td>9</td></tr><tr><td>3.2 CNOT count</td><td>9</td></tr><tr><td>3.3 Compilation time</td><td>10</td></tr><tr><td>3.4 Decoding time</td><td>10</td></tr></tbody></table>

## 1 Quantum Error Correction

Quantum error correction (QEC) is a fundamental technique for protecting quantum information from noise and other errors that inevitably arise during quantum operations and storage. Unlike classical error correction, QEC must address the unique challenges of the quantum realm, including the no-cloning theorem [1] and the inability to directly measure qubits without collapsing their quantum states [2]. To overcome these challenges, quantum error-correcting codes (QECCs) encode quantum information into redundant qubits, enabling error detection and correction without directly disturbing the encoded quantum state [3].
This section provides an overview of quantum errors and the basic definitions involved in QECC for the potential readers of the paper “Implementing Quantum Polar Codes in a Superconducting Processor: From State Preparation to Decoding” who are unfamiliar with the area.

## 1.1 Main sources of error

Quantum noise can affect stored quantum information and may also cause faulty behavior in quantum gates, state preparation, or measurements [3]. Accordingly, the main sources of errors that are considered on a simple quantum noise model are:

1. **Qubit errors:** arising from decoherence and other forms of quantum noise caused by interactions between a qubit and its surrounding environment. These errors often manifest as a transition to a mixed or entangled state with the environment, leading to the degradation of the information stored in the qubit.

2. **Gate errors:** occur when a quantum gate fails to apply the intended operation on the qubit(s), causing an incorrect transformation of the quantum state.

3. **Measurement errors:** occur when the classical outcome of a quantum measurement does not accurately reflect the quantum state being measured, leading to incorrect results.

More sophisticated error models may also account for various forms of error correlations arising from a shared environment. Additionally, crosstalk errors can occur when a qubit unintentionally interacts with a neighboring qubit, causing unintended state changes due to physical proximity or shared control signals.

## 1.2 Basic QECC definitions

A QECC is denoted as $[[n, k, d]]$, where $n$ is the number of physical data qubits (or code length), $k$ is the number of logical qubits (or code dimension), and $d$ is the minimum distance of the code, which determines its error detection and correction capability. In this context:

* A physical qubit is a qubit implemented on a real quantum processor, that is, a physical device that behaves as a two-state quantum system, and which is subject to quantum noise.

* A logical qubit is an encoded representation of quantum information, constructed from multiple physical qubits, referred to as physical data qubits.

Errors occurring in the encoded state are identified using syndrome measurements, which extract information about physical errors without collapsing the quantum state. This requires the use of auxiliary physical qubits, known as ancilla qubits, which interact with the physical data qubits in a specific, code-dependent manner, and are subsequently measured. The extracted classical bits (syndrome) are processed by a classical decoding algorithm, which aims to identify the error that has happened, allowing the system to be restored to the correct logical state. To ensure effective protection against errors, the QECC must guarantee that the probability of logical errors is lower than that of physical errors. A key ingredient for such a guarantee is the fault tolerance of the syndrome measurement circuit. Precisely, the goal is to prevent physical errors from propagating uncontrollably during syndrome measurement, as this could generate more errors than the code can correct. Assuming fault tolerant syndrome measurement, minimum distance bounded decoding, and a sufficiently small physical error rate (PER) $p$, the logical error rate (LER) is proportional to $p^{(d+1)/2}$, ensuring exponential error suppression as the code distance $d$ increases.

Most QECCs rely on the stabilizer formalism [4], in which the quantum state is encoded in the $+1$ eigenspace of a group of commuting Pauli operators, referred to as stabilizer group. The key principle is that the operators in the stabilizer group do not change the encoded state, but they can reveal errors when measured. Thus, syndrome measurement can be performed by directly measuring a set of generators of the stabilizer group. However, this procedure is not inherently fault-tolerant, as it can propagate errors. Yet, if the stabilizer group has a set of low-weight generators, fault-tolerance can be achieved by performing repeated syndrome measurements, where errors are detected by the
difference between syndromes measured in consecutive rounds. This approach is used to perform fault-
tolerant error correction with quantum low-density parity-check (LDPC) codes, including topological
constructions such as such as the Kitaev's toric code [5] or Bombin's color codes [6]. The planar version
of these latter codes, the well-celebrated surface [7] and triangular color codes [8], are of particular
interest because their qubit layout is reduced to a two-dimensional grid, making them easily mappable
to physical systems.

For Calderbank-Shor-Steane codes (CSS) codes, a subclass of stabilizer codes with stabilizer group generated by only type-X and type-Z Pauli operators, syndrome measurement is closely related to the notion of logical state preparation. The latter notion refers to the ability to prepare an eigenstate of a logical Pauli operator, such as logical $|0\rangle_L$ or $|+\rangle_L$. Such a logical state can be prepared by initializing all the physical data qubits in either $|0\rangle$ or $|+\rangle$, and then measuring either the type-X or the type-Z generators, respectively, of the stabilizer group. If these measurements can be performed in a fault-tolerant manner (e.g., for the quantum LDPC codes mentioned above, by using ancilla qubits and repeating the measurements multiple times), then the preparation procedure is also fault-tolerant. Otherwise, it is not. Conversely, if we are given a logical state, say $|0\rangle_L$, prepared on an auxiliary quantum system, we can compute the Z-error syndrome by using the Steane technique [9,10]. Precisely, Z-errors are copied from the original to the auxiliary system by using transverse CNOT gates, the physical data qubits of the auxiliary system are then measured in X-basis, and the Z-error syndrome is computed classically. Note that the original system does not use any ancilla qubits in this case, as we do not directly measure the syndrome on it. Instead, an auxiliary system, which must be prepared in a logical state, is used. If we have a fault-tolerant procedure to prepare logical states, we can then use the Steane technique to measure the syndrome in a fault-tolerant manner. This approach is practical for codes with high-weight generators, where directly measuring these generators would not be fault-tolerant. In particular, this is the approach used for quantum polar codes, which are discussed in the next section.

1.3 Quantum polar codes

Polar codes are a family of error correcting codes of significant interest in both classical and quantum
error correction. First introduced first by Arikan in 2009 for classical channels [11], and later generalized
to the quantum case [12–15], polar codes arguably represent one of the most important advances in
coding theory of the last fifteen years. In the classical setting, they were the first family of codes
to achieve the symmetric capacity of any binary-input discrete memoryless channel, with log linear
encoding and decoding complexity. In the quantum setting, they are known to achieve the symmetric
coherent information of any quantum channel, while inheriting the low complexity decoding algorithm
of their classical counterparts.

In this work, we focus on CSS quantum polar codes [12], which exploit classical polarization in
both the X or Z bases. For CSS quantum polar codes encoding one logical qubit, referred to as $Q_1$ codes, a fault-tolerant logical state preparation procedure has been proposed in [16]. Such a procedure is essential for fault-tolerant error correction using the Steane method, as explained in Section 1.2. Moreover, a factory-based extension of this preparation procedure has been proposed in [17], where it has been shown that a $Q_1$ code may provide a logical error rate improvement of about three orders of magnitude compared to a surface code with similar length and minimum distance.

The logical state preparation procedure proposed in [16] follows a measurement-based protocol,
where n rounds of two-qubit Pauli measurements are performed to prepare a code with $N = 2^n$
physical data qubits (note the difference in notation with respect to Section 1.2). Importantly, part
of the measured Pauli operators do not belong to the stabilizer group. Thus, the protocol involves
the measurement of anti-commuting two-qubit Pauli operators, which progressively build the stabilizer
group of the code. As a consequence, these measurements cannot be repeated to ensure fault tolerance.
Instead, the fault tolerance is guaranteed by an error detection mechanism, where, if an error is
detected, the preparation procedure is discarded and restarted from the beginning. Due to error
detection, the preparation is probabilistic, and its success rate is referred to as the preparation rate.
A high preparation rate is desirable to minimize the number of discarded states, optimizing time or
space resources, depending on whether logical states are being prepared sequentially or in parallel.

Implementing the state preparation protocol on a device with only near-neighbor connectivity re-
quires introducing additional SWAP gates to route qubits between non-adjacent locations, ensuring
that all necessary qubit interactions can be performed. We note that when the error detection mecha-
nism is present, such SWAP gates do not affect the fault-tolerance property of the measurement-based circuit. This follows from (the technical details in the proof of) [16, Theorem 3]. However, SWAP gates introduce additional noise, which may degrade the preparation rate, thereby motivating the use of noise-aware compilation techniques. Beyond the purely QEC aspects, considering the preparation rate as a key performance metric to assess how robust the compiled circuit is to noise can also serve as a broader demonstration of the significant benefits that noise-aware compilation techniques may bring to the implementation of quantum circuits on NISQ devices.

We conclude this section with a discussion on the weight of the Pauli operators in the stabilizer group of a $Q_1$ code, showing that, as stated in the paper, these codes do not admit a set of small-weight generators. For a given $Q_1$ code and a set of stabilizer generators $G$, we define $\text{wt}(G) := \max\{\text{wt}(g) | g \in G\}$, where $\text{wt}(g)$ is the number of qubits on which $g$ acts non-trivially. We further define $\text{wt}(Q_1) := \min_G \text{wt}(G)$, where the minimum is taken over all the sets of generators of the stabilizer group. For additional details, we shall also use subscripts $X$ or $Z$ to refer to the specific type of stabilizer generators, e.g., $\text{wt}_X(Q_1)$ or $\text{wt}_Z(Q_1)$. The $\text{wt}(Q_1)$ value depends on the specific $Q_1$ code, that is, the code length $N$ and the position $i \in \{0, \dots, N-1\}$ encoding the logical information (see [16] for details). If the code length $N$ is not too large, the $\text{wt}(Q_1)$ can be computed numerically, or at least a lower bound can be determined. Considering the $Q_1$ codes from [16]:

* For the $Q_1(N = 16, i = 6)$ code, we have $\text{wt}_X(Q_1) = 8$ and $\text{wt}_Z(Q_1) = 4$. For the X-type generators, the set of generators $G_X$ minimizing $\text{wt}(G_X)$ contains eight generators of weight 2 and one generator of weight 8. The eight generators of weight 2 generate all the X-type stabilizer operators of weight $\le 6$, hence, any set of generators must contain at least a generator of weight greater than or equal to 8.

* For the $Q_1(N = 16, i = 3)$ code, corresponding to a Shor code, we have $\text{wt}_X(Q_1) = 2$ and $\text{wt}_Z(Q_1) = 8$. This code does not have Z-type generators of weight less than 8.

* For the $Q_1(N = 64, i = 22)$, it can be verified that both $\text{wt}_X(Q_1) \ge 8$ and $\text{wt}_Z(Q_1) \ge 8$.

# 2 Noise-Aware Compilation: Implementation Details

In this section, we provide details on the noise-aware (NA) compilation techniques implemented in this work, highlighting their role in mitigating the impact of noise in quantum circuits.

## 2.1 Noise models

In quantum computing, a noise model characterizes the imperfections and errors that occur during the execution of quantum operations on real hardware. These errors stem from various sources, including gate inaccuracies, decoherence, measurement, and crosstalk errors (see Section 1.1). Noise models are essential tools for simulating the behavior of quantum circuits under realistic conditions. They enable us to evaluate the performance of quantum algorithms, error correction schemes, and noise-aware compilation techniques.

Noise models are tailored to capture the specific characteristics of quantum processors, such as native gate sets, connectivity constraints, and hardware-calibrated error rates. By incorporating these details, they offer a more accurate representation of physical systems, facilitating reliable benchmarking and optimization of quantum circuits. Depending on the use case, noise models range from simplified abstractions (e.g., depolarizing noise) to detailed, calibration-based models that closely reflect the actual hardware's noise profile.

The most common noise models used to evaluate the behavior of QECCs are:

1. **Phenomenological Noise Model:** This model assumes random Pauli errors ($X$, $Y$, or $Z$) on data qubits and measurement results at a physical error rate $p$. It simplifies noise modeling by treating syndrome extraction circuits as noiseless, apart from measurement errors, which makes it less realistic for real-world implementations [18].

2. **Circuit-Level Noise Model:** Extending the phenomenological model, the circuit-level model accounts for Pauli errors on all qubits during initialization, idle phases, and at every gate (including measurements) within a syndrome extraction circuit. Error rates may vary by operation
type (e.g., initialization, idle time, single- or two-qubit gates, measurement) but are assumed to
remain independent of the specific qubits involved.

3. **Calibration-Based Noise Model:** This model provides a more accurate representation of noise but is computationally resource-intensive. It incorporates hardware-specific constraints, such as native gates and topology, and mimics the exact circuit executed on real devices. This model also considers error sources, including qubit parameters (relaxation and dephasing times, frequency, anharmonicity, and readout errors) and the specific error rates of native gates as provided by hardware vendors [19].

In this work, we employ the calibration-based noise model to simulate the effects of errors during quantum circuit execution. This model integrates device-specific error metrics such as two-qubit gate fidelities, single-qubit relaxation and dephasing times, and readout errors provided by the hardware vendor. By leveraging this detailed model, we can better analyze the impact of noise on quantum circuits and design techniques to mitigate these effects effectively.

## 2.2 Quantum circuit compilation process

The compilation process translates high-level quantum code into a hardware-executable format that respects the constraints of a quantum processor. This transformation adapts a quantum circuit into an equivalent one that can be executed on a quantum device while taking into account the hardware's specific limitations.

Similar to classical processors, quantum processors can execute only a predefined set of native instructions. Therefore, any high-level quantum circuit—designed to describe a quantum algorithm or application—must be compiled into a form that is compatible with the target quantum device. Crucially, the compiled quantum circuit must utilize only the native gate set of the device. For instance, the native gates of ibm_sherbrooke include the Echoed Cross-Resonance (ECR) gate, ID (identity), RZ (rotation around the z-axis), SX (square root of X), and X (Pauli-X) gates.

Additionally, quantum processors often have limited connectivity between qubits. As a result, gates can only be applied to qubits that are physically connected on the hardware. For quantum processors with local interaction constraints, this limitation becomes particularly evident when performing two-qubit (2Q) gates. Specifically, 2Q gates can only be applied to qubits that are directly connected via the device's topology. To perform a 2Q gate on qubits that are not directly connected—referred to as long-distance qubit interactions—SWAP<fnref n="1" /> gates are introduced. SWAP gates are used to physically move the quantum information of the involved qubits closer together in the hardware's topology, enabling the execution of the desired two-qubit operation.

Figure 1 provides an example of the compilation process through several key steps. Consider the circuit in Fig. 1a – the original circuit – designed for execution on a quantum device with the topology shown in Fig. 1b. In this topology, physical qubits are represented as circles labeled $Q_n$ (where n is the qubit index), and the edges indicate connections for performing 2Q gates. The initial qubit placement maps each virtual qubit in the circuit ($q_n$) to a corresponding physical qubit on the device ($q_n \to Q_n$), as shown in Fig. 1c. This mapping allows the first two CNOT gates to be executed since edges exist between the respective qubits ($Q_0$ and $Q_2$, $Q_1$ and $Q_3$). However, executing the third CNOT gate (between $q_0$ and $q_3$) requires moving the qubits involved to adjacent positions. This is achieved by introducing a SWAP gate, as shown in Fig. 1c, that exchanges the state of $Q_3$ and $Q_1$.

Additional compilation steps, not depicted in this example, include i) operation scheduling, which exploits the parallelism of the circuit, and ii) gate nativization, which translates gates into the device's native gate set.

## 2.3 Noise-aware compilation

Noise-aware compilation optimizes the execution of quantum circuits by incorporating the noise characteristics of the quantum processor into the compilation process. This approach strategically places qubits with higher fidelities and routes operations in ways that minimize the impact of errors caused by factors such as decoherence, crosstalk, or gate inaccuracies.

<footnote n="1">¹For two qubits A and B, SWAP(A,B) := {CNOT A,B; CNOT B,A; CNOT A,B;}</footnote>
<figure><img src="image_8.png" /><figcaption>Figure 1. Quantum circuit compilation example: (a) original circuit, (b) backend topology, and (c) initial qubit mapping and routing result with the added SWAP gate (in red).</figcaption></figure>

In this work, we focus on two primary noise sources: 2Q gate errors and readout errors, as these typically contribute the most to the overall error rates in current quantum processors. These noise metrics are used to guide decisions regarding qubit placement and routing, thereby improving the reliability and performance of quantum circuits on noisy hardware. We exclude single-qubit gate errors from our analysis, as their magnitudes are generally an order of magnitude smaller than those of 2Q gate errors and readout operations.

Noise characteristics are usually provided by hardware vendors, either through their APIs or as accessible data on their websites. In this work, we use IBM quantum processors, for which noise data is publicly available on the IBM Quantum website [20] and can also be accessed programmatically via Qiskit [21].

## 2.4 Compilation framework

As quantum processors scale in qubit count, the challenge of noise-aware compilation grows due to the increasing computational cost, particularly because initial qubit placement and routing are NP-hard problems [22]. To address this, we combined two state-of-the-art approaches: SABRE [23], for non-noise-aware qubit placement, and TriQ [24], for noise-aware qubit routing. These two techniques are discussed in detail below.

### 2.4.1 Initial qubit placement

The initial qubit placement refers to assigning logical qubits in the quantum circuit to physical qubits on the device. This step is critical because the placement of qubits can significantly impact the number of SWAP gates required during execution, which directly affects circuit fidelity and execution time.

We employed SABRE, a heuristic-based algorithm designed to iteratively optimize initial qubit placement. SABRE reduces the gate execution cost by dynamically considering the hardware topology and reordering gates to minimize the number of SWAP operations required later. While SABRE itself is not noise-aware, it serves as an efficient starting point, ensuring a reasonable initial placement before incorporating noise information in subsequent steps. This optimized initial mapping is then used as input for the noise-aware TriQ routing process, ensuring a more efficient overall compilation.
### 2.4.2 Qubit routing

In quantum processors, only nearest-neighbor interactions between qubits are allowed. Qubit routing ensures that interactions required by quantum polar codes, which often involve distant qubits, can be executed. This process introduces SWAP gates to move non-adjacent qubits into physically adjacent positions, enabling two-qubit gate operations.

For the routing stage, we utilized and extended TriQ, a noise-aware routing algorithm. TriQ optimizes qubit routing by incorporating the noise characteristics of the quantum processor—such as two-qubit gate errors and readout errors—into its decision-making process. This noise-aware approach minimizes the overall impact of noise on circuit fidelity.

In our implementation, we enhanced TriQ to ensure compatibility with the latest versions of Qiskit and extended its functionality. Notably, we introduced mid-circuit measurement capabilities to enable syndrome measurements. Also, we added an option to use the Floyd-Warshall algorithm for routing, which, in certain cases, reduces error accumulation [25].

## 2.5 Performance metrics

The effectiveness of the noise-aware compilation technique for mapping polar codes into noisy and restricted-connectivity quantum processors is quantified using three primary metrics: preparation rate, relative gain, and logical error rate.

### 2.5.1 Preparation rate

The preparation rate ($p_{prep}$) [16] measures the success rate of state preparation, specifically the proportion of prepared states that are accepted. Note that a successfully prepared state is still prone to errors, as some errors may go undetected by the error detection mechanism.

It is calculated as the ratio of the number of successful preparations ($n_{prep}$) out of the number of independent preparation attempts ($n_{tot}$):

$$p_{prep} = \frac{n_{prep}}{n_{tot}}$$

### 2.5.2 Logical error rate

The logical error rate (LER) quantifies the proportion of accepted states after the error detection phase that can be corrected, meaning that it measures the rate of undetected error. It is defined as the ratio of the number of correctable accepted states after the error detection phase (c) compared to the total number of accepted states after the detection phase (t).

$$LER = \frac{n_{corr}}{n_{prep}}$$

### 2.5.3 Relative gain

Relative gain (G) quantifies the improvement of preparation rate [see Sec. 2.5.1] achieved by the proposed method (S-TriQ) compared to the benchmark (Qiskit-3).

Let $p_{prep1}$ represent the preparation rate of S-TriQ, and $p_{prep0}$ denote the preparation rate of Qiskit-3. The relative gain is defined as:

$$G = \frac{p_{prep1} - p_{prep0}}{p_{prep1}}$$

This metric can be interpreted in two ways:

1. **Time Savings:** By reducing the number of repetitions required to achieve successful state preparation.

2. **Space Savings:** By minimizing the total number of qubits required for the procedure, depending on the fault-tolerant preparation strategy being utilized.
## 2.6 Example of the workflow for a quantum polar code

In this example, we demonstrate the workflow of our noise-aware compilation technique for a quantum polar code. The specific input circuit and backend details are as follows:

* **Input Circuit:** Quantum Polar Code with $N=8$ for logical $|0\rangle$, requiring a total of 12 qubits—8 data qubits and 4 ancilla qubits. See Fig. 2 for the original circuit.

* **Target Backend:** IBM's superconducting quantum processor, `ibm_sherbrooke`, with a scale factor applied to the physical error rate that ranges from 0.1 to 1.

<figure><img src="image_9.png" /><figcaption>Figure 2. Measurement-based preparation of the logical $|0\rangle$ state for the $Q_1(N = 8, i = 3)$ code, where $i$ indicates the information position in the polar code.</figcaption></figure>

The workflow proceeds as follows:

1. **Processing Calibration Data:** Acquire the latest calibration data (two-qubits gate and read-out error), and process it into a matrix to guide the noise-aware compilation.

2. **Initial Qubit Placement with SABRE:** Compile the circuit using the SABRE algorithm to determine the initial qubit mapping. In this example, the initial mapping is as follows: $[q_0 \rightarrow Q_{110}, q_1 \rightarrow Q_{117}, q_2 \rightarrow Q_{118}, q_3 \rightarrow Q_{100}, q_4 \rightarrow Q_{126}, q_5 \rightarrow Q_{116}, q_6 \rightarrow Q_{119}, q_7 \rightarrow Q_{115}, q_8 \rightarrow Q_{99}, q_9 \rightarrow Q_{98}, q_{10} \rightarrow Q_{108}, q_{11} \rightarrow Q_{112}]$ This mapping corresponds to the order of virtual qubits assigned to physical qubits. Figure 3 illustrates this initial mapping: the top part of the figure shows a section of the `ibm_sherbrooke` topology, where numbers indicate the indices of the physical qubits, while the bottom part depicts how the virtual qubits are mapped onto the physical qubits, with the numbers representing the indices of the virtual qubits.

3. **Noise-Aware Qubit Routing with TriQ:** Use the TriQ algorithm to optimize routing based on noise characteristics, minimizing errors from two-qubit gates and readout operations. See Fig. 4 as the compiled circuit with the natives' gate from the selected device.

4. **Execution and Error Detection:** Run the compiled circuit. Apply the error detection gadget discarding states on which errors are detected. Pass successfully prepared states to the error correction decoder.

5. **Performance evaluation:** Evaluate the "Preparation Rate" and "Logical Error Rate" defined in Sec. 2.5
<figure><img src="image_10.png" /><figcaption>Figure 3. (Top) a part of ibm_sherbrooke topology used in this example, where numbers indicate the indices of the physical qubits. (Bottom) the initial mapping used in this example, with the numbers representing the indices of the virtual qubits</figcaption></figure>

<figure><img src="image_11.png" /><figcaption>Figure 4. Compiled circuit with S-TriQ with the set of instructions based on the natives' gate from the selected device.</figcaption></figure>

## 2.7 Repository of the implementation

The codes supporting this study's findings are openly available in the GitHub repository https://github.com/HandyKurniawan/na_polar_codes_framework.

# 3 Additional Information from the Experiment

## 3.1 Preparation rate

Table 1 presents the relative gains of the noise-aware compilation technique compared to Qiskit-3. The noise-aware S-TriQ approach demonstrated significant improvements, with relative gains of up to 54% for ibm_brisbane and 81% for ibm_sherbrooke. These gains can be interpreted as either time savings—by reducing the number of repetitions required to achieve a successful state preparation—or as space savings—by minimizing the overall qubit count needed for the procedure, depending on the fault-tolerant preparation strategy employed. The higher performance on ibm_sherbrooke can be attributed to lower error per layered gate (EPLG) of 2.1% compared to 3%(ibm_brisbane) [20].

## 3.2 CNOT count

In Table 2, the average number of CNOT gates for the different codes and compilation methods is included. For longer codes, S-TriQ adds 34% more CNOTs because of the additional SWAP gates used to reach a more reliable path during the routing (10 SWAP gates more in the worst case).
<table><caption>Table 1. Logical $|+\rangle$ preparation rate, depending on the compilation technique, the quantum hardware, and the code length (N).</caption><thead><tr><th rowspan="2">Comp.</th><th rowspan="2">N</th><th colspan="2">ibm_brisbane</th><th colspan="2">ibm_sherbrooke</th></tr><tr><th>Prep.(%)</th><th>Gain(%)</th><th>Prep.(%)</th><th>Gain(%)</th></tr></thead><tbody><tr><td>Qiskit-3</td><td>4</td><td>67.43</td><td>-</td><td>70.84</td><td>-</td></tr><tr><td>S-TriQ</td><td>4</td><td>94.47</td><td>28.62</td><td>94.95</td><td>25.39</td></tr><tr><td>Qiskit-3</td><td>8</td><td>25.55</td><td>-</td><td>23.63</td><td>-</td></tr><tr><td>S-TriQ</td><td>8</td><td>56.05</td><td>54.41</td><td>55.69</td><td>57.56</td></tr><tr><td>Qiskit-3</td><td>16</td><td>13.37</td><td>-</td><td>5.74</td><td>-</td></tr><tr><td>S-TriQ</td><td>16</td><td>28.93</td><td>53.78</td><td>30.31</td><td>81.06</td></tr></tbody></table>

<table><caption>Table 2. Comparison of the total number of CNOT (CX) gates for Quantum Polar Codes compiled using non-noise-aware (Qiskit-3) and noise-aware (SABRE-TriQ) for the logical state $|+\rangle$, and with code length (N).</caption><thead><tr><th>Log</th><th>N</th><th>Qiskit-3</th><th>S-TriQ</th></tr></thead><tbody><tr><td>$|+\rangle$</td><td>4</td><td>11</td><td>11</td></tr><tr><td>$|+\rangle$</td><td>8</td><td>58</td><td>78</td></tr><tr><td>$|+\rangle$</td><td>16</td><td>126</td><td>165</td></tr></tbody></table>

### 3.3 Compilation time

Fig. 5 compares the compilation time (in seconds) for the noise-aware SABRE-TriQ approach across various code lengths. The compilation time remains relatively stable up to a code length of 32, after which there is a significant increase at code length 64. This jump in time is primarily due to the computational limitations of the hardware used in this research, indicating the need for higher computational power to efficiently handle larger code lengths.

<figure><img src="image_12.png" /><figcaption>Figure 5. Average compilation time (in seconds) for quantum polar codes using noise-aware compilation, categorized by state and code length. The blue lines represent the logical $|+\rangle$ state, and the orange lines represent the logical $|0\rangle$ state. Solid and dashed lines correspond to Qiskit-3 and SABRE-TriQ compilation methods, respectively.</figcaption></figure>

### 3.4 Decoding time

Fig. 6 illustrates the decoding time (in microseconds) for one accepted state. The results are promising, as the decoding time remains within hundreds of microseconds, suggesting that real-time performance is achievable even with non-embedded system software.

While hundreds of microseconds may seem far from the latency constraints typically observed in superconducting qubits, it is important to clarify that a real-time decoder does not necessarily need to meet such stringent latency limits of a round of measurements. For instance, in a recent paper by Google AI (Google Quantum AI and Collaborators. Quantum error correction below the surface code threshold. Nature (2024). https://doi.org/10.1038/s41586-024-08449-y), real-time decoding was
demonstrated with an average latency of 63 microseconds, despite a syndrome extraction cycle time of just 1.1 microseconds. Similar results and time budget (tens of microseconds) were reported by Quantum Machines in their recent work (https://arxiv.org/pdf/2412.00289).

Moreover, our current decoder implementation is in Python, which, while advantageous for rapid development and flexibility, is not the most time-optimized language. Implementing the decoder in a compiled language, such as C/C++ or RUST, could substantially reduce the latency. Furthermore, for even lower latencies, an FPGA or ASIC implementation would be a promising and scalable direction. As reported in the paper [26], an ASIC implementation achieved a latency of 630 nanoseconds for a classical code length of 1024, substantially longer than the target codes in our work. This illustrates that with hardware accelerators, we could significantly reduce the latency, potentially achieving nanosecond-level decoding.

<figure><img src="image_13.png" /><figcaption>Figure 6. Average correction time per shot (in microseconds) for quantum polar codes using noise-aware compilation, categorized by state and code length. The blue line indicates the logical $|+\rangle$, and the orange line indicates the logical $|0\rangle$.</figcaption></figure>

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