# Laser Fault Injection on RO-based PUFs Implemented on FPGA

Aghiles Douadi, Elena Ioana Vatajelu, Paolo Maistri, Jean-Max Dutertre, David Hely, Vincent Beroulle, Giorgio Di Natale

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Aghiles Douadi, Elena Ioana Vatajelu, Paolo Maistri, Jean-Max Dutertre, David Hely, et al. Laser Fault Injection on RO-based PUFs Implemented on FPGA. 38th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT 2025), Oct 2025, Barcelone, Spain. hal-05338252

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Submitted on 30 Oct 2025

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Laser Fault Injection on RO-based PUFs
Implemented on FPGA

Aghiles Douadi*†, Elena-Ioana Vatajelu*, Paolo Maistri*, Jean-Max Dutertre‡, David Hély†,
Vincent Beroulle†, Giorgio Di Natale*

*Univ. Grenoble Alpes, CNRS, Grenoble INP<fnref n="1" />, TIMA, 38000 Grenoble, France

†Univ. Grenoble Alpes, Grenoble INP<fnref n="1" />, LCIS, 26000 Valence, France

‡Mines Saint-Etienne, CEA, Leti, Centre CMP, F - 13541 Gardanne, France

**Abstract**—Physical Unclonable Functions (PUFs) offer an attractive alternative for cryptographic key generation by leveraging intrinsic manufacturing variations, thus eliminating the need for permanent key storage. Among them, RO-PUFs—based on ring oscillators—are widely studied due to their simplicity and efficiency. While the sensitivity of individual ROs to laser fault injection has been previously explored, this paper presents, to the best of our knowledge, the first experimental demonstration of a successful laser attack directly impacting the global output of an RO-PUF system implemented on an Artix-7 FPGA. We show that a localized laser injection can selectively alter the frequencies of targeted ROs, leading to deterministic changes in the PUF response. Our results reveal a significant physical vulnerability of RO-PUFs to this type of attack, highlighting the need to develop appropriate countermeasures.

## I. INTRODUCTION

Fault injection attacks pose a significant threat to secure electronic systems [1]. The objective of these attacks is to intentionally inject faults into hardware systems, causing errors that may be either permanent or transient [2]. These faults can manifest as bit flips, instruction skips, and other disruptions. Fault injection techniques can be classified into three categories: Non-invasive attacks, which do not require direct physical access to the target chip and do not modify it; invasive attacks, which involve direct access to the chip, often accompanied by destructive modifications; and semi-invasive attacks, which require access to the chip but do not destroy or irreversibly modify it. Generally, invasive and semi-invasive attacks tend to be more precise, both temporally and spatially, compared to non-invasive attacks. However, they are also more costly and require higher levels of expertise. Among these attacks, laser fault injection is one of the most effective. It is considered semi-invasive because, laser illumination of the chip is only possible if the package is open. Typically, the injection is carried out from the backside of the chip to bypass the metal layers that connect the transistors on the frontside, which would otherwise obstruct the laser. In the literature, several studies have explored the effects of fault injections on various circuits, such as SRAM circuits [3], flash memories, and even ring oscillators (ROs) [4].

In parallel to these emerging attacks, new techniques have been developed to enhance the security of electronic circuits. Traditionally, sensitive information is stored in nonvolatile memories integrated directly into the chip. However, these attack methods have highlighted the vulnerability of these memories. This is why an alternative method, increasingly gaining popularity, has been developed: PUFs. These circuits exploit the inherent physical variability of each chip to generate a specific key, known as an unclonable key, because it is impossible to replicate the variations in the manufacturing processes [5] [6]. Moreover, these keys are generated on demand, without the need to store any information in memory, thus providing enhanced security. These PUFs have also been shown to be vulnerable to a variety of physical attacks. Prior research has demonstrated that certain PUF architectures exhibit susceptibility to X-ray radiation [7], temperature variations, and electromagnetic (EM) injection attacks [8]. The advantage of laser-based attacks lies in their high precision, while avoiding the limitations of X-rays, which require a mask to focus the rays and cause permanent effects on the chip, which is undesirable. Building on these findings, the present work investigates the feasibility of laser-based attacks targeting RO-PUFs. We experimentally demonstrate that laser fault injection can be used to alter the behavior of the PUF, effectively enabling an attacker to influence and potentially control its output response by disturbing the frequencies of the ROs. These results highlight the need for further investigation into the robustness of PUFs against localized optical perturbations.

The paper is organized as follows: in Section II, we provide a brief overview of lasers and the challenges associated with their use. Section III presents the experimental setup used in this study. In Section IV, we discuss the results of the experiments on the ROs frequencies. In Section V, we discuss the effect of the laser on an RO-PUF. Finally, Section VI concludes this work.

## II. STATE OF THE ART

The initial demonstration of laser-induced faults in electronic circuits dates back to the early 2000s, when S. Skorobogatov successfully induced transient faults in microcontrollers and integrated circuits using targeted illumination [9]. This work unveiled a novel category of security threats. Since then, fault injection techniques have significantly advanced

<footnote n="1">¹Institute of Engineering Univ. Grenoble Alpes</footnote>
<figure><img src="image_2.png" /><figcaption>Fig. 1: Schematic of an RO-PUF, where the challenge signal selects pairs of ROs using multiplexers. Their frequencies are then compared to generate a response.</figcaption></figure>

thanks to laser adoption, achieving remarkable precision capable of affecting regions as small as 1µm. These induced faults are termed transient because the laser illumination of silicon results in partial absorption of optical energy by the semiconductor material, given by $E_{photon} = \frac{hc}{\lambda}$, where $E_{photon}$ is the photon energy, $h$ is Planck's constant, $c$ is the speed of light in vacuum, and $\lambda$ is the wavelength.

When sufficient energy is absorbed, electrons transition from the valence band to the conduction band, forming electron-hole pairs [10]. If these electron-hole pairs are generated near a reverse-biased PN junction, the junction's strong electric field separates the charges, consequently producing a transient current within the circuit. When generated, this transient current propagates through electronic circuits, potentially disrupting their normal operation [11]. For instance, in a CMOS inverter, the induced photocurrent can either charge or discharge the inverter's output capacitance, causing unintended transitions in its output state. Several studies have illustrated how such phenomena affect various electronic components, including SRAM cells [11]. Recent research has further demonstrated that laser-induced faults can disrupt other circuit elements, notably ROs. ROs are extensively employed in applications such as clock signal generation, Phase-Locked Loops (PLLs), and various analog and digital circuit implementations.

ROs are also commonly integrated into security-oriented circuits, particularly PUFs, which leverage inherent physical variations in electronic devices to uniquely identify each chip. During semiconductor fabrication, subtle, uncontrollable differences emerge, such as variations in doping concentrations or transistor dimensions, that slightly alter transistor characteristics. PUFs utilize these intrinsic differences to produce device-specific responses. A prominent example is the RO-PUF (illustrated in Figure 1), where individual ROs exhibit distinct oscillation frequencies due to manufacturing variability. In this architecture, multiplexers select pairs of ROs based on an input known as the "challenge". Comparing the frequencies of these pairs yields a unique output or "response", thereby forming a Challenge-Response Pair (CRP) [12].

In [4], it was demonstrated that a laser could change the configuration of the Look-Up Tables (LUTs) of one of the inverters of the RO implemented on a common complex programmable logic device (CPLD) manufactured in 180nm

<figure><img src="image_3.png" /><figcaption>Fig. 2: Schematic representation of the laser setup used in this work.</figcaption></figure>

technology, stopping its oscillations and consequently reducing the entropy of the RO-PUF. Similar results were later observed in [13], where it was demonstrated that laser illumination could halt the oscillation of a RO implemented on a Virtex-5 FPGA fabricated in 65nm technology when targeting the RO logic. Additionally, when the laser spot was positioned adjacent to the RO, the oscillation frequency was reduced due to an IR-drop effect induced by the generated photocurrent. Unlike these previous works, which focused solely on demonstrating the impact of laser interference on individual ROs, our study goes further by seeking to understand and model the underlying physical effects that lead to these disruptions. In particular, we aim to evaluate how laser-induced phenomena can influence or even control the global output of an RO-PUF structure, rather than just individual components.

### III. EXPERIMENTAL SETUP

#### A. Laser setup

The laser setup used in this work consists of several components: (a) a near-infrared laser with an output power ranging from 0.5W to 3W and a wavelength of 1,064nm; (b) a server computer that communicates with the laser system and defines various scanning parameters; (c) precise movement of the laser spot along the X, Y and Z axes is enabled by XYZ stages; (d) a set of lenses providing different laser spot sizes (1 µm, 5 µm, and 20 µm); (e) a data acquisition computer to collect experimental results; and (f) an oscilloscope to monitor signals from both the laser and the target in real time (Figure 2). The laser with a wavelength of 1,064nm can induce energies greater than 1.1eV, which corresponds to the bandgap, i.e., the energy required for an electron to move from the valence band to the conduction band in materials like silicon. Table I summarizes the different available sizes of the laser spot and the equivalent transmission coefficients. As a reminder, the transmission coefficient describes the amplitude, intensity, or total power of a transmitted wave relative to an incident wave.

<table><caption>TABLE I: The diameter of the laser spot as a function of the microscope objective and the equivalent transmission coefficient.</caption><thead><tr><td>Microscope objective</td><td>Spot size</td><td>Transmission coefficient</td></tr></thead><tbody><tr><td>x 100</td><td>1 µm</td><td>26%</td></tr><tr><td>x 20</td><td>5 µm</td><td>57%</td></tr><tr><td>x 5</td><td>20 µm</td><td>67%</td></tr></tbody></table>
<figure><img src="image_4.png" /><figcaption>Fig. 3: Schematic representation of a chip with flip-chip packaging.</figcaption></figure>

<figure><img src="image_5.png" /><figcaption>Fig. 5: View of the implementation of the RO consisting of 64 LUTs on the Artix-7 FPGA. The RO is made up of a NAND gate, a buffer, and a set of inverters. The image was rotated by 90° to improve readability.</figcaption></figure>

## B. Chip Packaging of the Target

Two main chip packaging technologies are widely used. The most common, wire bonding, accounts for about 80% of packaged chips. It uses conductive wires to connect the chip's bonding pads to the package or substrate, valued for its cost-effectiveness and reliability. The second method, flip-chip packaging, places solder bumps directly on the chip pads, then flips the chip so the bumps connect mechanically and electrically to the substrate (see Figure 3). With wire-bonded chips, laser injection requires backside access to avoid frontside metal layers, often needing substrate thinning to improve penetration. In contrast, flip-chip packaging exposes the substrate directly, allowing laser injection without extra modifications. This packaging is common in many commercial boards, including some FPGAs. For this work, we used the Xilinx Artix-7 Nexys Video board (XC7A200T, 28nm CMOS), which uses flip-chip technology and facilitates laser experiments.

## C. Implementation of ROs on FPGA

Unlike traditional CMOS inverters typically used in ASICs to implement ROs, the situation is different in FPGAs. In this case, designers do not have direct access to the transistor level. Instead, logic functions are implemented using LUTs, whose behavior is defined by their internal configuration. As a result, each inverter or logic gate in an FPGA-based RO is realized using one or more LUTs (Figure 4). In this work, we implemented five ROs, each composed of 64 LUTs (Figure 5), the five ROs were implemented identically, ensuring the same placement and routing at the RO level by carefully manipulating the FPGA constraint files. This approach was used to maintain uniform path lengths and to prevent the synthesis and place-and-route tools from introducing unintended variations between the ROs. Therefore, any difference in their frequencies can be attributed to process variations, as expected in a PUF design. The frequencies of the five ROs are measured using internal counters. The results, formatted as a 64-bit data block, are transmitted serially via UART using successive 8-bit frames. This configuration has been chosen for the sake of simplicity given our different constraints; it must be noted, however, that this does not affect the validity of our results and analysis. One of the challenges associated with laser injection

on flip-chip packages is the presence of etchings (such as those from manufacturers, etc.) that can interfere with the laser through reflection or scattering effects. However, these features do not cover the entire chip, so careful selection of the injection area is necessary to optimize coupling with the chip. Another important issue is the precise localization of the targeted ROs. While it is possible to refer to the Vivado floorplan to estimate their position, the actual orientation of the chip may differ from the one shown in the design tool. For this reason, we rely on a reference (Figure 6) that establishes a precise correspondence between the Vivado floorplan and the internal layout of the FPGA as observed under the laser setup. As shown in the Figure 6, the most suitable injection area is highlighted in green, as it corresponds to a region free of etching that could interfere with the laser beam. By aligning this area with the FPGA floorplan, we identify it as located in the clock region X1Y1, where the ROs have been thus implemented. This correspondence between the physical injection zone and the logical placement in the FPGA is also illustrated in the same figure.

Table II shows the nominal frequencies (in the absence of laser attack) of the five ROs implemented on the FPGA. The frequencies are relatively close to each other, with an average value of 27.4MHz and a standard deviation corresponding to 1.26% of the mean.

<table><caption>TABLE II: Nominal frequencies of ROs implemented on the FPGA in the absence of laser attacks.</caption><thead><tr><th>ROs</th><th>RO1</th><th>RO2</th><th>RO3</th><th>RO4</th><th>RO5</th></tr></thead><tbody><tr><td>Frequency (MHz)</td><td>27.2</td><td>26.9</td><td>27.5</td><td>27.7</td><td>27.7</td></tr></tbody></table>

<figure><img src="image_6.png" /><figcaption>Fig. 6: On the left, an internal view of the Artix-7 FPGA captured using an infrared camera, and on the right, the corresponding floorplan generated by Vivado Design Suite 2019.2. The laser-targeted area, outlined in solid green lines, indicates where the ROs are implemented, covering a region of 3, 800µm by 1, 500µm. The associated clock region is also shown, outlined with green dashed lines.</figcaption></figure>

<figure><img src="image_7.png" /><figcaption>Fig. 4: Schematic of a RO implemented on an FPGA, where the inverters and the NAND gate are realized using LUTs. The placement was done using a Python script that ensures the same placement and routing for each RO.</figcaption></figure>
## D. Fault Injection Processus

In our setup, the ROs are activated for a duration of 10µs, during which their frequencies are sampled, with the counters enabled only while the ROs are oscillating. The laser is triggered concurrently, ensuring that injections occur precisely during the RO activity window to optimize the timing of the perturbation. Figure 7 shows oscilloscope captures of the signals from the laser source and the FPGA. The **Enable RO** signal activates the ROs, while the **RO** signal represents their oscillations; both remain active for 10µs. The **laser trigger** signal closely follows the RO signal, indicating when the laser shot is commanded, and remains high for 10µs in our experiments. The **laser shot** signal, measured using a photodiode capturing scattered photons, confirms that the laser has fired. It is important to note that the RO frequencies correspond to periods of approximately 0.037µs, which is significantly shorter than the 10µs laser pulse duration. As a result, each RO completes several hundred oscillation cycles within a single laser pulse, allowing the injection to perturb multiple cycles during a single measurement window and enabling clear observation of frequency shifts under laser illumination.

## IV. RESULTS

We started by performing attacks on a defined area of the chip where the ROs are located. Initially, we used a laser with a spot diameter of 20µm, a step size of 50µm, a power of 1W, and a laser duration of 10µs. For each XY coordinate, five laser shots are performed. For each shot, the frequencies of the ROs are recorded. For each shooting position, the average of the five measured frequencies is calculated. We then plotted the heatmap of the frequencies of these 5 ROs with respect to the XY coordinates. Figure 8 shows that all five ROs experience a frequency drop in certain sensitive areas: the sensitivity zones are similar and follow vertically aligned patterns. We also observe intermediate bands between these zones, which appear less sensitive. This suggests that not the entire surface contributes equally to frequency variations. Indeed, if we analyze Figure 9, which shows a heatmap highlighting the

<figure><img src="image_8.png" /><figcaption>Fig. 7: Set of signals measured with the oscilloscope: Enable RO, which activates the ROs; RO, the signal from the RO; Laser Trigger Signal, which arms the laser; and Laser Shot Signal, indicating the attack.</figcaption></figure>

<figure><img src="image_9.png" /><figcaption>Fig. 8: 2D view of the evolution of the 5 ROs' frequencies during the laser attack within an area of the FPGA encompassing the region where the ROs are implemented. This area measures 3800µm by 1500µm.</figcaption></figure>

sensitivity of ROs to laser irradiation, and correlate the results with the internal floorplan provided by Vivado, it becomes evident that certain regions of the chip do not impact the ROs when targeted. In particular, irradiating areas containing internal logic blocks such as Block RAMs (dedicated memory blocks), PLLs (Phase-Locked Loops for clock management), and DSPs (Digital Signal Processing units) does not result in any significant change in RO frequencies. This can be explained by the fact that the frequency variations are primarily caused by an IR drop induced by the laser shot, a transient drop in supply voltage that increases propagation delays, thereby reducing the ROs' frequencies, as discussed in [13]. The sensitive regions correspond to programmable logic areas (LUTs and interconnections) that share a common power supply network, which allows the IR drop to propagate within the affected clock region. Consequently, the laser effect remains confined to a single clock region, and targeting other clock regions has no measurable influence on ROs outside the affected area.

If we select a sensitive area of the FPGA and perform laser injections while varying the laser duration (from 0µs to 10µs) and power (from the minimum value of 0.6W to 1.6W), we observe that the frequency of the ROs decreases significantly as a function of these two parameters. We achieve an 80% reduction in frequency when both parameters are at their maximum (Figure 10). However, to avoid permanently damaging the FPGA, we decided to use a duration of 10µs and a power of 1W.

<figure><img src="image_10.png" /><figcaption>Fig. 9: View of the sensitivity zones of the ROs to the laser, along with a visual representation of the areas where the laser is ineffective.</figcaption></figure>
<figure><img src="image_11.png" /><figcaption>Fig. 10: Evolution of RO frequencies as a function of laser injection duration and laser power.</figcaption></figure>

<figure><img src="image_12.png" /><figcaption>Fig. 12: Simulation of the temperature effect on the frequency of an 11-inverter RO using Spectre, based on a 65nm CMOS technology, for various $V_{DD}$ values.</figcaption></figure>

To precisely locate the ROs in the heatmap, we first normalized the frequencies of each RO measured during the attack. For this, we took the maximum frequency value of each RO as the normalized 100%. Then, we performed a subtraction between RO1 and all the other ROs. In Figure 11, we present the heatmaps showing the normalized frequency differences between RO1 and all other ROs (RO2, RO3, RO4, RO5). By analyzing the figures, we observe a common point across all four heatmaps (in bright green) and areas in bright red that change with each heatmap. This likely indicates that the bright green area corresponds to RO1, while the red areas correspond to RO2, RO3, RO4, and RO5, respectively. It can be observed that the location of the ROs appears inverted compared to their placement on the FPGA floorplan (Figure 6). This is expected, as the chip is flipped, as previously explained.

The fact that RO1 appears in green on the heatmap, along with the positive frequency differences observed in these regions, indicates that when the laser injection directly targets RO1, its frequency decreases less than that of the neighboring ROs. Specifically, if the difference between two frequencies, $F_{ROA}$ and $F_{ROB}$, is positive ($F_{ROA} - F_{ROB} > 0$), it means that RO A retains a higher frequency than RO B. Therefore, RO1, shown in green, exhibits a smaller frequency reduction compared to the others, suggesting it is less affected by the attack in this case. Conversely, when the laser targets other ROs, those spots appear in red, indicating negative frequency differences between the target RO and RO1. This implies that in such scenarios, RO1's frequency decreases more than that

of the directly targeted ROs, suggesting that RO1 is then more affected than the others.

At first glance, these results may seem counterintuitive. Indeed, when a laser impacts an RO, not only is there an IR drop, but also a local increase in temperature. As a result, the RO is expected to undergo a greater frequency decrease, since temperature typically lowers frequency, as demonstrated in [14]. However, through simulations, we have shown that when the RO is underpowered, as is the case with an IR drop, temperature has the opposite effect on the frequency, leading to an increase in frequency (Figure 12). We know that the observed effects are primarily due, at first order, to IR drop, a transient voltage drop in the power supply network caused by the laser shot, which leads to a frequency decrease and propagates over long distances, as shown in Figure 8. At second order, a localized temperature increase under the laser spot partially mitigates this IR drop effect by affecting transistor threshold voltages ($V_{TH}$), allowing faster switching despite the reduced supply voltage ($V_{DD}$). This thermal effect is confined mostly to the area directly under the laser spot. As a result, the RO located beneath the laser spot experiences a less pronounced frequency decrease compared to the other four ROs, which are only affected by the IR drop, making its frequency the highest among them. The $V_{DD}$ values used in the simulations were chosen accordingly, based on observations in [15]. Moreover, similar results are observed in Figure 13 showing a simulation of a 300 mV IR drop, considering different temperature increases. It shows that an increase in temperature results in a weaker decrease in frequency.

<figure><img src="image_13.png" /><figcaption>Fig. 11: 2D view of the normalized frequency differences (%) between RO1 and the other ROs during the laser attack, within the FPGA area encompassing the region where the ROs are implemented.</figcaption></figure>

<figure><img src="image_14.png" /><figcaption>Fig. 13: Simulation of the effect of a 300mV IR drop on a RO and its behavior at various temperatures.</figcaption></figure>
## V. CASE OF AN RO-PUF

Among all existing PUFs, the RO-PUF is one of the most widely studied in the literature due to its simplicity. In this type of PUF, multiple ROs are implemented, and because of the inherent physical variability of the chip, each oscillator exhibits slightly different frequencies. A multiplexer is used to select pairs of ROs based on a signal called the "challenge." The frequencies of the selected ROs are then compared, and the output bit referred to as the "response" is determined accordingly: if the frequency of RO1 is higher than that of RO2, the response is 1; otherwise, it is 0. This entire process is known as a CRP mechanism. As discussed in the previous section, when the laser directly targets a RO, the observed effects are less pronounced due to frequency recovery induced by the temperature increase. This phenomenon can be exploited to alter the PUF response. In our case, the nominal frequency of RO1 is higher than that of RO2 (27.2MHz for the **RO1** and 26.9MHz for the **RO2**), which results in a response bit of 1. However, by targeting RO2 directly with the laser, we were able to flip this bit (Figure 14 in the left). Similarly with RO1 and RO3, by default RO1 has a lower frequency (27.2MHz for the **RO1** and 27.5MHz for the **RO3**) which produces a 0 at the PUF output. However, by positioning the laser on RO1, we cause both frequencies to decrease, but RO3 decreases more than RO1, which inverts the PUF output (as shown in Figure 14 on the right), demonstrating the vulnerability of the system to localized laser injections.

## VI. CONCLUSION

In this work, we have demonstrated that RO-PUFs are vulnerable to laser fault injection attacks. By precisely targeting specific ROs on an FPGA with a focused laser beam, we were able to induce repeatable changes in their oscillation frequencies, directly altering the PUF output. To the best of our knowledge, this is the first experimental demonstration showing the combined photoelectric and thermal effects of a laser on RO-PUF behavior. These results reveal a critical security concern: an attacker with physical access and a laser can gain partial control over the PUF output by selectively modifying the frequencies of targeted ROs. This could allow an attacker to bias or predict specific bits in the PUF response, potentially compromising authentication or key generation mechanisms that rely on the unpredictability and stability of PUF outputs.

<figure><img src="image_15.png" /><figcaption>Fig. 14: 2D representation of bit flips, where on the left the RO1 is compared with RO2, and on the right RO1 is compared with RO3.</figcaption></figure>

In future work, we plan to explore countermeasures to limit or detect this type of control, and to evaluate the impact of such targeted laser attacks on different PUF architectures to assess their resilience under physical fault injection

## VII. ACKNOWLEDGEMENT

This work was supported by a research grant from the French Agence Nationale de la Recherche (POP project, ANR-21-CE39-0004).

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