# Isolated step-down DC-DC converter based-on push-pull topology with reduced voltage stress of the primary side transformer windings

Robert Stala

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Robert Stala. Isolated step-down DC-DC converter based-on push-pull topology with reduced voltage stress of the primary side transformer windings. The 26th European Conference on Power Electronics and Applications, GDR SEEDS France & EPE Association, Mar 2025, Paris, France. 10.34746/epe2025-0055. hal-05077776

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Submitted on 21 May 2025

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# Isolated step-down DC-DC converter based-on push-pull topology with reduced voltage stress of the primary side transformer windings

Robert Stala

AGH UNIVERSITY OF KRAKOW

al. A. Mickiewicza 30

Krakow, Poland

Tel.: +48 / (12) - 617 5712.

E-mail: stala@agh.edu.pl

URL: https://www.agh.edu.pl

## Acknowledgements

Research project supported by program „Excellence initiative – research university” for the AGH University of Krakow.

## Keywords

«Isolated converter», «DC-DC converter», «DC power supply», «Common-mode current».

## Abstract

This paper presents new results of a push-pull step-down converter with reduced winding voltage stress. The concept of the system, where an input voltage divider and two branches were used to supply the primary windings was demonstrated. This allows to $dv/dt$ between windings reduction and capacitive current decrease. Operation with two switching sequences is proposed and presented, which allow for a lower maximum value of the magnetic flux, or a lower frequency of core remagnetisation. Selection of switching method may be used to optimize the converter. The natural voltage balance of the input divider and the ability to operate the system with two sources were also demonstrated. The results of efficiency and power losses balance are presented, as well as waveforms for the analysed concepts of converter configuration and control, such as current, voltage and magnetic flux.

## Introduction

A push-pull converter is one of the typical isolated DC-DC converters characterized by low noise and common-mode currents. In the scientific literature, various innovations of this system are proposed leading to the optimization of converter parameters. In [1] its reliability and comparisons with half-bridge and full-bridge

isolated multiswitch converters were analysed. The converters have a different point of optimum reliability, which can be taken into account at the design stage, but all converters analysed in [1] showed higher efficiency in the CCM mode. The converter proposed in this article operates in CCM in most of the rated power range. Publications [2]-[3] present new concepts for the implementation of active clamping of the push-pull converters. In [4], the topology and results of the push-pull converter with voltage stress reduced of the rectifier diode are demonstrated. The converter proposed in this paper allows to reduce voltage stress on the primary side windings. Soft switching conditions analysis in the push-pull isolated DC-DC is presented in [5] where the converter with resonant circuit implementation achieves soft switching of all switches. The modified push-pull converter for power density increase based on phase-shift control is presented in [6]. In publication [7], the converter using improved push-pull topology on the primary side is proposed along with its ability for ZVS (Zero Voltage Switching) operation. Modelling of the operation and power losses of the converter can be an important tool for the analysis of the possibilities of improving its efficiency, which is presented in [8]. Precise simulations using the parameters of physical elements were also used in the article presented here.

The converter proposed in this paper uses a typical push-pull transformer and a typical push-pull secondary side structure. Its primary side topology and appropriate control methods is designed to be able to operate with connection to two sources and use a blocking capacitor. Overall, it creates an innovative topology with new properties, while retaining the familiar advantages of a push-pull converter.

The scientific contribution of the article assumes the presentation of a new topology of an isolated
converter with reduced voltage stress and $dv/dt$ voltage of the primary windings of a push-pull transformer. Compared to the classic push-pull converter [8], the voltage stress across the primary side transistors has also been reduced by two times in the proposed circuit. The reduction of voltage stress is also an improvement in relation to the systems proposed in [2]-[3] or [5]. An advantageous feature of the proposed system is also low complexity of topology and control as well as no additional magnetic elements on the primary side.

The paper demonstrates original results for two control schemes, analysis of operation in various application variants such as power supply from two sources and presentation of the results of modelling the efficiency of the system and the balance of power losses in the system using physical models of semiconductor and passive components.

## Topology and Concepts for
Converter Control

The principle of operation of the proposed converter is to use two sources from the input divider to convert energy in a push-pull transformer. Fig. 1 shows possible solutions for the construction of the converter.

<figure><img src="image_2.png" /><figcaption>Fig. 1: The proposed push-pull converters with reduced voltage stress of the primary side windings</figcaption></figure>

The primary side windings can be supplied from a capacitive divider or two voltage sources. In the case of using an input divider (Fig. 1a), the circuit naturally equalizes the voltages across the

capacitors. If, on the other hand, the circuit is supplied from two voltage sources (Fig. 1b), the blocking capacitor ($C_b$) prevents the flow of equalization current between the input sources. The primary windings and capacitors of the input divider are loaded with a current at a lower frequency than in a traditional push-pull system. The choke and the variable current component of the output capacitor results from the sum of the impulses of the transistors on the primary side, i.e. it is four times higher than the frequency of the primary side of the transistor. Fig. 2 shows the states of the circuit and the flow of current through particular elements resulting from the control of transistors.

<figure><img src="image_3.png" /><figcaption>Fig. 2: States of operation of the converter</figcaption></figure>

The primary windings are connecting to a voltage equal to $U_{in}/2$, which reduces the interference conducted by the parasitic capacitances of the
transformer. The order in which each state is used affects the operation of the system and can be used in unusual states of its operation.

## Switching Patterns and basic waveforms

The switching patterns assume symmetrical or controlled load on both sources. Based on Fig. 2, regardless of the modulation method used, the output voltage is controlled by the duty cycle of driving signals (Fig. 3), which for a single primary side transistor is derived as follows:

$$ 
\begin{aligned}
U_{\text{out}}/(0.5U_{\text{in}}) &= 4D(N_{\text{sec}}/N_{\text{prim}}) \Rightarrow \\
D &= (U_{\text{out}}/U_{\text{in}})(N_{\text{prim}}/N_{\text{sec}})/2, \\
D &\in (0 - 0.25)
\end{aligned}
\quad (1)
$$

Fig. 3 shows the basic switching pattern for the converter with the following order of states:

$$ \textit{PatternA} = \{S1, S2, S4, S3, ...\} \quad (2). $$

Control according to this sequence ensures a lower value of magnetic induction, because the change in the direction of the primary winding current occurs at maximum frequency. Figures 3, 4 and 5 show the results in the form of waveforms demonstrating the control signals, currents and voltages of individual components, as well as magnetic flux. Table 1 contains the basic data of the model on which the simulation results were obtained. Model of transistor resistance, capacitances and reverse conduction voltage are related to GaN transistor physical parameters. It is also assumed that switching off the current during reverse conduction of semiconductor components occurs without the reverse recovery effect (as in GaN transistors).

An example design of such a circuit for parameters approached to those given in Table 1 could be based on GaN transistors and magnetic elements presented in [11] and [12].

<figure><img src="image_4.png" /><figcaption>Fig. 3: Logic signals of the switching method according to *PatternA*</figcaption></figure>

<table><caption>Table I: Simulation model parameters</caption><thead><tr><th>Component</th><th>Parameters</th></tr></thead><tbody><tr><td>Input voltage</td><td>U<sub>in</sub> = 48</td></tr><tr><td>Output voltage</td><td>U<sub>out</sub> = 5</td></tr><tr><td>Load</td><td>P<sub>out_max</sub> = 100 W</td></tr><tr><td>Switching frequency</td><td>f<sub>s</sub> = 250 - 400 kHz (secondary side choke current ripples frequency)</td></tr><tr><td>Transistors</td><td>R<sub>ds(on)</sub> = 2 mΩ, C<sub>oss</sub> = 1300 pF, C<sub>iss</sub> = 4700 pF, C<sub>rss</sub> = 7 pF, Voltage at reverse conducting V<sub>dsr</sub> = 1.5V, Q<sub>rr</sub> = 0 C</td></tr><tr><td>Transformer</td><td>Ratio 2:1 Inductances L<sub>m</sub> = 287 uH, L<sub>lprim</sub> = 0.1 uH, L<sub>lsec</sub> = 0.05 uH,</td></tr><tr><td>Passives</td><td>C<sub>out</sub>=100 uF, C<sub>b</sub> = 47 uF, L<sub>out</sub> = 1 uH,</td></tr><tr><td>Simulation method</td><td>Matlab/Simulink and Simscape library with physical models of transistors and magnetic components (with the use of magnetic building blocks [10]).</td></tr></tbody></table>

A different control sequence can also be used in the proposed system, which affects the frequency of core remagnetisation and the midpoint current of the input divider ($i_{primM}$):

$$ \textit{PatternB} = \{S1, S2, S3, S4, ...\} \quad (3). $$

Fig. 6 presents logic signals for control implemented according to the *PatternB* sequence, and Fig. 7-8 shows the waveforms of currents and voltages on the primary and secondary sides of the circuit.
<figure><img src="image_5.png" /><figcaption>Fig. 4: Primary side waveforms for switching according to *PatternA*. $P_{\text{out}}$=50 W, $f_s$ = 250 kHz</figcaption></figure>

From the basic waveforms it is seen that:

* The maximum magnetic flux value is twice as low when switching according to *PatternA*.

The frequency of core remagnetisation is twice lower when switching according to *PatternB*, which can have a beneficial effect on reducing energy losses in the core.

* The current influencing the midpoint of the input divider ($i_{\text{primM}}$) is alternating, which allows the use of a capacitor blocking the DC component in this branch. When controlled with *PatternB*, the $i_{\text{primM}}$ current has twice the frequency, which can be beneficial for reducing the capacitance of the blocking capacitor.

<figure><img src="image_6.png" /><figcaption>Fig. 5: Secondary side waveforms for switching according to *PatternA*. $P_{\text{out}}$=50 W, $f_s$ = 250 kHz</figcaption></figure>

* In both control cases, the output choke current has a high frequency.

* Voltage stress of primary side windings, and also the step changes in the primary winding voltage are twice as low as the input voltage value as shown in Table II.

<figure><img src="image_7.png" /><figcaption>Fig. 6: *PatternB* method logic signals</figcaption></figure>
<figure><img src="image_8.png" /><figcaption>Fig. 7: Primary side waveforms for switching according to *PatternB*. $P_{out}$=50 W, $f_s$ = 250 kHz</figcaption></figure>

Depending on the type of magnetic material of the transformer core [9], flux density or frequency decrease may be essential for reducing energy loss of the core.

## Cases of converter's configuration

In addition to the basic operating parameters of the proposed converter, its parameters related to the use of the input divider or power supply from two sources are important.

### Natural balancing of input divider voltages

When the system operates with a single source using a capacitive divider (Fig. 1a), the divider voltages are balanced. This occurs naturally, with proper magnetic coupling of the

<figure><img src="image_9.png" /><figcaption>Fig. 8: Secondary side waveforms for switching according to *PatternB*. $P_{out}$=50 W, $f_s$ = 250 kHz</figcaption></figure>

<table><caption>Table II: Voltage stress of windings and transistors</caption><thead><tr><td>Component</td><td>Voltage stress</td></tr></thead><tbody><tr><td>Primary windings</td><td>$U_{in}/2$</td></tr><tr><td>Secondary windings</td><td>$U_{in}/4$</td></tr><tr><td>Primary side transistors</td><td>$U_{in}$</td></tr><tr><td>Secondary side transistors</td><td>$U_{in}/2$</td></tr></tbody></table>

primary windings. Fig. 9 shows examples of voltage imbalance reduction waveforms in a system using a typical control method.
<figure><img src="image_10.png" /><figcaption>Fig. 9: Natural input voltage balancing in the converter with input divider (Fig. 1a). $C_{in}=220\mu F$, PatternA, $P_{out}=50$ W</figcaption></figure>

## Operation with unequal power of the two input sources

The system can be supplied from two sources and in this case it is possible to work with unequal power of individual sources.

<figure><img src="image_11.png" /><figcaption>Fig. 10: The proposed converter powered from two sources with the same voltage</figcaption></figure>

Due to the occurrence of natural equalization of input voltages, sources should maintain uniform voltages. Such a case could be used, for example, to receive energy from two photovoltaic sources. A model of such a system is shown in Fig. 10 and Fig. 11 – 12 show the waveforms in the system when controlled according to different strategies (PatternA and PatternB).

<figure><img src="image_12.png" /><figcaption>Fig. 11: Operation of the converter (Fig. 10) with uneven load power of sources. Method of switching: PatternA, $P_{out}=50$ W</figcaption></figure>

A comparison of the waveforms shown in Figs. 11-12 indicates that the use of PatternA control, causes higher oscillations of lower frequency than in the case of PatternB sequence, and this applies to the output voltage, output choke current, input source current and magnetic flux. This means that with uneven load on two input sources, when controlled according to the PatternB sequence, it can allow to reduce the volume of the LC passive components.

## Operation of the topology with two input sources with unequal voltage values

This is an application variant in which two input sources with different voltage values are used in the circuit (Fig. 1b), but all control impulses have the same duty cycle:

$$V_1 \geq V_2 \text{ or } V_1 \leq V_2 \qquad (4).$$

$$D_{S1} = D_{S2} = D_{S3} = D_{S4} = D \qquad (5).$$
<figure><img src="image_13.png" /><figcaption>Fig. 12: Operation of the converter (Fig. 10) with uneven load power of sources. Method of switching: *PatternB*, *P*<sub>out</sub>=50 W</figcaption></figure>

<figure><img src="image_14.png" /><figcaption>Fig. 13: Operation of the topology with two input sources at unequal voltage values and blocking capacitor (Fig. 1b). *PatternB*, *P*<sub>out</sub>=50 W</figcaption></figure>

In this case, the blocking capacitor ($C_b$) used in the branch connecting the midpoints of the primary windings and the input sources (Fig. 1b) allows for the equalization of the supply voltages to the primary windings. It also prevents the flow of equalization current between the input sources, which causes a natural balance of voltages. Fig. 13 shows examples of waveforms in a system with a blocking capacitor and source voltage difference $V_1-V_2=4$ V, which exhibits that the blocking capacitor ($C_b$) has a constant component with an average value of 2 V, the current flowing into the common point of the sources ($i_{primM}$) is alternating and the magnetic flux is symmetrical. An example of the use of such a topology could be powering the system from two batteries and an unequal level of charge.

## Sizing of components and a comparison of topology complexity

From the voltage stress results for the transistors, presented in Table II, it can be seen that the transistors on the primary side block the voltage $U_{in}=48$V, and the transistors on the secondary side block the voltage $U_{in}/2$. For simulation tests, GaN transistors with $V_{DS}=100$ V was used.
The LC passive components on the secondary side are selected in the typical way of a DC-DC buck switching converter. The output choke current ripples are forced by voltage with pulses of ($U_{sec(1 or 2)}$ - $U_{out}$) and 0 V. The demonstrated results were obtained for a design with a small choke inductance and an approximately of 1% voltage ripple across the output capacitor bank capacitance. For the parameters of the secondary side: $U_{sec}=12$V, $U_{out}=5$V, $f_s=250$kHz, current ripples $\Delta I_L=11$A, $\Delta U_{out}=0.055$V we get the following values of the output inductance and capacitance: $L_{out}=1$uH, $C_{out}=100$uF.

The blocking capacitor $C_b$ conducts current pulses with $i_{sec}/2$ value. For parameters presented in Tab. I the current flow time through the $C_b$ concentrator is $t_{con}=[(5/12)/(250 \cdot 10^3]$. For voltage ripples $\Delta U_{Cb}=0.48$V and $P_{out}=100$W, we get the following value of blocking capacitance: $C_{bmin}=35$uF. Finally, in the demonstrated results $C_b=47$uF is used.

Publications [2] – [6] present optimized isolated converters, which can be compared with the proposed converter based on the push-pull topology. Table III contains a list of parameters characterizing the reference systems and the proposed converter in terms of the number of elements. It is also important that the reference
publications [1] – [6] demonstrate the possibility of optimizing important parameters in isolated DC-DC push-pull systems, which has been partially discussed in the introduction.

<table><caption>**Table III: Characteristics of reference systems in terms of the number of elements**</caption><thead><tr><th rowspan="2"></th><th colspan="5">Reference number</th><th rowspan="2">Proposed</th></tr><tr><th>[2]</th><th>[3]</th><th>[4]</th><th>[5]</th><th>[6]</th></tr></thead><tbody><tr><td></td><td></td><td></td><td></td><td></td><td>Fig. 4a</td><td></td></tr><tr><td>Number of transistors</td><td>2</td><td>4</td><td>4</td><td>6</td><td>2</td><td>6</td></tr><tr><td>Number of diodes*</td><td>4</td><td>4</td><td>6</td><td>0</td><td>4</td><td>0</td></tr><tr><td>Number of chokes</td><td>0</td><td>2</td><td>1</td><td>2</td><td>3</td><td>1</td></tr><tr><td>Number of capacitors**</td><td>3</td><td>4</td><td>5</td><td>3</td><td>3</td><td>3 or 4</td></tr></tbody></table>

* diodes other than MOSFETs' reverse diodes
** input, output banks and other capacitors (excluding parasitic capacitance of components)

## Efficiency and power losses

Power losses and efficiency of the analysed converter were simulated for the parameters presented in Table I. Power losses were calculated from steady-state waveforms obtained in simulations carried out with step time equals to 100 ps, using variable step size solver with minimum step size equal 50 ps.

<figure><img src="image_15.png" /><figcaption>**Fig. 14: Efficiency versus power of load for switching frequency equals to 250 kHz and 400 kHz at control by sequence *PatternA***</figcaption></figure>

<figure><img src="image_16.png" /></figure>

<figure><img src="image_17.png" /><figcaption>**Fig. 15: Power losses in converter's components. $P_{out}$ = 100 W, $f_s$ = 250 kHz and 400 kHz, control by sequence *PatternA***</figcaption></figure>

Transistor models take into account parasitic capacitances, hence the switching losses visible on the efficiency curve (Fig. 14) resulting in a decrease in efficiency for low power values. The transistor capacitance and reverse conduction were modelled as for the GaN transistor. Fig. 14 presents the characteristics of efficiency versus $P_{out}$, while Fig. 15 presents the balance of losses in elements of the converter.

## Conclusion

From the presented concepts of the topology, their control and the results presented in the article, the following conclusions can be formulated:

- the circuits have primary winding voltages equal to half of the supply voltage, which reduces $dv/dt$ between windings and reduces capacitive current.

- the voltage stress on the primary side transistors is equal to $U_{in}$, but at the beginning of turning on process the voltage across the transistor is $U_{in}/2$ due to long intervals between successive control impulses. This reduces the energy dissipation in transistors when switching on ($E_{oss}$ losses).

- the proposed converter allows operation with uneven load of input sources by adjusting the duty
cycle control of respective transistors driving
signals. In both cases of modulation, this affects
the appearance of lower frequency components in
the output current, which can have the effect of
increasing the voltage ripple in the output
capacitor. In this state, an increase in the
maximum value of the magnetic flux and the
output choke current is observed.

- the converter operating without a blocking
capacitor naturally equalizes the voltage values
across the input divider capacitors.

- the system can operate with power supply from
two independent sources with different voltage
values. The use of a blocking capacitor in the
branch connecting the midpoint of the primary
side of the transformer with the midpoint of the
input sources leads to equalization of voltage
pulses on the windings of the primary side.

- operation with two switching sequences was
presented. One of the methods (PatternA)
provides operation with a lower maximum value
of the magnetic flux, which is its advantage. In
the second method, a lower frequency of core
remagnetisation is achieved, which may reduce
losses. However, this is done at a higher value of
maximum flux in the core. Reducing the
transformer's remagnetisation frequency from the
maximum frequency value in the system can be
beneficial in high-frequency circuits with GaN
transistors. The use of an appropriate control
method, PatternA or PatternB, can also be
important for the quality of the system in
untypical configurations. In a system with two
unevenly loaded input sources, the use of control
according to PatternB results in lower output
voltage ripple. This method (PatternB) also
allows to obtain twice the frequency of the middle
branch current on the primary side, which is
important for sizing the flying capacitor, which
equalizes the voltages on the primary windings
with unequal values of source voltages.

The prospects for further research include
deepening simulation studies of magnetic
elements for the proposed system, modeling of
parasitic currents and experimental
demonstrations of the system's properties.

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