# Novel Control Methodologies of Back-to-Back B6 Bridges for an Application-Related Stress Test Setup

Andreas Warmuth, Kevin Kapaj, Alexander Ulbing

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## To cite this version:

Andreas Warmuth, Kevin Kapaj, Alexander Ulbing. Novel Control Methodologies of Back-to-Back B6 Bridges for an Application-Related Stress Test Setup. The 26th European Conference on Power Electronics and Applications, GDR SEEDS France & EPE Association, Mar 2025, Paris, France. 10.34746/epe2025-0062. hal-05077849

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Submitted on 21 May 2025

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Distributed under a Creative Commons Attribution 4.0 International License
# Novel Control Methodologies of Back-to-Back B6 Bridges for an Application-Related Stress Test Setup

Andreas Warmuth, Kevin Kapaj, Alexander Ulbing

Tel: +43 676 82 05 7779

E-Mail: andreas.warmuth@k-ai.at, kevin.kapaj@k-ai.at, alexander.ulbing@k-ai.at

Kompetenzzentrum für Automobil- und Industrieelektronik (KAI GmbH)

Europastraße 8, 9524 Villach, Austria

URL: http://www.k-ai.at

## ACKNOWLEDGMENT

Funded by the Austrian Research Promotion Agency (FFG) within the Arcade project (Project No. 914019). Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the FFG. Neither the Republic of Austria nor the granting authority can be held responsible for them.

*Index Terms*—Back-to-Back B6 Bridge, Rapid control prototyping, control methodology, predictive control, FPGA.

*Abstract*—Back-to-back (B2B) B6 bridges stand out as the go-to solution for power cycling and application related stress tests in the reliability sector of power electronics. This paper delves into novel control strategies for the electro-thermal stress reconstruction of Device-under-Tests (DUTs), with a specific focus on signal shape reconstruction and current ripple reduction. A novel precalculation method is introduced, enabling the prediction of an operating point for open-loop control, thus facilitating the reconstruction of complex signal shapes. The presented concepts are rigorously evaluated through hardware testing and real measurement results, underlining their practical viability in real-world applications.

## I. INTRODUCTION

This paper focuses on the control of a B2B-B6 bridge power electronics setup, which is controlled within a rapid-control-prototyping (RCP) system. Controller methodologies are meticulously developed within the MATLAB/Simulink environment and subsequently

deployed to the hardware using a Speedgoat target machine. This target machine comprises a co-processor architecture featuring a central processing unit (CPU) and a field programmable gate array (FPGA). The detailed description of the presented test setup is depicted in the block diagram shown in fig. 1.

<figure><img src="image_3.png" /><figcaption>Fig. 1: Application diagram of a B2B-B6 bridge for reliability application-related stress test.</figcaption></figure>

### A. The Back-to-Back B6 Bridge setup

Employing B2B-B6 bridges with primarily inductive coupling networks is a common practice for conducting stress tests related to specific applications. This inverter structure plays a key role in controlling open-end
winding induction motor drives, enabling the accurate recreation of electro-thermal stress on power electronic devices. The application explored by Jia et al. in [1] and Amerise et al. in [2] varies in terms of the inverters' power supply. The application circuit featured in this paper is illustrated in the upper section of fig. 1. The B2B-B6 bridge can be controlled as an inverter/motor structure, showcasing its versatility in various applications. One notable advantage of utilizing a power electronic setup in a B2B configuration is the absence of mechanical moving components.

Unlike the well-known dual-active-bridge (DA-bridge) examined by Barlik et al. in [3] and Wattenberg in his PhD thesis [4], the B2B-B6 bridge does not feature galvanically isolated coupling with a transformer. A DA-bridge comprises full bridges on both sides for a single line of each phase, highlighting a fundamental structural variation from the B2B-B6 bridge.

The topology depicted in fig. 1 or similar configurations are also utilized in Power Hardware-in-the-Loop (PHIL) for emulating motor behavior with a B2B inverter structure. Notably, the inverter topology featured in the works of Zhang, Gaël, Baschera, Fischer, and Ulbing [5] - [9] closely aligns with the presented topology. The B2B configuration offers the flexibility to replicate various loads and mission profiles, particularly when stressing the power semiconductors is the primary objective. This approach applies stress to the power semiconductor Device-under-Test (DUT) without the need for rotating machines or an extensive variety of inductive coupling networks. The "load side" of the B2B-B6 emulates the electrical behavior of a load, resulting in significantly smaller and more streamlined test setup designs, thereby enhancing practicality and flexibility.

The DUT side of the B2B-B6 undergoes the stress profile akin to what would be encountered in a real-world application with a real motor. This approach ensures that the electrical mission profile for the DUTs closely mirrors the electrical and thermal stress they would encounter in real-world applications. While this approach aligns the stress conditions with real-world scenarios, it concurrently introduces heightened complexity to the control efforts required to maintain stable operation.

## B. *Usual control strategies for B2B-B6 inverters*

The most prevalent control strategy for B2B-B6 inverters, as evidenced in the publications [5] - [9], is the vector control (VC) approach. This established strategy, commonly used for controlling permanent magnet synchronous motors (PMSM) with a B6 inverter, is also the standard approach for managing a B2B-B6

inverter structure aimed at emulating stress on power semiconductors.

Nevertheless, the distinctive characteristics of the inverter topology eliminate dependencies between the different phases, stemming from motor star point or magnetic coupling. This unique trait creates the opportunity to explore alternative controlling approaches, as discussed further in section II.

## II. PI CONTROLLER METHODOLOGIES

In the presented B2B-B6 application test setup, all three phases of the B6-bridges operate independently. With the same DC power supply, each half-bridge of the DUT's B6-bridge combined with the coupled LOAD half-bridge forms an H-bridge configuration (visualized with color in fig. 1). Therefore, all control approaches presented will depict only one phase to enhance comprehension and readability of the diagrams. Additionally, the same approach can be replicated for the two other phases to facilitate reference signal reconstruction.

<figure><img src="image_4.png" /><figcaption>Fig. 2: Timing concept for controlling one phase of a B2B-B6 configuration</figcaption></figure>

<table><caption>TABLE I: Switch combinations for H-bridge inverters</caption><thead><tr><th>combination nr.</th><th>M1</th><th>M2</th><th>M3</th><th>M4</th><th>type</th></tr></thead><tbody><tr><td>I</td><td>1</td><td>0</td><td>1</td><td>0</td><td>circulation</td></tr><tr><td>II</td><td>1</td><td>0</td><td>0</td><td>1</td><td>active</td></tr><tr><td>III</td><td>0</td><td>1</td><td>1</td><td>0</td><td>active</td></tr><tr><td>IV</td><td>0</td><td>1</td><td>0</td><td>1</td><td>circulation</td></tr><tr><td>x</td><td>0</td><td>0</td><td>0</td><td>0</td><td>no operation</td></tr></tbody></table>

### A. *Timing concept of control pulses*

Throughout the herein presented investigations of the B2B-B6's control, the timing and synchronization of the pulse-width-modulation (PWM) pulses requires special attention. All control methods featured in this paper operate with synchronized 100 kHz PWM signals, with
the concept depicted and elaborated further in fig. 2 and it's timing table of table I.

The PWM signals for the DUT and LOAD B6 bridges are synchronized and generated by the FPGA. This synchronization is achieved by utilizing the same carrier triangle signal, resulting in center-aligned signals that offer the advantage of well-defined phases of PWM "potential difference".

For instance, by choosing a 50% duty cycle for the DUT half-bridge and a 45% duty cycle for the LOAD half-bridge, a 5% duty cycle difference is established. This difference yields a potential difference across the coupling network, leading to an increase in current through the inductance. Notably, if the duty cycle of the LOAD side is higher than that of the DUT's, the current decreases, indicating a positive current direction from DUT to LOAD and vice versa, as depicted in fig. 3 with a simulation within the MATLAB Simscape environment.

<figure><img src="image_5.png" /><figcaption>Fig. 3: Simulated switching behavior of a B2B-B6 configuration</figcaption></figure>

## B. Controller fundamentals

Employing a PI controller with a 100 kHz sample rate, the reference current signal with a 10 kHz sample rate is matched to a measured current signal. The current is measured at a sample rate of two mega samples (500 ns), with all measurements of one duty cycle period (20 samples) being averaged to minimize the influence

<figure><img src="image_6.png" /><figcaption>Fig. 4: Fundamental control diagram of a full bridge diagonal PI control.</figcaption></figure>

of noise. Additionally, the complementary PWM signals of the high and low side metal oxide semiconductor field-effect transistors (MOSFET) feature a dead time of 500 ns.

## C. Full bridge approach

The full bridge control approach (depicted in fig. 4), commonly employed for a standard H-bridge, can be seen as a diagonal switching method. This method has also been explored by Gupta in [10] and by Özer et al. in [11]. In this approach, M1 is interlocked with M4, and M2 with M3, as illustrated in fig. 5. Consequently, whenever M1 is conducting, M4 is also conducting, and vice versa, ensuring coordinated operation of the MOSFETs (table I combination II and III).

<figure><img src="image_7.png" /><figcaption>Fig. 5: H-Bridge configuration with diagonal switching</figcaption></figure>

Due to the nature of the diagonal switching method, the controlled current increases during a closed M1 phase and decreases in an open M1 phase. This active driving of current throughout the duty cycle period results in
high ripples on top of the reference current. Specifically, when the duty cycle exceeds 50% (equivalent to more than 5 µs high), the current increases during one duty cycle period, and vice versa. Despite the controlling fluctuations, the general shape of the reference current signal can be effectively matched, as demonstrated in fig. 6.

<figure><img src="image_8.png" /><figcaption>Fig. 6: Ripple current on top of a 50 Hz sinusoidal current reference</figcaption></figure>

### D. Four-quadrant approach

The four-quadrant approach involves a greater number of switching combinations compared to the previous method, as it lacks the interlocked MOSFET switching characteristic of the full bridge method. The possible combinations are detailed in table I, showcasing the four relevant switch combinations that can either circulate or actively drive the current. For a visual understanding of the closed current loops, refer to fig. 8.

<figure><img src="image_9.png" /><figcaption>Fig. 7: Fundamental control diagram of a full bridge four-quadrant feed-forward/PI control.</figcaption></figure>

<figure><img src="image_10.png" /><figcaption>Fig. 8: Four-quadrant approach current circulation options</figcaption></figure>

During active switch combinations II and III, this control methodology operates akin to the previous approach. However, switch combinations I and IV utilize the coupling networks' property of stored magnetic energy for current circulation. Due to loop resistance, the stored magnetic energy dissipates as heat, leading to a slight reduction in the circulating current. Depending on the current magnitude (positive or negative), the current tends towards zero. Larger magnitudes result in increased losses during the circulation phase. This behavior is visually depicted in the lower subplot of fig. 9.

<figure><img src="image_11.png" /><figcaption>Fig. 9: Ripple current on top of a 50 Hz sinusoidal current reference</figcaption></figure>
The potential for current circulation leads to a substantial reduction in current ripple compared to the full bridge control methodology, as evident in the upper plot of fig. 9.

### III. OPERATION POINT PRECALCULATION METHOD

A more rigorous and systematic approach to control involves calculating the operation points of both B6 bridges in advance and deploying the calculated signals to the MOSFETs as feed-forward control. This methodology is detailed in the control diagram depicted in fig. 10.

<figure><img src="image_12.png" /><figcaption>Fig. 10: Control diagram of the precalculation control methodology.</figcaption></figure>

#### A. Duty cycle on-time

The idea is to isolate the parameter "time" (given in eq. (3)) from the well-known result of a resistor-inductor (RL) circuit differential equation. The duty cycle defines the increase or decrease of current in this circuit. Therefore a dedicated on-time which results in the right amount of current increase could be precalculated. eq. (1) indicates the charging behavior and eq. (2) the discharging of an inductance.

$$I(t) = \frac{U_{dc}}{R} \left(1 - e^{-\frac{R}{L}t}\right) \quad (1)$$

$$I(t) = \frac{U_{dc}}{R} \left(e^{-\frac{R}{L}t}\right) \quad (2)$$

For a precalculation of the duty cycle period on-time a start current $I_{t_1}$ and an end current $I_{t_2}$ has to be chosen (depict in fig. 11 left side). Thus, a time difference results from endpoint to start point given in eq. (4).

The rearranged equation for time is

$$t = -\frac{L}{R} \ln (U_{dc} - I_t R) \quad (3)$$

and results in

$$t_{on} = t_2 - t_1 = -\frac{L}{R} \ln \left[ \frac{(U_{dc} - I_{t_2} R)}{(U_{dc} - I_{t_1} R)} \right] \quad (4)$$

<figure><img src="image_13.png" /><figcaption>Fig. 11: Charge and discharge curve of an inductance for the duty cycle calculation concept</figcaption></figure>

#### B. Duty cycle off-time

However, $t_2$ is the start of current circulation which leads to a decrease of the current caused by the ohmic losses which is already been discussed in table I type I and IV. As depicted in fig. 11 on the right side the magnitude of $I_{t_2}$ is at a different time position on the discharge curve. Therefore, the new start and end time has to be calculated. Given in eq. (5) and eq. (6).

$$t_3 = -\frac{R}{L} \ln \left( \frac{|(I_{t_2} R)|}{U_{dc}} \right) \quad (5)$$

$$t_4 = t_3 + t_{duty} - |t_{on}| \quad (6)$$

Inserting eq. (5) and eq. (6) into eq. (2) the amount of current reduction can be calculated with eq. (7).

$$\Delta I_{red} = I(t_4) - I(t_3) = \frac{U_{dc}}{R} \left( e^{-\frac{R}{L}t_4} - e^{-\frac{R}{L}t_3} \right) \quad (7)$$

#### C. Dead-Time Compensation

For a precalculation of operation points the dead-time is a critical property. The higher the switching frequency the lower the duty cycle period time of the PWM the more crucial the dead-time becomes. Thus, the dead-time must be compensated! As shown in the book of Mohan et. al. [12] and the journal paper of Zammit et. al. [13] the dead-time of both B2B half-bridges had to be added. Due to the fact, that both half-bridges are synchronized and have the same dead-time, it could be doubled.

Furthermore, related to the current direction $I(t) > 0$ or $I(t) < 0$ the dead-time is added or subtracted from the actual $t_{on}$ of eq. (4).
### D. Final equation set

In consideration of the current direction $I(t)$, the dead-time $t_{dt}$ and the change rate of the current $\frac{\partial I}{\partial t}$, a finalized equation set for $t_{on}$ can be stated which is given in eq. (8).

$$ t_{on} = \begin{cases} -\frac{L}{R} \ln \left[ \frac{U_{dc}-I_{t_2}R}{U_{dc}-I_{t_1}R} \right] + 2t_{dt} & \text{if } I(t) > 0, \frac{\partial I}{\partial t} > 0 \\ \frac{L}{R} \ln \left[ \frac{U_{dc}+I_{t_2}R}{U_{dc}+I_{t_1}R} \right] + 2t_{dt} & \text{if } I(t) > 0, \frac{\partial I}{\partial t} < 0 \\ \frac{L}{R} \ln \left[ \frac{U_{dc}+I_{t_2}R}{U_{dc}+I_{t_1}R} \right] - 2t_{dt} & \text{if } I(t) < 0, \frac{\partial I}{\partial t} < 0 \\ -\frac{L}{R} \ln \left[ \frac{U_{dc}-I_{t_2}R}{U_{dc}-I_{t_1}R} \right] - 2t_{dt} & \text{if } I(t) < 0, \frac{\partial I}{\partial t} > 0 \end{cases} \quad (8) $$

It is shown, that four different cases are possible. Depending on the current direction, the dead-time has to be added or subtracted from the desired on-time $t_{on}$. If the current change rate $\Delta I = I(t_2) - I(t_1) < 0$ the logarithm would not be solvable. Thus, the workaround with changed signs has been done in eq. (8) case 2 and 3.

Furthermore, the current losses during the duty cycle off phase depents also on the current direction. The current $I(t)$ is always decreasing towards zero. Thus, eq. (9) states the two possibilities.

$$ \Delta I_{red} = \begin{cases} -\frac{U_{dc}}{R} \left( e^{-\frac{R}{L}t_4} - e^{-\frac{R}{L}t_3} \right) & \text{if } I(t) > 0 \\ \frac{U_{dc}}{R} \left( e^{-\frac{R}{L}t_4} - e^{-\frac{R}{L}t_3} \right) & \text{if } I(t) < 0 \end{cases} \quad (9) $$

The next point in the calculation workflow is to implement the current reduction in the on-time $t_{on}$. Therefore, when calculating $t_{on}$ in eq. (8) the current points are extended by $I(t_2) - \frac{\Delta I_{red}}{2}$ and $I(t_1) + \frac{\Delta I_{red}}{2}$. This extension compensates the current loss with an extended on-time of the duty cycle.

### E. Resulting duty cycle

For the general usage with every PWM frequency, the on-time $t_{on}$ has to be normalized with the duty cycle period time $t_{duty}$. Thus, the resulting dimensionless output of the precalculation is given with eq. (10).

$$ \frac{\text{duty cycle}\%}{100} = \frac{t_{on}}{t_{duty}} \quad (10) $$

This equation results in a normalized duty cycle difference which indicates the needed difference between duty cycle of DUT and LOAD half-bridge.

### F. Test Results

This subsection shows the feasibility of the precalculation method with real-world measurement. fig. 12 depicts different reference signals with a dedicated oscilloscope measurement result.

The first subplot shows a typical 50Hz sinusoidal signal with a 3rd harmonic overlay (150 Hz) which is nearly perfectly reconstructed. The second subplot gives an overlay of 50 Hz, 75 Hz and 100 Hz with different weightings. Third subplot depicts an overlay of 50 Hz, 75 Hz and 150 Hz with different weightings.

In subplot four a sawtooth signal with 50 Hz is reconstructed. It shows, that even signals with a non smooth signal shape (with edges) can be reconstructed with a certain amount of precision.

<figure><img src="image_14.png" /><figcaption>Fig. 12: Different signal shapes reconstructed with the open-loop pre-calculation approach.</figcaption></figure>

The noise free real-world measurement signals results from the open-loop control methodology, which has the nature of low noise levels. The oscilloscope observation was done without a 3 dB filtering.

### G. Possible problems within precalculation approaches

This subsection will describe present or arising problems within the precalculation approach. The precalculation is an open-loop controlling approach, which implies possibility of uncertainties and errors compared with a reference signal.
1) *parameter uncertainties*: Accurate knowledge of device parameters such as MOSFET and coupling inductances is crucial for precise operation point precalculation. However, device parameter uncertainties compared to the datasheet necessitate an initialization routine for the entire circuit.

2) *temperature*: Changes in temperature impact device parameters, indicating the need for dynamic adaptation of precalculation parameters through temperature monitoring of the components.

3) *dead-time-compensation method*: Dead-time-compensation accuracy, particularly around the zero-crossing, is influenced by natural non-linear behavior and the chosen compensation method. The combination of a constant time offset and parameter uncertainties can lead to over or under dynamic behavior, as depicted in the subplot 3 and 4 of fig. 13. Consideration of an approach used for sliding mode controls against chattering behavior, as employed by V. Utkin et al. in [14], could be beneficial for further development.

4) *Frequency-to-Sample Rate Ratio of Reference Signal*: The reference signal sample rate is one of the most important facts for the reconstruction. Assume a 50 Hz signal with 10 ksamples lead to 200 points within one period. Whereas, 1 kHz signal with 10 ksamples lead to 10 points within one period. This will lead to deformation of the original signal shape.

5) *duty cycle precision*: With a PWM signal frequency of 100 kHz compared to an FPGA clock frequency of 100 MHz, the duty cycle resolution is limited to approximately 10 bits. This limitation can result in faulty shape reconstruction due to the calculated duty cycle falling between quantization steps. Employing an LSB dither approach, as utilized by Peterchev et al. in [15] and Ulrich in [16], could provide a solution to this challenge.

## IV. COMPARISON PRECALCULATION METHOD AND CLOSED-LOOP CONTROL METHOD

This section will give a comparison between open-loop precalculation method and a PI controlled closed-loop approach for the same reference signals as already given in fig. 12. Whereas fig. 13 gives insights in the observations on a real-world application stress test power electronics hardware application measurement setup.

### A. Precalculation method

* **advantages:**

This approach leads to a perfectly smooth (minor current ripple) and noise free current reconstruction. This results from the open-loop approach. Dynamic signal jumps like inrush currents due to load jumps could be reconstructed with high accuracy because of the "predictive" behavior of the precalculation. Furthermore, there is also no delay in the arising current signal (shown in fig. 13). This relates again to its "predictive" calculations for a suitable operation point of both inverter sides.

* **disadvantages:**

Due to all the uncertainties described in section III-G the signal magnitude can not be reconstructed with 100% accuracy. This can be seen in subplot 3 of fig. 13.

<figure><img src="image_15.png" /><figcaption>Fig. 13: Comparison of open-loop precalculation approach and closed-loop PI controller method</figcaption></figure>
## B. Closed-loop PI controlling method

* **advantages:**
This method leads to a nearly perfectly recreated magnitude of the reference signal.

* **disadvantages:**
There will be a phase shift (delay) compared to the reference signal. Resulting from the acquisition time of the measurement and propagation delay of the controlling algorithm. However, the PI parameter tuning is also a circuital factor which can lead to more phase shift or even a steady state error and a mismatch in the magnitude. Moreover, the PI controller has a limited dynamic depends on the computational power of the controlling system.

## V. CONCLUSION AND OUTLOOK

The control methods presented for the B2B-B6 bridge setup, featuring a coupling network, underscore the viability of an application-related stress test concept focused on circulating energy for the purpose of DUT reliability testing. The interconnected diagonal controlling concept with a closed-loop PI controller exhibits significant current ripple compared to the four-quadrant approach with synchronized but independent PWM duty cycles, highlighting the impact of control methodology on current behavior. Notably, the DUT side utilizes open-loop feed-forward control, while the LOAD side is controlled via a PI closed-loop system. However, the controlling effort remains consistent between the interconnected diagonal control and the four-quadrant approach.

The precalculation method, functioning as an open-loop approach that feeds forward the working points for both converter sides, presents challenges in the event of device parameter deviations. A hybrid approach integrating precalculation and PI controlling is identified as the optimal solution for reconstructing current mission profiles with precision.

A critical goal for further test plan development is the implementation of an initialization routine encompassing the automated parameter extraction of the circuit. This initiative aims to enhance electro-thermal stress replication for the DUT with increased precision.

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