# VLSI-SoC: Technology Advancement on SoC Design

Victor Grimblatt, Chip Hong Chang, Ricardo Reis, Anupam Chattopadhyay, Andrea Calimera

► To cite this version:

Victor Grimblatt, Chip Hong Chang, Ricardo Reis, Anupam Chattopadhyay, Andrea Calimera. VLSI-SoC: Technology Advancement on SoC Design. Springer Nature Switzerland, AICT-661, 2022, IFIP Advances in Information and Communication Technology, 978-3-031-16817-8. 10.1007/978-3-031-16818-5. hal-04419569

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Distributed under a Creative Commons Attribution 4.0 International License
Editor-in-Chief

Kai Rannenberg, Goethe University Frankfurt, Germany

Editorial Board Members

TC 1 – Foundations of Computer Science
Luís Soares Barbosa①, University of Minho, Braga, Portugal

TC 2 – Software: Theory and Practice
Michael Goedicke, University of Duisburg-Essen, Germany

TC 3 – Education
Arthur Tatnall①, Victoria University, Melbourne, Australia

TC 5 – Information Technology Applications
Erich J. Neuhold, University of Vienna, Austria

TC 6 – Communication Systems
Burkhard Stiller, University of Zurich, Zürich, Switzerland

TC 7 – System Modeling and Optimization
Fredi Tröltzsch, TU Berlin, Germany

TC 8 – Information Systems
Jan Pries-Heje, Roskilde University, Denmark

TC 9 – ICT and Society
David Kreps①, National University of Ireland, Galway, Ireland

TC 10 – Computer Systems Technology
Ricardo Reis①, Federal University of Rio Grande do Sul, Porto Alegre, Brazil

TC 11 – Security and Privacy Protection in Information Processing Systems
Steven Furnell①, Plymouth University, UK

TC 12 – Artificial Intelligence
Eunika Mercier-Laurent①, University of Reims Champagne-Ardenne, Reims, France

TC 13 – Human-Computer Interaction
Marco Winckler①, University of Nice Sophia Antipolis, France

TC 14 – Entertainment Computing
Rainer Malaka, University of Bremen, Germany
IFIP – The International Federation for Information Processing

IFIP was founded in 1960 under the auspices of UNESCO, following the first World Computer Congress held in Paris the previous year. A federation for societies working in information processing, IFIP's aim is two-fold: to support information processing in the countries of its members and to encourage technology transfer to developing nations. As its mission statement clearly states:

> IFIP is the global non-profit federation of societies of ICT professionals that aims at achieving a worldwide professional and socially responsible development and application of information and communication technologies.

IFIP is a non-profit-making organization, run almost solely by 2500 volunteers. It operates through a number of technical committees and working groups, which organize events and publications. IFIP's events range from large international open conferences to working conferences and local seminars.

The flagship event is the IFIP World Computer Congress, at which both invited and contributed papers are presented. Contributed papers are rigorously refereed and the rejection rate is high.

As with the Congress, participation in the open conferences is open to all and papers may be invited or submitted. Again, submitted papers are stringently refereed.

The working conferences are structured differently. They are usually run by a working group and attendance is generally smaller and occasionally by invitation only. Their purpose is to create an atmosphere conducive to innovation and development. Refereeing is also rigorous and papers are subjected to extensive group discussion.

Publications arising from IFIP events vary. The papers presented at the IFIP World Computer Congress and at open conferences are published as conference proceedings, while the results of the working conferences are often published as collections of selected and edited papers.

IFIP distinguishes three types of institutional membership: Country Representative Members, Members at Large, and Associate Members. The type of organization that can apply for membership is a wide variety and includes national or international societies of individual computer scientists/ICT professionals, associations or federations of such societies, government institutions/government related organizations, national or international research institutes or consortia, universities, academies of sciences, companies, national or international associations or federations of companies.

More information about this series at https://link.springer.com/bookseries/6102
Victor Grimblatt · Chip Hong Chang ·
Ricardo Reis · Anupam Chattopadhyay ·
Andrea Calimera (Eds.)

VLSI-SoC: Technology
Advancement on SoC Design

29th IFIP WG 10.5/IEEE International Conference
on Very Large Scale Integration, VLSI-SoC 2021
Singapore, October 4–8, 2021
Revised and Extended Selected Papers

<figure><img src="image_2.png" /></figure>

Springer
Editors

Victor Grimblatt

Synopsys Chile R&D Center

Vitacura, Chile

Ricardo Reis

Universidade Federal do Rio Grande do Sul
Porto Alegre, Brazil

Andrea Calimera

Politecnico di Torino

Turin, Italy

Chip Hong Chang

Nanyang Technological University

Singapore, Singapore

Anupam Chattopadhyay

Nanyang Technological University

Singapore, Singapore

ISSN 1868-4238

ISSN 1868-422X (electronic)

IFIP Advances in Information and Communication Technology

ISBN 978-3-031-16817-8

ISBN 978-3-031-16818-5 (eBook)

https://doi.org/10.1007/978-3-031-16818-5

© IFIP International Federation for Information Processing 2022

This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed.

The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use.

The publisher, the authors, and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, expressed or implied, with respect to the material contained herein or for any errors or omissions that may have been made. The publisher remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

This Springer imprint is published by the registered company Springer Nature Switzerland AG

The registered company address is: Gewerbestrasse 11, 6330 Cham, Switzerland
# Preface

This book contains extended and revised versions of the highest quality papers, presented during the 29th edition of the IFIP/IEEE WG 10.5 International Conference on Very Large Scale Integration (VLSI-SoC 2021), a global system-on-chip design and computer-aided design conference. The 29th edition of the conference was held during October 4–8, 2021, virtually from Singapore. Previous conferences have taken place in Edinburgh, Scotland (1981); Trondheim, Norway (1983); Tokyo, Japan (1985); Vancouver, Canada (1987); Munich, Germany (1989); Edinburgh, Scotland (1991); Grenoble, France (1993); Chiba, Japan (1995); Gramado, Brazil (1997); Lisbon, Portugal (1999); Montpellier, France (2001); Darmstadt, Germany (2003); Perth, Australia (2005); Nice, France (2006); Atlanta, GA, USA (2007); Rhodes, Greece (2008); Florianopolis, Brazil (2009); Madrid, Spain (2010); Kowloon, Hong Kong (2011); Santa Cruz, CA, USA (2012); Istanbul, Turkey (2013); Playa del Carmen, Mexico (2014); Daejeon, South Korea (2015); Tallin, Estonia (2016); Abu Dhabi, United Arab Emirates (2017); Verona, Italy (2018); Cuzco, Peru (2019); and Salt Lake City (2020, virtual edition).

The purpose of this conference, sponsored by IFIP TC 10 Working Group 10.5, the IEEE Council on Electronic Design Automation (CEDA), and the IEEE Circuits and Systems Society, with the In-Cooperation of ACM SIGDA, is to provide a forum for the presentation and discussion of the latest academic and industrial results and developments as well as the future trends in the field of system-on-chip (SoC) design, considering the challenges of nano-scale, state-of-the-art, and emerging manufacturing technologies. In particular, VLSI-SoC 2021 addressed cutting-edge research fields like emerging technologies, analog and mixed-signal circuits, VLSI and embedded system design, testing and verification, computer-aided design, design for security, reliable in-memory computing, secure hardware architectures, and cyber-physical systems on heterogeneous system-on-chips. The chapters of this new book in the VLSI-SoC series continue its tradition of providing an internationally acknowledged platform for scientific contributions and industrial progress in this field.

For VLSI-SoC 2021, 44 papers out of 75 submissions were selected for oral and poster presentations. There was an average of 3.45 reviews of each paper in the conference selection process and out of the 44 full papers presented at the conference, 12 papers were chosen by a special selection committee to have an extended and revised version included in this book. The selection process of these papers considered the evaluation scores during the conference review process as well as the review forms provided by members of the Technical Program Committee and the session chairs as a result of the presentations. After the authors sent their extended versions, the book co-editors reviewed the final papers.

The chapters of this book have authors from Canada, France, Italy, Germany, Singapore, and the USA. The Technical Program Committee for the regular tracks comprised 125 members from more than 25 countries.
VLSI-SoC 2021 was the culmination of the work of many dedicated volunteers: paper authors, reviewers, session chairs, invited speakers, and various committee chairs. We thank them all for their contributions.

This book is intended for the VLSI community at large, and in particular the many colleagues who did not have the chance to attend the conference. We hope you will enjoy reading this book and that you will find it useful in your professional life and for the development of the VLSI community as a whole.

August 2022

Victor Grimblatt

Chip Hong Chang

Ricardo Reis

Anupam Chattopadhyay

Andrea Calimera
## Organization

The IFIP/IEEE International Conference on Very Large Scale Integration System-on-Chip (VLSI-SoC) 2021 took place during October 4–8, 2021, virtually from Singapore. VLSI-SoC 2021 was the 29th in a series of international conferences, sponsored by IFIP TC 10 Working Group 10.5 (VLSI), IEEE CEDA, and ACM SIGDA. The Organization Committee of the conference consisted of the following colleagues:

### General Chairs

<table><tr><td>Anupam Chattopadhyay</td><td>NTU, Singapore</td></tr><tr><td>Andrea Calimera</td><td>Politecnico di Torino, Italy</td></tr></table>

### Technical Program Chairs

<table><tr><td>Chip Hong Chang</td><td>NTU, Singapore</td></tr><tr><td>Victor Grimblatt</td><td>Synopsys, Chile</td></tr></table>

### Special Sessions Chairs

<table><tr><td>Francesco Regazzoni</td><td>University of Amsterdam, The Netherlands, and Università della Svizzera italiana, Switzerland</td></tr><tr><td>Mohammed Sabry</td><td>NTU, Singapore</td></tr></table>

### PhD Forum Chairs

<table><tr><td>Shivam Bhasin</td><td>NTU, Singapore</td></tr><tr><td>Trevor Carlson</td><td>NUS, Singapore</td></tr></table>

### Local Chairs

<table><tr><td>Manimuthu Arunmozhi</td><td>NTU, Singapore</td></tr><tr><td>Nandeesh Veeranna</td><td>ST Microelectronics, Singapore</td></tr></table>

### Industrial Chair

<table><tr><td>Annamalai Muthu</td><td>CME Labs, Singapore</td></tr></table>

### Publicity Chairs

<table><tr><td>Swaroop Ghosh</td><td>Pennsylvania State University, USA</td></tr><tr><td>Shahar Kvatinsky</td><td>Technion, Israel</td></tr></table>
viii Organization

Farhad Merchant

Ian O'Connor

RWTH Aachen University, Germany

ECL, France

Publication Chair

Nicola Bombieri

University of Verona, Italy

Finance Chair

Debjyoti Bhattacharjee

IMEC, Belgium

Web Chairs

Valentino Peluso

Politecnico di Torino, Italy

Roberto G. Rizzo

Politecnico di Torino, Italy

VLSI-SoC Steering Committee

Graziano Pravadelli

University of Verona, Italy

Ibrahim Elfadel

Khalifa University, UAE

Manfred Glesner

TU Darmstadt, Germany

Matthew Guthaus

University of California, Santa Cruz, USA

Luis Miguel Silveira

INESC-ID, Portugal

Fatih Ugurdag

Ozyegin University, Turkey

Salvador Mir

TIMA, Université Grenoble Alpes, France

Ricardo Reis

Universidade Federal do Rio Grande do Sul, Brazil

Chi-Ying Tsui

Hong Kong University of Science and Technology, Hong Kong, China

Ian O'Connor

ECL, France

Masahiro Fujita

University of Tokyo, Japan

As for the technical program committee, it was composed as follows

Technical Program Committee

Analog, Mixed Signal, Sensors and RF

Track Chairs

Salvador Mir

TIMA, Université Grenoble Alpes, France

Ross Walker

University of Utah, USA

Track Members

Armin Tajalli

University of Utah, USA

Piero Malcovati

University of Pavia, Italy

Jacob Rosenstein

Brown University, USA
<table><tr><td>Marie-Minerve Louerat</td><td>Sorbonne University, France</td></tr><tr><td>Matthew Johnston</td><td>Sorbonne University, France</td></tr><tr><td>Krishna Vamshi</td><td>Renesas, India</td></tr><tr><td>Helmut Graeb</td><td>Technical University of Munich, Germany</td></tr><tr><td>Sylvain Bourdel</td><td>RFIC-Lab, Université Grenoble Alpes, France</td></tr><tr><td>Tetsuya Iizuka</td><td>University of Tokyo, Japan</td></tr><tr><td>Manuel Barragán</td><td>Université Grenoble Alpes, France</td></tr><tr><td>Sai Manoj</td><td>George Mason University, USA</td></tr><tr><td>Hossein Kassiri</td><td>York University, Canada</td></tr><tr><td>Zhangming Zhu</td><td>Xidian University, China</td></tr></table>

## VLSI Circuits and SoC Design

### Track Chairs

<table><tr><td>Ibrahim Elfadel</td><td>Khalifa University, UAE</td></tr><tr><td>Chun-Jen Tsai</td><td>National Chiao Tung University, Taiwan</td></tr></table>

### Track Members

<table><tr><td>Kenji Kise</td><td>Tokyo Institute of Technology, Japan</td></tr><tr><td>Yu-Hsin Chen</td><td>Facebook, USA</td></tr><tr><td>Christoph Studer</td><td>Cornell University, USA</td></tr><tr><td>Lirong Zheng</td><td>Fudan University, China</td></tr><tr><td>Mario R. Casu</td><td>Politecnico di Torino, Italy</td></tr><tr><td>Joo-Young Kim</td><td>Korea Advanced Institute of Science and Technology, South Korea</td></tr><tr><td>Hayden K. H. So</td><td>University of Hong Kong, Hong Kong, China</td></tr><tr><td>Maurizio Palesi</td><td>University of Catania, Italy</td></tr><tr><td>H. Fatih Ugurdag</td><td>Ozyegin University, Turkey</td></tr><tr><td>Adam Teman</td><td>Bar-Ilan University, Israel</td></tr><tr><td>Ozgur Tasdizen</td><td>ARM, UK</td></tr><tr><td>Sezer Gören</td><td>Yeditepe University, Turkey</td></tr><tr><td>Ali Akoglu</td><td>University of Arizona, USA</td></tr><tr><td>Peng Liu</td><td>Zhejiang University, China</td></tr><tr><td>Carlos Silva-Cárdenas</td><td>Pontificia Universidad Catolica del Peru, Peru</td></tr><tr><td>Vojin G. Oklobdzija</td><td>University of California, USA</td></tr><tr><td>Per Larsson-Edefors</td><td>Chalmers University of Technology, Sweden</td></tr><tr><td>Tolga Yalcin</td><td>Northern Arizona University, USA</td></tr></table>

## Embedded Systems Design and Software

### Track Chairs

<table><tr><td>Wei Zhang</td><td>Hong Kong University of Science and Technology, Hong Kong, China</td></tr><tr><td>Mohamed Sabry</td><td>Nanyang Technological University, Singapore</td></tr></table>
## Track Members

<table><tr><td>Ibrahim Elfadel</td><td>Khalifa University, UAE</td></tr><tr><td>Luc Claesen</td><td>Hasselt University, Belgium</td></tr><tr><td>Maciej Ogorzalek</td><td>Jagiellonian University, Poland</td></tr><tr><td>Giovanni Ansaloni</td><td>Swiss Federal Institute of Technology Lausanne, Switzerland</td></tr><tr><td>Donatella Sciuto</td><td>Politecnico di Milano, Italy</td></tr><tr><td>Dimitrios Soudris</td><td>National Technical University of Athens, Greece</td></tr><tr><td>Gianvito Urgese</td><td>Politecnico di Torino, Italy</td></tr><tr><td>Philippe Coussy</td><td>Université de Bretagne Sud, France</td></tr><tr><td>Lars Bauer</td><td>Karlsruhe Institute of Technology, Germany</td></tr><tr><td>Eugenio Villar</td><td>University of Cantabria, Spain</td></tr><tr><td>Wenjing Rao</td><td>University of Illinois at Chicago, USA</td></tr><tr><td>Domenico Balsamo</td><td>University of Newcastle, Australia</td></tr><tr><td>Sharad Sinha</td><td>Indian Institute of Technology Goa, India</td></tr></table>

## CAD Tools and Methodologies for Digital IC Design and Optimization

### Track Chairs

<table><tr><td>Ricardo Reis</td><td>Universidade Federal do Rio Grande do Sul, Brazil</td></tr><tr><td>Aida Todri-Sanial</td><td>LIRMM, University of Montpellier, CNRS, France</td></tr></table>

### Track Members

<table><tr><td>L. Miguel Silveira</td><td>Universidade de Lisboa, Portugal</td></tr><tr><td>Srinivas Katkoori</td><td>University of South Florida, USA</td></tr><tr><td>Shao-Yun Fang</td><td>National Taiwan University of Science and Technology, Taiwan</td></tr><tr><td>Azemard Nadine</td><td>University of Montpellier, France</td></tr><tr><td>Rongmei Chen</td><td>Interuniversity Microelectronics Centre, Belgium</td></tr><tr><td>Yuanqing Cheng</td><td>Beihang University, China</td></tr><tr><td>Vasilis Pavlidis</td><td>University of Manchester, UK</td></tr><tr><td>Tsung-Yi Ho</td><td>National Tsing Hua University, Taiwan</td></tr><tr><td>Xing Huang</td><td>Technical University of Munich, Germany</td></tr><tr><td>Daniele Pagliari</td><td>Politecnico di Torino, Italy</td></tr><tr><td>Stefania Carapezzi</td><td>University of Montpellier, France</td></tr><tr><td>Gracieli Posser</td><td>Cadence, USA</td></tr><tr><td>Laleh Behjat</td><td>University of Calgary, Canada</td></tr></table>

## Verification, Modeling and Prototyping

### Track Chairs

<table><tr><td>Graziano Pravadelli</td><td>Università di Verona, Italy</td></tr><tr><td>Yakir Vizel</td><td>Technion, Israel</td></tr></table>
## Track Members

<table><tr><td>Katell Morin-Allory</td><td>Université Grenoble Alpes, France</td></tr><tr><td>Tiziana Margaria</td><td>Lero, Ireland</td></tr><tr><td>Robert Wille</td><td>Johannes Kepler Universitat Linz, Austria</td></tr><tr><td>Tara Ghasempouri</td><td>Tallinn University of Technology, Estonia</td></tr><tr><td>Daniel Grosse</td><td>Johannes Kepler Universitat Linz, Austria</td></tr><tr><td>Doowon Lee</td><td>IBM, USA</td></tr><tr><td>Pierluigi Nuzzo</td><td>University of Southern California, USA</td></tr><tr><td>Vladimir Herdt</td><td>University of Bremen, Germany</td></tr><tr><td>Alexander Livri</td><td>IBM, Israel</td></tr><tr><td>Alessandro Cimatti</td><td>Fondazione Bruno Kessler, Italy</td></tr></table>

## Design for Testability, Reliability and Fault Tolerance

### Track Chairs

<table><tr><td>Matteo Sonza Reorda</td><td>Politecnico di Torino, Italy</td></tr><tr><td>Xinmiao Zhang</td><td>Ohio State University, USA</td></tr></table>

### Track Members

<table><tr><td>Alberto Bosio</td><td>Ecole Centrale de Lyon, France</td></tr><tr><td>Arnaud Virazel</td><td>University of Montpellier, France</td></tr><tr><td>Michele Portolan</td><td>Université Grenoble Alpes, France</td></tr><tr><td>Mottaqiallah Taouil</td><td>Delft University of Technology, The Netherlands</td></tr><tr><td>Tiago Balen</td><td>Universidade Federal do Rio Grande do Sul, Brazil</td></tr><tr><td>Maksim Jenihin</td><td>Tallinn University of Technology, Estonia</td></tr><tr><td>Gurgen Harutyunyan</td><td>Synopsys, Armenia</td></tr><tr><td>Nicola Nicolici</td><td>McMaster University, Canada</td></tr><tr><td>Leticia Bolzani Poehls</td><td>RWTH Aachen University, Germany</td></tr><tr><td>Chia Yee Ooi</td><td>Universiti Teknologi Malaysia, Malaysia</td></tr><tr><td>Xiaoqing Wen</td><td>Kyushu Institute of Technology, Japan</td></tr><tr><td>Sachin Sapatnekar</td><td>University of Minnesota, USA</td></tr><tr><td>Huawei Li</td><td>Institute of Computing Technology, Chinese Academy of Science, China</td></tr></table>

## Hardware Security

### Track Chairs

<table><tr><td>Yue Zheng</td><td>Nanyang Technological University, Singapore</td></tr><tr><td>Domenic Forte</td><td>University of Florida, USA</td></tr></table>

### Track Members

<table><tr><td>Rajat Chakraborty</td><td>IIT Kharagpur, India</td></tr><tr><td>Adib Nahiyan</td><td>Intel, USA</td></tr><tr><td>Xiaolin Xu</td><td>Northeastern University, USA</td></tr></table>
<table><tr><td>Gang Qu</td><td>University of Maryland, USA</td></tr><tr><td>Chester Rebeiro</td><td>IIT Madras, India</td></tr><tr><td>Sheng Wei</td><td>Rutgers University, USA</td></tr><tr><td>Tamzidul Hoque</td><td>University of Kansas, USA</td></tr><tr><td>Stjepan Picek</td><td>Delft University of Technology, The Netherlands</td></tr><tr><td>Xiaolu Hou</td><td>Nanyang Technological University, Singapore</td></tr><tr><td>Fan Zhang</td><td>Zhejiang University, China</td></tr><tr><td>Itamar Levi</td><td>Bar-Ilan University, Israel</td></tr><tr><td>Song Bian</td><td>Kyoto University, Japan</td></tr><tr><td>Ayesha Khalid</td><td>Queen's University Belfast, UK</td></tr><tr><td>Sujoy Sinha Roy</td><td>TU Graz, Austria</td></tr><tr><td>Youssef Souissi</td><td>Secure-IC, France</td></tr></table>

## Emerging Technologies and New Computing Paradigms

### Track Chairs

<table><tr><td>Leonel Sousa</td><td>Universidade de Lisboa, Portugal</td></tr><tr><td>Yang (Cindy) Yi</td><td>Virginia Tech, USA</td></tr></table>

### Track Members

<table><tr><td>Joseph Friedman</td><td>University of Texas at Dallas, USA</td></tr><tr><td>Sébastien Le Beux</td><td>Concordia University, USA</td></tr><tr><td>Alexandre Levisse</td><td>École Polytechnique Fédérale de Lausanne, Switzerland</td></tr><tr><td>Elena Ioana Vatajelu</td><td>TIMA, Université Grenoble Alpes, France</td></tr><tr><td>Walter Weber</td><td>TU Wien, Austria</td></tr><tr><td>Shigeru Yamashita</td><td>Ritsumeikan University, Japan</td></tr><tr><td>Zhaohao Wang</td><td>Beihang University, China</td></tr><tr><td>Jie Han</td><td>University of Alberta, Canada</td></tr><tr><td>Sorin Cotofana</td><td>Delft University of Technology, The Netherlands</td></tr><tr><td>Mohammad Mansour</td><td>American University of Beirut, Lebanon</td></tr><tr><td>Hongyu An</td><td>Michigan Technological University, USA</td></tr><tr><td>Cheng Zhuo</td><td>Zhejiang University, China</td></tr><tr><td>Xiang Chen</td><td>George Mason University, USA</td></tr></table>
Contents

<table>
  <tbody>
    <tr>
      <td>On the Efficiency of AdapTTA: An Adaptive Test-Time Augmentation Strategy for Reliable Embedded ConvNets<br>Luca Mocerino, Roberto G. Rizzo, Valentino Peluso, Andrea Calimera, and Enrico Macii</td>
      <td>1</td>
    </tr>
    <tr>
      <td>Low-Overhead Early-Stopping Policies for Efficient Random Forests Inference on Microcontrollers<br>Francesco Daghero, Alessio Burrello, Chen Xie, Luca Benini, Andrea Calimera, Enrico Macii, Massimo Poncino, and Daniele Jahier Pagliari</td>
      <td>25</td>
    </tr>
    <tr>
      <td>Transformative Hardware Design Following the Model-Driven Architecture Vision<br>Zhao Han, Gabriel Rutsch, Deyan Wang, Bowen Li, Sebastian Siegfried Prebeck, Daniela Sanchez Lopera, Keerthikumara Devarajegowda, and Wolfgang Ecker</td>
      <td>49</td>
    </tr>
    <tr>
      <td>Exploiting Program Slicing and Instruction Clusterization to Identify the Cause of Faulty Temporal Behaviours at System Level<br>Moreno Bragaglio, Samuele Germiniani, and Graziano Pravadelli</td>
      <td>71</td>
    </tr>
    <tr>
      <td>A DfT Strategy for Detecting Emerging Faults in RRAMs<br>Thiago Santos Copetti, Tobias Gemmeke, and Leticia Maria Bolzani Poehls</td>
      <td>93</td>
    </tr>
    <tr>
      <td>FMEA on Critical Systems: A Cross-Layer Approach Based on High-Level Models<br>Julie Roux, Katell Morin-Allory, Vincent Beroulle, Lilian Bossuet, Frederic Cezilly, Frederic Berthoz, Gilles Genevrier, Francois Cerisier, and Regis Leveugle</td>
      <td>113</td>
    </tr>
    <tr>
      <td>Design and Mitigation Techniques of Radiation Induced SEEs on Open-Source Embedded Static RAMs<br>Sarah Azimi, Corrado De Sio, Andrea Portaluri, and Luca Sterpone</td>
      <td>135</td>
    </tr>
    <tr>
      <td>Design of a Reconfigurable Optical Computing Architecture Using Phase Change Material<br>Parya Zolfaghari and Sébastien Le Beux</td>
      <td>155</td>
    </tr>
  </tbody>
</table>
<table><tr><td>END-TRUE: Emerging Nanotechnology-Based Double-Throughput True Random Number Generator</td><td>175</td></tr><tr><td>Shubham Rai, Nishant Gupta, Abhiroop Bhattacharjee, Ansh Rupani, Michael Raitza, Jens Trommer, Thomas Mikolajick, and Akash Kumar</td><td></td></tr><tr><td>A First Approach in Using Super-Steep-Subthreshold-Slope Field-Effect Transistors in Ultra-Low Power Analog Design</td><td>205</td></tr><tr><td>Matthieu Couriol, Patsy Cadareanu, Edouard Giacomin, and Pierre-Emmanuel Gaillardon</td><td></td></tr><tr><td>A Regulated Sensing Solution Based on a Self-reference Principle for PCM + OTS Memory Array</td><td>225</td></tr><tr><td>J. Gasquez, B. Giraud, P. Boivin, Y. Moustapha-Rabault, V. Della Marca, J. P. Walder, and J. M. Portal</td><td></td></tr><tr><td>An Improved Deterministic Stochastic MAC (SC-MAC) for High Power Efficiency Design</td><td>245</td></tr><tr><td>Ming Ming Wong, Lu Chen, and Anh Tuan Do</td><td></td></tr><tr><td>Author Index</td><td>267</td></tr></table>