Mechanical strain induced changes in electrical
characteristics of flexible, non-volatile ferroelectric
OFET based memory

Damien Thuau, Mamatimin Abbas, Guillaume Wantz, Lionel Hirsch, Isabelle

Dufour, Cédric Ayela

► To cite this version:

Damien Thuau, Mamatimin Abbas, Guillaume Wantz, Lionel Hirsch, Isabelle Dufour, et al. Mechani-cal strain induced changes in electrical characteristics of flexible, non-volatile ferroelectric OFET based memory. Organic Electronics, 2017, 40 (1), pp.30-35. 10.1016/j.orgel.2016.10.036. hal-01500136

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# Mechanical strain induced changes in electrical characteristics of flexible, non-volatile ferroelectric OFET based memory

Damien Thuau*, Mamatimin Abbas, Guillaume Wantz, Lionel Hirsch, Isabelle Dufour, Cédric Ayela**

Univ. Bordeaux, Laboratoire de l'Intégration du Matériau au Système, UMR 5218, ENSCBP, 16 avenue Pey Berland, 33607, Pessac Cedex, France

Investigation of mechanical strain on the electrical characteristics of ferroelectric OFET based memory is crucial for novel flexible printed circuit. In this regards, the effects of compressive and tensile strain applied in parallel, 45° angle and perpendicular to the semiconductor channel were studied showing critical consideration to be taken into account before designing flexible memories.

To meet the requirements of incessant demand for wearable integrated electronic products, organic semiconductors have been attracting ever increasing interests due to their low cost, me chanical flexibility and tailor made physical properties. To date, a number of organic based electronic devices with impressive per formances, such as organic field effect transistors (OFET), organic light emitting diodes (OLED) or solar cells, have been extensively reported [1-7]. In spite of these achievements, the realization of complete flexible electronic circuit requires the capacity of storing information. In this regards, tremendous efforts have been made towards developing flexible non volatile memory elements [8-13]. In particular, ferroelectric polymer, polyvinylidene fluoride (PVDF) and its copolymers trifluoroethylene (PVDF TrFE) are the most regarded organic ferroelectrics materials for ferroelectric organic field effect transistor (Fe OFET) based non volatile memory devices [14-18]. They exhibit attractive features such as large remnant polarization, excellent polarization stability, low resistive leakage and extremely fast switching time [19,20]. The working mechanism of a Fe OFET is based on a bi stable polarization of the ferroelectric

gate dielectric material. Depending on the orientation of the po larization, positive or negative charges can be accumulated at the semiconductor/gate dielectric interface, resulting in a variation of charge carrier density in the semiconducting channel of the tran sistor. The modulated drain current is then used to define two distinct memory states “0” and “1” corresponding to off (low) and on (high) $I_{DS}$ values. Although, efforts have been made to improve their electrical characteristics (operating voltage, on/off ratio, retention time, etc.), few challenges still remain. One of them is the stability of the electrical properties of the memory when subjected to mechanical deformation [21,22]. In fact, it is crucial to investigate the effect of mechanical strain induced by the bending on the electrical properties of ferroelectric OFETs for flexible memory applications. In the present work, we studied the impact of me chanical strain on the electrical characteristics of flexible ferro electric OFET based memory. These investigations provide useful insights related to mechanical consideration and expected perfor mances that should be taken into account before designing ferro electric memories for flexible electronics applications.

The Fe OFET based memory has a bottom gate, top contact structure fabricated on a 125 µm thick flexible polyethylene naphthalene (PEN) substrate as schematically illustrated in Fig. 1a. Initially, 80 nm thick Aluminum (Al) gate electrodes were deposited by electron beam evaporation on the cleaned substrates through a shadow mask. Subsequently, 2 µm thick P(VDF TrFE) copolymer

<footnote>* Corresponding author.</footnote>

<footnote>** Corresponding author.</footnote>

<footnote>E-mail addresses: damien.thuau@u-bordeaux.fr (D. Thuau), cedric.ayela@ubordeaux.fr (C. Ayela).</footnote>
<figure><img src="image_2.png" /><figcaption>**Fig. 1.** a) Schematic of the cross-section of the ferroelectric OFET based memory device; b) polarization versus electric field (P-E) hysteresis loop of the device (Au source/drain contacts were grounded). $P_r$, $P_r$ and $E_c$ are the spontaneous, remnant polarization and the electric coercive field respectively; inset: optical image of flexible ferroelectric memories.</figcaption></figure>

employed as gate dielectric layer was spin coated and tshermally cured at 140 °C for 2 h. A passivation layer of 50 nm thick of poly(1 vinyl 1,2,4 triazole) (PVT) was additionally deposited to passivate and smoothen the P(VDF TrFE) surface and thus minimize inter facial charge traps. Afterwards, dinaphtho [2,3 b:2,3 f] thieno [3,2 b] thiophene (DNTT), a p type organic semiconductor (O.S.C.) material was evaporated thermally at a pressure of $1.10^{-6}$ mbar. The film thickness and the deposition rate (0.6 nm min$^{-1}$) were monitored by a quartz crystal microbalance. Gold (Au) source and drain contacts were deposited by thermal evaporation through shadow mask. Channel length was 50 µm and width was 1 mm.

P(VDF TrFE) is classified as ferroelectric material which has two or more states with non zero polarization in the absence of electric field. These polarization states can also be switched from one to another by the application of an electric field leading to a hysteresis loop. Fig. 1b shows the polarization versus electric field (P-E) hysteresis loop between the bottom gate and top contact electrodes and the corresponding current. It was measured by applying a triangular voltage waveform with a frequency of 100 mHz between the gate and the grounded top contact electrodes. Here, a poling electric field (E) of 100 MV m$^{-1}$ was applied, corresponding to a gate voltage (VGS) of 200 V. The coercive fields (±E<sub>c</sub>) which refer to the minimum voltages required to reverse the ferroelectric polarization, determined as the intersections of the P-E loop with the electric field axis, were calculated to be ±45 MV m$^{-1}$. The remnant polarizations (±P<sub>r</sub>) were obtained from the intersections of the loop with the polarization axis and calculated to be approximately ± 4.8 µC cm$^{-2}$.

Afterwards, characterization of ferroelectric OFET prior and after different levels of electrical polarization was performed. Fig. 2a and b shows the transfer characteristics of the OFET in log and linear scales respectively. Depending on the direction of the polarization,

accumulation or depletion of charges carriers in the semiconductor layer at the semiconductor dielectric interface occurs due to the alignment of the dipole moments in the P(VDF TrFE) layer. This results in a positive or negative shift of the threshold voltage (V<sub>th</sub>) of the transistor and thus in a large hysteresis in its transfer characteristics (Fig. 2a and b). We believe that depolarization and charge injection are the main mechanisms behind such an electrical characteristic. As shown by Fig. 2c, five distinct non volatile memory states were achieved for electrical field sweep windows larger than the P-E hysteresis loop (Fig. 1b), namely 90 MV m$^{-1}$. Note that for E sweep window smaller than 2E<sub>c</sub>, hysteresis was almost insignificant due to too low electric field for electrical polarization. On the other hand, Fig. 2d compares the transfer characteristics of the transistor before and after electrical polarization at 100 MV m$^{-1}$ for 15 min. Initially, the device exhibits an on/off current ratio of approximately 10<sup>5</sup> and hole mobility of 7.10<sup>-2</sup> cm<sup>2</sup> V<sup>-1</sup> s<sup>-1</sup> without hysteresis in its transfer characteristics. A large dielectric thickness (2 µm thick of P(VDF TrFE) + 50 nm thick layer of PVT) led to high operating voltages. Obviously, such relatively high operating voltage can be remarkably decreased by reducing the thickness of the gate dielectric layer. [23,24] Once polarized, the transfer curve presents a large hysteresis with two distinct levels of I<sub>DS</sub> that remain after removing the gate voltage. These currents correspond to the “0” and “1” states of a non volatile memory with non destructive read out.

To gain further insights into the electrical polarization of the ferroelectric gate dielectric layer, the different arrangements of the hydrogen fluorine dipoles within the P(VDF TrFE) at specific electric field biases corresponding to the erasing, reading (off state), programming and reading (on state) are illustrated in Fig. 2e. Initially, at positive E, the transistor is off (state 1) since the hydrogen atoms are pointing towards the O.S.C. layer, hence no charge injection. Then, sweeping E from positive to negative values turns on the transistor where a rapid increase of I<sub>DS</sub> is observed due to hole injection in the O.S.C. layer (from -E<sub>c</sub> to state 3). When E returns to zero, I<sub>DS</sub> still remains high (state 4) due to remnant polarization maintaining the vertical alignment of the hydrogen fluorine dipoles with the fluorine atoms pointing towards the O.S.C. layer causing holes to be continuously injected. The subsequent application of positive E to the device gradually switched the dipole moments, decreasing effective field for charge injection (state 1). These results are promising when compared with recent state of the art research in ferroelectric based OFET memories [18–20].

Then, the reliability of the memory characteristics was investigated by running endurance cycles, which consist of programming reading erasing reading successive states (Fig. 3a). Programmed and erased states were reached by applying E of 100 MV m$^{-1}$ and +100 MV m$^{-1}$ respectively to the Fe OFET. Following this, reading on and off states were defined by measuring the drain current at E = 0 MV m$^{-1}$. The memory showed good charge retention characteristics with a repeatable on/off current ratio of almost 10<sup>4</sup> between the reading on and off states. The read write speed of memory devices, in other words the switching time be tween ON and OFF currents, correspond to the speed of polarization reversal in ferroelectric P(VDF TrFE). The normalized change in polarization can be expressed by: [25].

$$ \frac{\Delta P(t)}{2P_r} \quad 1 \quad \exp \left[ \left( \frac{t}{t_0} \right)^n \right] $$

Based on this formula, our flexible ferroelectric memory cells exhibit a switching time of 700 ms (Fig. 3b). Furthermore, their switching performances were characterized by applying 100 switching cycles between programming and erasing states to the
<figure><img src="image_3.png" /></figure>

<figure><img src="image_4.png" /></figure>

<figure><img src="image_5.png" /></figure>

<figure><img src="image_6.png" /></figure>

<figure><img src="image_7.png" /></figure>

<figure><img src="image_8.png" /><figcaption>**Fig. 2.** a) Transfer characteristics of the ferroelectric OFET prior and after different levels of electrical polarization (V<sub>DS</sub> -10 V); b) corresponding transfer characteristics in the linear scale which emphasis the shift of threshold voltages (V<sub>th</sub>); c) linear increase of the V<sub>th</sub> hysteresis window as a function of applied electric field showing the different levels of memory states obtained for electric field larger than the coercive fields (E<sub>c</sub>); d) transfer characteristics of a ferroelectric OFET before and after polarization. Black arrows show the V<sub>GS</sub> sweep direction. Numbers 1 to 4 correspond to four specific gate voltages (or equivalent electric field of the erasing, reading (off state), programming and reading (on state)); and e) operating mechanism of the electrical polarization of the ferroelectric gate dielectric layer and the different hydrogen-fluorine dipole arrangement as a function of applied electric field.</figcaption></figure>

memories (Fig. 3c). Interestingly, only a slight decrease of the on/off
current ratio, lower than a decade, was observed after 100 cycles
proving their good operating mechanism. In addition, their
endurance characteristics were investigated by recording I<sub>DS</sub> of
both on and off reading states as a function of time (Fig. 3d). The
presented memory showed two clear charge relaxation regimes
with an initial exponential fast decay followed by slow relaxation
(inset Fig. 3c in linear scale). We attributed the degraded data
retention to a slow depolarization of the ferroelectric gate dielectric
layer due to resistive losses in the dielectric layer. Initially, pro
gramming the memory by applying E 100 MV m<sup>-1</sup> leads to
spontaneous polarization of the P(VDF TrFE) that, in turn results in
an accumulation of holes in the DNTT semiconductor layer at the
interface with the PVT passivation layer. During reading at
E 0 MV m<sup>-1</sup>, the excess holes trapped are slowly de trapped with

time, thus diminishing the number of the aligned H F dipoles
within the P(VDF TrFE) as previously shown by state 2 in Fig. 2e.
The slow switching of the H F dipoles in the P(VDF TrFE) gate
dielectric induces a reduction of the conductance in the semi
conducting channel of the transistor and therefore a lower I<sub>DS</sub>.
Although depletion of holes in the semiconductor channel pro
gressively occurs with time, I<sub>DS</sub> levels in on and off states showed
over three orders of magnitude difference after 10<sup>3</sup> s, proving their
excellent retention characteristics.

In regard to flexible electronic applications, the stability of the
electrical characteristics of our memories under different strain
configurations was studied. Strain was applied by attaching the
flexible memories to various cylinders with different radii. Concave
and convex cylinders with radii from 5 mm to 50 mm were used to
apply compressive and tensile strain respectively as shown by the
<figure><img src="image_9.png" /><figcaption>**Fig. 3.** Reliability of the electrical characteristics of flexible ferroelectric OFET based memory; a) Endurance characteristics of the ferroelectric OFET memories under three cycles of programming-reading-erasing-reading; b) switching response time between off and on states; c) switching characteristics after 100 cycles of programming-erasing; and d) retention performances as a function of time for both reading on and off states.</figcaption></figure>

optical profilometry image in the inset of Fig. 4a. The applied strain was calculated using the following formula, $ε = h/2R$, where h is the thickness of the devices and R is the radius of curvature of the device, which in this case was the radius of the cylinder [26].

Initially, $I_{DS}$ in the reading on and off states (at $E = 0$ MV m$^{-1}$ and $V_{DS} = 10$ V) was recorded under flat condition and subsequently while attached to convex cylinder (tensile strain). Afterwards, $I_{DS}$ was re measured once more in flat condition before bending it concavely (compressive strain). We intentionally focused on drain current variations rather than changes of mobility since P(VDF TrFE) ferroelectric gate dielectric material is also piezoelectric and thus largely control the drain current variations in comparison to the low strain sensitivity DNTT semiconductor layer. $I_{DS}$ in on and off states was found to vary oppositely to applied strain (Fig. 4a). Such a surprising result can be explained by the piezoelectric nature of P(FVD TrFE). As shown in Fig. 4b, electrical polarization within the P(VDF TrFE) increases and decreases under tensile and compressive strain respectively. Consequently, for each of the two non zero polarization state (on state “1” and off state “0”), $I_{DS}$ varies oppositely and differently. In the case of applied negative gate bias, the positively charged hydrogen atoms point towards the gate while the negatively charged fluorine atoms are aligned in the direction of the organic semiconductor. If tensile strain is applied to the memory, the level of polarization increases and charges are accumulated at the semiconductor interface, increasing $I_{DS}$. In the case of applied positive gate bias, the hydrogen atoms point to wards the semiconductor preventing charge injection (off state). Under tensile strain, polarization increases, depleting further charge carrier at the semiconductor interface, therefore decreasing $I_{DS}$. On the other hand, when the memory is subject to compressive strain, $I_{DS}$ decreases for on state “1” and increases for off state “0”

due to opposite effects. These large $I_{DS}$ variations in both on and off states, consequently affect the on/off current ratio of the memories. Thus, for organic ferroelectric non volatile memories used for flexible electronics, the non negligible effect of mechanics on their electrical behavior should be considered to propose reliable memories. For instance, the number of memory states should be reduced when such memories are incorporated in flexible devices to prevent states overlap.

Another important aspect to be considered is the impact of the direction of strain on electrical behavior of the memories. Electrical characterization was performed in three different mechanical configurations where strain was applied in parallel, 45° angle and perpendicular to the semiconducting channel length. As shown in Fig. 4c, for 1.28% of applied tensile strain in parallel, 45° angle and perpendicular direction to the transistor channel, $I_{ON}$ increases by 971, 614 and 521%. Whereas, 1.28% of compressive strain decreases $I_{ON}$ by 86, 77 and 81% for the three different directions, which are major changes in current levels. Although smaller, increases of $I_{OFF}$ by 256, 111 and 53% and decreases by 78, 61 and 64% for compressive and tensile strain in parallel, 45° angle and perpendicular direction were observed (Fig. 4d). These results show that independently from the isotropic in plane piezoelectric effect, the direction of mechanical strain affects also the electrical response of the memories with a lower impact when strain is applied perpendicularly to the semi conducting channel.

In the present work, flexible non volatile memories were successfully fabricated. They exhibited on/off current ratio of $10^5$, good retention property after $3.10^3$ s as well as good endurance capability after 100 program/erase cycles. The organic memories were characterized when subjected to compressive and tensile strain in order to investigate their electrical stability under mechanical bending
<figure><img src="image_10.png" /><figcaption>**Fig. 4.** a) Drain current variations in on and off states as a function of applied compressive and tensile strain parallel to the semiconducting channel; inset: optical image of the flexible Fe-OFET attached onto a convex cylinder of 20 mm; and optical profilometry image of a flexible Fe-OFET attached onto a concave cylinder of 10 mm; b) schematic cross section of Fe-OFET in on and off state in flat state, and under compressive and tensile strain with the corresponding amplitude and orientation of dipole of the PVDF-TrFE gate dielectric layer; c) drain current variations (off state) as a function of applied strain in parallel, 45° angle and perpendicular to the semiconducting channel length direction; and d) drain current variations (on state) as a function of applied strain in parallel, 45° angle and perpendicular to the semiconducting channel length direction.</figcaption></figure>

strain. Although, the organic memories showed well operating behavior even under mechanical strain above 1%, the large varia- tions of drain current in both on ($\Delta I_{DS}/I_{DS}$ up to 971%) and off ($\Delta I_{DS}/ I_{DS}$ up to 256%) states highlight the importance of mechanical bending strain considerations on the design and electrical perfor- mances of organics memories for flexible electronics applications.

## Acknowledgements

This work was supported by the ANR Project PODCAST (ANR 12 JS03 0003) and Equipex ELORPrintTec (ANR 10 EQPX 28 01), part of IdEx Bordeaux (ANR 10 IDEX 03 02), that is, the Investisse- ments d'Avenir programme of the French government managed by the Agence Nationale de la Recherche.

Received: ((will be filled in by the editorial staff)).

Revised: ((will be filled in by the editorial staff)).

Published online: ((will be filled in by the editorial staff)).

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