# Toward Smart Probes for mmW On-Wafer Measurements: Advanced Packaging Using Laser Micromachining of Glass

Maya Alawar, Victor Fiorese, Sylvie Lépilliet, Daniel Gloria, Guillaume Ducournau, Emmanuel Dubois

► To cite this version:

Maya Alawar, Victor Fiorese, Sylvie Lépilliet, Daniel Gloria, Guillaume Ducournau, et al. Toward Smart Probes for mmW On-Wafer Measurements: Advanced Packaging Using Laser Micromachining of Glass. IEEE Transactions on Microwave Theory and Techniques, In press, 10.1109/TMTT.2025.3595651. hal-05214588

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# Toward Smart Probes for mmW On-Wafer Measurements: Advanced Packaging Using Laser Micromachining of Glass

Maya Alawar, *Graduate Student Member, IEEE*, Victor Fiorese, Sylvie Lépilliet, Daniel Gloria, Guillaume Ducournau, and Emmanuel Dubois

**Abstract**—This article introduces the development of ground-signal-ground (GSG) probes for on-wafer active measurements, fabricated using femtosecond laser micromachining with a resolution between 5 and 10 µm. The probes are made from a 100 µm-thick Schott AF32 glass substrate bonded to a 10 µm-thick nickel sheet, demonstrating enhanced mechanical durability and improved electrical performance. Nickel was selected for the tip contacts due to its superior mechanical hardness and electrical properties, which minimize contact resistance and extend probe lifespan. Mechanical testing showed that while glass-only probes failed at a contact force of 196 mN, nickel-glass probes withstood forces up to 667 mN. In addition, four-wire measurements confirmed low-resistance electrical contacts (0.05 Ω a above 6 mN) at a single contact point. Furthermore, this work introduces a glass interposer technology based on the same substrate material as the probe tips, enabling the integration of an amplified noise source (NS) based on 55 nm SiGe BiCMOS technology on a glass interposer. This approach mitigates dielectric and transition losses. Femtosecond laser micromachining was used to precisely structure the interconnects, allowing the NS to be integrated on the same substrate as the coplanar probing tips, thereby simplifying the signal propagation path. This system achieved a tunable available excess noise ratio (ENR)av level of up to 29 dB in the 140–170 GHz range, with constant output impedance matching better than –12 dB across the entire frequency band. Using the same glass carrier substrate enables the possibility of integrating the GSG probe tips with the NS chip into a smart active probe for on-wafer noise measurements.

**Index Terms**—Active probes, femtosecond laser micromachining, G-band, glass interposer, noise measurements, on-wafer probing, packaging, SiGe BiCMOS B55 nm.

## I. INTRODUCTION

WIRELESS communication technologies have been evolving into higher frequency regimes, leveraging wider data bandwidths and faster transmission speeds. This evolution is driven by applications such as artificial intelligence, Internet of Things (IoT), and other data-intensive innovations [1]. To meet the increasing demand for high data rate transmission, new technologies are being developed across the mmW, sub-mmW, and sub-THz frequency bands [2]. Historically, III-V semiconductors have been the preferred technology for mmW/sub-mmW applications [3], [4]. However, advances in silicon technologies are now enabling cost-effective solutions in the mmW and THz spectrum, suitable for mass-market applications, such as STMicroelectronics BiCMOS B55X technology [5], [6], which targets $f_T/f_{max}$ cutoff frequencies above 400 GHz, enabling the development of silicon circuits in the 140–220 GHz range (G-band).

To validate these advanced technologies, on-wafer microwave characterization methods are essential for extracting the key performance metrics of transistors, passive components and their associated parasitics. These on-wafer measurements, conducted before packaging, are critical during the design, manufacturing and testing phases. While commercial probes are now available for small-signal S-parameter measurements up to 1.1 THz, more complex measurements—particularly noise characterization at these frequencies—remain a challenge.

Broadband circuits, such as noise sources (NSs), noise receivers and impedance tuners, are very incompletely covered by the market offer to meet this demand. Even more restrictively, very compact technological solutions that could be integrated into a smart probe—while delivering a sufficiently high and flat excess noise ratio (ENR) in frequency—are absent from the instrumental offer.

In this context, photonic solutions based on photo-mixing in uni-traveling-carrier photodiodes (UTC-PDs) [7], [8], and photoconductive antennas (PCAs) [9] are excluded from consideration. These systems, while capable of operating at high frequencies, are generally bulky, require complex optical

This work was supported in part by the French Government through France 2030 Plan, in part by European Union (EU) Next Generation EU through “France Relance” Plan and the Important Projects of Common European Interest (IPCEI) Microelectronics (ME) Communication and Technology (CT) Initiative, in part by the STMicroelectronics-Institute of Electronics, Microelectronics and Nanotechnology (IEMN) Joint Laboratory, in part by the French Government under the National Research Agency (ANR) through Program PIA EQUIPEX LEAF under Grant ANR-11-EQPX-0025, and in part by the French RENATECH Network on Micro and Nanotechnologies.

Maya Alawar and Emmanuel Dubois are with CNRS, University of Polytechnique Hauts de France, JUNIA, UMR 8520-IEMN, University of Lille, 59000 Lille, France (e-mail: maya.alawar@univ-lille.fr; emmanuel.dubois@univ-lille.fr).

Victor Fiorese is with STMicroelectronics, 38019 Grenoble, France (e-mail: victor.fiorese1@st.com).

Sylvie Lépilliet and Guillaume Ducournau are with CNRS, University of Polytechnique Hauts de France, UMR 8520-IEMN, University of Lille, 59000 Lille, France (e-mail: sylvie.lepilliet@univ-lille.fr; guillaume.ducournau@univ-lille.fr).

Daniel Gloria is with STMicroelectronics, 38920 Crolles, France (e-mail: daniel.gloria@st.com).
<figure><img src="image_2.png" /><figcaption>Fig. 1. Block diagram of the in situ noise measurement bench in the D-band (adapted from [10]).</figcaption></figure>

setups, and are not designed for integration into compact measurement systems.

Earlier research demonstrated the feasibility of embedding measurement functions directly on-wafer in BiCMOS B55 technology. However, this in situ approach, also referred to as built-in self-testing (BIST) [10], has certain limitations, particularly in terms of the silicon surface allocated to the test circuits alone and also because embedded BIST instrumentation cannot be used for another technology. This concept is elaborated in Fig. 1, where the NS, provided by the ELVA-1 supplier, is off-wafer, while the low noise amplifier (LNA) and the tuner are monolithically co-integrated with the device under test (DUT).

To leverage the measurement instrumentation for a range of technologies beyond the B55 process and to rationalize testing costs, the main objective of this work is to envision the integration of these functions into a compact system. This system is positioned as closely as possible to the measurement probe tips for ex-situ measurements, functioning as an active probe. Such a concept has been previously investigated in [11], where it was implemented using directional couplers, frequency converters, and harmonic mixers, within a probe dedicated to on-wafer S-parameter measurements of mmW integrated circuits (ICs) within the 70 to 230 GHz frequency range. These innovative efforts, although not resulting in commercial products, significantly contributed to the understanding and development of alternative wafer probe technologies. Further research [12] has emphasized the importance of accurate on-wafer characterization, particularly for SiGe technologies, and highlighted the limitations of existing calibration techniques up to 500 GHz. Beyond these frequencies, calibration becomes increasingly critical to ensure measurement accuracy. To the best of the author's knowledge, there are no other approaches that specifically target the design of active probes dedicated to on-wafer measurements for high-frequency applications. In a groundbreaking initiative, an amplified NS based on a SiGe BiCMOS 55-nm technology, operating between 140 and 220 GHz, has been successfully fabricated, packaged and measured in [13] and [14]. When directly measured on-wafer, i.e., before packaging, this NS generates a tunable available ENR<sub>av</sub>) level up to 37 dB in the 140–170 GHz range [15] and up to 25 dB when the same NS is packaged in a split-block with WR5.1 flange termination [14]. This results in an additional loss of 12 dB in the packaged configuration. The NS is based on an integrated diode structure operating

in the avalanche regime, which was previously developed and characterized in the 130–260 GHz frequency range [16], and for which an electrical model has also been presented up to 325 GHz [17].

This article broadens the applicability of measurement instrumentation beyond the B55X process and aims to reduce testing costs by transitioning from BIST to smart probes. This new approach focuses on integrating measurement functions into a compact system placed as close as possible to the measurement probe tips for ex-situ measurements.

Section II gives an overview of prior developments of the integrated NS based on SiGe BiCMOS B55 technology, including a description of the functional package. It then details the noise measurement results, first covering on-wafer measurements in the D-band before packaging, followed by noise measurements of the packaged configuration in the G-band. Section III focuses on the design, fabrication, and packaging of ground-signal-ground (GSG) probe tips based on a glass substrate, a material recognized for offering superior electrical and mechanical characteristics compared to silicon [18], [19] or organic substrates/interposers [20], [21], [22], [23]. Building on the same low-loss dielectric glass substrate technology, Section IV explores the fabrication of a glass interposer supporting an amplified NS chip in BiCMOS B55X technology, mainly to validate the functionality of the NS chip on glass before considering its integration with the probe tips. Section V presents the validation of micromachined GSG tips designed for high-frequency on-wafer probing, assessing both their mechanical robustness and electrical performance. Section VI details the on-wafer measurement validation of a G-band amplified NS integrated on a glass interposer, comparing its performance with commercial and silicon-based NSs operating beyond 140 GHz. Finally, Section VII concludes the study by summarizing key findings and outlining future research prospects.

## II. G-BAND PACKAGED AMPLIFIED NS BASED ON SiGe BiCMOS 55 NM TECHNOLOGY

As a foundational step toward developing a fully integrated noise probe system, this section presents the previously developed amplified NS based on SiGe BiCMOS B55 technology [14], including its packaged configuration and ENR performance in both on-wafer and packaged states.

### A. *Description of the Packaged NS Version*

The substrate hosting the semiconductor chip was a six-layer metallic organic substrate stack compatible in routing both the RF signal and dc biases, as outlined in [14]. Since the packaging of the NS is designed for ex-situ use (off-wafer), the NS chip is outcoupled to a rectangular waveguide probe. The NS substrate was packaged into a two-parts mechanical split-block fabricated using a classical computer numerical control (CNC) machining process in a brass alloy with gold plating on the surface to mitigate propagation losses of the mmW signal. The split-block package features a WR5 mmW flange termination, allowing interconnection with an external mmW probe or packaged DUT, as shown in Fig. 2.
<figure><img src="image_3.png" /><figcaption>Fig. 2. (a) Split-block package of the amplified NS. (b) Opened split-block package after assembly and tightening of an organic substrate, showing the RF and dc bias access to the chip [14].</figcaption></figure>

The transition of propagation mode from the suspended stripline integrated on the substrate to the hollow rectangular WR5 waveguide is achieved through an *E*-plane probe, which was previously optimized for performance in G-band [24]. Such a transition provides efficient coupling between planar transmission lines and waveguides [25].

## B. On-Wafer and at Packaged Output ENR Extraction

The characterization of the NS was conducted in two distinct configurations, namely, on-wafer [15] and at the output of the NS package [14]. On-wafer measurements of the amplified NS revealed a maximum ENR<sub>av</sub> level of about 37 dB within the 140–170 GHz range [Fig. 3(a)]. This was followed by G-band measurements at the WR5.1 termination of the package output, resulting in ENR<sub>av</sub> level up to 25 dB [Fig. 3(b)], thus highlighting a loss level of about 12 dB in the packaged configuration.

To address these losses, the next development step focuses on integrating the amplified NS as close as possible to the measurement tips of the GSG probe. This integration aims to significantly reduce the signal propagation path by allowing the NS to be integrated on a glass substrate, which is the same substrate used for manufacturing the coplanar probing tips. The choice of glass substrate further supports the goal of minimizing losses.

## III. DEVELOPMENT OF MICROMACHINED GSG PROBE FOR ON-WAFER MEASUREMENTS

Building upon the packaged NS validation presented in Section II, this section details the design and fabrication processes aimed at realizing a mechanically robust and electrically optimized GSG probe tip. This development forms a critical step toward the future integration with the active NS chip.

<figure><img src="image_4.png" /><figcaption>Fig. 3. Extracted ENR<sub>av</sub> (dB) of the amplified NS. (a) On-wafer noise measurements within the 140–170 GHz frequency range [15] and (b) at the package output in G-band [14].</figcaption></figure>

The design for the probe tips utilizes a CPW structure to form the GSG tips with a 100 µm pitch. The probe material, based on a thin dielectric glass (Schott AF32 [26]), is selected to offer two key advantages: it ensures robustness, allowing sufficient force to minimize contact resistance, and it reduces substrate spurious modes and associated losses. This design comprises a 100 µm-thick AF32 glass substrate, a signal track width of 60 µm, and a spacing of 20 µm with respect to the ground track. The contact metallization for the tip material must be robust enough to withstand repeated measurements. A 10 µm-thick nickel film was therefore selected for the CPW and the termination tip contacts due to its high hardness and good electrical properties, which should enhance tip robustness and reduce contact resistance, as reported in the literature [27]. Using nickel sheets of 10 µm thickness or more not only aligns with the design standards but also ensures effective probe performance. The adopted methodology for fabricating the composite nickel-glass probe involves bonding nickel and glass using a wafer bonding technique based on thermocompression. Before wafer bonding, it was imperative to deposit a gold layer (100 nm Ti/500 nm Au) on both the glass substrate and the nickel sheet to enable gold-to-gold bonding [28], [29], [30]).

Femtosecond laser micromachining was then used to fabricate the probe tips and the two steel layers, which provide mechanical support for the overall structure. The probe substrate is clamped between these steel plates to ensure stability.
<figure><img src="image_5.png" /><figcaption>Fig. 4. (a) Fabricated probe stack layers, including nickel-glass and steel. (b) Optical observations of the assembled probe, where the steel plates not only provide mechanical support but also serve as a mounting interface for the probe micro-manipulator. Two 30 µm-thick glass spacer layers isolate the probe from the steel plates.</figcaption></figure>

<figure><img src="image_6.png" /><figcaption>Fig. 5. Laser micromachining of the Nickel-Glass GSG probe tips. (a) Laser process definition of the probe tips with a 3-D side view. (b) Optical microscope observations of the machined GSG probe tips.</figcaption></figure>

The fabrication process was carried out under a green beam line (515 nm) with an average power $P_{av} = 5.5$ W at 200 kHz. Fig. 4(a) shows the fabricated probe layers before assembly, while Fig. 4(b) presents the fully assembled structure, which also inserts two 30 µm-thick AF32 glass spacer layers to electrically isolate the nickel-glass probes from the supporting plates.

In the probe development considered in this work, nickel is not only used for the probe contact tips but also for the entire transmission line, with a thickness of nearly 10 µm. To ensure a reliable contact between the nickel probe tips and the DUT pads, precise dimensions for the probe contacts must be achieved. This involves maintaining the nickel thickness at 10 µm at the probe contact tips while partially removing the nickel from the extended portion of the probe. The partial thinning creates a claw-like shape at the probe tips, which improves the trace mark realization when landing on the DUT pads.

This process is illustrated in Fig. 5, where laser paths were first defined for partial milling to remove a few microns of nickel, followed by further laser ablation to form the probe tips, and finally, cutting the probe through the glass substrate. Partial ablation was achieved by reducing the frequency to 5 kHz at 1% power, resulting in the removal of 4 µm of nickel after four beam scans.

Before delving into the integration of the active NS chip onto the probe substrate with integrated coplanar tips to perform on-wafer noise measurements, it is first required to validate the integration and functioning of the chip on a glass substrate from which the probe is cut and detached.

## IV. GLASS INTERPOSER TECHNOLOGY FOR THE INTEGRATION OF THE AMPLIFIED NS BASED ON SiGe BICMOS TECHNOLOGY

This section presents the development of a novel interposer technology based on a glass AF32 substrate for the integration of the amplified NS based on SiGe BICMOS technology. The functionality of the NS on the interposer was validated independently to ensure its standalone performance, before realizing the final integration with the probe.

### A. Glass Interposer Fabrication

The fabrication of the glass AF32 interposer begins with the design of a 50 Ω grounded coplanar waveguide (GCPW) line that transitions to a pad, facilitating RF signal routing to the chip. To define the chip interconnects, including the pad ring, CPW and dc routing lines, femtosecond laser micromachining is employed on a 50 µm-thick glass substrate coated with a 1 µm gold overlayer. An optical microscope image of the machined interposer is shown in Fig. 6, illustrating the precision achieved through careful optimization of laser processing parameters such as average laser power, pulse frequency, scan speed, and beamwidth.

### B. Pick and Place Assembly of the NS Chip on the Interposer

The NS chip is assembled onto the glass interposer using semi-automatic pick-and-place equipment. The interconnect structure of the NS chip consists of copper pillars covered by tin-silver (SnAg) balls, which have a melting point of 221 °C [31]. This feature makes it possible to implement flip-chip thermocompression during assembly. However, unlike
<figure><img src="image_7.png" /><figcaption>Fig. 6. Optical microscope observation of the micromachined interposer, highlighting its pad ring, RF, and dc interconnects. (a) Front face of the interposer. (b) Back face of the interposer.</figcaption></figure>

<figure><img src="image_8.png" /><figcaption>Fig. 7. Side-view images illustrate the interposer and NS chip during assembly, (a) depicting placement positioning and (b) tool removal, and (c) alongside an optical microscope image of the assembled NS chip on a glass interposer [32].</figcaption></figure>

conventional methods, the NS chip is positioned upside down on the hot plate, while the interposer is flipped, picked up, and placed over the chip, as shown in Fig. 7(a) and (b).

This unique approach, combined with the transparency of glass, enables the direct alignment using the same top camera. Alignment was carried out on the pads of the interposer back

<figure><img src="image_9.png" /><figcaption>Fig. 8. Definition of the experimental set-up used to apply a vertical overtravel displacement to the mmW measurement probe.</figcaption></figure>

face for the pick-up step and on the solder balls of the chip for the placement step. Following the bonding process, the assembly is examined through optical microscopy, as shown in Fig. 7(c).

## V. MICROMACHINED GSG PROBE MEASUREMENT VALIDATION

The developed micromachined GSG probe comprises a glass AF32 substrate clamped between steel support plates and assembled on an inclined mounting block at a 30° probing angle. This section evaluates its mechanical and electrical performance to ensure sufficient contact force for low-resistance on-wafer measurements.

### A. GSG Probe Mechanical Characterization

The mechanical behavior of probe structures during wafer contact has been previously investigated using load cell-based setups to quantify the applied contact force, often approximated as a linear spring response [18], [19], [33].

Building on this approach, the mechanical test setup, shown in Fig. 8, includes the probe assembly secured to a block, which is mounted on a Standa translation stage. This stage, driven by a dc motor, enables z-axis movement with 1 µm resolution and is software-controlled. A micro-scale beneath the probe measures the contact force when the probe makes contact with a silicon substrate fixed to the scale.

The maximum forces recorded before failure for the probes shown in Fig. 9, were 74 mN for the 50 µm glass probe, 196 mN for the 100 µm glass probe, and 667 mN for the 100 µm nickel-glass probe. The 100 µm-thick Schott AF32 glass probes bonded with a 10 µm-thick nickel sheet showed greater mechanical durability compared to the glass-only probes due to their laminated composite structure, resulting in an extended probe robustness.

Three-dimensional mechanical simulations were also conducted using COMSOL multiphysics for the simplified case of a probe structured in a 100 µm-thick AF32 glass substrate, without the nickel overlayer, as shown in Fig. 10(a). The mechanical stress on the upper and lower parts of the probe corresponds, respectively, to states of compression and tension relative to the neutral fiber (zero stress) at mid-thickness. The
<figure><img src="image_10.png" /><figcaption>Fig. 9. Optical observations of the different probe configurations. (a) 50 µm glass, (b) 100 µm glass, and (c) 100 µm-thick glass probe bonded to a 10 µm-thick nickel sheet.</figcaption></figure>

<figure><img src="image_11.png" /><figcaption>Fig. 10. 3-D COMSOL simulation of probe deformation assessing von Mises yield stress for a 100 µm vertical overtravel. (a) 100 µm-thick AF32 glass monolayer and (b) bilayer probe with a top 100 µm AF32 glass and a bottom 10 µm nickel coplanar guide [36].</figcaption></figure>

von Mises yield stress peaks at 1.6 GPa, which may turn out to be higher than the yield stress of glass. Indeed, while the glass is expected to have a theoretical tensile strength of around 5 to 17 GPa, defects and imperfections in the microstructure make the glass sensitive to external tensile forces, resulting in fracture failure and significantly reducing the flexural tensile strength to around 30 to 80 MPa [34]. However, Fig. 10(b) shows the more realistic case of a probe comprising a bilayer composed of a 100 µm-thick AF32 glass substrate and a 10 µm-thick nickel layer structured as a coplanar guide. At this point, it is important to note that the Young's modulus of nickel is ~207 GPa, i.e., 2.76× that of AF32 glass (74.8 GPa).

<figure><img src="image_12.png" /><figcaption>Fig. 11. Diagram illustrating the conducted contact resistance measurement for a single probe tip between the probe and the silicon substrate.</figcaption></figure>

<figure><img src="image_13.png" /><figcaption>Fig. 12. Measurement of the contact resistance at a single probe tip, showing $R_{\_SingleTip}$ and $R_{\_de embedded}$ plotted against the contact force of the probe [36].</figcaption></figure>

This contrast in Young's modulus between the constituent strata of the bilayer has the effect of displacing the stress build-up in the nickel layer [35], thereby protecting the glass substrate from failure. Even if the von Mises yield stress is globally higher in the latter case than in the case of a single glass substrate, the robustness of the measurement probe is therefore improved.

## B. GSG Probe Contact Resistance

Electrical characterization to measure the contact resistance at the probe tip when it touches the DUT is conducted using a four-wire measurement setup using an Agilent 4155C semiconductor parameter analyzer.

Similarly to [18], the measurement methodology for measuring contact resistance between a single probe tip and a silicon substrate covered by a 1 µm-thick gold layer is based on the four-wire technique. To facilitate such measurements, a 2 × 2 mm pad connected to the central probe tip is incorporated into the probe design. This allows for the necessary current source and high impedance voltmeter to be connected between the probe tip and the silicon substrate, as shown in Fig. 11.

The contact resistance at a single probe tip is extracted from the measurements performed at various contact forces, with the relation between the measured voltage and the current through the probe tips plotted as $R_{\_SingleTip}$ in Fig. 12. However, to extract the contact resistance only, the resistance due to the probe central tip track, which has a width $W = 58$ µm,
length L = 2 mm, and thickness t = 10 µm, must be subtracted.

The resistance of the track ($R_{track}$) is calculated using the following equation:

$$R_{track} = \frac{\rho_{Ni} \times L}{W \times t} \quad (1)$$

with $\rho_{Ni} = 6.84 \times 10^{-6}$ Ω.cm, the resistivity of a nickel sheet.

Therefore, the contact resistance $R_{contact}$ induced at a single tip is plotted as $R_{deਬed}$ on the same graph of the $R_{singleTip}$ presented in Fig. 12, which is obtained using the following equation:

$$R_{contact} = R_{deਬed} = R_{SingleTip} - R_{track}. \quad (2)$$

The results show that a contact resistance of 0.06 Ω is achieved at a contact force of 6 mN, increasing slightly to 0.07 Ω at 22 mN. However, the resistance decreases with additional force, reaching 0.043 Ω at 196 mN. Testing was not continued beyond this point, even though the probe can withstand higher forces, with failure occurring at 667 mN.

## VI. MEASUREMENT VALIDATION OF THE INTEGRATED AMPLIFIED NS ON GLASS INTERPOSER

This section presents the validation of the amplified NS chip assembled on a glass interposer, confirming its functionality and performance. This successful assessment opens the possibility of integrating the NS with the probe to perform active on-wafer noise measurements in the G-band.

### A. S-Parameter Measurements

Before noise measurements, one-port S-parameters measurements were conducted to characterize the amplified NS chip integrated onto the glass interposer, using a Rohde & Schwarz VNA with G-band extension heads (ZC220 model). The setup proposed in Fig. 13(a) implements a GSG RF probe connected to the CPW line of the glass interposer and an 11-pin GSGSGSGSGSG-configured dc probe positioned on the interposer pads to bias the NS chip. This setup allows characterization of the output matching of the amplified NS integrated on the glass interposer under several dc bias conditions, ranging from 1 to 18 mA with a collector supply voltage of 3 V and base voltages of 1 and 2.2 V for the two-stage AMP [14].

The output matching impedance of the amplified NS on the interposer is plotted in Fig. 13(b), and provides a direct comparison with $S_{22}$ of the NS measured on-wafer [15], and with $S_{22}$ measured at the packaged output [13]. The S-parameters measurements of the amplified NS on the glass interposer demonstrate a constant output matching, better than -12 dB, across the entire frequency range.

Verifying the output matching of the amplified NS integrated onto the glass interposer is essential, as it plays a key role in accurately extracting the ENR level. One significant factor is that the output matching must remain stable, regardless of the NS biasing condition. This stability is critical for

ensuring the accuracy of noise measurements when using the two-temperature method (also known as the Y-factor method), as it helps to minimize errors caused by standing wave losses between the NS and the component to characterize.

Moreover, CPW losses were determined by introducing a short circuit on a dedicated substrate without the integrated

<figure><img src="image_14.png" /></figure>

<figure><img src="image_15.png" /><figcaption>Fig. 13. (a) One-port G-band S-parameters test setup for on-glass measurements. (b) Comparison of the output matching ($S_{22}$) of the NS_LNA on the interposer, measured under various dc bias conditions (from 1 to 18 mA) [32], with previous measurements conducted on-wafer [15] and at the packaged output [13], [14].</figcaption></figure>

<figure><img src="image_16.png" /><figcaption>Fig. 14. (a) Micromachined glass interposer substrate with a short circuit at the CPW line. (b) Return loss (dB) measurements of the shorted structure and extraction of CPW IL [32].</figcaption></figure>
<figure><img src="image_17.png" /><figcaption>Fig. 15. Block diagram of the setup used to perform the ENR extraction at on-interposer plane (a) and off-wafer plane (b) after noise power measurements of the amplified NS were conducted at the input plane of the noise figure meter NFM (c) [37].</figcaption></figure>

<figure><img src="image_18.png" /><figcaption>Fig. 16. Schematic representation of the Noise RCV bench setups operating within the frequency bands of (a) 140–170 GHz and (b) 170–220 GHz [36].</figcaption></figure>

chip. This was achieved by micromachining the RF line to the adjacent ground using a femtosecond laser, as shown in Fig. 14(a). One-port S-parameter measurements were then conducted, allowing the extraction of CPW insertion loss (IL) [Fig. 14(b)], calculated from the measured return loss of the shorted structure [RL<sub>Short</sub> (dB)] as reported in the following equation:

$$IL_{\text{CPW}} (\text{dB}) = \left| \frac{\text{RL}_{\text{Short}} (\text{dB})}{2} \right|. \quad (3)$$

The CPW IL have been estimated to be 2 dB on average over the G-band.

## B. On-Interposer Noise Measurements

1) ENR Extraction Methodology: The block diagram, developed in [37] of the setup used to perform on- and off-wafer ENR extraction at several planes A, B and C, is shown in Fig. 15.

The goal of the characterization followed in this section is to extract the available ENR (ENR<sub>av</sub>) of the NS at the RF contact pad level in plane A. For these measurements, the same dc current bias conditions used in the earlier S-parameter tests were applied. Noise power measurements were conducted in both hot and cold states. The effective noise power was measured across various NS current bias conditions and converted to available noise power at the input plane B of the Noise RCV. The characterization was conducted using two different Noise RCVs, covering the frequency bands of 140–170 GHz and 170–220 GHz, illustrated in Fig. 16. For the 140–170 GHz setup, key components included an RPG WF 110–170 isolator (ISO), a Marki A2050 AMP, and a Tron-tech S82901 LNA. For the 170–220 GHz setup, components included a SAGE Millimeter STF-04-M1 ISO, an RF-Lambda RAMPOOM50GA AMP, and an MC2 STF-01-M1 LNA. Both setups featured a VDI subharmonic mixer. The noise factors (F<sub>RCV</sub>) of these receivers had been characterized in previous work using the Y-factor method [37]. The methodology for extracting ENR can be outlined in four key steps.

First, the available ENR at the probe input plane A, referred to as ENR<sub>A,av</sub>, is calculated by determining the noise power at plane B using the effective hot noise temperature T<sub>HOT</sub><sup>B,eff</sup> when the diode is biased.

The noise receiver temperature T<sub>RCV</sub> is deduced from the measured noise factor F<sub>RCV</sub>, as presented in the equation below, and provides the calculation of T<sub>HOT</sub><sup>B,eff</sup>

$$T_{\text{RCV}} = T_0 (F_{\text{RCV}} - 1) \quad (4)$$

where T<sub>0</sub> = 290 K represents the standard temperature. As applied in previous work, the following equalities are set, T<sub>COLD</sub> = T<sub>A</sub> = T<sub>0</sub>, where T<sub>COLD</sub> represents the equivalent noise temperature of the NS when both the NS and the AMP are unbiased and assumed to be equal to the physical ambient temperature T<sub>A</sub>. Using the NS in low and high state, the Y-factor is defined as follows:

$$Y = \frac{P_{\text{HOT}}}{P_{\text{COLD}}} \quad (5)$$

where P<sub>HOT</sub> refers to the ON-state when the diode is biased in its avalanche regime, and P<sub>COLD</sub> refers to the OFF-state when the diode is unbiased. Then T<sub>HOT</sub><sup>B,eff</sup> of the receiver is given by the following equation:

$$T_{\text{HOT}}^{\text{B,eff}} = T_{\text{RCV}} \times (Y - 1) + Y \times \frac{T_{\text{COLD}}}{M} \quad (6)$$

where M is the impedance mismatch coefficient between the amplified NS on the glass interposer and the Noise RCV. It is applied to account for mismatches and perform the transformation from effective to available values. Since the NRCV includes an ISO at its input, it can be considered a 50 Ω load. The mismatch coefficient M is given by the following equation:

$$M = \frac{1 - \left| \Gamma_{\text{OUT}}^{\text{probe}} \times \Gamma_{\text{IN}}^{\text{RCV}} \right|^2}{\left(1 - \left| \Gamma_{\text{OUT}}^{\text{probe}} \right|^2\right) \times \left(1 - \left| \Gamma_{\text{IN}}^{\text{RCV}} \right|^2\right)}. \quad (7)$$
<table><caption>TABLE I
STATE OF THE ART OF COMMERCIAL AND SILICON NSS BEYOND 140 GHz</caption><thead><tr><th>Monitorable low state (P<sub>COLD</sub>)</th><th>Constant output matching S<sub>22</sub> (dB)</th><th>ENR<sub>av</sub> (dB)</th><th>Packaged</th><th>Technology</th><th>Monitorable</th><th>ENR<sub>av</sub> (dB) flatness</th><th>Frequency (GHz)</th><th>Reference</th></tr></thead><tbody><tr><td>No</td><td>N/A</td><td>45</td><td>Yes</td><td>Silicon IMPATT Diode</td><td>No</td><td>±15</td><td>140-220</td><td>ELVA-1 ISSN-05 [38]</td></tr><tr><td>No</td><td>N/A</td><td>50</td><td>Yes</td><td>Silicon IMPATT Diode</td><td>No</td><td>±20</td><td>220-330</td><td>ELVA-1 ISSN-03 [38]</td></tr><tr><td>No</td><td>N/A</td><td>10</td><td>Yes</td><td>N/A</td><td>No</td><td>±2</td><td>110-170</td><td>VDI WR6.5 NS [39]</td></tr><tr><td>No</td><td>N/A</td><td>8,5</td><td>Yes</td><td>N/A</td><td>No</td><td>±2</td><td>140-220</td><td>VDI WR5.1 NS [39]</td></tr><tr><td>Yes</td><td>Yes <-10</td><td>&lt;20 &amp; 28</td><td>No</td><td>SiGe BiCMOS &amp; UTC-PD</td><td>Yes</td><td>±7</td><td>120-325</td><td>[40]</td></tr><tr><td>No</td><td>N/A</td><td>48</td><td>No</td><td>Photonic mixing UTC-PD</td><td>No</td><td>±4.3</td><td>200-390</td><td>[8]</td></tr><tr><td>No</td><td>N/A</td><td>18.7~20.7</td><td>No</td><td>Photonic mixing PCA</td><td>No</td><td>±7.9</td><td>75~400</td><td>[9]</td></tr><tr><td>Yes</td><td>Yes <-7.5</td><td>37</td><td>No</td><td>SiGe BiCMOS 55nm</td><td>Yes</td><td>±3</td><td>140-170</td><td>On-wafer measurements [15]</td></tr><tr><td>Yes</td><td>Yes <-5</td><td>25</td><td>Yes</td><td>SiGe BiCMOS 55nm</td><td>Yes</td><td>±3</td><td>140-170</td><td>At output package [14]</td></tr><tr><td>Yes</td><td>Yes <-12</td><td>29</td><td>Yes</td><td>SiGe BiCMOS 55nm</td><td>Yes</td><td>±3</td><td>140-170</td><td>[32]</td></tr></tbody></table>

The reflection coefficient at the probe output is calculated using the probe S-parameters, that is provided by the supplier according to its serial number and the reflection coefficient of the amplified NS on the glass interposer, Γ<sub>NS</sub>, as follows:

$$ \Gamma_{\text{OUT}}^{\text{probe}} = S_{22}^{\text{probe}} + \frac{S_{12}^{\text{probe}} S_{21}^{\text{probe}} \Gamma_{\text{NS}}}{1 - S_{11}^{\text{probe}} \Gamma_{\text{NS}}}. \quad (8) $$

Due to the AMP isolation and interposer losses, the resulting mismatch coefficient M is close to 1 across the entire frequency range.

In the second step, the available hot noise temperature at plane B can be subsequently deduced from T<sub>HOT</sub><sup>B,av</sup> and M by the following equation:

$$ T_{\text{HOT}}^{\text{B,av}} = T_{\text{HOT}}^{\text{B,eff}} \times M. \quad (9) $$

The third step corresponds to the transposition of the noise temperature at plane B to plane A. Knowing the available gain of the probe used (Infinity I220-S-GSG-100-BT), the hot noise temperature T<sub>HOT</sub><sup>A,av</sup> at the on-wafer plane A is determined below

$$ T_{\text{HOT}}^{\text{A,av}} = \frac{T_{\text{HOT}}^{\text{B,av}} - T_A (1 - G_{\text{probe}}^{\text{av}})}{G_{\text{probe}}^{\text{av}}}. \quad (10) $$

The calculation of the available gain of the probe G<sub>probe</sub><sup>av</sup> is possible to know the S-parameters of the probe and the reflection coefficient of the NS (Γ<sub>NS</sub>) for each bias current condition, as follows:

$$ G_{\text{probe}}^{\text{av}} = \left| S_{21}^{\text{probe}} \right|^2 \frac{(1 - |\Gamma_{\text{NS}}|^2)}{\left| 1 - S_{11}^{\text{probe}} \Gamma_{\text{NS}} \right|^2 \times \left( 1 - |\Gamma_{\text{OUT}}^{\text{probe}}|^2 \right)}. \quad (11) $$

<figure><img src="image_19.png" /><figcaption>Fig. 17. Extracted ENR<sub>av</sub>(dB) in G-band for the amplified NS on-glass interposer under several bias conditions [32].</figcaption></figure>

Finally, the available ENR<sub>A,av</sub> at plane A can be determined by the use of the following equation:

$$ \text{ENR}_{\text{A,av}}(\text{dB}) = 10 \log \left( \frac{T_{\text{HOT}}^{\text{A,av}} - T_{\text{COLD}}}{T_0} \right). \quad (12) $$

2) On-Interposer Available ENR<sub>A,Av</sub> Extractions: The extracted ENR<sub>av</sub> values for both low and high states of the NS are shown in Fig. 17. For the low state, the NS is off while the LNA remains on, whereas in the high state, both the NS and LNA are active.

The levels obtained are of the order of 29 dB between 140 and 170 GHz. Above 170 GHz, the bandwidth of the LNA gain tends to decrease, resulting in lower ENR levels. These results demonstrate a distinctive feature of the greatest interest
of this NS is that ENR is monitorable with a 3 dB flatness between 140 and 170 GHz.

Some ENR<sub>av</sub> values are either missing or exhibit divergences, primarily attributable to the NRCV frequency response. Specifically, the noise receiver mixer exhibits limitations in gain conversion at singular frequency points, resulting in reduced sensitivity of the noise receiver.

Table I provides a summary of the state of the art for commercial and silicon NSs beyond 140 GHz, to target potential solutions for high volumes.

The ENR values of the SiGe BiCMOS 55 nm NS are lower than those reported in recent updates from the supplier ELVA [38], which show ENR levels around 50 dB between 140 and 220 GHz, though with considerable ENR frequency variations (±15 dB). It is important to note that a sudden increase in ENR can cause the noise receiver to saturate. This necessitates adding an attenuator at the input of the noise receiver, which can introduce measurement uncertainties.

Ensuring that the ENR level is adjustable helps prevent it from falling below the minimum detectable signal (MDS) level or exceeding the saturation threshold. Moreover, this commercial NS does not allow for generating adjustable ENR levels with the applied bias. In contrast, the NS developed in [15] and integrated onto the glass interposer in this work has the advantage of being adaptable to both the LNA and the noise receiver.

Regarding photonic solutions based on UTC-PD and PCA, while there have been notable advancements in expanding the frequency range of NSs, these technologies still face challenges in achieving sufficiently compact integration for smart probes.

The ENR levels measured on the interposer in this work have observed a significant enhancement in the ENR levels from those obtained at the packaged output by 4 dB, but the level is still lower than those obtained from the on-wafer measurements in the 140–170 GHz range.

## VII. CONCLUSION

This article presents the development of a micromachined GSG probe based on a glass AF32 substrate for on-wafer measurements. The mechanical characterization of the glass probe tips has demonstrated robustness, withstanding forces up to 74 mN for the 50 µm glass probe, 196 mN for the 100 µm glass probe, and 667 mN for the 100 µm nickel-glass probe before failure. Furthermore, the Nickel-Glass probe with a single tip achieved a low-resistance electrical contact of just 0.05 Ω at forces above 6 mN, as verified through four-wire measurements at a single contact point. In a further development, this article has shown the integration of our amplified NS based on the B55X chip on the same type of glass substrate as that used for the probe tips. This innovation significantly reduces dielectric and transition losses, achieving a tunable ENR<sub>av</sub> level of up to 29 dB within the 140–170 GHz range, with constant output impedance matching better than –12 dB across the entire frequency band. Very importantly, the choice of a common glass material for both the probe tips and the NS chip substrate opens the possibility to fabricate

an active NS probe dedicated to on-wafer measurements in G-band.

The active probe technology can be further developed to embed a multi-impedance tuner, offering the opportunity of four noise parameters measurements up to 220 GHz for multiple wafer technologies. By significantly advancing high-frequency measurement technologies, this work presents a scalable approach that extends beyond noise measurements and is applicable to higher frequency bands.

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<figure><img src="image_20.png" /></figure>

**Maya Alawar** (Graduate Student Member, IEEE) was born in Lebanon in 1996. She received the B.S. degree in electronics from the Faculty of Sciences, Lebanese University, Hadath, Lebanon, in 2017, and the M.S. degree in microwave research from Lebanese University in 2019, and the Ph.D. degree in microelectronics from the University of Lille, Lille, France, in 2024.

She is currently a Research Engineer with the Institut d'Électronique, de Microélectronique et de Nanotechnologie (IEMN UMR 8520), Villeneuve d'Ascq, France. Her research is focused on laser micromachining and advanced functional packaging for RF and millimeter-wave applications.

<figure><img src="image_21.png" /></figure>

**Victor Fiorese** received the M.S. degree in RF electronics from the École Nationale Supérieure de l'Électronique et de ses Applications (ENSEA), Cergy, France, in 2018, and the Ph.D. degree in electronics from the University of Lille, Lille, France, in 2022.

He is currently involved with STMicroelectronics Grenoble, Grenoble, France, RF and mmW validation laboratory to develop on-wafer RF measurement activity. His main research interests include RF test automation, noise, small, and large signal measurements of transceivers up to 67 GHz.

<figure><img src="image_22.png" /></figure>

**Sylvie Lépilliet** was born in Béthune, France, in 1964. She received the B.E. degree in electronics from the Centre National des Arts et Métiers (CNAM), Lille, France, in 1991.

In 1986, she joined the Centre Hyperfréquences et Semiconducteurs, University of Lille, Lille. She is currently in charge of the high-frequency measurement facilities of the Institute of Electronics, Microelectronics, and Nanotechnology, University Lille I, Villeneuve d'Ascq, France, particularly of the noise test set.
<figure><img src="image_23.png" /></figure>

**Daniel Gloria** received the Engineering degree in electronics from the Ecole Nationale Supérieure d'Électronique et de Radioélectricité, Grenoble, France, and the M.S.E.E. degree in optics, optoelectronics and microwaves design systems from the Institut National de Grenoble (INPG), Grenoble, in 1995.

He spent two years as an RF Designer Engineer, from 1995 to 1997, with ALCATEL Bell Network System Labs, Charleroi, Belgium, and was involved in the development of the Cablephone RF front end and its integration in hybrid-fiber-coax telecommunication networks. Since 1997, he is working with the Department of Technology Design Platform, STMicroelectronics, Crolles, France. His research interests include the development and optimization of RF and photonics platforms for applications in BiCMOS and CMOS advanced technologies.

<figure><img src="image_24.png" /></figure>

**Emmanuel Dubois** received the Engineering degree in engineer from the Institut Supérieur d'Electronique et du Numérique (ISEN), Lille, France, in 1985, and the Ph.D. degree from the University of Lille, Lille, in 1990.

In 1992, he was a Visiting Scientist with the IBM T.J. Watson Research Centre, Yorktown Heights, NY, USA, working on characterization and simulation of submicrometer SOI-MOSFETs. In 1993, he joined the Institut d'Electronique de Microélectronique et de Nanotechnologie (IEMN UMR 8520), Lille, where he is currently the Director of Research at the Centre National de la Recherche Scientifique, CNRS. He was a Coordinator of three European Projects focused on Schottky source-drain MOS technologies (FP4-IST-QUEST, FP5-IST-SODAMOS, FP6-IST-METAMOS) and was involved as Workpackage/Task Leader in a series of European projects devoted to ultimate MOS architectures (FP5 SASEM, FP6 SiNANO NoE, FP7 NANOSIL NoE, FP6 NANOCMOS IP, FP6 PULLNANO IP). He is currently the Head of the STMicroelectronics-IEMN Joint Laboratory and coordinates the PIA-EQUIPEX project LEAF on advanced laser-based microfabrication for System Moore integration. He has authored or co-authored more than 300 publications in peer-reviewed international journals or peer-reviewed conferences proceedings and holds nine patents. His research interests cover advanced source/drain CMOS technology, RF and mmW CMOS/BiCMOS, nonconventional thermal energy harvesting, laser micromachining and functional packaging of compact RF/mmW/photonics subsystems.

Dr. Dubois was a recipient of the IBM award for high-performance computing in 1990. From 2005 to 2016, he was on the Technical Program Committee of ESSDERC and was the TPC Member of the VSLI Symposium on Technology (2018–2020). Until 2017, he participated to the nanoelectronics committee of the French Observatory on Micro and Nano Technologies (OMNT).

<figure><img src="image_25.png" /></figure>

**Guillaume Ducournau** has been with the Institute of Electronics, Microelectronics and Nanotechnology (IEMN), UMR-CNRS 8520, University of Lille, Villeneuve d'Ascq, France, since 2007. He is the Leader of the THz wireless communications activity with IEMN using optoelectronic THz photomixers, electronic receivers, THz instrumentation, and millimeter-wave (mm-wave) characterization. He worked on several European projects: STREP Roothz 2010-2013, Thor H2020, and now on Graph-X as well as in Times (6G SNS), as well as the Marie-Curie TERAOPTICS network. At the national level, he was the Coordinator of the CoM'TONIQ Project, from 2014 to 2017, funded by Agence Nationale de la Recherche (ANR) (INFRA 2013) dedicated to THz communications in the 300-GHz band, the ANR/DFG TERASONIC Project for the use of THz photonics technologies and electrical solid-state technologies for THz communications, SPATIOTERA for spatially-distributed photomixers. He is involved in national France 2030 programs gathering several French laboratories under the "PEPR" programs supported by the ANR. In this framework, the FUNTERA Project (six partners) is investigating THz converters, while the SYSTERA Project (12 partners) is dedicated to beyond 90 GHz systems for future networks. He also participates to the ST-IEMN common laboratory, and more specifically involved in the mm-wave technologies characterization part. He has authored or co-authored more than 180 publications in peer-reviewed international journals or peer-reviewed conferences proceedings and holds one patent.

Mr. Ducournau received the 2020 ISAP Best Paper Award.