# Oxide TFTs on Flexible Substrates for Designing and Fabricating Analog-to-Digital Converters

Ana Correia, João Goes, Pedro Barquinha

► To cite this version:

Ana Correia, João Goes, Pedro Barquinha. Oxide TFTs on Flexible Substrates for Designing and Fabricating Analog-to-Digital Converters. 7th Doctoral Conference on Computing, Electrical and Industrial Systems (DoCEIS), Apr 2016, Costa de Caparica, Portugal. pp.533-541, 10.1007/978-3-319-31165-4_50. hal-01438281

HAL Id: hal-01438281

https://inria.hal.science/hal-01438281

Submitted on 17 Jan 2017

HAL is a multi-disciplinary open access
archive for the deposit and dissemination of sci-
entific research documents, whether they are pub-
lished or not. The documents may come from
teaching and research institutions in France or
abroad, or from public or private research centers.

L'archive ouverte pluridisciplinaire HAL, est
destinée au dépôt et à la diffusion de documents
scientifiques de niveau recherche, publiés ou non,
émanant des établissements d'enseignement et de
recherche français ou étrangers, des laboratoires
publics ou privés.

<figure><img src="image_1.png" /></figure>

Distributed under a Creative Commons Attribution 4.0 International License
# Oxide TFTs on Flexible Substrates for Designing and Fabricating Analog-to-Digital Converters

Ana Correia<fnref n="1" />,<fnref n="2" />, João Goes<fnref n="1" /> and Pedro Barquinha<fnref n="2" />

**Abstract.** Thin-film transistors (TFTs) employing oxide semiconductors have recently emerged in electronics, offering excellent performance and stability, low processing temperature and large area processing, being indium-gallium-zinc oxide (IGZO) the most popular amorphous oxide semiconductor. In this work it is shown how IGZO TFTs can be integrated with multilayer high-κ dielectrics to obtain low operating voltages, both on glass and flexible PEN substrates. Then, the electrical properties extracted from these devices are used to design and simulate a 2^nd^-order Sigma-Delta (ΣΔ) analog-to-digital converter (ADC), showing superior performance (e.g. SNDR≈57 dB, and DR≈65 dB) over ADCs using competing thin-film technologies.

**Keywords:** Amorphous oxide semiconductors, IGZO TFTs, circuit integration, ADCs, ΣΔ modulator.

## 1 TFTs for Large-Area Electronics: A Materials Perspective

Displays are deeply incorporated in our daily lives in mobile phones, TVs, monitors, among others. The key electronic elements of these displays are thin-film transistors (TFTs) responsible for switching each pixel on and off. A TFT is a particular case of a field-effect transistor (FET) based on thin-film technologies, presenting a semiconductor located between drain and source electrodes and the dielectric layer placed between gate electrode and the semiconductor. Using these three terminals (drain, source and gate), the principle behind this device is to control the current between drain and source electrodes (I<sub>DS</sub>) through the gate-source potential (V<sub>GS</sub>) [1].

The first conceptual patents on TFTs were reported in 1930, however these devices only acquired a high relevance in the 70s, with the advances on flat-panel displays, specially with the appearance of active matrix liquid-crystal displays (AMLCDs). Hydrogenated amorphous silicon (a-Si:H) soon started to be the preferred choice for semiconductor owing to its amorphous structure perfectly suitable for large area fabrication. Still, its low field-effect mobility (μ<sub>FE</sub><1 cm<fnref n="2" />/Vs) was not compatible

<footnote n="1">¹ CTS/UNINOVA, Departamento de Engenharia Electrotécnica, Faculdade de Ciências e Tecnologia, Universidade NOVA de Lisboa, Campus da Caparica, 2829-516 Caparica, Portugal</footnote>

<footnote n="2">² I3N/CENIMAT, Departamento de Ciência dos Materiais, Faculdade de Ciências e Tecnologia, Universidade NOVA de Lisboa and CEMOP/UNINOVA, Campus da Caparica, 2829-516 Caparica, Portugal</footnote>

<footnote>a.correia@campus.fct.unl.pt, jg@uninova.pt, pmcb@fct.unl.pt</footnote>
either with the fabrication of the peripheral drivers of the displays or for other circuits operating in the MHz range. Poly-Si was introduced to deal with this limitation, enabling μ<sub>FE</sub>>100 cm²/Vs, but at the cost of larger processing temperatures and a polycrystalline structure, hindering low cost and uniform fabrication in large areas. On the other hand, organic semiconductor based TFTs were also introduced in the late 80s, as the ultimate technology, when low-cost and mechanical flexibility are major requirements. However, their electrical performance was (and is) comparable to a-Si:H TFTs and degradation under normal environmental conditions is a major concern.

The new millennium set the stage for a new transistor technology, able to fulfil the needs of flexible, low cost but nonetheless fast electronics. Oxide semiconductor TFTs are such technology, offering excellent uniformity in large areas using temperatures below 150 °C and μ<sub>FE</sub> exceeding 10 cm²/Vs. In addition, most oxides have bandgaps (E<sub>G</sub>) above 3 eV, turning them transparent materials in the visible spectrum, enabling exciting concepts such as fully transparent and flexible devices [2]. Even if some initial oxide TFTs were reported in the 60s, the most relevant works showing the potential of such technology started in 2002 with polycrystalline ZnO TFTs [3–6]. Despite the encouraging results obtained using ZnO, rapidly amorphous multicomponent materials started to be used, specially indium gallium zinc oxide (IGZO). In fact, in these amorphous oxides a “continuous path” created by spherical isotropic ns orbitals of the metallic cations, when the radii of these orbitals is larger than the distance between cations, allows obtaining excellent μ<sub>FE</sub> even in amorphous structures [7]. Although IGZO is the most widely used amorphous oxide semiconductor (AOS), some additional combinations have been considered, as indium-free alternatives such as zinc-tin oxide (ZTO).

Despite the semiconductor used in a TFT, the dielectric choice critically affects the device performance and stability. High-κ dielectrics have been used instead of traditional SiO₂ due to different reasons. When low temperature deposition processes are used, semiconductors and their interfaces are more prone to have large defect density and poor compactness. Hence, the large capacitance per unit area of high-κ dielectrics compensates this, by inducing a larger charge density per unit voltage. This also allows for low-voltage operation: as will be seen in this work, high-κ results in less than half of the operation voltage (seen by transconductance saturation) compared to thermal SiO₂ with similar thickness. Furthermore, the larger film thickness (without compromising a good overall capacitance) enabled by high-κ dielectrics compensates the more degraded dielectric film properties fabricated at low temperatures, avoiding for instance quantum tunnelling effects. Additionally, selecting high-κ materials with an amorphous structure typically results in smoother films and, consequently, in improved interfaces with amorphous semiconductors, while the lack of grain boundaries of amorphous structures decreases the gate leakage current (I<sub>G</sub>). However, most of the high-κ dielectrics have lower E<sub>G</sub> than lower-κ materials as SiO₂, which based on band alignment considerations can be problematic to obtain low I<sub>G</sub>. Hence, multicomponent dielectrics based on combinations of materials with high-κ and high-E<sub>G</sub>, such as Ta₂O₅ and SiO₂, respectively, has been studied in different configurations, taking advantage of structural and electrical properties of both materials [8].
## 2 Relationship to Cyber-Physical Systems: From Oxide TFTs to a Complete System-on-Foil

The current advances in oxide TFTs are changing and expanding the display market, enabling higher refresh rate combined with ultra-definition and stimulating new approaches such as curved or transparent displays. The big players in the multi-billion dollar display industry are naturally all aware of this TFT technology, with an increasing number of prototypes and even commercial products being available from companies as Samsung and LG. One of the most relevant examples is the line of curved OLED TVs by LG, making use of oxide TFT backplanes.

Despite all this activity in taking oxide TFTs to displays, efforts have also been done to take full advantage of oxide TFTs and integrate them in other electronic circuits and systems. In fact, good uniformity over large area, excellent electrical performance and stability, low production costs and the flexible or even recyclable concepts encourage their integration in full system-on-foil concepts, expanding their functionality and their applicability. To the author's best knowledge, the first circuits using oxide TFTs appeared in 2006, in which inverters and a five-stage ring oscillator (RO) have been reported using indium-gallium oxide (IGO) TFTs. Regarding inverters, a peak gain magnitude close to 1.5 was measured and a maximum oscillation frequency of 9.5 kHz has been experimentally demonstrated [9]. Several RO performance improvements have been achieved by decreasing the propagation delay and, therefore, allowing to increase the maximum oscillation frequency and the number of cascaded stages [10, 11]. Shifter registers, current mirrors and a digital-to-analog converter (DAC) were also produced using oxide TFTs. Regarding DAC, which is already a circuit realization with a considerable level of complexity, encouraging results were achieved using IGZO TFTs, showing a spurious-free dynamic range (SFDR) above 30 dB up to 300 kHz and a sampling rate of 1 MS/s [12]. It is also relevant to notice the relatively recent developments of using TFTs in applications spanning from near-field communications (NFC) to radio-frequency identification (RFID) tags. In 2011, the first RFID chip was produced using IGZO TFTs, showing a small power dissipation (20 µW) making it suitable for short-range wireless operation [13]. In 2015, a fully flexible NFC tag also using IGZO TFTs has been fabricated, exhibiting excellent performance, as a maximum data rate close to 72 kbits/s [14]. These last examples intensify the potential of using oxide TFTs for an entire system-on-foil concept where, besides performance and processability of electronic devices in low cost and flexible substrates, multifunctionality of the platform using only one semiconductor technology is a paramount advantage in terms of reliability and cost of the complete system.

The referred system-on-foil concept plays a relevant role nowadays in the global cyber-physical systems (CPS) approach, which combines computation and physical processes networking and it is transversal to multiple fields of knowledge, involving areas such as healthcare, energy or consumer appliances. In fact, the excellent performance and stability of oxide technologies are key enablers to develop innovative, more efficient and high frequency systems, improving strongly the communication in complex systems.
## 3 Oxide TFTs Produced at FCT-NOVA

Oxide TFTs have been studied using different approaches in order to optimize and enhance TFT performance, and reducing at the same time the involved fabrication costs. For that end different materials, structures and processes, such as the usage of organic insulators, nanowire structures and solution processes, respectively, have been studied in different research groups worldwide, including CENIMAT and CEMOP at FCT-NOVA. This section summarizes a small part of these developments, which were then used as the basis to design the ADC case study presented in section 4. In this case, since complex circuit design demands for good performance and stable devices, sputtered IGZO was selected as the semiconductor, given that it is the most mature process/material available in-house. IGZO was then coupled with different sputtered high-κ dielectrics based on Ta₂O₅ and SiO₂, evaluating the effect of the dielectric on important device parameters such as µFE, turn-on voltage (Von) and IG.

### 3.1 Devices Fabrication and Characterization

IGZO TFTs were produced on Corning Eagle glass and on flexible Polyethylene Naphthalate (PEN), depositing all layers using RF magnetron sputtering. These devices present a staggered bottom gate, top contact structure and were fabricated as follows: Molybdenum (Mo) gate electrodes (≈60 nm thick) were deposited in an Ar atmosphere; for the dielectric a multilayer structure with alternating SiO₂ and co-sputtered Ta₂O₅+SiO₂ (denoted TSiO) layers was fabricated, with a thickness of 100-150 nm. The semiconductor, IGZO (≈40 nm thick and 2:1:1 In:Ga:Zn atomic ratio), was deposited in an Ar+O₂ atmosphere. At the end, Mo source and drain electrodes were fabricated using the same procedure as for gate electrode. Both the electrodes and the semiconductor were patterned by lift-off and, on the other hand, the dielectric layer by dry-etching, in a SF₆ atmosphere. To conclude the production, the devices fabricated on glass and on PEN were annealed at 180-200 and 150 °C, respectively, on a hotplate, in air.

Electrical characterization of devices was performed using a semiconductor parameter analyzer (Keithley 4200-SCS) and a probe station (Cascade Microtech M150) under dark room conditions.

### 3.2 IGZO TFTs on Glass Substrate

As discussed in [15] a multilayer dielectric comprising TSiO and thin SiO₂ (with the latter being in contact with IGZO) results in considerably improved device yield over single layer TSiO or Ta₂O₅. In fact, recent improvements in tuning the thickness of these multilayer dielectrics enabled breakdown field (E_B) >7 MV/cm and κ≈10, resulting in IGZO TFTs with IG<1 pA and low operation voltage (yielding a transconductance saturation for VGS<6 V). Fig. 1 shows transfer and output curves of one IGZO TFT with a 150 nm thick multilayer dielectric comprising 7 alternating SiO₂/TSiO layers, annealed at 180 °C, with a width-to-length ratio (W/L) of 40/20 (µm). Excellent performance is obtained: µFE≈14 cm²/Vs, On-Off ratio≈10⁹, Von=-1.5
V, subthreshold slope (S) of 0.16 V/dec, negligible hysteresis, hard saturation and no current crowding at low $V_{DS}$. Note that these results are quite similar to the ones obtained when the same IGZO layers are deposited on state-of-the-art thermal dry $SiO_2$. In fact, S and operating voltage are even improved with the present multilayer dielectric, owing to its larger $\kappa$ (in thermal $SiO_2$ $S=0.20$ V/dec and transconductance saturation occurs for $V_{GS}=15$ V).

<figure><img src="image_2.png" /><figcaption>Fig. 1. Transfer (left) and output (right) curves of an IGZO TFT on glass with a sputtered 7 layer $SiO_2/TSiO$ dielectric.</figcaption></figure>

## 3.3 IGZO TFTs on Flexible PEN Substrate

The possibility of using flexible substrates brings significant advantages to a TFT technology. First, it enables the usage of roll-to-roll fabrication tools, highly desirable for large area electronics. Then, at a system level they enable weight and thickness reduction over conventional glass. Finally, bendable or even rollable products can be conceived. Given the low temperature fabrication required for IGZO TFTs with sputtered multilayer dielectrics, their performance was also analyzed on PEN substrates. Fig. 2 shows the transfer curves and a photo of such devices with a 7 layer dielectric, having a total thickness ≈100 nm, annealed at only 150 °C. It is noteworthy the excellent electrical performance obtained: in fact, besides the larger hysteresis, all the other parameters reveal to be even slightly improved over the ones achieved on glass substrates (Fig. 1), which is also a consequence of the thinner dielectric layer used on PEN. Electrical characterization under different bending radius is currently underway.

<figure><img src="image_3.png" /><figcaption>Fig. 2. Measured transfer curves (left) and a photo of IGZO TFTs on PEN substrate with $W/L=40/80 \ \mu m/\mu m$ and annealed at 150 °C (right) using a multilayer dielectric (7 layers).</figcaption></figure>
# 4 ADCs using Oxide TFTs Produced at FCT-NOVA

As mentioned before, circuit integration is a crucial demonstration of the potential of a new transistor technology. ADCs are one of the most difficult circuits to implement and, given their importance in a variety of fields such as electronic, medical, telecommunications or other systems that need signal processing, their implementation using a new technology is a significant achievement. Despite the lack of maturity compared to the dominant TFT technology (i.e., a-Si:H), oxide TFTs have been implemented in systems with a reasonable level of complexity and integration but, to the best of the authors' knowledge and up to date, no kind of reference was found regarding the use of oxide TFTs in the design and practical implementation of ADCs. Some works related with practical realizations of ADCs using other thin-film technologies are summarized in [16–18]. Although being a small part of all developed work, it contains examples of ADCs employing a-Si:H, low-temperature poly-silicon (LTPS) and organic TFTs.

Excellent performance, good stability, large $E_B$ and low $I_G$ are some of the key characteristics of IGZO TFTS with multilayer dielectric previously optimized, encouraging to proceed to the design of a 2^nd^-order Sigma-Delta (ΣΔ) ADC using the devices produced at FCT-NOVA. An ADC architecture based on oversampling and noise-shaping techniques has been adopted, since due its intrinsic feedback nature, it can easily deal with high process variations and mismatch errors in the physical/electrical parameters of the TFT devices during fabrication. It is important to notice that, due to the lack of a reproducible and stable p-type oxide TFTs, only n- type devices were used in the circuit design. Additionally, due to the expected high device mismatch and poor absolute accuracy when these passive elements are fabricated, SMD passive elements have been employed in order to minimize additional risks in the early phase of proof-of-concept.

Virtuoso™ Platform and Spectre™ Simulator from CADENCE have been used to design and electrically simulate all building blocks. Furthermore, a model for IGZO TFTs was adapted from an a-Si:H TFT model developed by Semiconductor Devices Research Group at RPI, with good fitting to experimental data.

Given the relevance of the comparator in the ΣΔ modulator (ΣΔM), the active block in circuit, it was designed and simulated in order to obtain the best performance. It employs a cascade of three pre-amplification stages, a positive-feedback analog latch stage and four logic inverters implementing a fully-dynamic digital latch. Results show a low offset, working at several tens of kHz, with an accuracy ≈10 mV. Moreover, it supports the $V_{on}$ variations of fabrication [19].

Regarding the final design of continuous-time ΣΔM, it employs an analog loop filter (a cascade connection of two fully passive RC-type integrators), implementing the 2^nd^-order noise shaping transfer function. ADC simulations reveal: SNDR≈57 dB, DR≈65 dB, and power dissipation, approximately, of 22 mW ($V_{DD}$=10 V). Comparing these simulation results, shown in Table 1, with the current state-of-the-art of ΣΔMs, it can be observed that this work is clearly beyond prior art, for competing thin-film technologies such as organics or even LTPS, supporting the continuity of this work. However, the operation frequency and intrinsic gain of these devices can limit the performance of the ΣΔM. Nevertheless, results give an excellent stimulus to produce one of the first 2^nd^-order ΣΔ ADC using oxide TFTs.
Another paramount step in this kind of work is the layout, specially using new technologies for which a process-design-kit (PDK) is not available. Consequently, a parameterized cell (PCELL) needs to be constructed taking into account the structure of devices and all process/material constraints. Given the absence of PDK, automatic design rule check (DRC) and layout versus schematic (LVS) could not be performed using EDA (electronic design automation) tools. Hence, layout of the entire circuit with a die area close to 10 mm² still needs to be checked manually. More details regarding design, simulation results and layout can be found in [15].

<table><caption>**Table 1.** Simulated main performance parameters of the ΣΔΜ using IGZO TFTs.</caption><thead><tr><td>Characteristic</td><td>Value</td></tr></thead><tbody><tr><td>Sampling Frequency (F<sub>s</sub>)</td><td>128 kHz</td></tr><tr><td>Input Signal Amplitude (A<sub>in</sub>)</td><td>5 V<sub>diff</sub></td></tr><tr><td>Input Signal Frequency (F<sub>in</sub>)</td><td>101.5625 Hz</td></tr><tr><td>Oversampling ratio (OSR)</td><td>128</td></tr><tr><td>Bandwidth (BW)</td><td>500 Hz</td></tr><tr><td>Signal-to-noise distortion ratio (SNDR)</td><td>57 dB</td></tr><tr><td>Dynamic Range (DR)</td><td>65 dB</td></tr></tbody></table>

## 5 Conclusions

Fully sputtered IGZO TFTs have been produced both on glass and PEN exhibiting comparable electrical performance, with μ<sub>FE</sub>≈14 cm²/Vs, On-Off ratio≈10⁸-10⁹, V<sub>on</sub>=-1.0 to -1.5 V and subthreshold slope (S) of 0.16 V/dec. These properties are achieved with only 150-180 °C annealing temperature and are even superior to the ones obtained with high-temperature 100 nm thick dry-SiO₂ dielectric from conventional CMOS technology. A 2nd-order ΣΔΜ was designed and simulated based on the measured IGZO TFTs, showing a SNDR≈57 dB, and a power dissipation of 22 mW. Circuit layout with a die area of 10 mm² is currently under final LVS and DRC verifications. Fabrication and experimental evaluation will be the next steps.

**Acknowledgments.** This work has been funded by FEDER funds through the COMPETE 2020 Programme and National Funds through FCT - Portuguese Foundation for Science and Technology, under the projects "Multifunctional nanoscale oxide materials" (EXCL/CTM-NAN/0201/2012), DISRUPTIVE (EXCL/EEI-ELC/0261/2012), INCENTIVO (EEI/UI0066/2014) and Strategic projects (UID/CTM/50025/2013) and (UID/EEA/00066/2013). The work has also received funding from the European Communities 7th Framework Programme under grant agreement i-FLEXIS project (ICT-2013-10-611070) and H2020 Programme under grant agreement ROLLOUT project (ICT-03-2014-644631).

## References

1. Lee, J.-H., Wu, S.-T., Liu, D.N.: Introduction To Flat Panel Displays., West Sussex, UK (2008).

2. Grundmann, M., Frenzel, H., Lajn, A., Lorenz, M., Schein, F., von Wenckstern, H.:
Transparent semiconducting oxides: materials and devices. Phys. status solidi. 207, 1437-1449 (2010).

3. Masuda, S., Kitamura, K., Okumura, Y., Miyatake, S., Tabata, H., Kawai, T.: Transparent thin film transistors using ZnO as an active channel layer and their electrical properties. J. Appl. Phys. 93, 1624-1630 (2003).

4. Garcia, P.F., McLean, R.S., Reilly, M.H., Nunes, G.: Transparent ZnO thin-film transistor fabricated by rf magnetron sputtering. Appl. Phys. Lett. 82, 1117 (2003).

5. Hoffman, R.L.: ZnO-channel thin-film transistors: Channel mobility. J. Appl. Phys. 95, 5813-5819 (2004).

6. Fortunato, E.M.C., Barquinha, P.M.C., Pimentel, A.C.M.B.G., Gonçalves, A.M.F., Marques, A.J.S., Martins, R.F.P., Pereira, L.M.N.: Wide-bandgap high-mobility ZnO thin-film transistors produced at room temperature. Appl. Phys. Lett. 85, 2541 (2004).

7. Nomura, K., Ohta, H., Takagi, A., Kamiya, T., Hirano, M., Hosono, H.: Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors. Nature. 432, 488-492 (2004).

8. Zhang, L., Li, J., Zhang, X.W., Jiang, X.Y., Zhang, Z.L.: High-performance ZnO thin film transistors with sputtering SiO2/Ta2O5/SiO2 multilayer gate dielectric. Thin Solid Films. 518, 6130-6133 (2010).

9. Presley, R.E., Hong, D., Chiang, H.Q., Hung, C.M., Hoffman, R.L., Wager, J.F.: Transparent ring oscillator based on indium gallium oxide thin-film transistors. Solid. State. Electron. 50, 500-503 (2006).

10. Ofuji, M., Abe, K., Shimizu, H., Kaji, N., Hayashi, R., Sano, M., Kumomi, H., Nomura, K., Kamiya, T., Hosono, H.: Fast Thin-Film Transistor Circuits Based on Amorphous Oxide Semiconductor. IEEE Electron Device Lett. 28, 273-275 (2007).

11. Mativenga, M., Choi, M.H., Choi, J.W., Jang, J.: Transparent Flexible Circuits Based on Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors. IEEE Electron Device Lett. 32, 170-172 (2011).

12. Raiteri, D., Torricelli, F., Myny, K., Nag, M., Van der Putten, B., Smits, E., Steudel, S., Tempelaars, K., Tripathi, A., Gelinck, G., Van Roermund, A., Cantatore, E.: A 6b 10MS/s current-steering DAC manufactured with amorphous Gallium-Indium-Zinc-Oxide TFTs achieving SFDR > 30dB up to 300kHz. In: 2012 IEEE International Solid-State Circuits Conference. pp. 314-316. IEEE (2012).

13. Cui, Q., Si, M., Sporea, R.A., Guo, X.: Simple Noise Margin Model for Optimal Design of Unipolar Thin-Film Transistor Logic Circuits. IEEE Trans. Electron Devices. 60, 1782-1785 (2013).

14. Myny, K., Cobb, B., van der Steen, J.-L., Tripathi, A.K., Genoe, J., Gelinck, G., Heremans, P.: 16.3 Flexible thin-film NFC tags powered by commercial USB reader device at 13.56MHz. In: 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers. pp. 1-3. IEEE (2015).

15. Correia, A.P.P., Cândido Barquinha, P.M., Goes, J.C. da P.: A Second-Order ΣΔ ADC Using Sputtered IGZO TFTs. Springer International Publishing, Cham (2016).

16. Dey, A., Allee, D.R., Ieee: Amorphous Silicon 5 Bit Flash Analog to Digital Converter. 2012 Ieee Cust. Integr. Circuits Conf. (2012).

17. Lin, W.-M., Lin, C.-F., Liu, S.-I.: A CBSC second-order sigma-delta modulator in 3 µm LTPS-TFT technology. In: 2009 IEEE Asian Solid-State Circuits Conference. pp. 133-136. IEEE (2009).

18. Marien, H., Steyaert, M.S.J., van Veenendaal, E., Heremans, P.: A Fully Integrated Delta Sigma ADC in Organic Thin-Film Transistor Technology on Flexible Plastic Foil. IEEE J. Solid-State Circuits. 46, 276-284 (2011).

19. Correia, A., Martins, R., Fortunato, E., Barquinha, P., Goes, J.: Design of a robust general-purpose low-offset comparator based on IGZO thin-film transistors. In: 2015 IEEE International Symposium on Circuits and Systems (ISCAS). pp. 261-264. IEEE (2015).