# Analog programming of CMOS-compatible Al2O3/TiO2-x memristor at 4.2 K after metal-insulator transition suppression by cryogenic reforming

Pierre-Antoine Mouny, Raphaël Dawant, Bastien Galaup, Serge Ecoffey, Michel Pioro-Ladrière, Yann Beilliard, Dominique Drouin

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Pierre-Antoine Mouny, Raphaël Dawant, Bastien Galaup, Serge Ecoffey, Michel Pioro-Ladrière, et al. Analog programming of CMOS-compatible Al2O3/TiO2-x memristor at 4.2 K after metal-insulator transition suppression by cryogenic reforming. Applied Physics Letters, 2023, 123 (16), 10.1063/5.0170058. [hal-04298938](https://hal.science/hal-04298938v1)

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# Analog programming of CMOS-compatible Al₂O₃/TiO₂-x memristor at 4.2 K after metal-insulator transition suppression by cryogenic reforming

Pierre-Antoine Mouny ; Raphaël Dawant ; Bastien Galaup ; Serge Ecoffey ;

Michel Pioro-Ladrière ; Yann Beilliard ; Dominique Drouin

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Appl. Phys. Lett. 123, 163505 (2023)

https://doi.org/10.1063/5.0170058

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# Analog programming of CMOS-compatible Al₂O₃/TiO₂-x memristor at 4.2 K after metal-insulator transition suppression by cryogenic reforming

Cite as: Appl. Phys. Lett. **123**, 163505 (2023); doi: 10.1063/5.0170058

Submitted: 31 July 2023 · Accepted: 4 October 2023 ·

Published Online: 18 October 2023

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Pierre-Antoine Mouny,<fnref n="1" />,<fnref n="2" />,<fnref n="3" />,ᵃ⁾ ID Raphaël Dawant,<fnref n="1" />,<fnref n="2" /> ID Bastien Galaup,<fnref n="1" />,<fnref n="2" /> ID Serge Ecoffey,<fnref n="1" />,<fnref n="2" /> ID

Michel Pioro-Ladrière,<fnref n="2" />,<fnref n="3" /> ID Yann Beilliard,<fnref n="1" />,<fnref n="2" />,<fnref n="3" /> ID and Dominique Drouin<fnref n="1" />,<fnref n="2" />,<fnref n="3" /> ID

## AFFILIATIONS

## ABSTRACT

Exploration of memristors' behavior at cryogenic temperatures has become crucial due to the growing interest in quantum computing and cryogenic electronics. In this context, our study focuses on the characterization at cryogenic temperatures (4.2 K) of TiO₂-x-based memristors fabricated with a CMOS-compatible etch-back process. We demonstrate a so-called cryogenic reforming (CR) technique performed at 4.2 K to overcome the well-known metal-insulator transition (MIT), which limits the analog behavior of memristors at low temperatures. This cryogenic reforming process was found to be reproducible and led to a durable suppression of the MIT. This process allowed to reduce by ~20% the voltages required to perform DC resistive switching at 4.2 K. Additionally, conduction mechanism studies of memristors before and after cryogenic reforming from 4.2 to 300 K revealed different behaviors above 100 K, indicating a potential change in the conductive filament stoichiometry. The reformed devices exhibit a conductance level that is 50 times higher than ambient-formed memristor, and the conduction drop between 300 and 4.2 K is 100 times smaller, indicating the effectiveness of the reforming process. More importantly, CR enables analog programming at 4.2 K with typical read voltages allowing to store up to 4 bits of information on a single CR memristor. Suppressing the MIT improved the analog switching dynamics of the memristor leading to ~250% larger on/off ratios during long-term depression (LTD)/long-term potentiation (LTP) resistance tuning. This enhancement opens up the possibility of using TiO₂-x-based memristors to be used as synapses in neuromorphic computing at cryogenic temperatures.

© 2023 Author(s). All article content, except where otherwise noted, is licensed under a Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/). https://doi.org/10.1063/5.0170058

Memristors are among the leading candidates for the large-scale integration of nonvolatile memory and artificial synapses in neuromorphic architectures.<fnref n="1" /> While their characteristics have been widely investigated at 300 K, the growing interest in quantum computing and cryogenic electronics has led to new concepts based on memristors to overcome some of the engineering challenges encountered in scaling-up quantum computers.<fnref n="2" /> Recent works propose developing cryogenic-compatible CMOS-memristor hybrid circuits for applications such as tunable cryogenic DC sources,<fnref n="3" /> the charge state autotuning of quantum dots,⁴ or quantum error correction.⁵ In this context, cryogenic studies have been conducted on various types of emerging memory

based on HfO₂ (Refs. 6–8), AlOₓ (Ref. 9), HZO (Ref. 10), NiOₓ (Ref. 11), TaOₓ (Ref. 12), TiO₂-x (Refs. 13 and 14), and ferroelectric HZO.¹⁵,¹⁶ Additionally, cryo-dedicated memristors have been recently fabricated and demonstrated using a thermal enhancement capping layer¹⁷ to improve the switching stability at 4.2 K or based on organic substrates.¹⁸ New concepts such as magnetic topological insulator based memristors¹⁹,²⁰ and superconducting memristors based on conductance-asymmetric superconducting quantum interference device²¹ have already demonstrated premises of neuromorphic computing, namely, automated quantum state preparation.¹⁹ Among these candidates, TiO₂-x-based memristors present the most promising

<footnote n="1">¹Institut Interdisciplinaire d'Innovation Technologique (3IT), Université de Sherbrooke, Sherbrooke, Québec J1K 0A5, Canada</footnote>

<footnote n="2">²Laboratoire Nanotechnologies Nanosystèmes (LN2)-CNRS IRL-3463-3IT, Sherbrooke, Québec J1K 0A5, Canada</footnote>

<footnote n="3">³Institut Quantique (IQ), Université de Sherbrooke, Sherbrooke, Québec J1K 2R1, Canada</footnote>

<footnote>ᵃ) Author to whom correspondence should be addressed: pierre-antoine.mouny@usherbrooke.ca</footnote>
characteristics at room temperature including fully analog behavior, low switching voltages, and CMOS-compatibility.²² However, the cryogenic DC characterizations of memristors based on TiO₂-x exhibit a metal-insulator transition (MIT) at low voltages below 125 K.¹³,¹⁴,²³ This MIT is attributed to the Ti₄O₇ Magnéli phase and hinders its usage at cryogenic temperatures by limiting its Ohmic region.

In this work, we report a specific reforming methodology at cryogenic temperatures aiming to suppress the MIT of Al₂O₃/TiO₂-x memristors. We investigate the impact of both ambient temperature forming (AF) and cryogenic reforming (CR) on the conduction mechanisms of our devices from 4.2 to 300 K. Finally, we demonstrate that

the suppression of the MIT allows the quasi-linear analog tuning of the memristor resistance at 4.2 K using voltage pulses in a long-term depression (LTD)/long-term potentiation (LTP) tuning scheme.

The devices investigated consist of Ti/Al/TiN-Al₂O₃/TiO₂-x/Ti-x/TiN/Ti/Al, which represent the bottom electrode (BE), active stack, and top electrode (TE), respectively. The process flow is illustrated in Fig. 1(b). The first step of fabrication involves the sputtering deposition of a Ti (10 nm)/Al (150 nm)/TiN (70 nm) stack for the BE. This is followed by the deposition of the active switching stack of Al₂O₃ (1.4 nm) through atomic layer deposition, and TiO₂-x (30 nm) by reactive sputtering, along with Ti (10 nm)/TiN (70 nm). The vacuum was not

<figure><img src="image_19.png" /><figcaption>**FIG. 1.** (a) Focused ion beam (FIB) isometric cross section of the devices. The Al₂O₃/TiO₂-x crosspoints patterned at the intersection of the bottom electrodes (BEs) and top electrodes (TEs) are highlighted in red. The stoichiometry of TiO₂-x is tuned during reactive sputtering deposition by controlling oxygen flux, as demonstrated in a previous study.²⁴ (b) Schematic representation of the fabrication process flow: The BE and the active stack are patterned and etched together, followed by the deposition of an SiO₂ layer. The structures are revealed by chemical-mechanical polishing (CMP) and the TEs are patterned similarly to the BEs. During this step, the remaining active stack between the TEs is etched with the TEs. (c) I-V characteristics of the Al₂O₃/TiO₂-x crosspoints at 300 K before and after cryo-reforming. (d) I-V characteristics of ambient-formed (AF) and cryo-reformed (CR) memristors at 4.2 K. The reforming process is shown in the inset. Each shadowed blue curve represents a different CR memristor, highlighting the device-to-device variability. The shadowed red curves depict the cycle-to-cycle variability for an AF memristor. A CR memristor was measured at 4.2 K one month after cryo-reforming to show the retention of the MIT suppression on the cyan curve.</figcaption></figure>
broken between the depositions of the TiO$_{2}$$_{−}$$_{x}$ Ti, and TiN layers. The stoichiometries of TiO$_{2}$$_{−}$$_{x}$ were tuned by controlling the reactive sputtering regime and the oxidation state of the target. XPS and spectroscopic ellipsometry analyses revealed an increase in the oxygen vacancy defect concentration, as shown in a previous study.²⁴ A 200 nm-wide BE is patterned using electron beam lithography (EBPG5200), a negative resist (MaN2405), and an inductively coupled plasma (ICP) etching process with BCl$_{3}$/Cl$_{2}$/Ar chemistry. The BEs and the switching stack are both encapsulated through the deposition of 500 nm of SiO$_{2}$ using plasma-enhanced chemical vapor deposition (PECVD). Subsequently, a chemical–mechanical polishing (CMP) process is applied to planarize the SiO$_{2}$ surface and reveal the top surface of the BE. The TiN layer serves as a polishing stop layer for the CMP process. The SiO$_{2}$ dishing between the BE, measured by atomic force microscopy (AFM), is less than 5 nm. A 200 nm-wide TE made of Ti (10 nm)/Al (400 nm) is deposited and patterned similarly to the BE. The active stack between the TE lines is removed during the etching step of the TE. The devices are then encapsulated with a 600 nm layer of SiO$_{2}$ deposited by PECVD. Vias to contact the electrodes are patterned using electron beam lithography and ICP etching with SF$_{6}$ chemistry. Finally, Al (400 nm) connection lines are patterned to address the memristors. After this, a 1-min rapid thermal annealing step at 350 °C under an N$_{2}$ atmosphere is performed. As shown in the focused ion beam (FIB) isometric cross section in Fig. 1(a), the memory stack lies only at the intersection of the BEs and TEs, like a similar approach presented in the literature.²⁵

The memristor crosspoints are characterized from 4.2 to 300 K with a Keysight B1500A semiconductor device parameter analyzer with a 200 Msamples/s waveform generator module (WGFMU) on a Lakeshore CPX-VF cryogenic probe station. Both the sample and the magnet stage are heated when the device is warmed up to ensure temperature stability. For all measurements, the BEs are grounded and the signals are applied to the TEs. The memristor resistances are measured at low bias (0.02 V) with a DC sweep for the conduction mechanism studies, and they are measured with a 0.2 V/10 µs read pulse during pulsed characterizations. For all DC measurements, we limited the maximum current through the memristor to 500 µA using a custom current compliance board placed at 300 K to avoid overshoot during forming and DC sweeps. Prior to the cooldown, 10 memristors are ambient-formed (AF) at 300 K. We perform I–V measurements to benchmark the nonvolatile switching of our devices at room temperature [see Fig. 1(c)]. The sample is then cooled down to 4.2 K.

The first I–V measurements at 4.2 K on an AF memristor exhibit the MIT introduced by the Ti$_{4}$O$_{7}$ Magnéli phase over 5 DC cycles, as depicted by the red curve in Fig. 1(d).¹³,¹⁴ By applying an approximately two-times-larger positive DC sweep V$_{SET}$ = 2 V with a 500 µA compliance current to an AF memristor, one can observe an abrupt increase in the measured current up to the compliance current at ≈ 2 V, as shown in the inset of Fig. 1(d). This phenomenon is similar to electroforming and suggests that the conductive filament of the memristor is reformed. After this CR, we observe that consecutive DC switchings do not exhibit the characteristic MIT anymore as shown by the blue curve in Fig. 1(d). The CR process is reproducible as we create five reformed devices with similar DC behavior. Moreover, the DC cycle at 300 K after the cooldown exhibits a lower low resistance state (LRS) and high resistance state (HRS) compared to before CR was performed, suggesting that the diameter of the conductive filament is

larger due to CR as observed in Fig. 1(c). These CR memristor DC cycles show butterfly-shaped switchings as the room-temperature I–V curves measured prior to the cooldown. However, one can note that lower V$_{SET}$ and V$_{RESET}$ were needed to switch the memristor at 4.2 K, which is an interesting feature for low-power applications. We also investigate the retention of the MIT suppression by cooling down and measuring the same CR device one month later. The I–V characteristics of the CR memristor remained without MIT at 4.2 K [see the cyan curve in Fig. 1(d)]. It suggests that a permanent change to the conductive filament was made through CR yielding to different conduction mechanisms at cryogenic temperatures.

To investigate the change in the conduction mechanisms involved in the MIT suppression, we perform additional DC cycle measurements for both AF and CR devices from 10 to 200 K and extract the conductances at each temperature for the LRS by reading the current at 20 mV. As shown in Fig. 2(c), the conductance decreases with temperature for the two types of devices. For the TiO$_{2}$$_{−}$$_{x}$ memristors exhibiting the MIT (AF memristors), the temperature-dependent conductance G(T) can be described by an Arrhenius equation:

$$G^{\text{MIT}}(T) = G_0 \exp\left(-\frac{E_a}{k_B T}\right)^{\alpha}, \quad (1)$$

where α depends on the transport mechanism [e.g., α = 1 for nearest neighbor hopping (NNH) conduction$^{26}$], G$_{0}$ is a pre-exponential

<figure><img src="image_20.png" /><figcaption>FIG. 2. (a) Efros–Shklovskii VRH conductance fit [Eq. (3)] for a CR memristor at LRS between 4.2 and 77 K. (b) Mott VRH conductance fit [Eq. (2)] for a CR memristor at the LRS between 100 and 200 K. (c) Temperature dependence of the memristor conductance. The CR memristor LRS conductance is fitted by Eq. (4) using the parameters from Table I while the AF memristor LRS conductance is fitted with an Arrhenius law [Eq. (1) α = 1] for T > 35 K and an ES-VRH law for T ≤ 35 K. The conductances are measured at 20 mV. The AF memristor and CR memristor conductances are measured five times after a RESET/SET operation at each temperature to assess the cycle-to-cycle variability shown in the error bars.</figcaption></figure>
factor, and $E_a$ is the thermal activation energy.¹⁴,²⁶ The LRS conductance of the AF memristor fits linearly with (1) for $\alpha = 1$ between 300 and 77 K and $\alpha = 0.5$ between 77 and 4.2 K, which corresponds to Efros–Shklovskii variable-range hopping (ES-VRH) as reported in Ref. 14.

Regarding the CR devices, Fig. 2(b) shows a linear relationship between $\ln(GT^{1/2})$ and $T^{-1/4}$ from 100 to 200 K. This indicates that the conduction in the oxide layer is governed by Mott’s variable-range-hopping (Mott-VRH) mechanism instead of the simple thermally activated hopping exhibited by the AF memristors. The conductance governed by the Mott-VRH law is given by

$$G_{\text{Mott}}(T) = G_{0,\text{Mott}} T^{-1/2} \exp \left[ - \left( \frac{T_{0,\text{Mott}}}{T} \right)^{1/4} \right], \quad (2)$$

where $T_{0,\text{Mott}}$ is a characteristic temperature coefficient and $G_{0,\text{Mott}}$ is the conductance at $T_0$ (Refs. 26 and 27). Meanwhile at lower temperatures, $\ln(GT)$ fits linearly with $T^{-1/2}$, which suggests that the conduction mechanism is described by the ES-VRH law below 77 K [see Fig. 2(a)]. The ES-VRH governed conductance is given by

$$G_{\text{ES}}(T) = G_{0,\text{ES}} T^{-1} \exp \left[ - \left( \frac{T_{0,\text{ES}}}{T} \right)^{1/2} \right]. \quad (3)$$

Thus, the total conductance of the CR memristor can be defined using the sum of the contributions from the Mott-VRH conduction mechanism and the ES-VRH conduction mechanism:²⁷

$$G(T) = G_{\text{Mott}}(T) + G_{\text{ES}}(T). \quad (4)$$

The total conductance predicted by Eq. (4) is in good agreement with our experimental data using the fitted parameters for the ES-VRH and Mott-VRH conduction mechanisms [see Fig. 2(c) for the fit and Table I for the fitted parameters].

The conduction mechanisms for $T > 77$ K differ for the CR (Mott-VRH) and AF (NNH) memristors, which could explain the MIT suppression. The CR memristor exhibits conductances that are two orders of magnitude larger for temperature below the MIT temperature ($\approx 100–125$ K).¹³ The conductance of the AF memristor decreases by over two orders of magnitude from 300 K to 4.2 K while it decreases by only a factor of 5 for the CR memristor over the same temperature range. This validates the suppression of the MIT regime for the CR devices, as it does not exhibit an important conductance drop with decreasing temperature. The CR device shows a crossover from $T^{-1/4}$ to $T^{-1/2}$ dependence within the temperature range from

80 to 100 K as demonstrated in Ref. 27 for $TiO_2$ thin films. This transition is sometimes attributed to small-polaron hopping in binary oxides, such as $HfO_{2-x}$ (Ref. 28), $ZrO_2$ (Ref. 29), or $TiO_{2-x}$ (Ref. 30), when the slope transition is observed at a temperature above their Debye temperature. However, the crossing measured in our devices is attributed to a change in the type of hoping as exhibited by transition metal oxides for temperatures significantly below their Debye temperature.⁷,¹⁴,²⁷ This significant change in the conduction mechanisms governing the memristor conductance with respect to the temperature suggests that $Ti_4O_7$ has been suppressed. One possible explanation is that the previously crystalline conductive filament became amorphous due to a quenching effect during the reforming procedure at cryogenic temperatures, similarly to the switching mechanism of phase-change memory,³¹ leading to the creation of an amorphous phase inside the conductive filament. This phase change of the oxide layer is validated by the retention of the reformed state demonstrated in Fig. 1(d), which suggests a durable suppression of $Ti_4O_7$ in the vicinity of the conductive filament.

Finally, we investigate the impact of the MIT suppression induced by cryogenic reforming on the analog switching dynamics of our $Al_2O_3/TiO_{2-x}$ memristors using pulse programming. To do this, we measure the same device before and after reforming. Resistance tuning is assessed on this memristor by measuring long-term resistance potentiation (LTP) and depression (LTD) at 4.2 K. A write/verify pulse train comprised of one 200 ns/±0.9 V write pulse and one 10 µs/0.2 V (or 0.6 V) read pulse is applied 100 times with a constant positive amplitude for the write pulse (LTP) and 100 times with a constant negative amplitude (LTD). This pattern is repeated seven times to verify the stability of the LTD/LTP tuning. This whole protocol is performed 10 times in order to evaluate the cycle-to-cycle variability [background shadow in Fig. 3(a)]. For the typical read voltage (0.2 V), the resistance of the AF memristor remains unchanged, as the reading is performed in the insulator region of the memristor as depicted in Fig. 1(d). By increasing the reading voltage to 0.6 V to operate above the insulator regime, one can observe typical LTD/LTP resistance tuning for the AF memristor that exhibits an on/off ratio of ≈ 2 for a write amplitude of ±0.9 V. After reforming, we repeat the measurement with the same write amplitude but lowered the read voltage to 0.2 V. In this case, the CR memristor demonstrates a larger on/off ratio of ≈ 5 in a larger absolute memory window.

The LTP and LTD characteristics are quasi-linear and stable for both the AF memristor read at 0.6 V and CR memristor read at 0.2 V, which ensures fully analog tunability of the memristor resistance over the respective 7–14 kΩ and 20–100 kΩ ranges before and after the reforming. Thus, reforming the memristors increases the resistance on/off ratio, which allows a larger resistance tunability in cryogenic neuromorphic circuit and an increased resolution for synaptic weight encoding. Additionally, one can observe that the reading region for CR memristors at 4.2 K (0–0.6 V) is similar to the one exhibited at room temperature [see Fig. 1(c)]. Having a large read region is an important feature for vector matrix multiplication (VMM),³³ as it improves the achievable resolution for the input vector and thus provides a more accurate VMM result overall.³⁴

On the other hand, it was observed that AF memristors offered a smaller read region, ranging from 0.6 to 0.8 V, along with smaller resistance values when the AF memristor is read in this region. Both the smaller resistance and the higher read voltage range introduce

<table><caption>TABLE I. Fitting parameters for the CR memristor conductance at the LRS [see the blue diamonds in Fig. 2(c)] and for the AF memristor conductance at the LRS [see the red squares in Fig. 2(c)]. N.A. indicates that the fitting parameter is not applicable.</caption><thead><tr><th>Fit</th><th>G<sub>0</sub> (S)</th><th>T<sub>0</sub> (K)</th><th>E<sub>a</sub> (meV)</th></tr></thead><tbody><tr><td>ES-VRH (no MIT)</td><td>1.15 × 10<sup>-2</sup></td><td>54.49</td><td>N.A.</td></tr><tr><td>Mott-VRH (no MIT)</td><td>42.15</td><td>1.42 × 10<sup>6</sup></td><td>N.A.</td></tr><tr><td>NNH Arrhenius (MIT)</td><td>7.5 × 10<sup>-4</sup></td><td>N.A.</td><td>41.8</td></tr><tr><td>ES-VRH (MIT)</td><td>3.02 × 10<sup>-6</sup></td><td>46.1</td><td>N.A.</td></tr></tbody></table>
<figure><img src="image_21.png" /><figcaption>FIG. 3. (a) Long-term potentiation (LTP) and depression (LTD) curves for a CR memristor (blue) and an AF memristor (red and green) at 4.2 K. The write pulse parameters are $t_{\text{write}} = 200$ ns and $V_{\text{write}} = \pm 0.9$ V. The read pulse parameters are $t_{\text{read}} = 10$ µs and $V_{\text{read}} = 0.2$ or $0.6$ V. Each curve is an average over ten measurements, and the standard deviation is shown in the background shadow. (b) Multilevel programming of 16 equally spaced resistance states at 4.2 K. The resistance is programming using a read-write-verify feedback algorithm.³² $V_p^{\text{min}} = 0.5$ V and $V_p^{\text{max}} = -0.5$ V were chosen as initial pulse amplitudes with an amplitude step of 0.01 V. (c) Retention of the 16 states programmed at 4.2 K. Each state is measured for 50 s every 10 ms while being biased at 0.2 V. The programmed states are nonvolatile for the entirety of the measurement.</figcaption></figure>

additional power consumption during inference, which is detrimental in the context of cryogenic environments. However, in the insulator region, the conductance of the AF memristor is not changed, i.e., for amplitudes lower than 0.6 V. This property can be leveraged and used as a selector.¹⁴ It would allow one to accurately program each device in a crossbar without influencing the resistance of the surrounding memristors.³⁵ This presents an interesting trade-off between the programming accuracy of the weights, the power consumption, and the on/off resistance ratios. For applications that do not require to reprogram the crossbar several times, such as neural network inference accelerators,⁴ the CR approach should be preferred by taking advantage of the larger on/off ratios. For programming-intensive applications, the AF approach should be considered as the MIT induced selector could allow to program accurately large crossbars.

Additionally, the analog behavior of memristors can be exploited to precisely tune several resistance states.³,³² We report 16 equally spaced resistance states ($\approx 4$ kΩ step) at 4.2 K [see Fig. 3(b)], programmed with ~50 write pulses for each state within a 1.5% allowed programming error. The CR memristor is tuned using a read-write-verify feedback algorithm from Ref. 32. At each step, a 200 ns write pulse is applied of either negative amplitude to increase the resistance or positive amplitude to decrease the resistance. A 1 µs/200 mV read

pulse is then applied to measure the CR memristor resistance. The next write pulse amplitude is increased linearly by 10 mV-step if the target resistance is not met. Once the target resistance is reached, the memristor is read 20 times to ensure stability and then the associated retention measured starts. The retention of each programmed state is verified over a 50 s reading measurement [see Fig. 3(c)].

In conclusion, we conducted electrical characterizations of Al₂O₃/TiO₂-x memristors at cryogenic temperatures and proposed a method called cryogenic reforming to suppress the metal-insulator transition introduced by Ti₄O₇ below 125 K. Using the cryogenic reforming methodology, we demonstrated resistive switching at 4.2 K without insulator regime and a retention of the MIT suppression for over a month hinting at a permanent change of the conductive filament. Moreover, the study of temperature dependence of the conductance suggests different conduction mechanisms for the AF and CR memristors from 77 to 200 K. This validates the idea that the conductive filament has undergone intrinsic changes through the reforming process. The CR memristor exhibits a conduction drop at 4.2 K that is 100 times smaller than that of the AF memristor due to the MIT suppression. Finally, we demonstrated that CR memristors have a fully analog behavior at 4.2 K, which would enable the development of memristor-based cryogenic electronics applied to quantum technologies.
Additionally, the CR memristor could be a good candidate for reliable multi-bit cryogenic memory. AF devices exhibit a smaller memory window but have a built-in selector below 100 K thanks to the MIT that could be utilized for large crossbar applications. Our work is a stepping stone toward memristor-based cryogenic applications in quantum technologies showing the viability of the TiO₂-x-based memristor at deep cryogenic temperatures.

This work was supported by the Natural Sciences and Engineering Research Council of Canada (NSERC) and the Canada First Research Excellence Fund (APOGEE). This research was undertaken with the support from Laboratoire Nanotechnologies Nanosystèmes (LN2), which is a French-Canadian Joint International Research Laboratory (IRL3463), funded and co-operated by Centre National de la Recherche Scientifique (CNRS), Université de Sherbrooke, Université de Grenoble Alpes (UGA), École Centrale Lyon (ECL), and Institut National des Sciences Appliquées (INSA) Lyon. We acknowledge financial support from the Fonds de Recherche du Québec Nature et Technologie (FRQNT).

## AUTHOR DECLARATIONS

### Conflict of Interest

The authors have no conflicts to disclose.

### Author Contributions

**Pierre-Antoine Mouny:** Conceptualization (equal); Data curation (equal); Formal analysis (lead); Investigation (lead); Methodology (lead); Validation (equal); Visualization (lead); Writing – original draft (lead); Writing – review & editing (equal). **Raphaël Dawant:** Conceptualization (equal); Data curation (supporting); Investigation (supporting); Resources (lead); Validation (equal); Visualization (supporting); Writing – original draft (supporting); Writing – review & editing (equal). **Bastien Galaup:** Data curation (equal); Formal analysis (supporting); Investigation (supporting); Methodology (supporting); Validation (equal); Writing – review & editing (equal). **Serge Ecoffey:** Project administration (supporting); Resources (supporting); Supervision (supporting); Validation (equal); Writing – review & editing (equal). **Michel Pioro-Ladrière:** Funding acquisition (supporting); Project administration (supporting); Supervision (supporting); Writing – review & editing (equal). **Yann Beilliard:** Conceptualization (equal); Investigation (supporting); Project administration (lead); Supervision (supporting); Validation (equal); Writing – original draft (supporting); Writing – review & editing (equal). **Dominique Drouin:** Conceptualization (equal); Funding acquisition (lead); Project administration (supporting); Supervision (lead); Validation (equal); Writing – original draft (supporting); Writing – review & editing (equal).

## DATA AVAILABILITY

The data underlying the results presented in this paper are not publicly available at this time but may be obtained from the authors upon reasonable request.

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