<figure><img src="image_10.png" /><figcaption>Fig. 9. Energy consumption, task reliability, average RUF, and switching overhead comparisons of various task mapping methods with different task DAGs.</figcaption></figure>

[10] S. Moulik, Z. Das, R. Devaraj, and S. Chakraborty, "SEAMERS: A semi-partitioned energy-aware scheduler for heterogeneous multicore real-time systems," *J. Syst. Archit.*, vol. 114, pp. 101953:1-101953:11, 2021.

[11] Y. Sharma and S. Moulik, "CETAS: a cluster based energy and temperature efficient real-time scheduler for heterogeneous platforms," in *ACM/SIGAPP Symposium on Applied Computing*, 2022, pp. 501-509.

[12] Y. Sharma, S. Chakraborty, and S. Moulik, "ETA-HP: an energy and temperature-aware real-time scheduler for heterogeneous platforms," *J. Supercomput.*, vol. 78, no. 8, pp. 1-25, 2022.

[13] J. Han, M. Lin, D. Zhu, and L. T. Yang, "Contention-aware energy management scheme for NoC-based multicore real-time systems," *IEEE Trans. Parallel Distrib. Syst.*, vol. 26, no. 3, pp. 691-701, 2014.

[14] D. Li and J. Wu, "Energy-efficient contention-aware application mapping and scheduling on NoC-based MPSoCs," *J. Parallel Distrib. Comput.*, vol. 96, pp. 1-11, 2016.

[15] H. Ali, U. U. Tariq, Y. Zheng, X. Zhai, and L. Liu, "Contention & energy-aware real-time task mapping on NoC based heterogeneous MPSoCs," *IEEE Access*, vol. 6, pp. 75110-75123, 2018.

[16] U. U. Tariq, H. Wu, and S. Abd Ishak, "Energy-aware scheduling of conditional task graphs on NoC-based MPSoCs," in *International Conference on System Sciences*, 2018, p. 5707-5716.

[17] D. Zhu, R. Melhem, and D. Mossé, "The effects of energy management on reliability in real-time embedded systems," in *IEEE/ACM International Conference on Computer-Aided Design*, 2004, pp. 35-40.

[18] C. Wu, C. Deng, L. Liu, J. Han, J. Chen, S. Yin, and S. Wei, "An efficient application mapping approach for the co-optimization of reliability, energy, and performance in reconfigurable NoC architectures," *IEEE Trans. Comput.-Aided Design Integr. Circuits Syst.*, vol. 34, no. 8, pp. 1264-1277, 2015.

[19] C. Wu, C. Deng, L. Liu, J. Han, J. Chen, S. Yin, and S. Wei, "A multi-objective model oriented mapping approach for NoC-based computing systems," *IEEE Trans. Parallel Distrib. Syst.*, vol. 28, no. 3, pp. 662-676, 2016.

[20] N. Chatterjee, S. Paul, and S. Chattopadhyay, "Task mapping and scheduling for network-on-chip based multi-core platform with transient faults," *J. Syst. Archit.*, vol. 83, pp. 34-56, 2018.

[21] L. Mo, Q. Zhou, A. Kritikakou, and J. Liu, "Energy efficient, real-time and reliable task deployment on NoC-based multicores with DVFS," in *IEEE Design, Automation and Test in Europe*, 2022, pp. 1347-1352.

[22] M. Mandelli, L. Ost, G. Sassatelli, and F. Moraes, "Trading-off system load and communication in mapping heuristics for improving NoC-based MPSoCs reliability," in *International Symposium on Quality Electronic Design*, 2015, pp. 392-396.

[23] C. Liu, K. Li, and K. Li, "A game approach to multi-servers load balancing with load-dependent server availability consideration," *IEEE Trans. on Cloud Comput.*, vol. 9, no. 1, pp. 1-13, 2018.

[24] K. Li, W. Yang, and K. Li, "Performance analysis and optimization for SpMV on GPU using probabilistic modeling," *IEEE Trans. Parallel Distrib. Syst.*, vol. 26, no. 1, pp. 196-205, 2014.

[25] J. He, Y. Xiao, C. Bogdan, S. Nazarian, and P. Bogdan, "A design methodology for energy-aware processing in unmanned aerial vehicles," *ACM Trans. Des. Autom. Electron. Syst.*, vol. 27, no. 1, pp. 1-20, 2021.

[26] H. R. Mendis, N. C. Audsley, and L. S. Indrusiak, "Dynamic and static task allocation for hard real-time video stream decoding on NoCs," *Leibniz Trans. Embed. Comput. Syst.*, vol. 4, no. 2, pp. 01:1-01:25, 2017.

[27] S. Abd Ishak, H. Wu, and U. U. Tariq, "Energy-aware task scheduling on heterogeneous NoC-based MPSoCs," in *IEEE International Conference on Computer Design*, 2017, pp. 165-168.

[28] A. Namazi, M. Abdollahi, S. Safari, and S. Mohammadi, "A majority-based reliability-aware task mapping in high-performance homogenous NoC architectures," *ACM Trans. Embed. Comput. Syst.*, vol. 17, no. 1, pp. 1-31, 2017.

[29] Y. Sharma and S. Moulik, "FATS-2TC: A fault tolerant real-time scheduler for energy and temperature aware heterogeneous platforms with two types of cores," *Microprocess. Microsyst.*, vol. 96, pp. 104744:1-104744:9, 2023.

[30] T. Maqsood, K. Bilal, and S. A. Madani, "Congestion-aware core mapping for network-on-chip based systems using betweenness centrality," *Future Gener. Comput. Syst.*, vol. 82, pp. 459-471, 2018.

[31] L. Yang, W. Liu, W. Jiang, M. Li, J. Yi, and E. H.-M. Sha, "Application mapping and scheduling for network-on-chip-based multiprocessor system-on-chip with fine-grain communication optimization," *IEEE Trans. Very Large Scale Integr. VLSI Syst.*, vol. 24, no. 10, pp. 3027-3040, 2016.

[32] O. He, S. Dong, W. Jang, J. Bian, and D. Z. Pan, "UNISM: Unified scheduling and mapping for general networks on chip," *IEEE Trans. Very Large Scale Integr. VLSI Syst.*, vol. 20, no. 8, pp. 1496-1509, 2011.

[33] Q. Le, G. Yang, W. N. Hung, X. Song, and F. Fan, "Performance-driven assignment and mapping for reliable networks-on-chips," *J. Zhejiang Univ. - Sci. C*, vol. 15, no. 11, pp. 1009-1020, 2014.

[34] R. Yan, Y. Zhou, A. Cai, C. Li, Y. Yan, and M. Yin, "Contention-aware mapping and scheduling optimization for NoC-based mpsocs," in *International Conference on Automated Planning and Scheduling*, vol. 30, 2020, pp. 305-313.

[35] P. Pop, K. H. Poulsen, V. Izosimov, and P. Eles, "Scheduling and voltage scaling for energy/reliability trade-offs in fault-tolerant time-triggered embedded systems," in *IEEE/ACM International Conference on Hardware/software Codesign and System Synthesis*, 2007, pp. 233-238.

[36] Y. Guo, D. Zhu, and H. Aydin, "Reliability-aware power management for parallel real-time applications with precedence constraints," in *International Green Computing Conference and Workshops*, 2011, pp. 1-8.

[37] B. Acun, K. Chandrasekar, and L. V. Kale, "Fine-grained energy efficiency using per-core DVFS with an adaptive runtime system," in *International Green and Sustainable Computing Conference*, 2019, pp. 1-8.

[38] G. Quan and V. Chaturvedi, "Feasibility analysis for temperature-constraint hard real-time periodic tasks," *IEEE Trans. Industr. Inform.*, vol. 6, no. 3, pp. 329-339, 2010.

[39] L. Mo, A. Kritikakou, and O. Sentieys, "Controllable QoS for imprecise computation tasks on DVFS multicores with time and energy constraints," *IEEE J. Emerging Sel. Top. Circuits Syst.*, vol. 8, no. 4, pp. 708-721, 2018.

[40] O. Astrachan, "Bubble sort: an archaeological algorithmic analysis," *ACM SIGCSE bulletin*, vol. 35, no. 1, pp. 1-5, 2003.

[41] H. Topcuoglu, S. Hariri, and M. Wu, "Performance-effective and low-complexity task scheduling for heterogeneous computing," *IEEE Trans. Parallel Distrib. Syst.*, vol. 13, no. 3, pp. 260-274, 2002.

[42] H. Arabnejad and J. G. Barbosa, "List scheduling algorithm for heterogeneous systems by an optimistic cost table," *IEEE Trans. Parallel Distrib. Syst.*, vol. 25, no. 3, pp. 682-694, 2013.

[43] E. Deelman, G. Singh, M. Su, J. Blythe, Y. Gil, C. Kesselman, G. Mehta, K. Vahi, G. B. Berriman, J. Good, A. Laity, J. C. Jacob, and D. S. Katz, "Pegasus: A framework for mapping complex scientific workflows onto distributed systems," *Sci. Program.*, vol. 13, no. 3, pp. 219-237, 2005.

[44] J. Zhou, J. Yan, T. Wei, M. Chen, and X. S. Hu, "Energy-adaptive scheduling of imprecise computation tasks for QoS optimization in real-time MPSoC systems," in *IEEE Design, Automation and Test in Europe*, 2017, pp. 1402-1407.

[45] X. Li, L. Mo, A. Kritikakou, and O. Sentieys, "Approximation-aware task deployment on heterogeneous multicore platforms with DVFS," *IEEE Trans. Comput.-Aided Design Integr. Circuits Syst.*, vol. 42, no. 7, pp. 2108-2121, 2023.
<figure><img src="image_12.png" /><figcaption>Fig. 9. Energy consumption, task reliability, average RUF, and switching overhead comparisons of various task mapping methods with different task DAGs.</figcaption></figure>

[10] S. Moulik, Z. Das, R. Devaraj, and S. Chakraborty, "SEAMERS: A semi-partitioned energy-aware scheduler for heterogeneous multicore real-time systems," *J. Syst. Archit.*, vol. 114, pp. 101953:1–101953:11, 2021.

[11] Y. Sharma and S. Moulik, "CETAS: a cluster based energy and temperature efficient real-time scheduler for heterogeneous platforms," in *ACM/SIGAPP Symposium on Applied Computing*, 2022, pp. 501–509.

[12] Y. Sharma, S. Chakraborty, and S. Moulik, "ETA-HP: an energy and temperature-aware real-time scheduler for heterogeneous platforms," *J. Supercomput.*, vol. 78, no. 8, pp. 1–25, 2022.

[13] J. Han, M. Lin, D. Zhu, and L. T. Yang, "Contention-aware energy management scheme for NoC-based multicore real-time systems," *IEEE Trans. Parallel Distrib. Syst.*, vol. 26, no. 3, pp. 691–701, 2014.

[14] D. Li and J. Wu, "Energy-efficient contention-aware application mapping and scheduling on NoC-based MPSoCs," *J. Parallel Distrib. Comput.*, vol. 96, pp. 1–11, 2016.

[15] H. Ali, U. U. Tariq, Y. Zheng, X. Zhai, and L. Liu, "Contention & energy-aware real-time task mapping on NoC based heterogeneous MPSoCs," *IEEE Access*, vol. 6, pp. 75110–75123, 2018.

[16] U. U. Tariq, H. Wu, and S. Abd Ishak, "Energy-aware scheduling of conditional task graphs on NoC-based MPSoCs," in *International Conference on System Sciences*, 2018, p. 5707–5716.

[17] D. Zhu, R. Melhem, and D. Mossé, "The effects of energy management on reliability in real-time embedded systems," in *IEEE/ACM International Conference on Computer-Aided Design*, 2004, pp. 35–40.

[18] C. Wu, C. Deng, L. Liu, J. Han, J. Chen, S. Yin, and S. Wei, "An efficient application mapping approach for the co-optimization of reliability, energy, and performance in reconfigurable NoC architectures," *IEEE Trans. Comput.-Aided Design Integr. Circuits Syst.*, vol. 34, no. 8, pp. 1264–1277, 2015.

[19] C. Wu, C. Deng, L. Liu, J. Han, J. Chen, S. Yin, and S. Wei, "A multi-objective model oriented mapping approach for NoC-based computing systems," *IEEE Trans. Parallel Distrib. Syst.*, vol. 28, no. 3, pp. 662–676, 2016.

[20] N. Chatterjee, S. Paul, and S. Chattopadhyay, "Task mapping and scheduling for network-on-chip based multi-core platform with transient faults," *J. Syst. Archit.*, vol. 83, pp. 34–56, 2018.

[21] L. Mo, Q. Zhou, A. Kritikakou, and J. Liu, "Energy efficient, real-time and reliable task deployment on NoC-based multicores with DVFS," in *IEEE Design, Automation and Test in Europe*, 2022, pp. 1347–1352.

[22] M. Mandelli, L. Ost, G. Sassatelli, and F. Moraes, "Trading-off system load and communication in mapping heuristics for improving NoC-based MPSoCs reliability," in *International Symposium on Quality Electronic Design*, 2015, pp. 392–396.

[23] C. Liu, K. Li, and K. Li, "A game approach to multi-servers load balancing with load-dependent server availability consideration," *IEEE Trans. on Cloud Comput.*, vol. 9, no. 1, pp. 1–13, 2018.

[24] K. Li, W. Yang, and K. Li, "Performance analysis and optimization for SpMV on GPU using probabilistic modeling," *IEEE Trans. Parallel Distrib. Syst.*, vol. 26, no. 1, pp. 196–205, 2014.

[25] J. He, Y. Xiao, C. Bogdan, S. Nazarian, and P. Bogdan, "A design methodology for energy-aware processing in unmanned aerial vehicles," *ACM Trans. Des. Autom. Electron. Syst.*, vol. 27, no. 1, pp. 1–20, 2021.

[26] H. R. Mendis, N. C. Audsley, and L. S. Indrusiak, "Dynamic and static task allocation for hard real-time video stream decoding on NoCs," *Leibniz Trans. Embed. Comput. Syst.*, vol. 4, no. 2, pp. 01:1–01:25, 2017.

[27] S. Abd Ishak, H. Wu, and U. U. Tariq, "Energy-aware task scheduling on heterogeneous NoC-based MPSoCs," in *IEEE International Conference on Computer Design*, 2017, pp. 165–168.

[28] A. Namazi, M. Abdollahi, S. Safari, and S. Mohammadi, "A majority-based reliability-aware task mapping in high-performance homogenous NoC architectures," *ACM Trans. Embed. Comput. Syst.*, vol. 17, no. 1, pp. 1–31, 2017.

[29] Y. Sharma and S. Moulik, "FATS-2TC: A fault tolerant real-time scheduler for energy and temperature aware heterogeneous platforms with two types of cores," *Microprocess. Microsyst.*, vol. 96, pp. 104744:1–104744:9, 2023.

[30] T. Maqsood, K. Bilal, and S. A. Madani, "Congestion-aware core mapping for network-on-chip based systems using betweenness centrality," *Future Gener. Comput. Syst.*, vol. 82, pp. 459–471, 2018.

[31] L. Yang, W. Liu, W. Jiang, M. Li, J. Yi, and E. H.-M. Sha, "Application mapping and scheduling for network-on-chip-based multiprocessor system-on-chip with fine-grain communication optimization," *IEEE Trans. Very Large Scale Integr. VLSI Syst.*, vol. 24, no. 10, pp. 3027–3040, 2016.

[32] O. He, S. Dong, W. Jang, J. Bian, and D. Z. Pan, "UNISM: Unified scheduling and mapping for general networks on chip," *IEEE Trans. Very Large Scale Integr. VLSI Syst.*, vol. 20, no. 8, pp. 1496–1509, 2011.

[33] Q. Le, G. Yang, W. N. Hung, X. Song, and F. Fan, "Performance-driven assignment and mapping for reliable networks-on-chips," *J. Zhejiang Univ. - Sci. C*, vol. 15, no. 11, pp. 1009–1020, 2014.

[34] R. Yan, Y. Zhou, A. Cai, C. Li, Y. Yan, and M. Yin, "Contention-aware mapping and scheduling optimization for NoC-based mpsocs," in *International Conference on Automated Planning and Scheduling*, vol. 30, 2020, pp. 305–313.

[35] P. Pop, K. H. Poulsen, V. Izosimov, and P. Eles, "Scheduling and voltage scaling for energy/reliability trade-offs in fault-tolerant time-triggered embedded systems," in *IEEE/ACM International Conference on Hardware/software Codesign and System Synthesis*, 2007, pp. 233–238.

[36] Y. Guo, D. Zhu, and H. Aydin, "Reliability-aware power management for parallel real-time applications with precedence constraints," in *International Green Computing Conference and Workshops*, 2011, pp. 1–8.

[37] B. Acun, K. Chandrasekar, and L. V. Kale, "Fine-grained energy efficiency using per-core DVFS with an adaptive runtime system," in *International Green and Sustainable Computing Conference*, 2019, pp. 1–8.

[38] G. Quan and V. Chaturvedi, "Feasibility analysis for temperature-constraint hard real-time periodic tasks," *IEEE Trans. Industr. Inform.*, vol. 6, no. 3, pp. 329–339, 2010.

[39] L. Mo, A. Kritikakou, and O. Sentieys, "Controllable QoS for imprecise computation tasks on DVFS multicores with time and energy constraints," *IEEE J. Emerging Sel. Top. Circuits Syst.*, vol. 8, no. 4, pp. 708–721, 2018.

[40] O. Astrachan, "Bubble sort: an archaeological algorithmic analysis," *ACM SIGCSE bulletin*, vol. 35, no. 1, pp. 1–5, 2003.

[41] H. Topcuoglu, S. Hariri, and M. Wu, "Performance-effective and low-complexity task scheduling for heterogeneous computing," *IEEE Trans. Parallel Distrib. Syst.*, vol. 13, no. 3, pp. 260–274, 2002.

[42] H. Arabnejad and J. G. Barbosa, "List scheduling algorithm for heterogeneous systems by an optimistic cost table," *IEEE Trans. Parallel Distrib. Syst.*, vol. 25, no. 3, pp. 682–694, 2013.

[43] E. Deelman, G. Singh, M. Su, J. Blythe, Y. Gil, C. Kesselman, G. Mehta, K. Vahi, G. B. Berriman, J. Good, A. Laity, J. C. Jacob, and D. S. Katz, "Pegasus: A framework for mapping complex scientific workflows onto distributed systems," *Sci. Program.*, vol. 13, no. 3, pp. 219–237, 2005.

[44] J. Zhou, J. Yan, T. Wei, M. Chen, and X. S. Hu, "Energy-adaptive scheduling of imprecise computation tasks for QoS optimization in real-time MPSoC systems," in *IEEE Design, Automation and Test in Europe*, 2017, pp. 1402–1407.

[45] X. Li, L. Mo, A. Kritikakou, and O. Sentieys, "Approximation-aware task deployment on heterogeneous multicore platforms with DVFS," *IEEE Trans. Comput.-Aided Design Integr. Circuits Syst.*, vol. 42, no. 7, pp. 2108–2121, 2023.
<figure><img src="image_11.png" /></figure>

**Lei Mo** (S'13–M'17) is currently an associate professor with the School of Automation, Southeast University, Nanjing, China. He received the B.S. degree from the College of Telecom Engineering and Information Engineering, Lanzhou University of Technology, Lanzhou, China, in 2007, and the Ph.D. degree from the College of Automation Science and Engineering, South China University of Technology, Guangzhou, China, in 2013. From 2013 to 2015, he was a research fellow with the Department of Control Science and Engineering, Zhejiang University, China. From 2015

to 2017, he was a research fellow with INRIA Nancy-Grand Est, France. From 2017 to 2019, he was a research fellow with INRIA Rennes-Bretagne Atlantique, France. His current research interests include networked estimation and control in wireless sensor and actuator networks, cyber-physical systems, task mapping and resource allocation in embedded systems. He serves as an Associate Editor for KSII Transactions on Internet and Information Systems, and International Journal of Ad Hoc and Ubiquitous Computing, and a TPC Member for several international conferences.

<figure><img src="image_12.png" /></figure>

**Xinmei Li** received her B.S. degree in automation engineering from Sichuan University, Chengdu, China, in 2021. She is currently working towards the M.S. degree in Control Science and Engineering at South-east University, Nanjing, China. Her current research interests include embedded and real-time systems, and network-on-chip.

<figure><img src="image_13.png" /></figure>

**Angeliki Kritikakou** is currently an Associate Professor at University of Rennes 1 and IRISA - INRIA Rennes research center. She received her Ph.D. in 2013 from the Department of Electrical and Computer Engineering at University of Patras, Greece and in collaboration with IMEC Research Center, Belgium. She worked for one year as a Postdoctoral Research Fellow at the Department of Modelling and Information Processing (DTIM) at ONERA in collaboration with Laboratory of Analysis and Architecture of Systems (LAAS) and the University of Toulouse, France. Her

research interests include embedded systems, real-time systems, mixed-critical systems, hardware/software co-design, mapping methodologies, design space exploration methodologies, memory management methodologies, low power design, and fault tolerance.

<figure><img src="image_14.png" /></figure>

**Xiaojun Zhai** (SM'21) is currently a Reader in the Embedded Intelligent Systems Laboratory at the University of Essex. He has authored/co-authored over 140 scientific papers in international journals and conference proceedings. His research interests mainly include the design and implementation of the digital image and signal processing algorithms, custom computing using FPGAs, embedded systems, and hardware/software co-design.
<figure><img src="image_13.png" /></figure>

**Lei Mo** (S'13–M'17) is currently an associate professor with the School of Automation, Southeast University, Nanjing, China. He received the B.S. degree from the College of Telecom Engineering and Information Engineering, Lanzhou University of Technology, Lanzhou, China, in 2007, and the Ph.D. degree from the College of Automation Science and Engineering, South China University of Technology, Guangzhou, China, in 2013. From 2013 to 2015, he was a research fellow with the Department of Control Science and Engineering, Zhejiang University, China. From 2015

to 2017, he was a research fellow with INRIA Nancy-Grand Est, France. From 2017 to 2019, he was a research fellow with INRIA Rennes-Bretagne Atlantique, France. His current research interests include networked estimation and control in wireless sensor and actuator networks, cyber-physical systems, task mapping and resource allocation in embedded systems. He serves as an Associate Editor for KSII Transactions on Internet and Information Systems, and International Journal of Ad Hoc and Ubiquitous Computing, and a TPC Member for several international conferences.

<figure><img src="image_14.png" /></figure>

**Xinmei Li** received her B.S. degree in automation engineering from Sichuan University, Chengdu, China, in 2021. She is currently working towards the M.S. degree in Control Science and Engineering at South-east University, Nanjing, China. Her current research interests include embedded and real-time systems, and network-on-chip.

<figure><img src="image_15.png" /></figure>

**Angeliki Kritikakou** is currently an Associate Professor at University of Rennes 1 and IRISA - INRIA Rennes research center. She received her Ph.D. in 2013 from the Department of Electrical and Computer Engineering at University of Patras, Greece and in collaboration with IMEC Research Center, Belgium. She worked for one year as a Postdoctoral Research Fellow at the Department of Modelling and Information Processing (DTIM) at ONERA in collaboration with Laboratory of Analysis and Architecture of Systems (LAAS) and the University of Toulouse, France. Her

research interests include embedded systems, real-time systems, mixed-critical systems, hardware/software co-design, mapping methodologies, design space exploration methodologies, memory management methodologies, low power design, and fault tolerance.

<figure><img src="image_16.png" /></figure>

**Xiaojun Zhai** (SM'21) is currently a Reader in the Embedded Intelligent Systems Laboratory at the University of Essex. He has authored/co-authored over 140 scientific papers in international journals and conference proceedings. His research interests mainly include the design and implementation of the digital image and signal processing algorithms, custom computing using FPGAs, embedded systems, and hardware/software co-design.