# Control of Battery-Integrated MMCs with NLM using Distributed Control Architecture

Arvind Balachandran, Tomas Jonsson, Lars Eriksson

► To cite this version:

Arvind Balachandran, Tomas Jonsson, Lars Eriksson. Control of Battery-Integrated MMCs with NLM using Distributed Control Architecture. The 26th European Conference on Power Electronics and Applications, GDR SEEDS France & EPE Association, Mar 2025, Paris, France. 10.34746/epe2025-0253. [https://doi.org/10.5087231]

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https://utc.hal.science/hal-05087231v1

Submitted on 27 May 2025

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Distributed under a Creative Commons Attribution 4.0 International License
# Control of Battery-Integrated MMCs with NLM using Distributed Control Architecture

Arvind balachandran†, Tomas Jonsson†,‡, Lars Eriksson†

†Department of Electrical Engineering, Linköping University, Linköping, Sweden

‡Scania CV AB, Sodertälje, Sweden

E-Mail: {arvind.balachandran, tomas.u.jonsson, lars.eriksson}@liu.se

**Abstract**—Battery-integrated modular multilevel converters (BI-MMCs) have several series-connected submodules, each with a small battery module. This design has high cell-level control, potentially improving efficiency and battery lifespan compared to traditional EV battery inverter systems. A distributed control architecture is preferred for BI-MMCs with a large number of submodules, and in such control architectures, the communication network limits the sample rate of the reference signal. For variable speed drives, where the fundamental frequency can be up to a few kHz, the reference sampling frequency can adversely affect the submodule battery current quality and accuracy. The concept of reconstructing the reference signal at a higher sampling frequency than the communication link's update rate for BI-MMCs using nearest level modulation is introduced and validated through simulations and experimental results.

**Index Terms**—Modular Reconfigurable Batteries, Nearest level modulation, Modular Multilevel Converters (MMC), Three-phase motor drive, Distributed Control

## I. INTRODUCTION

Electric vehicle (EV) powertrains typically have a battery pack with many series and parallel connected low voltage cells [1]. Due to differences in leakage currents and cell inhomogeneities, the total energy the pack can deliver is limited by the weak cells in the pack [2]. To overcome this limitation, individual cell monitoring and balancing is preferred [3]. Moreover, EVs typically use two-level inverters with high switching frequencies to reduce the size of the passive components [4]. Wide band-gap devices are increasing in popularity due to the high efficiency [4], but the high $dv/dt$ spikes can have adverse effects on the longevity of the motor windings [5]. To overcome the challenges above, battery-integrated modular multilevel converters (BI-MMCs) have gained popularity in research and industry due to their high efficiency, high cell level control, and high fault tolerance [6]–[11]. A typical BI-MMC structure

has many series-connected inverters (called submodules), each powered by a battery module with a few cells.

To achieve good dynamic performance in EVs, a fast torque response (approximately 1 ms) is required, and the digital control algorithm has a high sampling frequency (around 10 kHz) [12]. Carrier-based pulse-width modulation is commonly employed in BI-MMC motor drives, offering the advantage of low output THD [7]–[9]. To keep the battery losses low, the switching harmonics in the battery currents are bypassed through DC capacitors [10], but this increases the stress on the DC capacitors [11]. Nearest level modulation (NLM) is suitable for BI-MMCs with many submodules due to its low switching frequency (low switching losses), simple implementation, low THD [13], and low stresses on the DC capacitors.

A distributed control architecture is preferred for BI-MMCs with a large number of submodules [14], [15], where a central unit handles converter-level tasks such as current control, balancing, etc., while submodule units manage switching, state-of-charge estimation, and modulation, etc. [16], [17]. The communication link between the central and submodule controllers is usually a protocol-based communication link, which ensures precise timing, synchronization, scalability, and fault tolerance [18], [19]. Ethernet-based communication links such as EtherCAT are widely used in MMCs and can achieve update periods of about 100 µs depending on the bus load [20], [21]. Alternatively, SyCCo Bus and RealSync can achieve update periods of about 25 to 10 µs, but with an increased cost [22].

The reference signal sample period in the submodules is limited by the communication link's network update period (or cycle period) [23]. The sampling period of the reference signal affects the output waveform quality in BI-MMCs using NLM [24]. As the fundamental frequency increases at higher motor speeds, the impact of the reference signal sampling period becomes
<table><caption>TABLE I: Nomenclature</caption><thead><tr><th>Symbol</th><th>Description</th></tr></thead><tbody><tr><td>BI-MMC</td><td>Battery-integrated modular multilevel converter</td></tr><tr><td>f<sub>e</sub></td><td>Fundamental (motor electrical) frequency</td></tr><tr><td>i<sub>b,k</sub></td><td>Instantaneous battery current of k<sup>th</sup>-submodule</td></tr><tr><td>i&#773;<sub>b,k</sub></td><td>Average battery current of k<sup>th</sup>-submodule</td></tr><tr><td>i<sub>o</sub></td><td>Instantaneous output current</td></tr><tr><td>L&#773;<sub>k</sub></td><td>Level of k<sup>th</sup>-submodule in NLM</td></tr><tr><td>M</td><td>Modulation index</td></tr><tr><td>NLM</td><td>Nearest level modulation</td></tr><tr><td>N<sub>s(c)</sub></td><td>Number of series-connected cells per submodule</td></tr><tr><td>N<sub>sm</sub></td><td>Number of submodules per phase</td></tr><tr><td>N<sub>p(c)</sub></td><td>Number of parallel-connected cells per submodule</td></tr><tr><td>PMSM</td><td>Permanent magnet synchronous machine</td></tr><tr><td>R</td><td>Redundant submodules per phase in pu</td></tr><tr><td>SM<sub>k</sub></td><td>k<sup>th</sup>-submodule</td></tr><tr><td>T<sub>c</sub></td><td>Central control unit sampling period</td></tr><tr><td>T<sub>sm</sub></td><td>Submodule control unit sampling period</td></tr><tr><td>V<sub>c(min)</sub></td><td>Minimum cell voltage</td></tr><tr><td>V<sub>o,ph</sub></td><td>Phase-to-neutral output voltage</td></tr><tr><td>v<sub>o</sub></td><td>Instantaneous output voltage</td></tr><tr><td>v&#773;<sub>o</sub></td><td>Converter reference voltage</td></tr><tr><td>V<sub>s</sub></td><td>Submodule DC-link voltage</td></tr><tr><td>v<sub>sm</sub></td><td>Instantaneous submodule voltage</td></tr><tr><td>&alpha;<sub>k</sub></td><td>Firing angle of k<sup>th</sup>-submodule</td></tr><tr><td>&gamma;</td><td>Central to submodule control units' sampling ratio</td></tr></tbody></table>

more significant. This effect is particularly noticeable with the growing adoption of high-speed motors in EV applications [25]–[27]. Several resampling methods have been proposed to improve the effective sampling period of the reference signal for MMCs, particularly in carrier-based pulse-width modulation used in grid-connected applications with fundamental frequencies of 50 Hz or 60 Hz [28]–[30]. While MMC and BI-MMC motor drives for high-power applications have been studied extensively in the literature, most investigations have focused on configurations with three to five submodules per phase, and studies involving a larger number of submodules often relied on centralized control architectures [31]–[35]. Distributed control is a prevalent architecture in BI-MMCs for applications such as BESS, HVDC, FACTS, and STATCOM.

## A. Contributions

The main contribution is reconstructing the reference signal at the submodule controller level with a higher sampling frequency than the communication link's update frequency for BI-MMCs using NLM in a distributed control architecture. A comparative assessment of the output current THD and the average SM battery currents over one fundamental period is presented to evaluate the effectiveness of the proposed method.

## II. TOPOLOGY AND MODULATION

Fig. 1a shows a 3-phase single-star full-bridge BI-MMC, which has $N_{sm}$ series-connected DC-AC converters per phase, called submodules (SM), and

$$N_{sm} = \left[ \frac{V_{o,ph} \sqrt{2}}{V_{c(min)} N_{s(c)} (1 - \mathcal{R})} \right], \quad (1)$$

where $V_{o,ph}$ is the output RMS phase-to-neutral voltage, $V_{c(min)}$ is the minimum cell voltage, $N_{s(c)}$ is the number of series-connected cells per SM, and $\mathcal{R}$ is the number of redundant submodules in per-units (pu).

The full-bridge SM, shown in Fig. 1b, has two complementary switch pairs, $S_1-S_2$ and $S_3-S_4$, respectively. The output voltage of the full-bridge SM ($v_{sm}$) is

$$v_{sm} = \begin{cases} V_s & S_1 \text{ and } S_4 \text{ are on,} \\ 0 & (S_2 \text{ and } S_4) \text{ or } (S_1 \text{ and } S_3) \text{ are on,} \\ -V_s & S_2 \text{ and } S_3 \text{ are on,} \end{cases} \quad (2)$$

where $V_s$ is the SM DC-link voltage. $v_{sm} = \pm V_s$ and $v_{sm} = 0$, are referred to as insertion and bypass states, respectively. The instantaneous output phase-to-neutral voltage of the BI-MMC ($v_o$) is

$$v_o(t) = \sum_{k=1}^{N_{sm}} v_{sm,k}(t), \quad (3)$$

where $k$ is the SM index.

<figure><img src="image_2.png" /><figcaption>Fig. 1: The schematic of (a) single-star three-phase BI-MMC and (b) the full-bridge submodule.</figcaption></figure>
A BI-MMC full-bridge SM (Fig. 1b) has $N_{s(c)}$ series- and $N_{p(c)}$ parallel-connected cells. $N_{s(c)}$ is a design variable; increasing $N_{s(c)}$ decreases cell-level control and the number of levels in $v_o$. $N_{p(c)}$ is determined from the total energy of the battery pack. The DC-link capacitors are used to limit the drain-to-source voltage ripple of the high-side switches ($S_1$ and $S_3$) during the switching transient.

## A. Nearest Level Modulation

The nearest level modulation (NLM) is a low-frequency switching modulation technique where a sinusoidal reference signal ($v_o^*$) is compared with voltage levels ($L_k$) to give the switching states [13]. The NLM for a 4-SM single-star full-bridge SM-based BI-MMC with modulation index, $M = 0.95$ over one quarter-period with a naturally sampled (infinite sample frequency) $v_o^*$ is shown in Fig. 2, where it is assumed that all the SMs have the same $V_s$. $L_1$ to $L_4$ are the voltage levels defined as

$$L_k = V_s (k - 0.5), \quad k \in \{1, \dots, N_{sm}\}. \quad (4)$$

In Fig. 2, when $v_o^*(t) \ge L_1$, the output voltage ($v_o$) is equal to $V_s$, and when $v_o^*(t) \ge L_2$, $v_o = 2V_s$, and so on. The crossings of $v_o^*$ with $L_k$ give a step in $v_o$ indicating a change in the output voltage of SM$_k$. The angle (or instance) at which a step change in $v_o$ occurs, is the firing angle ($\alpha_k$), and for a naturally sampled $v_o^*$,

$$\alpha_k = \sin^{-1} \left( \min \left( \frac{k - 0.5}{MN_{sm}}, 1 \right) \right), \quad 0 \le \alpha_k \le \frac{\pi}{2}. \quad (5)$$

The number of firing angles is equal to $N_{sm}$, for instance in Fig. 2, $\alpha_1 = 7.56^\circ$, $\alpha_2 = 22.25^\circ$, $\alpha_3 = 41.14^\circ$, and $\alpha_4 = 67.08^\circ$.

In NLM, $v_o^*$ is approximated with a stepped sine waveform $v_o$ with a step size of $V_s$ (when $v_o^*$ is naturally

<figure><img src="image_3.png" /><figcaption>Fig. 2: The nearest level modulation scheme for 4 SM single-star full-bridge based BI-MMC.</figcaption></figure>

<figure><img src="image_4.png" /><figcaption>Fig. 3: 4-SM single-star full-bridge based BI-MMC with NLM.</figcaption></figure>

sampled). There exists an error between $v_o^*$ and the fundamental component of $v_o$, and the largest error is $V_s/2$ [36]. However, a current controller with a well-tuned closed-loop bandwidth will compensate for the error. Furthermore, for low $M$ and low $N_{sm}$ (high $N_{s(c)}$), large-amplitude low-order harmonics are present [37]. However, as $N_{sm}$ increases (low $N_{s(c)}$), the error and magnitude of the low-order harmonics decrease.

Assuming the converter to be lossless, then the time-average input and output power of the SM are equal, and the average battery current in SM$_k$ over a fundamental cycle ($\bar{i}_{b,k}$) for a naturally sampled $v_o^*$ is

$$\bar{i}_{b,k}(t) = 2 \frac{\hat{i}_o}{\pi} \cos \alpha_k \cos \phi, \quad (6)$$

where $\hat{i}_o$ is the magnitude of the output current's fundamental component, and $\phi$ is the phase angle between $v_o$ and $i_o$. The duration of the insertion states of the SMs are not identical (SM$_1$ and SM$_4$ shown in Fig. 3), thus creating an imbalance in the respective $\bar{i}_{b,k}$ (From (6)). This imbalance is mitigated using a sorted list, where the battery management system generates an ordered sequence of SMs. By dynamically swapping the SM duty cycles based on this list, balanced charging and discharging of the SM batteries are achieved over several fundamental periods [38]–[40].

## III. CONTROL ARCHITECTURE

The distributed control architecture of a single-star full-bridge-based BI-MMC, shown in Fig. 4, has one
<figure><img src="image_5.png" /><figcaption>Fig. 4: Distributed control architecture block diagram.</figcaption></figure>

central control unit and every SM has its own SM control unit. The central control unit handles the current control, balancing, etc., and transmits the reference voltages in dq-frame ($v_d^*$ and $v_q^*$, which are the output of the motor control algorithm), synchronization signal (synq), and the fundamental frequency ($f_e$) over a communication link. The central control unit operates with a sampling period of $T_c$, meaning its output is updated every $T_c$ seconds. For simplicity, the communication link's network update period is assumed to be equal to $T_c$. This update period refers to the time between two consecutive data frames. While the sample periods of the control unit and the communication link can differ, they should be selected in a way that ensures the closed-loop system stability [41].

The SM control unit handles the modulation, state-of-charge estimation, etc. In the SM control unit, the electrical angle ($\theta_e$) is derived from the fundamental frequency ($f_e$) transmitted by the central control unit. $\theta_e$ for all SMs per phase is synchronized using a (synq) signal. One approach is for the synq signal to have periodic pulses that reset $\theta_e$ ($\theta_e = 0$) in all the SMs. Alternatively, more advanced algorithms can be employed to synchronize the SM control units more effectively [42]. The magnitude and angle of $v_o^*$ is determined from $\theta_e$ and the dq-frame reference voltages ($v_d^*, v_q^*$) using the inverse Park transformation. Thus, the SM control units reconstruct $v_o^*(t)$ locally with a sample period of $T_{sm}$, i.e., $v_o^*(t)$ is updated every $T_{sm}$ seconds. The ratio of the central to SM control unit's sampling period ($\gamma$) is

$$ \gamma = \frac{T_c}{T_{sm}}. \qquad (7) $$

### A. Impact of reference sampling

For BI-MMCs using NLM, output distortion is influenced by the uniform sample period of the reference signal ($v_o^*$). An analytical approach to evaluate this is

developed in [24], where it is shown that the number of output voltage levels ($n_{levels}$) of an $N_{sm}$ single-star full-bridge BI-MMC is

$$ n_{levels} = 2N_{sm} + 1, \quad \text{if } T_{sm} < \frac{1}{2\pi f_e M (N_{sm} - 1)}, \quad (8) $$

where $M$ is the modulation index. When the condition in (8) is satisfied, every SM's insertion contributes to a unique output voltage level. From (7) and (8), the critical value of $\gamma$ ($\gamma_c$) to achieve this is

$$ \gamma_c = 2\pi M f_e T_c (N_{sm} - 1). \qquad (9) $$

When $\gamma \ge \gamma_c$, every SM's insertion contributes to a unique output voltage level, and the output voltage has $n_{levels}$ levels. However, if $\gamma < \gamma_c$, the number of output voltage levels decreases, and at least one pair of SMs will be inserted or bypassed simultaneously.

To show the influence of $\gamma$ on the SM battery currents and the output voltage distortion, the voltage and current waveforms at steady-state of a 4-SM single-star full-bridge BI-MMC phase-leg for $\gamma = 1, 3$, and $\infty$ ($\infty$ indicates naturally sampled), with $f_e = 250$ Hz, $M = 1$, and $T_c = 500$ µs are shown in Fig. 5 (values are chosen arbitrarily). In the figure, $v_o$ is the output voltage, $v_o^*$ is the reference voltage, and the output voltages of $SM_2$ and $SM_3$ are $v_{sm,2}$ and $v_{sm,3}$, respectively; the SM battery currents are $i_{b,2}$ and $i_{b,3}$, respectively; and $\gamma_c$ for the given parameters is about 2.24. The following observations can be made from the figure:

1) When $\gamma = 1$ ($\gamma < \gamma_c$): $v_o^*$ is reconstructed with a sample time of 500 µs ($T_c$), and has 8 samples per fundamental period ($f_e = 250$ Hz), which corresponds to 5 levels (2 levels on the positive and negative side, and 1 level at zero). Since, the number of levels in $v_o^*$ is lower than $2N_{sm} + 1$ (i.e., 9), $v_o$ also has 5 levels, lower than with natural sampling (9 levels). Consequently, $v_o$ has a higher THD compared to natural sampling. Moreover, $SM_2$ and $SM_3$ are inserted ($v_{sm} = V_s$) and bypassed ($v_{sm} = 0$) simultaneously, with identical insertion and bypass periods. As a result, their average battery currents over one fundamental period are non-distinct ($\bar{i}_{b,2} = \bar{i}_{b,3}$), meaning that $SM_2$ and $SM_3$ discharge at the same rate over one fundamental period. In contrast, with natural sampling, $SM_2$ and $SM_3$ are inserted at different times, with distinct insertion and bypass periods, leading to different battery currents for each SM, i.e., $\bar{i}_{b,2} < \bar{i}_{b,3}$. As a consecutive, when $\gamma < \gamma_c$, the precise control of individual average SM battery currents over one fundamental period is reduced (i.e., the sensitivity of $\bar{i}_{b,k}$ to small changes in $M$ is low). The use of SM sorting
<figure><img src="image_6.png" /><figcaption>Fig. 5: The distributed control example waveform at steady-state for $\gamma = 1, 3$, and $\infty$ ($\infty$ indicates naturally sampled) for a 4-SM single-star full-bridge BI-MMC. The calculated $\gamma_c = 2.24$ for the given parameters.</figcaption></figure>

mitigates these imbalances over several fundamental periods, resulting in a balanced operation of SM battery modules.

2) When $\gamma = 3$ ($\gamma > \gamma_c$): $v_o^*$ is reconstructed with a sample time of 166.67 µs ($T_c/3$), and has 24 samples per fundamental period of $v_o$, which corresponds to 15 levels (7 levels on the positive and negative side, and 1 level at zero). Since $v_o^*$ has more than 9 levels ($2N_{sm} + 1$), $v_o$ has the same number of levels as with natural sampling (9 levels). Moreover, SM2 and SM3 are inserted and bypassed at different times. As a result, the battery currents are different ($\bar{i}_{b,2} < \bar{i}_{b,3}$), closer to the $i_{b,k}$ waveforms with natural sampling. From the figure, it is clear that the higher $\gamma$ is the closer the battery current waveforms are to the naturally sampled waveforms. This indicates that the precise control of the average SM battery currents over one fundamental period is high

<table><caption>TABLE II: PMSM, BI-MMC, and field-oriented control parameters.</caption><thead><tr><th>Parameter</th><th>Value</th><th>comments</th></tr></thead><tbody><tr><td>Maximum output power</td><td>400 kW</td><td>1 pu</td></tr><tr><td>Maximum PMSM torque</td><td>1528 Nm</td><td>1 pu</td></tr><tr><td>Nominal speed ($\omega_e$)</td><td>2500 rpm</td><td>1 pu</td></tr><tr><td>Number of pole pairs $n_p$</td><td>6</td><td></td></tr><tr><td>PMSM flux constant</td><td>254.6 mWb</td><td>1 pu</td></tr><tr><td>Stator resistance</td><td>6 mΩ</td><td>0.01 pu</td></tr><tr><td>d-axis inductance</td><td>229.2 µH</td><td>0.6 pu</td></tr><tr><td>q-axis inductance</td><td>343.8 µH</td><td>0.9 pu</td></tr><tr><td>Peak phase-to-neutral voltage</td><td>400 V</td><td>1 pu</td></tr><tr><td>V<sub>c(min)</sub></td><td>3.2 V</td><td></td></tr><tr><td>V<sub>c(nom)</sub></td><td>3.6 V</td><td></td></tr><tr><td>Stator current rise time</td><td>1 ms</td><td></td></tr><tr><td>N<sub>s(c)</sub></td><td>3, 12</td><td></td></tr><tr><td>R</td><td>5%</td><td></td></tr><tr><td>T<sub>c</sub></td><td>100 µs</td><td></td></tr><tr><td>Number of SMs per phase ($N_{sm}$)</td><td>11</td><td>for $N_{s(c)} = 12$</td></tr><tr><td>Number of SMs per phase ($N_{sm}$)</td><td>44</td><td>for $N_{s(c)} = 3$</td></tr></tbody></table>

when $\gamma \ge \gamma_c$ and improves further as $\gamma$ increases (i.e., the sensitivity of $\bar{i}_{b,k}$ to small changes in $M$ is high).

## IV. SIMULATION RESULTS

A closed-loop permanent magnet synchronous machine (PMSM) driven by a three-phase single-star full-bridge SM-based BI-MMC with field-oriented control in dq-frame is modeled to evaluate the impact of $\gamma$ on the average SM battery current over one fundamental period, and output current THD. A fixed-step Runge-kutta 4th order solver is used, and the model of the BI-MMC drive is implemented in Python. The model parameters are shown in Tab. II. The BI-MMC SM switches are modeled as ideal switches, and the SM Li-ion cells are modeled as DC voltage sources with a nominal voltage of $V_{c(nom)}$. Simulations are performed for $N_{s(c)} = 3$, and 12, ($N_{sm} = 44$ and 11, respectively), and the BI-MMC is simulated at 1 pu (rated) current and different speeds ($\omega_e = 1, 2$, and $2.5$ pu). $N_{s(c)} = 3$ and 12 are selected to represent the effect of high and low degrees of cell-level control, respectively. The PMSM model equations and the field-oriented control parameters are determined using [41]. The controller sample time is set to 100 µs since the update rate of EtherCAT (most commonly used in MMCs) is around 100 µs [20]. The current set points

<table><caption>TABLE III: $\gamma_c$ for different $N_{s(c)}$ and motor speeds (fundamental frequencies) with $T_c = 100$ µs.</caption><thead><tr><th>ω<sub>e</sub> [pu] (f<sub>e</sub> in Hz)</th><th>1 (250 Hz)</th><th>2 (500 Hz)</th><th>2.5 (625 Hz)</th></tr></thead><tbody><tr><td>γ<sub>c</sub> at N<sub>s(c)</sub> = 3</td><td>6.42</td><td>12.83</td><td>16.04</td></tr><tr><td>γ<sub>c</sub> at N<sub>s(c)</sub> = 12</td><td>1.49</td><td>2.98</td><td>3.73</td></tr></tbody></table>
of the controller (field-oriented control) are selected from
a look-up table based on the maximum torque per ampere
with field weakening.

$\gamma_c$ for the simulated conditions is presented in Tab. III, and it is clear that, for a given $N_{s(c)}$ and $T_c$, $\gamma_c$ increases with an increase in $\omega_e$. This is because as $f_e$ increases, a lower sample time ($T_{sm}$) for the SM control units is required to ensure that the number of sample points per fundamental period in $v_o^*$ gives more than $2N_{sm} + 1$ levels in $v_o$. For a given $\omega_e$ and $T_c$, there is an increase in $\gamma_c$ with a decrease in $N_{s(c)}$ (increase in $N_{sm}$). As the number of SMs increases, the number of levels in $v_o$ increases, and a lower $T_{sm}$ is required to ensure that the number of sample points per fundamental period in $v_o^*$ gives more than $2N_{sm} + 1$ levels in $v_o$.

The simulated output voltage ($v_o$), output current ($i_o$), and reference voltage ($v_o^*$) waveforms over one fundamental period at steady-state for a BI-MMC PMSM drive with $N_{s(c)} = 12$ ($N_{sm} = 11$) using NLM modulation

<figure><img src="image_7.png" /><figcaption>Fig. 6: Simulated converter reference ($v_o^*$), output voltage ($v_o$), and output current ($i_o$) waveforms over one fundamental period at steady-state for $N_{s(c)} = 12$ ($N_{sm} = 11$) at $\omega_e = 2.5$ pu ($f_e = 625$ Hz) at rated current.</figcaption></figure>

<figure><img src="image_8.png" /><figcaption>Fig. 7: THD of the output current ($THD_I$) at different motor speeds at rated-current.</figcaption></figure>

<figure><img src="image_9.png" /><figcaption>Fig. 8: Simulated reference voltage ($v_o^*$), SM output voltage ($v_{sm,k}$), and battery currents ($i_{b,k}$) at steady state for two adjacent SMs (SM6 and SM7) in a phase-leg of a BI-MMC PMSM drive at rated output current.</figcaption></figure>

scheme at $\omega_e = 2.5$ pu ($f_e = 625$ Hz) at rated current are shown in Fig. 6. For the above conditions, $\gamma_c = 3.73$ (From (9)). It is clear that $v_o$ has 8 to 9 levels ($< 2N_{sm} + 1$) for $\gamma = 1$ ($\gamma < \gamma_c$) and 23 levels ($2N_{sm} + 1$) for $\gamma = 10$ ($\gamma > \gamma_c$). Since the fundamental frequency is high, the ripples in $v_o$ are filtered significantly by the motor inductance, resulting in low ripple content in $i_o$ for both $\gamma = 1$ and 10.

The output current THD ($THD_I$) for different $\gamma$, $N_{s(c)}$ and $\omega_e$ is shown in Fig. 7. It is clear that $THD_I$ is higher for $\gamma = 1$ compared to $\gamma = 10$ for all $N_{s(c)}$ and $\omega_e$. At $\gamma = 1$, $THD_I$ does not decrease with increasing motor speed for all $N_{s(c)}$, because the number of levels in $v_o^*$ (and consequently in $v_o$) balances the filtering effect (which is $\propto \omega_e$) of the motor inductance. Furthermore, $THD_I$ is higher for $N_{s(c)} = 12$ compared to $N_{s(c)} = 3$ across all $\gamma$ values and motor speeds, but especially for $\gamma = 1$. This occurs because, although the number of levels in $v_o^*$ is the same for both $N_{s(c)}$ (for $\gamma = 1$), the number of levels in $v_o$ is higher for $N_{s(c)} = 3$ than for $N_{s(c)} = 12$, due to the larger $N_{sm}$. This happens because the higher the number of $N_{sm}$, the more sensitive $v_o$ in NLM is to small steps in $v_o^*$.

The simulated battery currents ($i_{b,k}$), SM output voltage ($v_{sm,k}$) of two adjacent SM indices (SM6 and SM7), and the reference voltage ($v_o^*$) with the SM-levels ($L_k$) in a phase-leg of the BI-MMC drive with $N_{s(c)} = 12$ ($N_{sm} = 11$) are shown in Fig. 8. For the above conditions, $\gamma_c = 3.73$ (From (9)). From the figure, it is evident that when $\gamma = 1$ ($\gamma < \gamma_c$), SM6 and SM7
<figure><img src="image_10.png" /><figcaption>(a)</figcaption></figure>

<figure><img src="image_11.png" /><figcaption>(b)</figcaption></figure>

<caption>Fig. 9: The average battery current $\bar{i}_{b,k}$ for individual SMs in a phase-leg of the BI-MMC PMSM drive operated at rated output current. (a) $N_{s(c)} = 12$ and (b) $N_{s(c)} = 3$.</caption>

are inserted and bypassed simultaneously with identical periods and instances, resulting in identical $i_{b,6}$ and $i_{b,7}$. When $\gamma = 10$ ($\gamma > \gamma_c$), $SM_6$ and $SM_7$ are inserted and bypassed at different time instances with different insertion and bypass periods, resulting in unique $i_{b,6}$ and $i_{b,7}$ waveforms.

Fig. 9 shows the average battery currents ($\bar{i}_{b,k}$) over one fundamental period at rated output current and $\omega_e = 1, 2$, and $2.5$ pu across all SMs in a phase-leg of the BI-MMC drive for $\gamma = 1$ and $10$. Furthermore, $\bar{i}_{b,k}$ calculated using (6) considering a naturally sampled $v_o^*$ is shown by dashed lines. For $\gamma = 1$ ($\gamma < \gamma_c$), as $\omega_e$ increase, the number of SMs with identical $\bar{i}_{b,k}$ values increases due to the low sampling rate of $v_o^*$. Additionally, for a given $N_{s(c)}$, the deviation of $\bar{i}_{b,k}$ from the naturally sampled $\bar{i}_{b,k}$ grows with increasing $\omega_e$. This deviation reflects the sensitivity of $\bar{i}_{b,k}$ to small changes in $M$. For $\gamma = 10$, where $\gamma > \gamma_c$, all SMs have unique $\bar{i}_{b,k}$ values that

<figure><img src="image_12.png" /><figcaption>Fig. 10: Experimental setup of a 4-SM full-bridge based BI-MMC phase leg with distributed control.</figcaption></figure>

closely match the naturally sampled $\bar{i}_{b,k}$. However, for $N_{s(c)} = 3$ at $\omega_e = 2.5$ pu and $\gamma = 10$, since $\gamma < \gamma_c$, some SM indices have the same $\bar{i}_{b,k}$ values but, the deviation from the naturally sampled $\bar{i}_{b,k}$ is lower compared to $\gamma = 1$. For a given $\gamma$, the precision in controlling battery currents decreases (i.e., sensitivity to small changes in the reference voltage increases) as $\omega_e$ increase.

## V. EXPERIMENTAL RESULTS

A 4-SM full-bridge-based BI-MMC phase leg (shown in Fig. 10) is used for experimental validation of the distributed control architecture using a CAN 2.0 communication link. Every SM has a 24 Ah Samsung NMC prismatic cell (nominal voltage of 3.6 V) and 4 SQJQ142E Vishay Si-MOSFETs. The converter is connected to a series R-L load, which has 5 series-connected Arcol HS200-J 100 mΩ wire wound resistors and two series-connected 46 µH Ferrite core inductors. The control algorithms are implemented on NXPS32K144EVB development boards, where the central control units transmits $|v_o^*|$, $\angle v_o^*$, and $f_e$ over the CAN bus every 500 µs ($T_c = 500$ µs). The SM control units generate $v_o^*(t)$ with sample times ($T_{sm}$) of 500 µs to 100 µs (i.e., $\gamma$ from 1 to 5), and the corresponding gate pulses. The converter is operated at $M = 0.95$ and $f_e = 100, 200$, and 400 Hz replicating different operating speeds. The output current is measured using a LEM 25-P current transducer, battery currents using HSLR 20-P LEM current transducers, and the SM output voltages and output voltage using TMDP0200 differential voltage probes.

<table><caption>TABLE IV: $\gamma_c$ for the experimental setup with $M = 0.95$ and $T_c = 500$ µs for different $f_e$.</caption><thead><tr><th>$f_e$ [Hz]</th><th>100 Hz</th><th>200 Hz</th><th>400 Hz</th></tr></thead><tbody><tr><td>$\gamma_c$</td><td>0.9</td><td>1.79</td><td>3.58</td></tr></tbody></table>
<figure><img src="image_13.png" /><figcaption>Fig. 11: Measured output voltage ($v_o$) and current ($i_o$) for a 4-SM full-bridge based BI-MMC at $f_e$ = 200 Hz and $M$ = 0.95.</figcaption></figure>

<figure><img src="image_14.png" /><figcaption>Fig. 13: Measured battery currents ($i_{b,k}$) and SM voltages ($v_{sm,k}$) for two adjacent SMs (SM$_3$ and SM$_4$) 4-SM full-bridge based BI-MMC at $f_e$ = 200 Hz and $M$ = 0.95.</figcaption></figure>

All the measurements are recorded using a Tektronix MSO58, 500 MHz oscilloscope.

$\gamma_c$ for different $f_e$ is shown in Tab. IV. It is clear that as $f_e$ increases, the $\gamma_c$ increases. The measured output voltage ($v_o$) and current ($i_o$) waveforms are shown in Fig. 11 for $\gamma$ = 1 and 5 at $f_e$ = 200 Hz and $M$ = 0.95. From the $v_o$ waveforms, it is clear that when $\gamma$ = 1 ($\gamma < \gamma_c$), $v_o$ has 5 distinct levels ($< 2N_{sm} + 1$ levels) than when $\gamma$ = 5 ($\gamma > \gamma_c$) where $v_o$ has 9 distinct levels ($2N_{sm} + 1$ levels). Note that the insertion and bypass instances of adjacent SMs are very close (not simulations) for $\gamma$ = 1.

Fig. 12 shows the calculated $THD_I$ from the measured output current for the 4-SM full-bridge based BI-MMC at $f_e$ = 100, 200, and 400 Hz and $M$ = 0.95 for $\gamma$ = 1, 2, and 5. It is clear that as $\gamma$ increases, the $THD_I$ decreases for all $f_e$ values. However, when $\gamma < \gamma_c$, the $THD_I$ is increases as $f_e$ increases.

<figure><img src="image_15.png" /><figcaption>Fig. 12: THD of the measured output current ($THD_I$) for the 4-SM full-bridge based BI-MMC at $M$ = 0.95.</figcaption></figure>

The measured battery current ($i_{b,k}$) and SM voltage ($v_{sm,k}$) waveforms for two adjacent SMs (SM$_3$ and SM$_4$)

<figure><img src="image_16.png" /><figcaption>Fig. 14: Measured average battery current $\bar{i}_{b,k}$ for individual SMs in a phase-leg of the 4-SM full-bridge based BI-MMC at $f_e$ = 100, 200, and 400 Hz and $M$ = 0.95.</figcaption></figure>
is shown in Fig. 13. It is clear that for $\gamma = 1$ ($\gamma < \gamma_c$), $v_{sm,k}$ and $i_{b,k}$ waveforms are similar, and for $\gamma = 5$ ($\gamma > \gamma_c$) $v_{sm,k}$ and $i_{b,k}$ waveforms are different.

Fig. 14 shows the average battery currents ($\bar{i}_{b,k}$) at $f_e = 100, 200$, and 400 Hz for the individual SMs for $\gamma = 1, 2$, and 5. The dashed lines in Fig. 14 are the natural sampling $\bar{i}_{b,k}$ using (6), where $\hat{i}_o$ and $\cos(\phi)$ are determined from the measured $i_o$ and $v_o$. When $\gamma < \gamma_c$ more SMs have the same $\bar{i}_{b,k}$. In contrast, when $\gamma > \gamma_c$, all SMs have unique $\bar{i}_{b,k}$ values and are closer to the naturally sampled $\bar{i}_{b,k}$ values.

## VI. CONCLUSION

The concept of reconstructing the reference signal at a higher sampling frequency than the communication link's update rate for BI-MMCs with the nearest level modulation (NLM) is presented. A control variable, $\gamma$, is introduced representing the ratio of the central to submodule control units' sample times. The minimum $\gamma$ ($\gamma_c$) required to ensure that every SM produces a unique output voltage level is also presented. The concept is validated through simulations of a BI-MMC PMSM drive with $N_{s(c)} = 3$ and 12, and experimentally on a BI-MMC phase-leg with 4 submodules. The assessment of $\gamma$ on the output current THD showed that the THD is very low (<1%) even for $\gamma = 1$, and as $\gamma$ increases, the THD decreases further. The assessment of $\gamma$ on the accuracy (i.e., compared to naturally sampled) of average SM battery current over one fundamental cycle showed that the accuracy increases with an increase in $\gamma$. However, over several fundamental cycles, a sorting algorithm can ensure that the average submodule battery current is controlled to a desired value.

This study demonstrates the use of distributed control architecture for BI-MMC drives with NLM, which can reduce the communication burden between the submodule and central control units, contribute to a reduction in the system's cost and complexity, and potentially improve scalability. In applications where precise control of the average submodule battery current over one fundamental period is required, using SM reference reconstruction can be beneficial.

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