# Interference propagation in two stage PV inverters

Amin Gholizad, Jan Desmet, Jos Knockaert

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Amin Gholizad, Jan Desmet, Jos Knockaert. Interference propagation in two stage PV inverters. The 26th European Conference on Power Electronics and Applications, GDR SEEDS France & EPE Association, Mar 2025, Paris, France. 10.34746/epe2025-0293. hal-05082118

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Submitted on 23 May 2025

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# Interference propagation in two stage PV inverters

Amin Gholizad, Jan Desmet, Jos Knockaert

Ghent University, EELab/Lemcko

Graaf Karel de Goedelaan 5 and 34

Kortrijk, Belgium

Tel.: +32 / 56 32 20 30

E-Mail: amin.gholizad@ugent.be, janj.desmet@ugent.be, jos.knockaert@ugent.be

URL: https://lemcko.ugent.be

## ACKNOWLEDGMENT

This research is funded by Flanders Innovation & Entrepreneurship and is part of the cSBO project IMPERFECT (HBC.2021.0175).

*Index Terms*—PV inverter, DC-DC converter, Common-mode current, harmonics.

*Abstract*—In this paper, current harmonic propagation of a two stage PV inverter is investigated in both common mode and differential mode in the supraharmonics range [2 – 150 kHz]. The harmonics of the DC/AC inverter are present in both common mode and differential mode. In most cases only inverter harmonics are considered in filtering. However, it is seen that DC/DC converter harmonic currents are present in common mode of the output current of the inverter at grid side. Therefore, appropriate common mode filtering is needed to take into account for DC/DC converter harmonics as well. This finding is simulated in MATLAB/Simulink and verified through a commercial PV inverter with PV emulator.

## I. INTRODUCTION

The solar power generation has become more accessible in recent years due to advancement and cost reductions in photovoltaic (PV) technologies. The PV installations in the urban areas have been increased with environmental and economic incentives. Increasing number of inverters has caused several power quality issues in the utility grid specially in high frequency range known as supraharmonics.

There are mainly two ways to increase the PV panel voltage to be used in a grid connected inverter, connecting PV panels in series which is not recommended [1] or using a DC/DC step up converter. Therefore, a two-stage inverter (TSI) is a popular option in grid connected

PV systems [2]–[6]. They are also more common when storage system is also included [2], [7].

A TSI consist of a switched mode DC/DC converter at the first stage, which steps up low input voltage from solar panels into higher levels suitable for distribution grid. The second stage is an inverter that operates under a separate control strategy where it converts the DC voltage into the AC in order to inject power to the low voltage distribution grid.

In the literature, inverters are considered the only source of supraharmonics emissions and the DC/DC converters are neglected [8]–[12] or the switching frequency is assumed to be the same or one is a multiple of the other [13]–[18]. However, this might not be the case specially in large solar farms or electrical vehicle DC charging station where usually there is an intermediate DC grid [7], [19], [20]. The DC/DC converter is solely responsible for maximum power point tracking (MPPT), while the inverter manages the DC link voltage by injecting power into the grid [5], [7], [10], [11], [19]. These two control loops are independent thus they can effectively be separate devices in separate locations. Therefore, there is no guarantee that their switching frequencies will be the same.

A typical TSI is shown in Fig. 1a the first stage is a boost converter and second stage is a single phase H-Bridge inverter. There is an LCL filter at the output as well. In application, the MOSFETs are attached to a heatsink that is connected to the protective earth (PE). There is a thermally conducting compound between the backplate of the MOSFET and the heatsink that is electrically non-conductive. This mandatory connection creates unwanted capacitances between the drain of a MOSFET and the PE [21], [22]. Fig. 1b shows these
parasitic capacitances in the model. These parasitic capacitances denoted by $C_{hs}$ in Fig. 1b are typically several to tens of pico-farads, depending on the MOSFET package size and thermal compound dielectric and its thickness. These capacitors are smaller than PV to ground parasitic capacitances ranging from several to hundreds of nano-farads [10], [12], [17] and they are usually ignored in the studies [12], [13], [15]. However in this study these are included.

<figure><img src="image_2.png" /></figure>

<figure><img src="image_3.png" /><figcaption>Fig. 1. TSI consisting of a boost converter and an H-Bridge inverter (a) typical (b) with parasitic capacitances</figcaption></figure>

Another noticeable difference between Fig. 1a and Fig. 1b is that inductances are split between phase and neutral in Fig. 1b which provides better filtering in presence of CM path.

## II. SIMULATIONS

The TSI in Fig. 1b is used to connect a PV string with the predefined model of FS-6450A to the grid. The simulation parameter are gathered in Table. I. The 95% flattop shape is used as grid voltage in order to better represent real grid conditions according to IEC standards [23]. The perturb and observe algorithm is used for MPPT. The simulation time is one second. As can be seen from Fig. 2 the model reaches steady state after 300 ms data after which data is used for frequency domain analysis. The simulation sampling frequency is 4 MHz which is an integer multiple of both switching frequencies which is important for optimal FFT calculation.

The grid current in CM and DM are shown in Fig. 3 as can be seen supraharmonics in the DM are mitigated

<table><caption>TABLE I
Simulation parameters</caption><thead><tr><td>parameter</td><td>value</td></tr></thead><tbody><tr><td>PV : V<sub>oc</sub></td><td>221.1 V</td></tr><tr><td>PV : I<sub>sc</sub></td><td>2.57 A</td></tr><tr><td>PV : V<sub>m</sub></td><td>186.8 V</td></tr><tr><td>PV : I<sub>m</sub></td><td>2.41 A</td></tr><tr><td>V<sub>DC link</sub></td><td>400 V</td></tr><tr><td>V<sub>g</sub></td><td>230 V<sub>rms</sub></td></tr><tr><td>F<sub>g</sub></td><td>50 Hz</td></tr><tr><td>F<sub>swi</sub></td><td>16 kHz</td></tr><tr><td>F<sub>swc</sub></td><td>20 kHz</td></tr><tr><td>C<sub>hs</sub></td><td>50 pF</td></tr><tr><td>C<sub>PV</sub></td><td>20 nF</td></tr><tr><td>C<sub>DClink</sub></td><td>2 mF</td></tr><tr><td>C<sub>in</sub></td><td>100 uF</td></tr><tr><td>L<sub>boost</sub></td><td>2 mH</td></tr><tr><td>L<sub>f1</sub></td><td>8.05 mH</td></tr><tr><td>L<sub>f2</sub></td><td>29.95 mH</td></tr><tr><td>C<sub>f</sub></td><td>1.33 μF</td></tr></tbody></table>

<figure><img src="image_4.png" /><figcaption>Fig. 2. control signals during the simulation</figcaption></figure>

successfully and only second harmonic of the inverter switching frequency is visible from the background and it is less than 20 μA. However, in CM odd harmonics of the inverter switching frequency and all harmonics of the converter harmonics have not been mitigated and since $f_{swi}$ and $f_{swc}$ are not an integer multiple of one another, their linear combinations (i.e., $nf_{swi} \pm mf_{swc}$) are also in the spectrum, to name a few 4, 8, 12, 24, 28 and 36 kHz, are not harmonics of the switching frequencies and they are so called inter-harmonics.

Fig. 3 also shows the frequency spectrum of the output current in CM and DM mode after adding a CM choke between DC link and DC/DC converter as shown in Fig. 4. Adding this CM choke helps in lowering the CM noise significantly. Overall RMS value for the CM current ($I_{CM,rms}$) is reduced 80% and $I_{CM,20 kHz}$ is 90% smaller. The inverter generated harmonics are also reduced notably $I_{CM,16 kHz}$ is reduced 80%.
<figure><img src="image_5.png" /><figcaption>Fig. 3. Simulation case for symmetric LCL filter</figcaption></figure>

<figure><img src="image_6.png" /><figcaption>Fig. 4. TSI with added CM choke in the DC side</figcaption></figure>

### III. MEASUREMENTS

For conducting this measurement the setup in Fig. 5 is used, the PV emulator unit (Chroma 62050H-600S) is set at 400 V and 1 A. Then, we measured its current characteristics using 333 Ω to 3 kΩ using three 1 kΩ resistors in parallel and series configurations. The measured currents spectrum are shown in Fig. 6. We chose different resistor values to check any behavior changes in different loading levels of the emulator and simulate different current levels that are present in a sinusoidal AC grid. The 333 Ω requires more than MPP and therefore emulator voltage switches from constant voltage mode (i,e., 400 V) to constant current mode and the voltage falls to 333 V. Then we connected the emulator to the PV inverter (SMA-Solar MODSBHF.BG1) and connected the inverter to the grid via the LISN and measured the current using the LISN measurement port. This Experiment is repeated with the CM choke (WE-CLFS 810911001) added between the PV emulator and the resistor or the PV inverter. A Picoscope 5440 is used for capturing the currents from Tektronix TCP312A currents probes in conjunction to Tektronix TCPA300 amplifiers.

As can be seen from Fig. 6, by decreasing the resistance and therefore loading on the emulator harmonics around 20 kHz and its multiples increase specially in the CM current. There are also fluctuating interferences at 80 kHz and its multiples which are in both CM and DM currents at lower loadings and they decrease in

specially in CM current at higher loadings. Therefore, these interferences can be assigned to the PV emulator.

Fig. 7 shows the PV inverter output current spectrum at the same setting of the PV emulator measured through the LISN. As it can be seen, along side of the previous interferences the harmonics of 16 kHz are also present in the spectrum indicating the inverter generated interferences. The provided output filter of the PV inverter is not as perfect as in the simulation therefore DM current is also polluted with both inverter and emulator generated interferences. Compared to Fig. 6b which has the largest 20 kHz interference at 40 µA in CM, the corresponding interference is 4 mA in Fig. 7 in DM and 100 µA in CM current.

Fig. 8 shows the PV inverter current after adding the CM choke between PV emulator and PV inverter. In comparison to Fig. 7, not only the higher order harmonics are mitigated in CM current, but also the interferences at both switching frequencies are decreases both in CM and DM currents. The $I_{CM,16kHz}$ has decreased 85%, $I_{CM,20kHz}$ has decreased 40% and also $I_{DM,16kHz}$ has decreased 55%, $I_{DM,20kHz}$ has decreased 45%.

### IV. CONCLUSION

The TSI grid side CM current noise includes DC/DC converter switching harmonics. This is more evident in the case that $f_{sw_i}$ and $f_{sw_c}$ are not the same or one is not a multiple of the other as the corresponding harmonics are in distinguishable frequencies.

This paper shows that an appropriate CM choke between DC link and DC/DC converter is necessary to reduce this interferences. This claim is proven by simulation in MATLAB/Simulink and validated through experiment using a PV emulator and a PV inverter that is connected to the utility grid.

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<figure><img src="image_7.png" /><figcaption>Fig. 5. Experimental setup</figcaption></figure>
<figure><img src="image_8.png" /><figcaption>(a)</figcaption></figure>

<figure><img src="image_9.png" /><figcaption>(b)</figcaption></figure>

<figure><img src="image_10.png" /><figcaption>(c)</figcaption></figure>

<figure><img src="image_11.png" /><figcaption>(d)</figcaption></figure>

<figure><img src="image_12.png" /><figcaption>Fig. 7. Grid tied PV inverter output current</figcaption></figure>

<figure><img src="image_13.png" /><figcaption>Fig. 8. Grid tied PV inverter output current after adding CM choke in the DC side</figcaption></figure>

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